1 /* jit/i386/codegen.h - code generation macros and definitions for i386
3 Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
4 R. Grafl, A. Krall, C. Kruegel, C. Oates, R. Obermaisser,
5 M. Probst, S. Ring, E. Steiner, C. Thalinger, D. Thuernbeck,
6 P. Tomsich, J. Wenninger
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
25 Contact: cacao@complang.tuwien.ac.at
27 Authors: Andreas Krall
30 $Id: codegen.h 1139 2004-06-05 20:57:12Z twisti $
43 /* define x86 register numbers */
54 /* preallocated registers *****************************************************/
56 /* integer registers */
58 #define REG_RESULT EAX /* to deliver method results */
59 #define REG_RESULT2 EDX /* to deliver long method results */
61 #define REG_ITMP1 EAX /* temporary register */
62 #define REG_ITMP2 ECX /* temporary register */
63 #define REG_ITMP3 EDX /* temporary register */
65 #define REG_NULL -1 /* used for reg_of_var where d is not needed */
67 #define REG_ITMP1_XPTR EAX /* exception pointer = temporary register 1 */
68 #define REG_ITMP2_XPC ECX /* exception pc = temporary register 2 */
70 #define REG_SP ESP /* stack pointer */
72 /* floating point registers */
74 #define REG_FRESULT 0 /* to deliver floating point method results */
75 #define REG_FTMP1 6 /* temporary floating point register */
76 #define REG_FTMP2 7 /* temporary floating point register */
77 #define REG_FTMP3 7 /* temporary floating point register */
80 /* additional functions and macros to generate code ***************************/
82 #define BlockPtrOfPC(pc) ((basicblock *) iptr->target)
86 #define COUNT_SPILLS count_spills++
92 #define CALCOFFSETBYTES(var, reg, val) \
93 if ((s4) (val) < -128 || (s4) (val) > 127) (var) += 4; \
94 else if ((s4) (val) != 0) (var) += 1; \
95 else if ((reg) == EBP) (var) += 1;
98 #define CALCIMMEDIATEBYTES(var, val) \
99 if ((s4) (val) < -128 || (s4) (val) > 127) (var) += 4; \
103 /* gen_nullptr_check(objreg) */
105 #define gen_nullptr_check(objreg) \
107 i386_test_reg_reg((objreg), (objreg)); \
108 i386_jcc(I386_CC_E, 0); \
109 codegen_addxnullrefs(mcodeptr); \
112 #define gen_bound_check \
114 i386_alu_membase_reg(I386_CMP, s1, OFFSET(java_arrayheader, size), s2); \
115 i386_jcc(I386_CC_AE, 0); \
116 codegen_addxboundrefs(mcodeptr, s2); \
120 /* MCODECHECK(icnt) */
122 #define MCODECHECK(icnt) \
123 if ((mcodeptr + (icnt)) > (u1*) mcodeend) mcodeptr = (u1*) codegen_increase((u1*) mcodeptr)
126 generates an integer-move from register a to b.
127 if a and b are the same int-register, no code will be generated.
130 #define M_INTMOVE(reg,dreg) if ((reg) != (dreg)) { i386_mov_reg_reg((reg),(dreg)); }
134 generates a floating-point-move from register a to b.
135 if a and b are the same float-register, no code will be generated
138 #define M_FLTMOVE(reg,dreg) panic("M_FLTMOVE");
140 #define M_LNGMEMMOVE(reg,dreg) \
142 i386_mov_membase_reg(REG_SP, (reg) * 8, REG_ITMP1); \
143 i386_mov_reg_membase(REG_ITMP1, REG_SP, (dreg) * 8); \
144 i386_mov_membase_reg(REG_SP, (reg) * 8 + 4, REG_ITMP1); \
145 i386_mov_reg_membase(REG_ITMP1, REG_SP, (dreg) * 8 + 4); \
150 this function generates code to fetch data from a pseudo-register
151 into a real register.
152 If the pseudo-register has actually been assigned to a real
153 register, no code will be emitted, since following operations
154 can use this register directly.
156 v: pseudoregister to be fetched from
157 tempregnum: temporary register to be used if v is actually spilled to ram
159 return: the register number, where the operand can be found after
160 fetching (this wil be either tempregnum or the register
161 number allready given to v)
164 #define var_to_reg_int(regnr,v,tempnr) \
165 if ((v)->flags & INMEMORY) { \
167 i386_mov_membase_reg(REG_SP, (v)->regoff * 8, tempnr); \
170 regnr = (v)->regoff; \
175 #define var_to_reg_flt(regnr,v,tempnr) \
176 if ((v)->type == TYPE_FLT) { \
177 if ((v)->flags & INMEMORY) { \
179 i386_flds_membase(REG_SP, (v)->regoff * 8); \
183 i386_fld_reg((v)->regoff + fpu_st_offset); \
185 regnr = (v)->regoff; \
188 if ((v)->flags & INMEMORY) { \
190 i386_fldl_membase(REG_SP, (v)->regoff * 8); \
194 i386_fld_reg((v)->regoff + fpu_st_offset); \
196 regnr = (v)->regoff; \
200 #define NEW_var_to_reg_flt(regnr,v,tempnr) \
201 if ((v)->type == TYPE_FLT) { \
202 if ((v)->flags & INMEMORY) { \
204 i386_flds_membase(REG_SP, (v)->regoff * 8); \
208 regnr = (v)->regoff; \
211 if ((v)->flags & INMEMORY) { \
213 i386_fldl_membase(REG_SP, (v)->regoff * 8); \
217 regnr = (v)->regoff; \
222 /* store_reg_to_var_xxx:
223 This function generates the code to store the result of an operation
224 back into a spilled pseudo-variable.
225 If the pseudo-variable has not been spilled in the first place, this
226 function will generate nothing.
228 v ............ Pseudovariable
229 tempregnum ... Number of the temporary registers as returned by
233 #define store_reg_to_var_int(sptr, tempregnum) \
234 if ((sptr)->flags & INMEMORY) { \
236 i386_mov_reg_membase(tempregnum, REG_SP, (sptr)->regoff * 8); \
240 #define store_reg_to_var_flt(sptr, tempregnum) \
241 if ((sptr)->type == TYPE_FLT) { \
242 if ((sptr)->flags & INMEMORY) { \
244 i386_fstps_membase(REG_SP, (sptr)->regoff * 8); \
247 /* i386_fxch_reg((sptr)->regoff);*/ \
248 i386_fstp_reg((sptr)->regoff + fpu_st_offset); \
252 if ((sptr)->flags & INMEMORY) { \
254 i386_fstpl_membase(REG_SP, (sptr)->regoff * 8); \
257 /* i386_fxch_reg((sptr)->regoff);*/ \
258 i386_fstp_reg((sptr)->regoff + fpu_st_offset); \
264 /* macros to create code ******************************************************/
279 /* opcodes for alu instructions */
307 I386_CC_B = 2, I386_CC_C = 2, I386_CC_NAE = 2,
308 I386_CC_BE = 6, I386_CC_NA = 6,
309 I386_CC_AE = 3, I386_CC_NB = 3, I386_CC_NC = 3,
310 I386_CC_E = 4, I386_CC_Z = 4,
311 I386_CC_NE = 5, I386_CC_NZ = 5,
312 I386_CC_A = 7, I386_CC_NBE = 7,
313 I386_CC_S = 8, I386_CC_LZ = 8,
314 I386_CC_NS = 9, I386_CC_GEZ = 9,
315 I386_CC_P = 0x0a, I386_CC_PE = 0x0a,
316 I386_CC_NP = 0x0b, I386_CC_PO = 0x0b,
317 I386_CC_L = 0x0c, I386_CC_NGE = 0x0c,
318 I386_CC_GE = 0x0d, I386_CC_NL = 0x0d,
319 I386_CC_LE = 0x0e, I386_CC_NG = 0x0e,
320 I386_CC_G = 0x0f, I386_CC_NLE = 0x0f,
325 /* modrm and stuff */
327 #define i386_address_byte(mod, reg, rm) \
328 *(mcodeptr++) = ((((mod) & 0x03) << 6) | (((reg) & 0x07) << 3) | (((rm) & 0x07)));
331 #define i386_emit_reg(reg,rm) \
332 i386_address_byte(3,(reg),(rm));
335 #define i386_is_imm8(imm) \
336 (((int)(imm) >= -128 && (int)(imm) <= 127))
339 #define i386_emit_imm8(imm) \
340 *(mcodeptr++) = (u1) ((imm) & 0xff);
343 #define i386_emit_imm16(imm) \
346 imb.i = (int) (imm); \
347 *(mcodeptr++) = imb.b[0]; \
348 *(mcodeptr++) = imb.b[1]; \
352 #define i386_emit_imm32(imm) \
355 imb.i = (int) (imm); \
356 *(mcodeptr++) = imb.b[0]; \
357 *(mcodeptr++) = imb.b[1]; \
358 *(mcodeptr++) = imb.b[2]; \
359 *(mcodeptr++) = imb.b[3]; \
363 #define i386_emit_mem(r,mem) \
365 i386_address_byte(0,(r),5); \
366 i386_emit_imm32((mem)); \
370 #define i386_emit_membase(basereg,disp,dreg) \
372 if ((basereg) == ESP) { \
374 i386_address_byte(0, (dreg), ESP); \
375 i386_address_byte(0, ESP, ESP); \
376 } else if (i386_is_imm8((disp))) { \
377 i386_address_byte(1, (dreg), ESP); \
378 i386_address_byte(0, ESP, ESP); \
379 i386_emit_imm8((disp)); \
381 i386_address_byte(2, (dreg), ESP); \
382 i386_address_byte(0, ESP, ESP); \
383 i386_emit_imm32((disp)); \
388 if ((disp) == 0 && (basereg) != EBP) { \
389 i386_address_byte(0, (dreg), (basereg)); \
393 if (i386_is_imm8((disp))) { \
394 i386_address_byte(1, (dreg), (basereg)); \
395 i386_emit_imm8((disp)); \
397 i386_address_byte(2, (dreg), (basereg)); \
398 i386_emit_imm32((disp)); \
403 #define i386_emit_memindex(reg,disp,basereg,indexreg,scale) \
405 if ((basereg) == -1) { \
406 i386_address_byte(0, (reg), 4); \
407 i386_address_byte((scale), (indexreg), 5); \
408 i386_emit_imm32((disp)); \
410 } else if ((disp) == 0 && (basereg) != EBP) { \
411 i386_address_byte(0, (reg), 4); \
412 i386_address_byte((scale), (indexreg), (basereg)); \
414 } else if (i386_is_imm8((disp))) { \
415 i386_address_byte(1, (reg), 4); \
416 i386_address_byte((scale), (indexreg), (basereg)); \
417 i386_emit_imm8 ((disp)); \
420 i386_address_byte(2, (reg), 4); \
421 i386_address_byte((scale), (indexreg), (basereg)); \
422 i386_emit_imm32((disp)); \
427 /* function gen_resolvebranch **************************************************
429 backpatches a branch instruction
431 parameters: ip ... pointer to instruction after branch (void*)
432 so ... offset of instruction after branch (s4)
433 to ... offset of branch target (s4)
435 *******************************************************************************/
437 #define gen_resolvebranch(ip,so,to) \
438 *((void **) ((ip) - 4)) = (void **) ((to) - (so));
441 /* function prototypes */
444 void *codegen_findmethod(void *pc);
445 void init_exceptions();
447 void codegen_close();
448 void dseg_display(s4 *s4ptr);
449 void thread_restartcriticalsection(ucontext_t*);
451 #endif /* _CODEGEN_H */
455 * These are local overrides for various environment variables in Emacs.
456 * Please do not remove this and leave it at the end of the file, where
457 * Emacs will automagically detect them.
458 * ---------------------------------------------------------------------
461 * indent-tabs-mode: t