1 /* src/vm/jit/arm/emit.c - Arm code emitter functions
3 Copyright (C) 1996-2005, 2006, 2007, 2008
4 CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
6 This file is part of CACAO.
8 This program is free software; you can redistribute it and/or
9 modify it under the terms of the GNU General Public License as
10 published by the Free Software Foundation; either version 2, or (at
11 your option) any later version.
13 This program is distributed in the hope that it will be useful, but
14 WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
35 #include "vm/jit/arm/codegen.h"
37 #include "mm/memory.hpp"
39 #include "threads/lock.hpp"
41 #include "vm/global.h"
43 #include "vm/jit/abi.h"
44 #include "vm/jit/asmpart.h"
45 #include "vm/jit/emit-common.hpp"
46 #include "vm/jit/jit.hpp"
47 #include "vm/jit/patcher-common.hpp"
48 #include "vm/jit/replace.hpp"
49 #include "vm/jit/trace.hpp"
50 #include "vm/jit/trap.hpp"
52 #include "toolbox/logging.hpp" /* XXX for debugging only */
55 /* emit_load *******************************************************************
57 Emits a possible load of an operand.
59 *******************************************************************************/
61 s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
67 /* get required compiler data */
71 if (src->flags & INMEMORY) {
74 disp = src->vv.regoff;
76 #if defined(ENABLE_SOFTFLOAT)
81 M_ILD(tempreg, REG_SP, disp);
85 M_LLD(tempreg, REG_SP, disp);
88 vm_abort("emit_load: unknown type %d", src->type);
94 M_ILD(tempreg, REG_SP, disp);
97 M_LLD(tempreg, REG_SP, disp);
100 M_FLD(tempreg, REG_SP, disp);
103 M_DLD(tempreg, REG_SP, disp);
106 vm_abort("emit_load: unknown type %d", src->type);
113 reg = src->vv.regoff;
119 /* emit_load_low ***************************************************************
121 Emits a possible load of the low 32-bits of a long source operand.
123 *******************************************************************************/
125 s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
131 assert(src->type == TYPE_LNG);
133 /* get required compiler data */
137 if (src->flags & INMEMORY) {
140 disp = src->vv.regoff;
142 #if defined(__ARMEL__)
143 M_ILD(tempreg, REG_SP, disp);
145 M_ILD(tempreg, REG_SP, disp + 4);
151 reg = GET_LOW_REG(src->vv.regoff);
157 /* emit_load_high **************************************************************
159 Emits a possible load of the high 32-bits of a long source operand.
161 *******************************************************************************/
163 s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
169 assert(src->type == TYPE_LNG);
171 /* get required compiler data */
175 if (src->flags & INMEMORY) {
178 disp = src->vv.regoff;
180 #if defined(__ARMEL__)
181 M_ILD(tempreg, REG_SP, disp + 4);
183 M_ILD(tempreg, REG_SP, disp);
189 reg = GET_HIGH_REG(src->vv.regoff);
195 /* emit_store ******************************************************************
197 Emits a possible store to a variable.
199 *******************************************************************************/
201 void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
206 /* get required compiler data */
210 if (dst->flags & INMEMORY) {
213 disp = dst->vv.regoff;
215 #if defined(ENABLE_SOFTFLOAT)
220 M_IST(d, REG_SP, disp);
224 M_LST(d, REG_SP, disp);
227 vm_abort("emit_store: unknown type %d", dst->type);
233 M_IST(d, REG_SP, disp);
236 M_LST(d, REG_SP, disp);
239 M_FST(d, REG_SP, disp);
242 M_DST(d, REG_SP, disp);
245 vm_abort("emit_store: unknown type %d", dst->type);
252 /* emit_copy *******************************************************************
254 Generates a register/memory to register/memory copy.
256 *******************************************************************************/
258 void emit_copy(jitdata *jd, instruction *iptr)
265 /* get required compiler data */
269 /* get source and destination variables */
271 src = VAROP(iptr->s1);
272 dst = VAROP(iptr->dst);
274 /* XXX dummy call, removed me!!! */
275 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
277 if ((src->vv.regoff != dst->vv.regoff) ||
278 ((src->flags ^ dst->flags) & INMEMORY)) {
280 if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
281 /* emit nothing, as the value won't be used anyway */
285 /* If one of the variables resides in memory, we can eliminate
286 the register move from/to the temporary register with the
287 order of getting the destination register and the load. */
289 if (IS_INMEMORY(src->flags)) {
290 #if !defined(ENABLE_SOFTFLOAT)
291 if (IS_FLT_DBL_TYPE(src->type))
292 d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
296 if (IS_2_WORD_TYPE(src->type))
297 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
299 d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
302 s1 = emit_load(jd, iptr, src, d);
305 #if !defined(ENABLE_SOFTFLOAT)
306 if (IS_FLT_DBL_TYPE(src->type))
307 s1 = emit_load(jd, iptr, src, REG_FTMP1);
311 if (IS_2_WORD_TYPE(src->type))
312 s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
314 s1 = emit_load(jd, iptr, src, REG_ITMP1);
317 d = codegen_reg_of_var(iptr->opc, dst, s1);
321 #if defined(ENABLE_SOFTFLOAT)
326 /* XXX grrrr, wrong direction! */
331 /* XXX grrrr, wrong direction! */
332 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
333 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
336 vm_abort("emit_copy: unknown type %d", src->type);
342 /* XXX grrrr, wrong direction! */
346 /* XXX grrrr, wrong direction! */
347 M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
348 M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
357 vm_abort("emit_copy: unknown type %d", src->type);
362 emit_store(jd, iptr, dst, d);
367 /* emit_iconst *****************************************************************
371 *******************************************************************************/
373 void emit_iconst(codegendata *cd, s4 d, s4 value)
380 disp = dseg_add_s4(cd, value);
381 M_DSEG_LOAD(d, disp);
387 * Emits code updating the condition register by comparing one integer
388 * register to an immediate integer value.
390 void emit_icmp_imm(codegendata* cd, int reg, int32_t value)
395 M_CMP_IMM(reg, value);
396 } else if (IS_IMM(-value)) {
397 M_CMN_IMM(reg, -value);
399 assert(reg != REG_ITMP3);
400 disp = dseg_add_s4(cd, value);
401 M_DSEG_LOAD(REG_ITMP3, disp);
402 M_CMP(reg, REG_ITMP3);
407 /* emit_branch *****************************************************************
409 Emits the code for conditional and unconditional branchs.
411 *******************************************************************************/
413 void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
418 /* calculate the different displacements */
420 checkdisp = (disp - 8);
421 branchdisp = (disp - 8) >> 2;
423 /* check which branch to generate */
425 if (condition == BRANCH_UNCONDITIONAL) {
426 /* check displacement for overflow */
428 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
429 /* if the long-branches flag isn't set yet, do it */
431 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
432 cd->flags |= (CODEGENDATA_FLAG_ERROR |
433 CODEGENDATA_FLAG_LONGBRANCHES);
436 vm_abort("emit_branch: emit unconditional long-branch code");
443 /* and displacement for overflow */
445 if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
446 /* if the long-branches flag isn't set yet, do it */
448 if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
449 cd->flags |= (CODEGENDATA_FLAG_ERROR |
450 CODEGENDATA_FLAG_LONGBRANCHES);
453 vm_abort("emit_branch: emit conditional long-branch code");
479 vm_abort("emit_branch: unknown condition %d", condition);
486 /* emit_arithmetic_check *******************************************************
488 Emit an ArithmeticException check.
490 *******************************************************************************/
492 void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
494 if (INSTRUCTION_MUST_CHECK(iptr)) {
497 M_TRAPEQ(0, TRAP_ArithmeticException);
502 /* emit_nullpointer_check ******************************************************
504 Emit a NullPointerException check.
506 *******************************************************************************/
508 void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
510 if (INSTRUCTION_MUST_CHECK(iptr)) {
512 M_TRAPEQ(0, TRAP_NullPointerException);
516 void emit_nullpointer_check_force(codegendata *cd, instruction *iptr, s4 reg)
519 M_TRAPEQ(0, TRAP_NullPointerException);
523 /* emit_arrayindexoutofbounds_check ********************************************
525 Emit a ArrayIndexOutOfBoundsException check.
527 *******************************************************************************/
529 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
531 if (INSTRUCTION_MUST_CHECK(iptr)) {
532 M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_array_t, size));
533 M_CMP(s2, REG_ITMP3);
534 M_TRAPHS(s2, TRAP_ArrayIndexOutOfBoundsException);
539 /* emit_arraystore_check *******************************************************
541 Emit an ArrayStoreException check.
543 *******************************************************************************/
545 void emit_arraystore_check(codegendata *cd, instruction *iptr)
547 if (INSTRUCTION_MUST_CHECK(iptr)) {
548 M_TST(REG_RESULT, REG_RESULT);
549 M_TRAPEQ(0, TRAP_ArrayStoreException);
554 /* emit_classcast_check ********************************************************
556 Emit a ClassCastException check.
558 *******************************************************************************/
560 void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
562 if (INSTRUCTION_MUST_CHECK(iptr)) {
565 M_TRAPEQ(s1, TRAP_ClassCastException);
569 M_TRAPNE(s1, TRAP_ClassCastException);
573 M_TRAPLT(s1, TRAP_ClassCastException);
577 M_TRAPLE(s1, TRAP_ClassCastException);
581 M_TRAPHI(s1, TRAP_ClassCastException);
585 vm_abort("emit_classcast_check: unknown condition %d", condition);
590 /* emit_exception_check ********************************************************
592 Emit an Exception check.
594 *******************************************************************************/
596 void emit_exception_check(codegendata *cd, instruction *iptr)
598 if (INSTRUCTION_MUST_CHECK(iptr)) {
599 M_TST(REG_RESULT, REG_RESULT);
600 M_TRAPEQ(0, TRAP_CHECK_EXCEPTION);
605 /* emit_trap_compiler **********************************************************
607 Emit a trap instruction which calls the JIT compiler.
609 *******************************************************************************/
611 void emit_trap_compiler(codegendata *cd)
613 M_TRAP(REG_METHODPTR, TRAP_COMPILER);
617 /* emit_trap *******************************************************************
619 Emit a trap instruction and return the original machine code.
621 *******************************************************************************/
623 uint32_t emit_trap(codegendata *cd)
627 /* Get machine code which is patched back in later. The
628 trap is 1 instruction word long. */
630 mcode = *((uint32_t *) cd->mcodeptr);
632 M_TRAP(0, TRAP_PATCHER);
639 * Emit code to recompute the procedure vector.
641 void emit_recompute_pv(codegendata *cd)
643 // This is used to recompute our PV (we use the IP for this) out
644 // of the current PC.
645 int32_t disp = (int32_t) (cd->mcodeptr - cd->mcodebase);
647 // We use PC relative addressing.
651 assert((disp & 0x03) == 0);
652 assert(disp >= 0 && disp <= 0x03ffffff);
654 // ATTENTION: If you change this, you have to look at other functions
655 // as well! Following things depend on it: md_codegen_get_pv_from_pc();
656 if (disp > 0x0003ffff) {
657 M_SUB_IMM(REG_PV, REG_PC, IMM_ROTL(disp >> 18, 9));
658 M_SUB_IMM(REG_PV, REG_PV, IMM_ROTL(disp >> 10, 5));
659 M_SUB_IMM(REG_PV, REG_PV, IMM_ROTL(disp >> 2, 1));
660 } else if (disp > 0x000003ff) {
661 M_SUB_IMM(REG_PV, REG_PC, IMM_ROTL(disp >> 10, 5));
662 M_SUB_IMM(REG_PV, REG_PV, IMM_ROTL(disp >> 2, 1));
664 M_SUB_IMM(REG_PV, REG_PC, IMM_ROTL(disp >> 2, 1));
670 * Generates synchronization code to enter a monitor.
672 #if defined(ENABLE_THREADS)
673 void emit_monitor_enter(jitdata* jd, int32_t syncslot_offset)
677 // Get required compiler data.
678 methodinfo* m = jd->m;
679 codegendata* cd = jd->cd;
681 # if !defined(NDEBUG)
682 if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
683 M_STMFD(BITMASK_ARGS, REG_SP);
684 syncslot_offset += 4 * 4;
688 /* get the correct lock object */
690 if (m->flags & ACC_STATIC) {
691 disp = dseg_add_address(cd, &m->clazz->object.header);
692 M_DSEG_LOAD(REG_A0, disp);
695 emit_nullpointer_check_force(cd, NULL, REG_A0);
698 M_STR(REG_A0, REG_SP, syncslot_offset);
699 disp = dseg_add_functionptr(cd, LOCK_monitor_enter);
701 emit_recompute_pv(cd);
703 # if !defined(NDEBUG)
704 if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
705 M_LDMFD(BITMASK_ARGS, REG_SP);
712 * Generates synchronization code to leave a monitor.
714 #if defined(ENABLE_THREADS)
715 void emit_monitor_exit(jitdata* jd, int32_t syncslot_offset)
719 // Get required compiler data.
720 methodinfo* m = jd->m;
721 codegendata* cd = jd->cd;
723 /* we need to save the proper return value */
725 methoddesc* md = m->parseddesc;
727 switch (md->returntype.type) {
731 case TYPE_FLT: /* XXX TWISTI: is that correct? */
733 M_STMFD(BITMASK_RESULT, REG_SP);
734 syncslot_offset += 2 * 4;
738 M_LDR(REG_A0, REG_SP, syncslot_offset);
739 disp = dseg_add_functionptr(cd, LOCK_monitor_exit);
742 /* we no longer need PV here, no more loading */
743 /*emit_recompute_pv(cd);*/
745 switch (md->returntype.type) {
749 case TYPE_FLT: /* XXX TWISTI: is that correct? */
751 M_LDMFD(BITMASK_RESULT, REG_SP);
758 /* emit_verbosecall_enter ******************************************************
760 Generates the code for the call trace.
762 *******************************************************************************/
765 void emit_verbosecall_enter(jitdata *jd)
774 /* get required compiler data */
782 /* mark trace code */
786 /* Keep stack 8-byte aligned. */
788 M_STMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
789 M_SUB_IMM(REG_SP, REG_SP, md->paramcount * 8);
791 /* save argument registers */
793 for (i = 0; i < md->paramcount; i++) {
794 if (!md->params[i].inmemory) {
795 s = md->params[i].regoff;
797 switch (md->paramtypes[i].type) {
801 M_IST(s, REG_SP, i * 8);
805 M_LST(s, REG_SP, i * 8);
811 disp = dseg_add_address(cd, m);
812 M_DSEG_LOAD(REG_A0, disp);
813 M_MOV(REG_A1, REG_SP);
814 M_ADD_IMM(REG_A2, REG_SP, md->paramcount * 8 + 2 * 4 + cd->stackframesize * 8);
815 M_LONGBRANCH(trace_java_call_enter);
817 /* restore argument registers */
819 for (i = 0; i < md->paramcount; i++) {
820 if (!md->params[i].inmemory) {
821 s = md->params[i].regoff;
823 switch (md->paramtypes[i].type) {
827 M_ILD(s, REG_SP, i * 8);
831 M_LLD(s, REG_SP, i * 8);
837 /* Keep stack 8-byte aligned. */
839 M_ADD_IMM(REG_SP, REG_SP, md->paramcount * 8);
840 M_LDMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
842 /* mark trace code */
846 #endif /* !defined(NDEBUG) */
849 /* emit_verbosecall_exit *******************************************************
851 Generates the code for the call trace.
853 *******************************************************************************/
856 void emit_verbosecall_exit(jitdata *jd)
864 /* get required compiler data */
872 /* mark trace code */
876 /* Keep stack 8-byte aligned. */
878 M_STMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
879 M_SUB_IMM(REG_SP, REG_SP, 1 * 8);
881 /* save return value */
883 switch (md->returntype.type) {
887 M_IST(REG_RESULT, REG_SP, 0 * 8);
891 M_LST(REG_RESULT_PACKED, REG_SP, 0 * 8);
895 disp = dseg_add_address(cd, m);
896 M_DSEG_LOAD(REG_A0, disp);
897 M_MOV(REG_A1, REG_SP);
898 M_LONGBRANCH(trace_java_call_exit);
900 /* restore return value */
902 switch (md->returntype.type) {
906 M_ILD(REG_RESULT, REG_SP, 0 * 8);
910 M_LLD(REG_RESULT_PACKED, REG_SP, 0 * 8);
914 /* Keep stack 8-byte aligned. */
916 M_ADD_IMM(REG_SP, REG_SP, 1 * 8);
917 M_LDMFD((1<<REG_LR) | (1<<REG_PV), REG_SP);
919 /* mark trace code */
923 #endif /* !defined(NDEBUG) */
927 * Emit profiling code for method frequency counting.
928 * Its slow but working, so be carefull, if you want to use it...
930 #if defined(ENABLE_PROFILING)
931 void emit_profile_method(codegendata* cd, codeinfo* code)
933 ICONST(REG_ITMP3,code);
934 M_LDR(REG_ITMP2,REG_ITMP3,OFFSET(codeinfo, frequency));
935 M_ADD_IMM(REG_ITMP2, REG_ITMP2, 1);
936 M_STR(REG_ITMP2,REG_ITMP3,OFFSET(codeinfo, frequency));
937 // M_TRAP(0, TRAP_DEBUG);
943 * Emit profiling code for basicblock frequency counting.
944 * Its slow but working, so be carefull, if you want to use it...
946 #if defined(ENABLE_PROFILING)
947 void emit_profile_basicblock(codegendata* cd, codeinfo* code, basicblock* bptr)
949 ICONST(REG_ITMP3,code);
950 M_LDR(REG_ITMP2,REG_ITMP3,OFFSET(codeinfo, bbfrequency));
951 M_ADD_IMM(REG_ITMP2, REG_ITMP2, 1);
952 M_STR(REG_ITMP2,REG_ITMP3,OFFSET(codeinfo, bbfrequency));
958 * Emit profiling code to start CPU cycle counting.
960 #if defined(ENABLE_PROFILING)
961 void emit_profile_cycle_start(codegendata* cd, codeinfo* code)
963 // XXX Not implemented yet!
969 * Emit profiling code to stop CPU cycle counting.
971 #if defined(ENABLE_PROFILING)
972 void emit_profile_cycle_stop(codegendata* cd, codeinfo* code)
974 // XXX Not implemented yet!
979 * These are local overrides for various environment variables in Emacs.
980 * Please do not remove this and leave it at the end of the file, where
981 * Emacs will automagically detect them.
982 * ---------------------------------------------------------------------
985 * indent-tabs-mode: t
989 * vim:noexpandtab:sw=4:ts=4: