Merged revisions 7918-7939 via svnmerge from
[cacao.git] / src / vm / jit / arm / codegen.c
1 /* src/vm/jit/arm/codegen.c - machine code generator for Arm
2
3    Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6    J. Wenninger, Institut f. Computersprachen - TU Wien
7
8    This file is part of CACAO.
9
10    This program is free software; you can redistribute it and/or
11    modify it under the terms of the GNU General Public License as
12    published by the Free Software Foundation; either version 2, or (at
13    your option) any later version.
14
15    This program is distributed in the hope that it will be useful, but
16    WITHOUT ANY WARRANTY; without even the implied warranty of
17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18    General Public License for more details.
19
20    You should have received a copy of the GNU General Public License
21    along with this program; if not, write to the Free Software
22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23    02110-1301, USA.
24
25    $Id: codegen.c 7934 2007-05-22 10:07:21Z michi $
26
27 */
28
29
30 #include "config.h"
31
32 #include <assert.h>
33 #include <stdio.h>
34
35 #include "vm/types.h"
36
37 #include "md-abi.h"
38
39 #include "vm/jit/arm/arch.h"
40 #include "vm/jit/arm/codegen.h"
41
42 #include "mm/memory.h"
43
44 #include "native/native.h"
45
46 #include "threads/lock-common.h"
47
48 #include "vm/builtin.h"
49 #include "vm/exceptions.h"
50 #include "vm/global.h"
51 #include "vm/vm.h"
52
53 #include "vm/jit/asmpart.h"
54 #include "vm/jit/codegen-common.h"
55 #include "vm/jit/dseg.h"
56 #include "vm/jit/emit-common.h"
57 #include "vm/jit/jit.h"
58 #include "vm/jit/md.h"
59 #include "vm/jit/methodheader.h"
60 #include "vm/jit/parse.h"
61 #include "vm/jit/patcher.h"
62 #include "vm/jit/reg.h"
63
64 #if defined(ENABLE_LSRA)
65 #include "vm/jit/allocator/lsra.h"
66 #endif
67
68 #include "vmcore/loader.h"
69 #include "vmcore/options.h"
70
71
72 /* codegen_emit ****************************************************************
73
74    Generates machine code.
75
76 *******************************************************************************/
77
78 bool codegen_emit(jitdata *jd)
79 {
80         methodinfo         *m;
81         codeinfo           *code;
82         codegendata        *cd;
83         registerdata       *rd;
84         s4              i, t, len;
85         s4              s1, s2, s3, d;
86         s4              disp;
87         varinfo        *var;
88         basicblock     *bptr;
89         instruction    *iptr;
90         exception_entry *ex;
91         s4              fieldtype;
92         s4              varindex;
93
94         s4              spilledregs_num;
95         s4              savedregs_num;
96         u2              savedregs_bitmask;
97         u2              currentline;
98
99         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE* */
100         unresolved_method  *um;
101         builtintable_entry *bte;
102         methoddesc         *md;
103
104         /* get required compiler data */
105
106         m    = jd->m;
107         code = jd->code;
108         cd   = jd->cd;
109         rd   = jd->rd;
110
111         /* prevent compiler warnings */
112
113         lm  = NULL;
114         um  = NULL;
115         bte = NULL;
116
117         fieldtype = -1;
118         
119         /* space to save used callee saved registers */
120
121         savedregs_num = (jd->isleafmethod) ? 0 : 1;       /* space to save the LR */
122         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
123         savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
124
125         spilledregs_num = rd->memuse;
126
127 #if defined(ENABLE_THREADS)        /* space to save argument of monitor_enter */
128         if (checksync && (m->flags & ACC_SYNCHRONIZED))
129                 spilledregs_num++;
130 #endif
131
132         cd->stackframesize = spilledregs_num + savedregs_num;
133
134         /* XXX QUICK FIX: We shouldn't align the stack in Java code, but
135            only in native stubs. */
136         /* align stack to 8-byte */
137
138         cd->stackframesize = (cd->stackframesize + 1) & ~1;
139
140         /* SECTION: Method Header */
141         /* create method header */
142
143         (void) dseg_add_unique_address(cd, code);              /* CodeinfoPointer */
144         (void) dseg_add_unique_s4(cd, cd->stackframesize * 4); /* FrameSize       */
145
146 #if defined(ENABLE_THREADS)
147         /* IsSync contains the offset relative to the stack pointer for the
148            argument of monitor_exit used in the exception handler. Since the
149            offset could be zero and give a wrong meaning of the flag it is
150            offset by one.
151         */
152
153         if (checksync && (m->flags & ACC_SYNCHRONIZED))
154                 (void) dseg_add_unique_s4(cd, (rd->memuse + 1) * 4);/* IsSync         */
155         else
156 #endif
157                 (void) dseg_add_unique_s4(cd, 0);                  /* IsSync          */
158
159         (void) dseg_add_unique_s4(cd, jd->isleafmethod);       /* IsLeaf          */
160         (void) dseg_add_unique_s4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave */
161         (void) dseg_add_unique_s4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave */
162         (void) dseg_addlinenumbertablesize(cd);
163         (void) dseg_add_unique_s4(cd, jd->exceptiontablelength); /* ExTableSize   */
164
165         /* create exception table */
166
167         for (ex = jd->exceptiontable; ex != NULL; ex = ex->down) {
168                 dseg_add_target(cd, ex->start);
169                 dseg_add_target(cd, ex->end);
170                 dseg_add_target(cd, ex->handler);
171                 (void) dseg_add_unique_address(cd, ex->catchtype.any);
172         }
173
174         /* save return address and used callee saved registers */
175
176         savedregs_bitmask = 0;
177
178         if (!jd->isleafmethod)
179                 savedregs_bitmask = (1<<REG_LR);
180
181         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--)
182                 savedregs_bitmask |= (1<<(rd->savintregs[i]));
183
184 #if !defined(NDEBUG)
185         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
186                 log_text("!!! CODEGEN: floating-point callee saved registers are not saved to stack (SEVERE! STACK IS MESSED UP!)");
187                 /* TODO: floating-point */
188         }
189 #endif
190
191         if (savedregs_bitmask)
192                 M_STMFD(savedregs_bitmask, REG_SP);
193
194         /* create additional stack frame for spilled variables (if necessary) */
195
196         if ((cd->stackframesize - savedregs_num) > 0)
197                 M_SUB_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize - savedregs_num);
198
199         /* take arguments out of register or stack frame */
200
201         md = m->parseddesc;
202         for (i = 0, len = 0; i < md->paramcount; i++) {
203                 s1 = md->params[i].regoff;
204                 t = md->paramtypes[i].type;
205
206                 varindex = jd->local_map[len * 5 + t];
207
208                 len += (IS_2_WORD_TYPE(t)) ? 2 : 1;          /* 2 word type arguments */
209
210                 if (varindex == UNUSED)
211                         continue;
212
213                 var = VAR(varindex);
214
215                 /* ATTENTION: we use interger registers for all arguments (even float) */
216 #if !defined(ENABLE_SOFTFLOAT)
217                 if (IS_INT_LNG_TYPE(t)) {
218 #endif
219                         if (!md->params[i].inmemory) {
220                                 if (!(var->flags & INMEMORY)) {
221                                         if (IS_2_WORD_TYPE(t))
222                                                 M_LNGMOVE(s1, var->vv.regoff);
223                                         else
224                                                 M_INTMOVE(s1, var->vv.regoff);
225                                 }
226                                 else {
227                                         if (IS_2_WORD_TYPE(t))
228                                                 M_LST(s1, REG_SP, var->vv.regoff * 4);
229                                         else
230                                                 M_IST(s1, REG_SP, var->vv.regoff * 4);
231                                 }
232                         }
233                         else {                                   /* stack arguments       */
234                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
235                                         if (IS_2_WORD_TYPE(t))
236                                                 M_LLD(var->vv.regoff, REG_SP, (cd->stackframesize + s1) * 4);
237                                         else
238                                                 M_ILD(var->vv.regoff, REG_SP, (cd->stackframesize + s1) * 4);
239                                 }
240                                 else {                               /* stack arg -> spilled  */
241                                         /* Reuse Memory Position on Caller Stack */
242                                         var->vv.regoff = cd->stackframesize + s1;
243                                 }
244                         }
245 #if !defined(ENABLE_SOFTFLOAT)
246                 }
247                 else {
248                         if (!md->params[i].inmemory) {
249                                 if (!(var->flags & INMEMORY)) {
250                                         M_CAST_INT_TO_FLT_TYPED(t, s1, var->vv.regoff);
251                                 }
252                                 else {
253                                         if (IS_2_WORD_TYPE(t))
254                                                 M_LST(s1, REG_SP, var->vv.regoff * 4);
255                                         else
256                                                 M_IST(s1, REG_SP, var->vv.regoff * 4);
257                                 }
258                         }
259                         else {
260                                 if (!(var->flags & INMEMORY)) {
261                                         if (IS_2_WORD_TYPE(t))
262                                                 M_DLD(var->vv.regoff, REG_SP, (cd->stackframesize + s1) * 4);
263                                         else
264                                                 M_FLD(var->vv.regoff, REG_SP, (cd->stackframesize + s1) * 4);
265                                 }
266                                 else {
267                                         /* Reuse Memory Position on Caller Stack */
268                                         var->vv.regoff = cd->stackframesize + s1;
269                                 }
270                         }
271                 }
272 #endif /* !defined(ENABLE_SOFTFLOAT) */
273         }
274
275 #if defined(ENABLE_THREADS)
276         /* call monitorenter function */
277
278         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
279                 /* stack offset for monitor argument */
280
281                 s1 = rd->memuse;
282
283 # if !defined(NDEBUG)
284                 if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
285                         M_STMFD(BITMASK_ARGS, REG_SP);
286                         s1 += 4;
287                 }
288 # endif
289
290                 /* get the correct lock object */
291
292                 if (m->flags & ACC_STATIC) {
293                         disp = dseg_add_address(cd, &m->class->object.header);
294                         M_DSEG_LOAD(REG_A0, disp);
295                 }
296                 else {
297                         emit_nullpointer_check_force(cd, iptr, REG_A0);
298                 }
299
300                 M_STR(REG_A0, REG_SP, s1 * 4);
301                 disp = dseg_add_functionptr(cd, LOCK_monitor_enter);
302                 M_DSEG_BRANCH(disp);
303                 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
304                 M_RECOMPUTE_PV(s1);
305
306 # if !defined(NDEBUG)
307                 if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
308                         M_LDMFD(BITMASK_ARGS, REG_SP);
309 # endif
310         }
311 #endif
312
313 #if !defined(NDEBUG)
314         /* call trace function */
315
316         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
317                 emit_verbosecall_enter(jd);
318 #endif
319
320         /* end of header generation */
321
322         /* SECTION: ICMD Code Generation */
323         /* for all basic blocks */
324
325         for (bptr = jd->basicblocks; bptr != NULL; bptr = bptr->next) {
326
327                 bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase);
328
329                 /* is this basic block reached? */
330
331                 if (bptr->flags < BBREACHED)
332                         continue;
333
334                 /* branch resolving */
335
336                 codegen_resolve_branchrefs(cd, bptr);
337
338                 /* copy interface registers to their destination */
339
340                 len = bptr->indepth;
341
342                 MCODECHECK(64+len);
343
344 #if defined(ENABLE_LSRA)
345                 if (opt_lsra) {
346                 while (len) {
347                         len--;
348                         var = VAR(bptr->invars[len]);
349                         if ((len == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
350                                 if (!(var->flags & INMEMORY))
351                                         d= var->vv.regoff;
352                                 else
353                                         d=REG_ITMP1;
354                                 M_INTMOVE(REG_ITMP1, d);
355                                 emit_store(jd, NULL, var, d);   
356                         }
357                 }
358                 } else {
359 #endif
360                 while (len) {
361                         len--;
362                         var = VAR(bptr->invars[len]);
363
364                         if ((len == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
365                                 d = codegen_reg_of_var(0, var, REG_ITMP1);
366                                 M_INTMOVE(REG_ITMP1, d);
367                                 emit_store(jd, NULL, var, d);
368                         }
369                         else {
370                                 assert((var->flags & INOUT));
371                         }
372                 }
373 #if defined(ENABLE_LSRA)
374                 }
375 #endif
376
377                 /* for all instructions */
378                 len = bptr->icount;
379                 currentline = 0;
380                 for (iptr = bptr->iinstr; len > 0; len--, iptr++) {
381
382                         /* add line number */
383                         if (iptr->line != currentline) {
384                                 dseg_addlinenumber(cd, iptr->line);
385                                 currentline = iptr->line;
386                         }
387
388                         MCODECHECK(64);   /* an instruction usually needs < 64 words      */
389
390                         /* the big switch */
391                         switch (iptr->opc) {
392                 case ICMD_NOP:        /* ... ==> ...                                  */
393                         break;
394
395         /* constant operations ************************************************/
396
397                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
398
399                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
400                         ICONST(d, iptr->sx.val.i);
401                         emit_store_dst(jd, iptr, d);
402                         break;
403
404                 case ICMD_ACONST:     /* ... ==> ..., constant                        */
405
406                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
407                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
408                                 disp = dseg_add_unique_address(cd, NULL);
409
410                                 codegen_addpatchref(cd, PATCHER_aconst,
411                                                     iptr->sx.val.c.ref,
412                                                                         disp);
413
414                                 if (opt_showdisassemble)
415                                         M_NOP;
416
417                                 M_DSEG_LOAD(d, disp);
418                         }
419                         else {
420                                 ICONST(d, (u4) iptr->sx.val.anyptr);
421                         }
422                         emit_store_dst(jd, iptr, d);
423                         break;
424
425                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
426
427                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
428                         LCONST(d, iptr->sx.val.l);
429                         emit_store_dst(jd, iptr, d);
430                         break;
431
432                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
433
434 #if defined(ENABLE_SOFTFLOAT)
435                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
436                         ICONST(d, iptr->sx.val.i);
437                         emit_store_dst(jd, iptr, d);
438 #else
439                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
440                         FCONST(d, iptr->sx.val.f);
441                         emit_store_dst(jd, iptr, d);
442 #endif
443                         break;
444
445                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
446
447 #if defined(ENABLE_SOFTFLOAT)
448                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
449                         LCONST(d, iptr->sx.val.l);
450                         emit_store_dst(jd, iptr, d);
451 #else
452                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
453                         DCONST(d, iptr->sx.val.d);
454                         emit_store_dst(jd, iptr, d);
455 #endif
456                         break;
457
458
459                 /* load/store/copy/move operations ************************************/
460
461                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
462                 case ICMD_ALOAD:      /* op1 = local variable                         */
463                 case ICMD_FLOAD:
464                 case ICMD_LLOAD:
465                 case ICMD_DLOAD:
466                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
467                 case ICMD_FSTORE:
468                 case ICMD_LSTORE:
469                 case ICMD_DSTORE:
470                 case ICMD_COPY:
471                 case ICMD_MOVE:
472
473                         emit_copy(jd, iptr);
474                         break;
475
476                 case ICMD_ASTORE:
477                         if (!(iptr->flags.bits & INS_FLAG_RETADDR))
478                                 emit_copy(jd, iptr);
479                         break;
480
481                 /* pop operations *****************************************************/
482
483                 /* attention: double and longs are only one entry in CACAO ICMDs      */
484
485                 case ICMD_POP:        /* ..., value  ==> ...                          */
486                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
487
488                         break;
489
490
491                 /* integer operations *************************************************/
492
493                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
494
495                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
496                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
497                         M_MOV(d, REG_LSL(s1, 24));
498                         M_MOV(d, REG_ASR(d, 24));
499                         emit_store_dst(jd, iptr, d);
500                         break;
501
502                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
503
504                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
505                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
506                         M_MOV(d, REG_LSL(s1, 16));
507                         M_MOV(d, REG_LSR(d, 16)); /* ATTENTION: char is unsigned */
508                         emit_store_dst(jd, iptr, d);
509                         break;
510
511                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
512
513                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
514                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
515                         M_MOV(d, REG_LSL(s1, 16));
516                         M_MOV(d, REG_ASR(d, 16));
517                         emit_store_dst(jd, iptr, d);
518                         break;
519
520                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
521
522                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
523                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
524                         M_INTMOVE(s1, GET_LOW_REG(d));
525                         M_MOV(GET_HIGH_REG(d), REG_ASR(s1, 31));
526                         emit_store_dst(jd, iptr, d);
527                         break;
528
529                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
530
531                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
532                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
533                         M_INTMOVE(s1, d);
534                         emit_store_dst(jd, iptr, d);
535                         break;
536
537                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
538
539                         s1 = emit_load_s1(jd, iptr, REG_ITMP1); 
540                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
541                         M_RSB_IMM(d, s1, 0);
542                         emit_store_dst(jd, iptr, d);
543                         break;
544
545                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
546
547                         s1 = emit_load_s1(jd, iptr, REG_ITMP12_PACKED);
548                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
549                         M_RSB_IMMS(GET_LOW_REG(d), GET_LOW_REG(s1), 0);
550                         M_RSC_IMM(GET_HIGH_REG(d), GET_HIGH_REG(s1), 0);
551                         emit_store_dst(jd, iptr, d);
552                         break;
553
554                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
555
556                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
557                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
558                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
559                         M_ADD(d, s1, s2);
560                         emit_store_dst(jd, iptr, d);
561                         break;
562
563                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
564
565                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
566                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
567                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
568                         M_ADD_S(GET_LOW_REG(d), s1, s2);
569                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
570                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
571                         M_ADC(GET_HIGH_REG(d), s1, s2);
572                         emit_store_dst(jd, iptr, d);
573                         break;
574
575                 case ICMD_IADDCONST:
576                 case ICMD_IINC:
577
578                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
579                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
580
581                         if (IS_IMM(iptr->sx.val.i)) {
582                                 M_ADD_IMM(d, s1, iptr->sx.val.i);
583                         } else if (IS_IMM(-iptr->sx.val.i)) {
584                                 M_SUB_IMM(d, s1, (-iptr->sx.val.i));
585                         } else {
586                                 ICONST(REG_ITMP3, iptr->sx.val.i);
587                                 M_ADD(d, s1, REG_ITMP3);
588                         }
589
590                         emit_store_dst(jd, iptr, d);
591                         break;
592
593                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
594                                       /* sx.val.l = constant                          */
595
596                         s3 = iptr->sx.val.l & 0xffffffff;
597                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
598                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
599                         if (IS_IMM(s3))
600                                 M_ADD_IMMS(GET_LOW_REG(d), s1, s3);
601                         else {
602                                 ICONST(REG_ITMP3, s3);
603                                 M_ADD_S(GET_LOW_REG(d), s1, REG_ITMP3);
604                         }
605                         s3 = iptr->sx.val.l >> 32;
606                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP2);
607                         if (IS_IMM(s3))
608                                 M_ADC_IMM(GET_HIGH_REG(d), s1, s3);
609                         else {
610                                 ICONST(REG_ITMP3, s3);
611                                 M_ADC(GET_HIGH_REG(d), s1, REG_ITMP3);
612                         }
613                         emit_store_dst(jd, iptr, d);
614                         break;
615
616                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
617
618                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
619                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
620                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
621                         M_SUB(d, s1, s2);
622                         emit_store_dst(jd, iptr, d);
623                         break;
624
625                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
626
627                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
628                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
629                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
630                         M_SUB_S(GET_LOW_REG(d), s1, s2);
631                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
632                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
633                         M_SBC(GET_HIGH_REG(d), s1, s2);
634                         emit_store_dst(jd, iptr, d);
635                         break;
636
637                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
638                                       /* sx.val.i = constant                          */
639
640                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
641                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
642                         if (IS_IMM(iptr->sx.val.i))
643                                 M_SUB_IMM(d, s1, iptr->sx.val.i);
644                         else {
645                                 ICONST(REG_ITMP3, iptr->sx.val.i);
646                                 M_SUB(d, s1, REG_ITMP3);
647                         }
648                         emit_store_dst(jd, iptr, d);
649                         break;
650
651                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
652                                       /* sx.val.l = constant                          */
653
654                         s3 = iptr->sx.val.l & 0xffffffff;
655                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
656                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
657                         if (IS_IMM(s3))
658                                 M_SUB_IMMS(GET_LOW_REG(d), s1, s3);
659                         else {
660                                 ICONST(REG_ITMP3, s3);
661                                 M_SUB_S(GET_LOW_REG(d), s1, REG_ITMP3);
662                         }
663                         s3 = iptr->sx.val.l >> 32;
664                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP2);
665                         if (IS_IMM(s3))
666                                 M_SBC_IMM(GET_HIGH_REG(d), s1, s3);
667                         else {
668                                 ICONST(REG_ITMP3, s3);
669                                 M_SBC(GET_HIGH_REG(d), s1, REG_ITMP3);
670                         }
671                         emit_store_dst(jd, iptr, d);
672                         break;
673
674                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
675
676                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
677                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
678                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
679                         M_MUL(d, s1, s2);
680                         emit_store_dst(jd, iptr, d);
681                         break;
682
683                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
684                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
685
686                         s1 = emit_load_s1(jd, iptr, REG_A0);
687                         s2 = emit_load_s2(jd, iptr, REG_A1);
688                         emit_arithmetic_check(cd, iptr, s2);
689
690                         /* move arguments into argument registers */
691                         M_INTMOVE(s1, REG_A0);
692                         M_INTMOVE(s2, REG_A1);
693
694                         /* call builtin function */
695                         bte = iptr->sx.s23.s3.bte;
696                         disp = dseg_add_functionptr(cd, bte->fp);
697                         M_DSEG_BRANCH(disp);
698
699                         /* recompute pv */
700                         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
701                         M_RECOMPUTE_PV(s1);
702
703                         /* move result into destination register */
704                         d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
705                         M_INTMOVE(REG_RESULT, d);
706                         emit_store_dst(jd, iptr, d);
707                         break;
708
709                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
710                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
711
712                         /* move arguments into argument registers */
713
714                         s1 = emit_load_s1(jd, iptr, REG_A0_A1_PACKED);
715                         s2 = emit_load_s2(jd, iptr, REG_A2_A3_PACKED);
716                         /* XXX TODO: only do this if arithmetic check is really done! */
717                         M_ORR(GET_HIGH_REG(s2), GET_LOW_REG(s2), REG_ITMP3);
718                         emit_arithmetic_check(cd, iptr, REG_ITMP3);
719
720                         M_LNGMOVE(s1, REG_A0_A1_PACKED);
721                         M_LNGMOVE(s2, REG_A2_A3_PACKED);
722
723                         /* call builtin function */
724                         bte = iptr->sx.s23.s3.bte;
725                         disp = dseg_add_functionptr(cd, bte->fp);
726                         M_DSEG_BRANCH(disp);
727
728                         /* recompute pv */
729                         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
730                         M_RECOMPUTE_PV(s1);
731
732                         /* move result into destination register */
733                         d = codegen_reg_of_dst(jd, iptr, REG_RESULT_PACKED);
734                         M_LNGMOVE(REG_RESULT_PACKED, d);
735                         emit_store_dst(jd, iptr, d);
736                         break;
737
738                 case ICMD_IMULPOW2:   /* ..., value  ==> ..., value * (2 ^ constant)  */
739                                       /* sx.val.i = constant                          */
740
741                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
742                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
743                         M_MOV(d, REG_LSL(s1, iptr->sx.val.i));
744                         emit_store_dst(jd, iptr, d);
745                         break;
746
747                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value / (2 ^ constant)  */
748                                       /* sx.val.i = constant                          */
749
750                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
751                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
752                         /* this rounds towards 0 as java likes it */
753                         M_MOV(REG_ITMP3, REG_ASR(s1, 31));
754                         M_ADD(REG_ITMP3, s1, REG_LSR(REG_ITMP3, 32 - iptr->sx.val.i));
755                         M_MOV(d, REG_ASR(REG_ITMP3, iptr->sx.val.i));
756                         /* this rounds towards nearest, not java style */
757                         /*M_MOV_S(d, REG_ASR(s1, iptr->sx.val.i));
758                         M_ADCMI_IMM(d, d, 0);*/
759                         emit_store_dst(jd, iptr, d);
760                         break;
761
762                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
763                                       /* sx.val.i = constant [ (2 ^ x) - 1 ]          */
764
765                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
766                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
767                         M_MOV_S(REG_ITMP1, s1);
768                         M_RSBMI_IMM(REG_ITMP1, REG_ITMP1, 0);
769                         if (IS_IMM(iptr->sx.val.i))
770                                 M_AND_IMM(REG_ITMP1, iptr->sx.val.i, d);
771                         else {
772                                 ICONST(REG_ITMP3, iptr->sx.val.i);
773                                 M_AND(REG_ITMP1, REG_ITMP3, d);
774                         }
775                         M_RSBMI_IMM(d, d, 0);
776                         emit_store_dst(jd, iptr, d);
777                         break;
778
779                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
780
781                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
782                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
783                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
784                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
785                         M_MOV(d, REG_LSL_REG(s1, REG_ITMP2));
786                         emit_store_dst(jd, iptr, d);
787                         break;
788
789                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
790
791                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
792                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
793                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
794                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
795                         M_MOV(d, REG_ASR_REG(s1, REG_ITMP2));
796                         emit_store_dst(jd, iptr, d);
797                         break;
798
799                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
800
801                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
802                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
803                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
804                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
805                         M_MOV(d, REG_LSR_REG(s1, REG_ITMP2));
806                         emit_store_dst(jd, iptr, d);
807                         break;
808
809                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
810                                       /* sx.val.i = constant                          */
811
812                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
813                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
814                         M_MOV(d, REG_LSL(s1, iptr->sx.val.i & 0x1f));
815                         emit_store_dst(jd, iptr, d);
816                         break;
817
818                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
819                                       /* sx.val.i = constant                          */
820
821                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
822                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
823                         /* we need to check for zero here because arm interprets it as SHR by 32 */
824                         if ((iptr->sx.val.i & 0x1f) == 0) {
825                                 M_INTMOVE(s1, d);
826                         } else {
827                                 M_MOV(d, REG_ASR(s1, iptr->sx.val.i & 0x1f));
828                         }
829                         emit_store_dst(jd, iptr, d);
830                         break;
831
832                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
833                                       /* sx.val.i = constant                          */
834
835                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
836                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
837                         /* we need to check for zero here because arm interprets it as SHR by 32 */
838                         if ((iptr->sx.val.i & 0x1f) == 0)
839                                 M_INTMOVE(s1, d);
840                         else
841                                 M_MOV(d, REG_LSR(s1, iptr->sx.val.i & 0x1f));
842                         emit_store_dst(jd, iptr, d);
843                         break;
844
845                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
846
847                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
848                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
849                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
850                         M_AND(s1, s2, d);
851                         emit_store_dst(jd, iptr, d);
852                         break;
853
854                 case ICMD_LAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
855
856                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
857                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
858                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
859                         M_AND(s1, s2, GET_LOW_REG(d));
860                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
861                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
862                         M_AND(s1, s2, GET_HIGH_REG(d));
863                         emit_store_dst(jd, iptr, d);
864                         break;
865
866                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
867
868                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
869                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
870                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
871                         M_ORR(s1, s2, d);
872                         emit_store_dst(jd, iptr, d);
873                         break;
874
875                 case ICMD_LOR:       /* ..., val1, val2  ==> ..., val1 | val2        */ 
876
877                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
878                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
879                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
880                         M_ORR(s1, s2, GET_LOW_REG(d));
881                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
882                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
883                         M_ORR(s1, s2, GET_HIGH_REG(d));
884                         emit_store_dst(jd, iptr, d);
885                         break;
886
887                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
888
889                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
890                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
891                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
892                         M_EOR(s1, s2, d);
893                         emit_store_dst(jd, iptr, d);
894                         break;
895
896                 case ICMD_LXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
897
898                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
899                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
900                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
901                         M_EOR(s1, s2, GET_LOW_REG(d));
902                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
903                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
904                         M_EOR(s1, s2, GET_HIGH_REG(d));
905                         emit_store_dst(jd, iptr, d);
906                         break;
907
908
909         /* floating operations ************************************************/
910
911 #if !defined(ENABLE_SOFTFLOAT)
912
913                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
914
915                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
916                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
917                         M_MNFS(d, s1);
918                         emit_store_dst(jd, iptr, d);
919                         break;
920
921                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
922
923                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
924                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
925                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
926                         M_ADFS(d, s1, s2);
927                         emit_store_dst(jd, iptr, d);
928                         break;
929
930                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
931
932                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
933                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
934                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
935                         M_SUFS(d, s1, s2);
936                         emit_store_dst(jd, iptr, d);
937                         break;
938
939                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
940
941                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
942                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
943                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
944                         M_MUFS(d, s1, s2);
945                         emit_store_dst(jd, iptr, d);
946                         break;
947
948                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
949                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
950                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
951                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
952                         M_DVFS(d, s1, s2);
953                         emit_store_dst(jd, iptr, d);
954                         break;
955
956                 /* ATTENTION: Jave does not want IEEE behaviour in FREM, do
957                    not use this */
958
959                 case ICMD_FREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
960
961                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
962                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
963                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
964                         M_RMFS(d, s1, s2);
965                         emit_store_dst(jd, iptr, d);
966                         break;
967
968                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
969
970                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
971                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
972                         M_MNFD(d, s1);
973                         emit_store_dst(jd, iptr, d);
974                         break;
975
976                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
977
978                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
979                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
980                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
981                         M_ADFD(d, s1, s2);
982                         emit_store_dst(jd, iptr, d);
983                         break;
984
985                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
986
987                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
988                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
989                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
990                         M_SUFD(d, s1, s2);
991                         emit_store_dst(jd, iptr, d);
992                         break;
993
994                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
995
996                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
997                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
998                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
999                         M_MUFD(d, s1, s2);
1000                         emit_store_dst(jd, iptr, d);
1001                         break;
1002
1003                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1004
1005                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1006                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1007                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1008                         M_DVFD(d, s1, s2);
1009                         emit_store_dst(jd, iptr, d);
1010                         break;
1011
1012                 /* ATTENTION: Jave does not want IEEE behaviour in DREM, do
1013                    not use this */
1014
1015                 case ICMD_DREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1016
1017                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1018                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1019                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1020                         M_RMFD(d, s1, s2);
1021                         emit_store_dst(jd, iptr, d);
1022                         break;
1023
1024                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1025
1026                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1027                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1028                         M_FLTS(d, s1);
1029                         emit_store_dst(jd, iptr, d);
1030                         break;
1031
1032                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1033
1034                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1035                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1036                         M_FLTD(d, s1);
1037                         emit_store_dst(jd, iptr, d);
1038                         break;
1039
1040                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1041
1042                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1043                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1044                         /* this uses round towards zero, as Java likes it */
1045                         M_FIX(d, s1);
1046                         /* this checks for NaN; to return zero as Java likes it */
1047                         M_CMF(s1, 0x8);
1048                         M_MOVVS_IMM(0, d);
1049                         emit_store_dst(jd, iptr, d);
1050                         break;
1051
1052                 case ICMD_D2I:       /* ..., value  ==> ..., (int) value              */
1053
1054                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1055                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1056                         /* this uses round towards zero, as Java likes it */
1057                         M_FIX(d, s1);
1058                         /* this checks for NaN; to return zero as Java likes it */
1059                         M_CMF(s1, 0x8);
1060                         M_MOVVS_IMM(0, d);
1061                         emit_store_dst(jd, iptr, d);
1062                         break;
1063
1064                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1065
1066                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1067                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1068                         M_MVFS(d,s1);
1069                         emit_store_dst(jd, iptr, d);
1070                         break;
1071
1072                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1073
1074                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1075                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1076                         M_MVFD(d,s1);
1077                         emit_store_dst(jd, iptr, d);
1078                         break;
1079
1080                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1081
1082                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1083                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1084                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1085                         M_CMF(s2, s1);
1086                         M_MOV_IMM(d, 0);
1087                         M_SUBGT_IMM(d, d, 1);
1088                         M_ADDLT_IMM(d, d, 1);
1089                         emit_store_dst(jd, iptr, d);
1090                         break;
1091
1092                 case ICMD_DCMPG:      /* ..., val1, val2  ==> ..., val1 dcmpg val2    */
1093
1094                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1095                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1096                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1097                         M_CMF(s2, s1);
1098                         M_MOV_IMM(d, 0);
1099                         M_SUBGT_IMM(d, d, 1);
1100                         M_ADDLT_IMM(d, d, 1);
1101                         emit_store_dst(jd, iptr, d);
1102                         break;
1103
1104                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1105
1106                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1107                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1108                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1109                         M_CMF(s1, s2);
1110                         M_MOV_IMM(d, 0);
1111                         M_SUBLT_IMM(d, d, 1);
1112                         M_ADDGT_IMM(d, d, 1);
1113                         emit_store_dst(jd, iptr, d);
1114                         break;
1115
1116                 case ICMD_DCMPL:      /* ..., val1, val2  ==> ..., val1 dcmpl val2    */
1117
1118                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1119                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1120                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1121                         M_CMF(s1, s2);
1122                         M_MOV_IMM(d, 0);
1123                         M_SUBLT_IMM(d, d, 1);
1124                         M_ADDGT_IMM(d, d, 1);
1125                         emit_store_dst(jd, iptr, d);
1126                         break;
1127
1128 #endif /* !defined(ENABLE_SOFTFLOAT) */
1129
1130
1131                 /* memory operations **************************************************/
1132
1133                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1134
1135                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1136                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1137                         /* implicit null-pointer check */
1138                         M_ILD_INTERN(d, s1, OFFSET(java_arrayheader, size));
1139                         emit_store_dst(jd, iptr, d);
1140                         break;
1141
1142                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1143
1144                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1145                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1146                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1147                         /* implicit null-pointer check */
1148                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1149                         M_ADD(REG_ITMP1, s1, s2); /* REG_ITMP1 = s1 + 1 * s2 */
1150                         M_LDRSB(d, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1151                         emit_store_dst(jd, iptr, d);
1152                         break;
1153
1154                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1155
1156                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1157                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1158                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1159                         /* implicit null-pointer check */
1160                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1161                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1162                         M_LDRH(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1163                         emit_store_dst(jd, iptr, d);
1164                         break;
1165
1166                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1167
1168                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1169                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1170                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1171                         /* implicit null-pointer check */
1172                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1173                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1174                         M_LDRSH(d, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1175                         emit_store_dst(jd, iptr, d);
1176                         break;
1177
1178                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1179
1180                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1181                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1182                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1183                         /* implicit null-pointer check */
1184                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1185                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1186                         M_ILD_INTERN(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1187                         emit_store_dst(jd, iptr, d);
1188                         break;
1189
1190                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1191
1192                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1193                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1194                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1195                         /* implicit null-pointer check */
1196                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1197                         M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1198                         M_LLD_INTERN(d, REG_ITMP3, OFFSET(java_longarray, data[0]));
1199                         emit_store_dst(jd, iptr, d);
1200                         break;
1201
1202                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1203
1204                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1205                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1206                         /* implicit null-pointer check */
1207                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1208                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1209 #if !defined(ENABLE_SOFTFLOAT)
1210                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1211                         M_FLD_INTERN(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1212 #else
1213                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1214                         M_ILD_INTERN(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1215 #endif
1216                         emit_store_dst(jd, iptr, d);
1217                         break;
1218
1219                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1220
1221                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1222                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1223                         /* implicit null-pointer check */
1224                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1225                         M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1226 #if !defined(ENABLE_SOFTFLOAT)
1227                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1228                         M_DLD_INTERN(d, REG_ITMP3, OFFSET(java_doublearray, data[0]));
1229 #else
1230                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1231                         M_LLD_INTERN(d, REG_ITMP3, OFFSET(java_doublearray, data[0]));
1232 #endif
1233                         emit_store_dst(jd, iptr, d);
1234                         break;
1235
1236                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1237
1238                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1239                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1240                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1241                         /* implicit null-pointer check */
1242                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1243                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1244                         M_LDR_INTERN(d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1245                         emit_store_dst(jd, iptr, d);
1246                         break;
1247
1248                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1249
1250                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1251                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1252                         /* implicit null-pointer check */
1253                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1254                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1255                         M_ADD(REG_ITMP1, s1, s2); /* REG_ITMP1 = s1 + 1 * s2 */
1256                         M_STRB(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1257                         break;
1258
1259                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1260
1261                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1262                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1263                         /* implicit null-pointer check */
1264                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1265                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1266                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1267                         M_STRH(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1268                         break;
1269
1270                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1271
1272                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1273                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1274                         /* implicit null-pointer check */
1275                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1276                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1277                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1278                         M_STRH(s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1279                         break;
1280
1281                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1282
1283                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1284                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1285                         /* implicit null-pointer check */
1286                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1287                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1288                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1289                         M_IST_INTERN(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1290                         break;
1291
1292                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1293
1294                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1295                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1296                         /* implicit null-pointer check */
1297                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1298                         M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1299                         s3 = emit_load_s3(jd, iptr, REG_ITMP12_PACKED);
1300                         M_LST_INTERN(s3, REG_ITMP3, OFFSET(java_longarray, data[0]));
1301                         break;
1302
1303                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1304
1305                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1306                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1307                         /* implicit null-pointer check */
1308                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1309                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1310 #if !defined(ENABLE_SOFTFLOAT)
1311                         s3 = emit_load_s3(jd, iptr, REG_FTMP1);
1312                         M_FST_INTERN(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1313 #else
1314                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1315                         M_IST_INTERN(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1316 #endif
1317                         break;
1318
1319                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1320
1321                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1322                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1323                         /* implicit null-pointer check */
1324                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1325                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 3)); /* REG_ITMP1 = s1 + 8 * s2 */
1326 #if !defined(ENABLE_SOFTFLOAT)
1327                         s3 = emit_load_s3(jd, iptr, REG_FTMP1);
1328                         M_DST_INTERN(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1329 #else
1330                         s3 = emit_load_s3(jd, iptr, REG_ITMP23_PACKED);
1331                         M_LST_INTERN(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1332 #endif
1333                         break;
1334
1335                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1336
1337                         s1 = emit_load_s1(jd, iptr, REG_A0);
1338                         s2 = emit_load_s2(jd, iptr, REG_ITMP1);
1339                         s3 = emit_load_s3(jd, iptr, REG_A1);
1340
1341                         /* implicit null-pointer check */
1342                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1343
1344                         /* move arguments to argument registers */
1345                         M_INTMOVE(s1, REG_A0);
1346                         M_INTMOVE(s3, REG_A1);
1347
1348                         /* call builtin function */
1349                         disp = dseg_add_functionptr(cd, BUILTIN_canstore);
1350                         M_DSEG_BRANCH(disp);
1351
1352                         /* recompute pv */
1353                         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
1354                         M_RECOMPUTE_PV(s1);
1355
1356                         /* check resturn value of builtin */
1357                         emit_exception_check(cd, iptr);
1358
1359                         /* finally store address into array */
1360                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1361                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1362                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1363                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1364                         M_STR_INTERN(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1365                         break;
1366
1367                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
1368
1369                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1370                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1371
1372                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1373
1374                                 disp = dseg_add_unique_address(cd, NULL);
1375
1376                                 codegen_addpatchref(cd, PATCHER_get_putstatic, uf, disp);
1377
1378                                 if (opt_showdisassemble)
1379                                         M_NOP;
1380                         }
1381                         else {
1382                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1383
1384                                 fieldtype = fi->type;
1385
1386                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1387                                         codegen_addpatchref(cd, PATCHER_clinit, fi->class, 0);
1388
1389                                         if (opt_showdisassemble)
1390                                                 M_NOP;
1391                                 }
1392
1393                                 disp = dseg_add_address(cd, &(fi->value));
1394                         }
1395
1396                         M_DSEG_LOAD(REG_ITMP3, disp);
1397                         switch (fieldtype) {
1398                         case TYPE_INT:
1399 #if defined(ENABLE_SOFTFLOAT)
1400                         case TYPE_FLT:
1401 #endif
1402                         case TYPE_ADR:
1403                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1404                                 M_ILD_INTERN(d, REG_ITMP3, 0);
1405                                 break;
1406                         case TYPE_LNG:
1407 #if defined(ENABLE_SOFTFLOAT)
1408                         case TYPE_DBL:
1409 #endif
1410                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1411                                 M_LLD_INTERN(d, REG_ITMP3, 0);
1412                                 break;
1413 #if !defined(ENABLE_SOFTFLOAT)
1414                         case TYPE_FLT:
1415                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1416                                 M_FLD_INTERN(d, REG_ITMP3, 0);
1417                                 break;
1418                         case TYPE_DBL:
1419                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1420                                 M_DLD_INTERN(d, REG_ITMP3, 0);
1421                                 break;
1422 #endif
1423                         default:
1424                                 assert(0);
1425                         }
1426                         emit_store_dst(jd, iptr, d);
1427                         break;
1428
1429                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
1430
1431                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1432                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1433
1434                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1435
1436                                 disp = dseg_add_unique_address(cd, NULL);
1437
1438                                 codegen_addpatchref(cd, PATCHER_get_putstatic, uf, disp);
1439
1440                                 if (opt_showdisassemble)
1441                                         M_NOP;
1442                         }
1443                         else {
1444                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1445
1446                                 fieldtype = fi->type;
1447
1448                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1449                                         codegen_addpatchref(cd, PATCHER_clinit, fi->class, 0);
1450
1451                                         if (opt_showdisassemble)
1452                                                 M_NOP;
1453                                 }
1454
1455                                 disp = dseg_add_address(cd, &(fi->value));
1456                         }
1457
1458                         M_DSEG_LOAD(REG_ITMP3, disp);
1459                         switch (fieldtype) {
1460                         case TYPE_INT:
1461 #if defined(ENABLE_SOFTFLOAT)
1462                         case TYPE_FLT:
1463 #endif
1464                         case TYPE_ADR:
1465                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1466                                 M_IST_INTERN(s1, REG_ITMP3, 0);
1467                                 break;
1468                         case TYPE_LNG:
1469 #if defined(ENABLE_SOFTFLOAT)
1470                         case TYPE_DBL:
1471 #endif
1472                                 s1 = emit_load_s1(jd, iptr, REG_ITMP12_PACKED);
1473                                 M_LST_INTERN(s1, REG_ITMP3, 0);
1474                                 break;
1475 #if !defined(ENABLE_SOFTFLOAT)
1476                         case TYPE_FLT:
1477                                 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1478                                 M_FST_INTERN(s1, REG_ITMP3, 0);
1479                                 break;
1480                         case TYPE_DBL:
1481                                 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1482                                 M_DST_INTERN(s1, REG_ITMP3, 0);
1483                                 break;
1484 #endif
1485                         default:
1486                                 assert(0);
1487                         }
1488                         break;
1489
1490                 case ICMD_GETFIELD:   /* ..., objectref, value  ==> ...               */
1491
1492                         s1 = emit_load_s1(jd, iptr, REG_ITMP3);
1493                         emit_nullpointer_check(cd, iptr, s1);
1494
1495
1496                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1497                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1498
1499                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1500                         }
1501                         else {
1502                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1503
1504                                 fieldtype = fi->type;
1505                                 disp      = fi->offset;
1506                         }
1507
1508 #if !defined(ENABLE_SOFTFLOAT)
1509                         /* HACK: softnull checks on floats */
1510                         if (!INSTRUCTION_MUST_CHECK(iptr) && IS_FLT_DBL_TYPE(fieldtype))
1511                                 emit_nullpointer_check_force(cd, iptr, s1);
1512 #endif
1513
1514                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1515                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1516
1517                                 codegen_addpatchref(cd, PATCHER_get_putfield, uf, 0);
1518
1519                                 if (opt_showdisassemble)
1520                                         M_NOP;
1521
1522                                 disp = 0;
1523                         }
1524
1525                         switch (fieldtype) {
1526                         case TYPE_INT:
1527 #if defined(ENABLE_SOFTFLOAT)
1528                         case TYPE_FLT:
1529 #endif
1530                         case TYPE_ADR:
1531                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1532                                 M_ILD(d, s1, disp);
1533                                 break;
1534                         case TYPE_LNG:
1535 #if defined(ENABLE_SOFTFLOAT)
1536                         case TYPE_DBL:
1537 #endif
1538                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1539                                 M_LLD(d, s1, disp);
1540                                 break;
1541 #if !defined(ENABLE_SOFTFLOAT)
1542                         case TYPE_FLT:
1543                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1544                                 M_FLD(d, s1, disp);
1545                                 break;
1546                         case TYPE_DBL:
1547                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1548                                 M_DLD(d, s1, disp);
1549                                 break;
1550 #endif
1551                         default:
1552                                 assert(0);
1553                         }
1554                         emit_store_dst(jd, iptr, d);
1555                         break;
1556
1557                 case ICMD_PUTFIELD:   /* ..., objectref, value  ==> ...               */
1558
1559                         s1 = emit_load_s1(jd, iptr, REG_ITMP3);
1560                         emit_nullpointer_check(cd, iptr, s1);
1561
1562                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1563                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1564
1565                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1566                         }
1567                         else {
1568                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1569
1570                                 fieldtype = fi->type;
1571                                 disp      = fi->offset;
1572                         }
1573
1574 #if !defined(ENABLE_SOFTFLOAT)
1575                         /* HACK: softnull checks on floats */
1576                         if (!INSTRUCTION_MUST_CHECK(iptr) && IS_FLT_DBL_TYPE(fieldtype))
1577                                 emit_nullpointer_check_force(cd, iptr, s1);
1578 #endif
1579
1580                         switch (fieldtype) {
1581                         case TYPE_INT:
1582 #if defined(ENABLE_SOFTFLOAT)
1583                         case TYPE_FLT:
1584 #endif
1585                         case TYPE_ADR:
1586                                 s2 = emit_load_s2(jd, iptr, REG_ITMP1);
1587                                 break;
1588 #if defined(ENABLE_SOFTFLOAT)
1589                         case TYPE_DBL: /* fall through */
1590 #endif
1591                         case TYPE_LNG:
1592                                 s2 = emit_load_s2(jd, iptr, REG_ITMP12_PACKED);
1593                                 break;
1594 #if !defined(ENABLE_SOFTFLOAT)
1595                         case TYPE_FLT:
1596                         case TYPE_DBL:
1597                                 s2 = emit_load_s2(jd, iptr, REG_FTMP1);
1598                                 break;
1599 #endif
1600                         default:
1601                                 assert(0);
1602                         }
1603
1604                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1605                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1606
1607                                 codegen_addpatchref(cd, PATCHER_get_putfield, uf, 0);
1608
1609                                 if (opt_showdisassemble)
1610                                         M_NOP;
1611
1612                                 disp = 0;
1613                         }
1614
1615                         switch (fieldtype) {
1616                         case TYPE_INT:
1617 #if defined(ENABLE_SOFTFLOAT)
1618                         case TYPE_FLT:
1619 #endif
1620                         case TYPE_ADR:
1621                                 M_IST(s2, s1, disp);
1622                                 break;
1623                         case TYPE_LNG:
1624 #if defined(ENABLE_SOFTFLOAT)
1625                         case TYPE_DBL:
1626 #endif
1627                                 M_LST(s2, s1, disp);
1628                                 break;
1629 #if !defined(ENABLE_SOFTFLOAT)
1630                         case TYPE_FLT:
1631                                 M_FST(s2, s1, disp);
1632                                 break;
1633                         case TYPE_DBL:
1634                                 M_DST(s2, s1, disp);
1635                                 break;
1636 #endif
1637                         default:
1638                                 assert(0);
1639                         }
1640                         break;
1641
1642
1643                 /* branch operations **************************************************/
1644
1645                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
1646
1647                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1648                         M_INTMOVE(s1, REG_ITMP1_XPTR);
1649                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1650                                 codegen_addpatchref(cd, PATCHER_athrow_areturn,
1651                                                                         iptr->sx.s23.s2.uc, 0);
1652
1653                                 if (opt_showdisassemble)
1654                                         M_NOP;
1655                         }
1656                         disp = dseg_add_functionptr(cd, asm_handle_exception);
1657                         M_DSEG_LOAD(REG_ITMP3, disp);
1658                         M_MOV(REG_ITMP2_XPC, REG_PC);
1659                         M_MOV(REG_PC, REG_ITMP3);
1660                         M_NOP;              /* nop ensures that XPC is less than the end  */
1661                                             /* of basic block                             */
1662                         break;
1663
1664                 case ICMD_GOTO:         /* ... ==> ...                                */
1665                 case ICMD_RET:
1666
1667                         emit_br(cd, iptr->dst.block);
1668                         break;
1669
1670                 case ICMD_JSR:          /* ... ==> ...                                */
1671
1672                         emit_br(cd, iptr->sx.s23.s3.jsrtarget.block);
1673                         break;
1674                 
1675                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
1676                 case ICMD_IFNONNULL:
1677
1678                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1679                         M_TEQ_IMM(s1, 0);
1680                         emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IFNULL, BRANCH_OPT_NONE);
1681                         break;
1682
1683                 case ICMD_IFLT:         /* ..., value ==> ...                         */
1684                 case ICMD_IFLE:         /* op1 = target JavaVM pc, val.i = constant   */
1685                 case ICMD_IFGT:
1686                 case ICMD_IFGE:
1687                 case ICMD_IFEQ:
1688                 case ICMD_IFNE:
1689
1690                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1691                         M_COMPARE(s1, iptr->sx.val.i);
1692                         emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IFEQ, BRANCH_OPT_NONE);
1693                         break;
1694
1695                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
1696
1697                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1698                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1699                         if (iptr->sx.val.l == 0) {
1700                                 M_ORR_S(s1, s2, REG_ITMP3);
1701                         }
1702                         else {
1703                                 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1704                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1705                                 M_CMP(s1, REG_ITMP3);*/
1706                                 ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1707                                 M_CMPEQ(s2, REG_ITMP3);
1708                         }
1709                         emit_beq(cd, iptr->dst.block);
1710                         break;
1711
1712                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
1713
1714                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1715                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1716                         if (iptr->sx.val.l == 0) {
1717                                 /* if high word is less than zero, the whole long is too */
1718                                 M_CMP_IMM(s1, 0);
1719                                 emit_blt(cd, iptr->dst.block);
1720                         }
1721                         else {
1722                                 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1723                                 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1724                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1725                                 M_CMP(s1, REG_ITMP3);*/
1726                                 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1727                                 M_MOVGT_IMM(2, REG_ITMP1);
1728                                 M_MOVEQ_IMM(1, REG_ITMP1);
1729
1730                                 /* low compare: x=x-1(ifLO) */
1731                                 M_COMPARE(s2, (iptr->sx.val.l & 0xffffffff));
1732                                 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1733                                 M_CMP(s2, REG_ITMP3);*/
1734                                 M_SUBLO_IMM(REG_ITMP1, REG_ITMP1, 1);
1735
1736                                 /* branch if (x LT 1) */
1737                                 M_CMP_IMM(REG_ITMP1, 1);
1738                                 emit_blt(cd, iptr->dst.block);
1739                         }
1740                         break;
1741
1742                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
1743
1744                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1745                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1746                         if (iptr->sx.val.l == 0) {
1747                                 /* if high word is less than zero, the whole long is too  */
1748                                 M_CMP_IMM(s1, 0);
1749                                 emit_blt(cd, iptr->dst.block);
1750
1751                                 /* ... otherwise the low word has to be zero (tricky!) */
1752                                 M_CMPEQ_IMM(s2, 0);
1753                                 emit_beq(cd, iptr->dst.block);
1754                         }
1755                         else {
1756                                 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1757                                 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1758                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1759                                 M_CMP(s1, REG_ITMP3);*/
1760                                 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1761                                 M_MOVGT_IMM(2, REG_ITMP1);
1762                                 M_MOVEQ_IMM(1, REG_ITMP1);
1763
1764                                 /* low compare: x=x+1(ifHI) */
1765                                 M_COMPARE(s2, (iptr->sx.val.l & 0xffffffff));
1766                                 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1767                                 M_CMP(s2, REG_ITMP3);*/
1768                                 M_ADDHI_IMM(REG_ITMP1, REG_ITMP1, 1);
1769
1770                                 /* branch if (x LE 1) */
1771                                 M_CMP_IMM(REG_ITMP1, 1);
1772                                 emit_ble(cd, iptr->dst.block);
1773                         }
1774                         break;
1775
1776                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
1777
1778                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1779                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1780                         if (iptr->sx.val.l == 0) {
1781                                 /* if high word is greater or equal zero, the whole long is too */
1782                                 M_CMP_IMM(s1, 0);
1783                                 emit_bge(cd, iptr->dst.block);
1784                         }
1785                         else {
1786                                 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1787                                 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1788                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1789                                 M_CMP(s1, REG_ITMP3);*/
1790                                 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1791                                 M_MOVGT_IMM(2, REG_ITMP1);
1792                                 M_MOVEQ_IMM(1, REG_ITMP1);
1793
1794                                 /* low compare: x=x-1(ifLO) */
1795                                 M_COMPARE(s2, (iptr->sx.val.l & 0xffffffff));
1796                                 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1797                                 M_CMP(s2, REG_ITMP3);*/
1798                                 M_SUBLO_IMM(REG_ITMP1, REG_ITMP1, 1);
1799
1800                                 /* branch if (x GE 1) */
1801                                 M_CMP_IMM(REG_ITMP1, 1);
1802                                 emit_bge(cd, iptr->dst.block);
1803                         }
1804                         break;
1805
1806                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
1807
1808                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1809                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1810 #if 0
1811                         if (iptr->sx.val.l == 0) {
1812                                 /* if high word is greater than zero, the whole long is too */
1813                                 M_CMP_IMM(s1, 0);
1814                                 M_BGT(0);
1815                                 codegen_add_branch_ref(cd, iptr->dst.block);
1816
1817                                 /* ... or high was zero and low is non zero (tricky!) */
1818                                 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1819                                 M_MOVLT_IMM(1, REG_ITMP3);
1820                                 M_ORR_S(REG_ITMP3, s2, REG_ITMP3);
1821                                 M_BNE(0);
1822                                 codegen_add_branch_ref(cd, iptr->dst.block);
1823                         }
1824                         else {
1825 #endif
1826                                 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1827                                 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1828                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1829                                 M_CMP(s1, REG_ITMP3);*/
1830                                 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1831                                 M_MOVGT_IMM(2, REG_ITMP1);
1832                                 M_MOVEQ_IMM(1, REG_ITMP1);
1833
1834                                 /* low compare: x=x+1(ifHI) */
1835                                 M_COMPARE(s2, (iptr->sx.val.l & 0xffffffff));
1836                                 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1837                                 M_CMP(s2, REG_ITMP3);*/
1838                                 M_ADDHI_IMM(REG_ITMP1, REG_ITMP1, 1);
1839
1840                                 /* branch if (x GT 1) */
1841                                 M_CMP_IMM(REG_ITMP1, 1);
1842                                 emit_bgt(cd, iptr->dst.block);
1843 #if 0
1844                         }
1845 #endif
1846                         break;
1847
1848                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
1849
1850                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1851                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1852                         if (iptr->sx.val.l == 0) {
1853                                 M_ORR_S(s1, s2, REG_ITMP3);
1854                         }
1855                         else {
1856                                 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1857                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1858                                 M_CMP(s1, REG_ITMP3);*/
1859                                 ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1860                                 M_CMPEQ(s2, REG_ITMP3);
1861                         }
1862                         emit_bne(cd, iptr->dst.block);
1863                         break;
1864                         
1865                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
1866                 case ICMD_IF_ICMPNE:
1867                 case ICMD_IF_ICMPLT:
1868                 case ICMD_IF_ICMPLE:
1869                 case ICMD_IF_ICMPGT:
1870                 case ICMD_IF_ICMPGE:
1871
1872                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1873                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1874                         M_CMP(s1, s2);
1875                         emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IF_ICMPEQ, BRANCH_OPT_NONE);
1876                         break;
1877
1878                 case ICMD_IF_ACMPEQ:    /* ..., value, value ==> ...                  */
1879                 case ICMD_IF_ACMPNE:
1880
1881                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1882                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1883                         M_CMP(s1, s2);
1884                         emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IF_ACMPEQ, BRANCH_OPT_NONE);
1885                         break;
1886
1887                 case ICMD_IF_LCMPEQ:    /* ..., value, value ==> ...                  */
1888                                         /* op1 = target JavaVM pc                     */
1889
1890                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1891                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1892                         M_CMP(s1, s2);
1893
1894                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1895                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1896                         M_CMPEQ(s1, s2);
1897
1898                         emit_beq(cd, iptr->dst.block);
1899                         break;
1900
1901                 case ICMD_IF_LCMPNE:    /* ..., value, value ==> ...                  */
1902                                         /* op1 = target JavaVM pc                     */
1903
1904                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1905                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1906                         M_CMP(s1, s2);
1907
1908                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1909                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1910                         M_CMPEQ(s1, s2);
1911
1912                         emit_bne(cd, iptr->dst.block);
1913                         break;
1914
1915                 case ICMD_IF_LCMPLT:    /* ..., value, value ==> ...                  */
1916                                         /* op1 = target JavaVM pc                     */
1917
1918                         /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1919                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1920                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1921                         M_CMP(s1, s2);
1922                         M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1923                         M_MOVGT_IMM(2, REG_ITMP3);
1924                         M_MOVEQ_IMM(1, REG_ITMP3);
1925
1926                         /* low compare: x=x-1(ifLO) */
1927                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1928                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1929                         M_CMP(s1, s2);
1930                         M_SUBLO_IMM(REG_ITMP3, REG_ITMP3, 1);
1931
1932                         /* branch if (x LT 1) */
1933                         M_CMP_IMM(REG_ITMP3, 1);
1934                         emit_blt(cd, iptr->dst.block);
1935                         break;
1936
1937                 case ICMD_IF_LCMPLE:    /* ..., value, value ==> ...                  */
1938                                         /* op1 = target JavaVM pc                     */
1939
1940                         /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1941                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1942                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1943                         M_CMP(s1, s2);
1944                         M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1945                         M_MOVGT_IMM(2, REG_ITMP3);
1946                         M_MOVEQ_IMM(1, REG_ITMP3);
1947
1948                         /* low compare: x=x-1(ifLO) */
1949                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1950                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1951                         M_CMP(s1, s2);
1952                         M_ADDHI_IMM(REG_ITMP3, REG_ITMP3, 1);
1953
1954                         /* branch if (x LE 1) */
1955                         M_CMP_IMM(REG_ITMP3, 1);
1956                         emit_ble(cd, iptr->dst.block);
1957                         break;
1958
1959                 case ICMD_IF_LCMPGT:    /* ..., value, value ==> ...                  */
1960                                         /* op1 = target JavaVM pc                     */
1961
1962                         /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1963                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1964                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1965                         M_CMP(s1, s2);
1966                         M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1967                         M_MOVGT_IMM(2, REG_ITMP3);
1968                         M_MOVEQ_IMM(1, REG_ITMP3);
1969
1970                         /* low compare: x=x-1(ifLO) */
1971                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1972                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1973                         M_CMP(s1, s2);
1974                         M_ADDHI_IMM(REG_ITMP3, REG_ITMP3, 1);
1975
1976                         /* branch if (x GT 1) */
1977                         M_CMP_IMM(REG_ITMP3, 1);
1978                         emit_bgt(cd, iptr->dst.block);
1979                         break;
1980
1981                 case ICMD_IF_LCMPGE:    /* ..., value, value ==> ...                  */
1982                                         /* op1 = target JavaVM pc                     */
1983
1984                         /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1985                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1986                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1987                         M_CMP(s1, s2);
1988                         M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1989                         M_MOVGT_IMM(2, REG_ITMP3);
1990                         M_MOVEQ_IMM(1, REG_ITMP3);
1991
1992                         /* low compare: x=x-1(ifLO) */
1993                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1994                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1995                         M_CMP(s1, s2);
1996                         M_SUBLO_IMM(REG_ITMP3, REG_ITMP3, 1);
1997
1998                         /* branch if (x GE 1) */
1999                         M_CMP_IMM(REG_ITMP3, 1);
2000                         emit_bge(cd, iptr->dst.block);
2001                         break;
2002
2003                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2004                         {
2005                         s4 i, l;
2006                         branch_target_t *table;
2007
2008                         table = iptr->dst.table;
2009
2010                         l = iptr->sx.s23.s2.tablelow;
2011                         i = iptr->sx.s23.s3.tablehigh;
2012
2013                         /* calculate new index (index - low) */
2014                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2015                         if (l  == 0) {
2016                                 M_INTMOVE(s1, REG_ITMP1);
2017                         } else if (IS_IMM(l)) {
2018                                 M_SUB_IMM(REG_ITMP1, s1, l);
2019                         } else {
2020                                 ICONST(REG_ITMP2, l);
2021                                 M_SUB(REG_ITMP1, s1, REG_ITMP2);
2022                         }
2023
2024                         /* range check (index <= high-low) */
2025                         i = i - l + 1;
2026                         M_COMPARE(REG_ITMP1, i-1);
2027                         emit_bugt(cd, table[0].block);
2028
2029                         /* build jump table top down and use address of lowest entry */
2030
2031                         table += i;
2032
2033                         while (--i >= 0) {
2034                                 dseg_add_target(cd, table->block);
2035                                 --table;
2036                         }
2037                         }
2038
2039                         /* length of dataseg after last dseg_add_target is used by load */
2040                         /* TODO: this loads from data-segment */
2041                         M_ADD(REG_ITMP2, REG_PV, REG_LSL(REG_ITMP1, 2));
2042                         M_LDR(REG_PC, REG_ITMP2, -(cd->dseglen));
2043                         break;
2044
2045                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2046                         {
2047                         s4 i;
2048                         lookup_target_t *lookup;
2049
2050                         lookup = iptr->dst.lookup;
2051
2052                         i = iptr->sx.s23.s2.lookupcount;
2053                         
2054                         /* compare keys */
2055                         MCODECHECK((i<<2)+8);
2056                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2057
2058                         while (--i >= 0) {
2059                                 M_COMPARE(s1, lookup->value);
2060                                 emit_beq(cd, lookup->target.block);
2061                                 lookup++;
2062                         }
2063
2064                         /* default branch */
2065                         emit_br(cd, iptr->sx.s23.s3.lookupdefault.block);
2066                         }
2067                         break;
2068
2069                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2070
2071 #if !defined(ENABLE_SOFTFLOAT)
2072                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
2073                         M_CAST_FLT_TO_INT_TYPED(VAROP(iptr->s1)->type, s1, REG_RESULT);
2074                         goto ICMD_RETURN_do;
2075 #endif
2076
2077                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2078
2079                         s1 = emit_load_s1(jd, iptr, REG_RESULT);
2080                         M_INTMOVE(s1, REG_RESULT);
2081                         goto ICMD_RETURN_do;
2082
2083                 case ICMD_DRETURN:      /* ..., retvalue ==> ...                      */
2084
2085 #if !defined(ENABLE_SOFTFLOAT)
2086                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
2087                         M_CAST_FLT_TO_INT_TYPED(VAROP(iptr->s1)->type, s1, REG_RESULT_PACKED);
2088                         goto ICMD_RETURN_do;
2089 #endif
2090
2091                 case ICMD_LRETURN:      /* ..., retvalue ==> ...                      */
2092
2093                         s1 = emit_load_s1(jd, iptr, REG_RESULT_PACKED);
2094                         M_LNGMOVE(s1, REG_RESULT_PACKED);
2095                         goto ICMD_RETURN_do;
2096
2097                 case ICMD_ARETURN:      /* ..., retvalue ==> ...                      */
2098
2099                         s1 = emit_load_s1(jd, iptr, REG_RESULT);
2100                         M_INTMOVE(s1, REG_RESULT);
2101                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2102                                 codegen_addpatchref(cd, PATCHER_athrow_areturn,
2103                                                                         iptr->sx.s23.s2.uc, 0);
2104
2105                                 if (opt_showdisassemble)
2106                                         M_NOP;
2107                         }
2108                         goto ICMD_RETURN_do;
2109
2110                 case ICMD_RETURN:       /* ...  ==> ...                               */
2111                         ICMD_RETURN_do:
2112
2113 #if !defined(NDEBUG)
2114                         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
2115                                 emit_verbosecall_exit(jd);
2116 #endif
2117
2118 #if defined(ENABLE_THREADS)
2119                         /* call monitorexit function */
2120
2121                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2122                                 /* stack offset for monitor argument */
2123
2124                                 s1 = rd->memuse;
2125
2126                                 /* we need to save the proper return value */
2127
2128                                 switch (iptr->opc) {
2129                                 case ICMD_IRETURN:
2130                                 case ICMD_ARETURN:
2131                                 case ICMD_LRETURN:
2132                                 case ICMD_FRETURN: /* XXX TWISTI: is that correct? */
2133                                 case ICMD_DRETURN:
2134                                         M_STMFD(BITMASK_RESULT, REG_SP);
2135                                         s1 += 2;
2136                                         break;
2137                                 }
2138
2139                                 M_LDR(REG_A0, REG_SP, s1 * 4);
2140                                 disp = dseg_add_functionptr(cd, LOCK_monitor_exit);
2141                                 M_DSEG_BRANCH(disp);
2142
2143                                 /* we no longer need PV here, no more loading */
2144                                 /*s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2145                                 M_RECOMPUTE_PV(s1);*/
2146
2147                                 switch (iptr->opc) {
2148                                 case ICMD_IRETURN:
2149                                 case ICMD_ARETURN:
2150                                 case ICMD_LRETURN:
2151                                 case ICMD_FRETURN: /* XXX TWISTI: is that correct? */
2152                                 case ICMD_DRETURN:
2153                                         M_LDMFD(BITMASK_RESULT, REG_SP);
2154                                         break;
2155                                 }
2156                         }
2157 #endif
2158
2159                         /* deallocate stackframe for spilled variables */
2160
2161                         if ((cd->stackframesize - savedregs_num) > 0)
2162                                 M_ADD_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize - savedregs_num);
2163
2164                         /* restore callee saved registers + do return */
2165
2166                         if (savedregs_bitmask) {
2167                                 if (!jd->isleafmethod) {
2168                                         savedregs_bitmask &= ~(1<<REG_LR);
2169                                         savedregs_bitmask |= (1<<REG_PC);
2170                                 }
2171                                 M_LDMFD(savedregs_bitmask, REG_SP);
2172                         }
2173
2174                         /* if LR was not on stack, we need to return manually */
2175
2176                         if (jd->isleafmethod)
2177                                 M_MOV(REG_PC, REG_LR);
2178                         break;
2179
2180                 case ICMD_BUILTIN:      /* ..., arg1, arg2, arg3 ==> ...              */
2181
2182                         bte = iptr->sx.s23.s3.bte;
2183                         md  = bte->md;
2184                         goto ICMD_INVOKE_do;
2185
2186                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
2187                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2188                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
2189                 case ICMD_INVOKEINTERFACE:
2190
2191                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2192                                 lm = NULL;
2193                                 um = iptr->sx.s23.s3.um;
2194                                 md = um->methodref->parseddesc.md;
2195                         }
2196                         else {
2197                                 lm = iptr->sx.s23.s3.fmiref->p.method;
2198                                 um = NULL;
2199                                 md = lm->parseddesc;
2200                         }
2201
2202                 ICMD_INVOKE_do:
2203                         /* copy arguments to registers or stack location */
2204
2205                         s3 = md->paramcount;
2206
2207                         MCODECHECK((s3 << 1) + 64);
2208
2209                         for (s3 = s3 - 1; s3 >= 0; s3--) {
2210                                 var = VAR(iptr->sx.s23.s2.args[s3]);
2211                                 d   = md->params[s3].regoff;
2212
2213                                 if (var->flags & PREALLOC) /* argument was precolored? */
2214                                         continue;
2215
2216                                 /* TODO: document me */
2217 #if !defined(ENABLE_SOFTFLOAT)
2218                                 if (IS_INT_LNG_TYPE(var->type)) {
2219 #endif /* !defined(ENABLE_SOFTFLOAT) */
2220                                         if (!md->params[s3].inmemory) {
2221                                                 s1 = emit_load(jd, iptr, var, d);
2222
2223                                                 if (IS_2_WORD_TYPE(var->type))
2224                                                         M_LNGMOVE(s1, d);
2225                                                 else
2226                                                         M_INTMOVE(s1, d);
2227                                         }
2228                                         else {
2229                                                 if (IS_2_WORD_TYPE(var->type)) {
2230                                                         s1 = emit_load(jd, iptr, var, REG_ITMP12_PACKED);
2231                                                         M_LST(s1, REG_SP, d * 4);
2232                                                 }
2233                                                 else {
2234                                                         s1 = emit_load(jd, iptr, var, REG_ITMP1);
2235                                                         M_IST(s1, REG_SP, d * 4);
2236                                                 }
2237                                         }
2238 #if !defined(ENABLE_SOFTFLOAT)
2239                                 }
2240                                 else {
2241                                         if (!md->params[s3].inmemory) {
2242                                                 s1 = emit_load(jd, iptr, var, REG_FTMP1);
2243                                                 M_CAST_FLT_TO_INT_TYPED(var->type, s1, d);
2244                                         }
2245                                         else {
2246                                                 s1 = emit_load(jd, iptr, var, REG_FTMP1);
2247                                                 if (IS_2_WORD_TYPE(var->type))
2248                                                         M_DST(s1, REG_SP, d * 4);
2249                                                 else
2250                                                         M_FST(s1, REG_SP, d * 4);
2251                                         }
2252                                 }
2253 #endif /* !defined(ENABLE_SOFTFLOAT) */
2254                         }
2255
2256                         switch (iptr->opc) {
2257                         case ICMD_BUILTIN:
2258                                 disp = dseg_add_functionptr(cd, bte->fp);
2259
2260                                 M_DSEG_LOAD(REG_PV, disp); /* pointer to built-in-function */
2261
2262                                 /* generate the actual call */
2263
2264                                 M_MOV(REG_LR, REG_PC);
2265                                 M_MOV(REG_PC, REG_PV);
2266                                 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2267                                 M_RECOMPUTE_PV(s1);
2268
2269                                 emit_exception_check(cd, iptr);
2270                                 break;
2271
2272                         case ICMD_INVOKESPECIAL:
2273                                 emit_nullpointer_check(cd, iptr, REG_A0);
2274                                 /* fall through */
2275
2276                         case ICMD_INVOKESTATIC:
2277                                 if (lm == NULL) {
2278                                         disp = dseg_add_unique_address(cd, NULL);
2279
2280                                         codegen_addpatchref(cd, PATCHER_invokestatic_special,
2281                                                                                 um, disp);
2282
2283                                         if (opt_showdisassemble)
2284                                                 M_NOP;
2285                                 }
2286                                 else
2287                                         disp = dseg_add_address(cd, lm->stubroutine);
2288
2289                                 M_DSEG_LOAD(REG_PV, disp);            /* Pointer to method */
2290
2291                                 /* generate the actual call */
2292
2293                                 M_MOV(REG_LR, REG_PC);
2294                                 M_MOV(REG_PC, REG_PV);
2295                                 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2296                                 M_RECOMPUTE_PV(s1);
2297                                 break;
2298
2299                         case ICMD_INVOKEVIRTUAL:
2300                                 if (lm == NULL) {
2301                                         codegen_addpatchref(cd, PATCHER_invokevirtual, um, 0);
2302
2303                                         if (opt_showdisassemble)
2304                                                 M_NOP;
2305
2306                                         s1 = 0;
2307                                 }
2308                                 else
2309                                         s1 = OFFSET(vftbl_t, table[0]) +
2310                                                 sizeof(methodptr) * lm->vftblindex;
2311
2312                                 /* implicit null-pointer check */
2313                                 M_LDR_INTERN(REG_METHODPTR, REG_A0,
2314                                                          OFFSET(java_objectheader, vftbl));
2315                                 M_LDR_INTERN(REG_PV, REG_METHODPTR, s1);
2316
2317                                 /* generate the actual call */
2318
2319                                 M_MOV(REG_LR, REG_PC);
2320                                 M_MOV(REG_PC, REG_PV);
2321                                 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2322                                 M_RECOMPUTE_PV(s1);
2323                                 break;
2324
2325                         case ICMD_INVOKEINTERFACE:
2326                                 if (lm == NULL) {
2327                                         codegen_addpatchref(cd, PATCHER_invokeinterface, um, 0);
2328
2329                                         if (opt_showdisassemble)
2330                                                 M_NOP;
2331
2332                                         s1 = 0;
2333                                         s2 = 0;
2334                                 }
2335                                 else {
2336                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
2337                                                 sizeof(methodptr*) * lm->class->index;
2338                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
2339                                 }
2340
2341                                 /* implicit null-pointer check */
2342                                 M_LDR_INTERN(REG_METHODPTR, REG_A0,
2343                                                          OFFSET(java_objectheader, vftbl));
2344                                 M_LDR_INTERN(REG_METHODPTR, REG_METHODPTR, s1);
2345                                 M_LDR_INTERN(REG_PV, REG_METHODPTR, s2);
2346
2347                                 /* generate the actual call */
2348
2349                                 M_MOV(REG_LR, REG_PC);
2350                                 M_MOV(REG_PC, REG_PV);
2351                                 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2352                                 M_RECOMPUTE_PV(s1);
2353                                 break;
2354                         }
2355
2356                         /* store return value */
2357
2358                         d = md->returntype.type;
2359
2360 #if !defined(__SOFTFP__)
2361                         /* TODO: this is only a hack, since we use R0/R1 for float
2362                            return!  this depends on gcc; it is independent from
2363                            our ENABLE_SOFTFLOAT define */
2364                         if (iptr->opc == ICMD_BUILTIN && d != TYPE_VOID && IS_FLT_DBL_TYPE(d)) {
2365 #if 0 && !defined(NDEBUG)
2366                                 dolog("BUILTIN that returns float or double (%s.%s)", m->class->name->text, m->name->text);
2367 #endif
2368                                 /* we cannot use this macro, since it is not defined
2369                                    in ENABLE_SOFTFLOAT M_CAST_FLT_TO_INT_TYPED(d,
2370                                    REG_FRESULT, REG_RESULT_TYPED(d)); */
2371                                 if (IS_2_WORD_TYPE(d)) {
2372                                         DCD(0xed2d8102); /* stfd    f0, [sp, #-8]! */
2373                                         M_LDRD_UPDATE(REG_RESULT_PACKED, REG_SP, 8);
2374                                 } else {
2375                                         DCD(0xed2d0101); /* stfs    f0, [sp, #-4]!*/
2376                                         M_LDR_UPDATE(REG_RESULT, REG_SP, 4);
2377                                 }
2378                         }
2379 #endif
2380
2381                         if (d != TYPE_VOID) {
2382 #if !defined(ENABLE_SOFTFLOAT)
2383                                 if (IS_INT_LNG_TYPE(d)) {
2384 #endif /* !defined(ENABLE_SOFTFLOAT) */
2385                                         if (IS_2_WORD_TYPE(d)) {
2386                                                 s1 = codegen_reg_of_dst(jd, iptr, REG_RESULT_PACKED);
2387                                                 M_LNGMOVE(REG_RESULT_PACKED, s1);
2388                                         }
2389                                         else {
2390                                                 s1 = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2391                                                 M_INTMOVE(REG_RESULT, s1);
2392                                         }
2393
2394 #if !defined(ENABLE_SOFTFLOAT)
2395                                 } else {
2396                                         s1 = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
2397                                         M_CAST_INT_TO_FLT_TYPED(VAROP(iptr->dst)->type, REG_RESULT_TYPED(VAROP(iptr->dst)->type), s1);
2398                                 }
2399 #endif /* !defined(ENABLE_SOFTFLOAT) */
2400
2401                                 emit_store_dst(jd, iptr, s1);
2402                         }
2403                         break;
2404
2405                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
2406
2407                         if (!(iptr->flags.bits & INS_FLAG_ARRAY)) {
2408                                 /* object type cast-check */
2409
2410                         classinfo *super;
2411                         s4         superindex;
2412
2413                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2414                                 super      = NULL;
2415                                 superindex = 0;
2416                         }
2417                         else {
2418                                 super      = iptr->sx.s23.s3.c.cls;
2419                                 superindex = super->index;
2420                         }
2421
2422                                 if ((super == NULL) || !(super->flags & ACC_INTERFACE))
2423                                         CODEGEN_CRITICAL_SECTION_NEW;
2424
2425                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2426
2427                         /* if class is not resolved, check which code to call */
2428
2429                         if (super == NULL) {
2430                                 M_TST(s1, s1);
2431                                 emit_label_beq(cd, BRANCH_LABEL_1);
2432
2433                                 disp = dseg_add_unique_s4(cd, 0); /* super->flags */
2434                                 codegen_addpatchref(cd, PATCHER_checkcast_instanceof_flags,
2435                                                     iptr->sx.s23.s3.c.ref, disp);
2436
2437                                 if (opt_showdisassemble)
2438                                         M_NOP;
2439
2440                                 M_DSEG_LOAD(REG_ITMP2, disp);
2441                                 disp = dseg_add_s4(cd, ACC_INTERFACE);
2442                                 M_DSEG_LOAD(REG_ITMP3, disp);
2443                                 M_TST(REG_ITMP2, REG_ITMP3);
2444                                 emit_label_beq(cd, BRANCH_LABEL_2);
2445                         }
2446
2447                         /* interface checkcast code */
2448
2449                         if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
2450                                 if ((super == NULL) || !IS_IMM(superindex)) {
2451                                         disp = dseg_add_unique_s4(cd, superindex);
2452                                 }
2453                                 if (super == NULL) {
2454                                         codegen_addpatchref(cd,
2455                                                             PATCHER_checkcast_instanceof_interface,
2456                                                             iptr->sx.s23.s3.c.ref, disp);
2457
2458                                         if (opt_showdisassemble)
2459                                                 M_NOP;
2460                                 }
2461                                 else {
2462                                         M_TST(s1, s1);
2463                                         emit_label_beq(cd, BRANCH_LABEL_3);
2464                                 }
2465
2466                                 M_LDR_INTERN(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2467                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
2468
2469                                 /* we put unresolved or non-immediate superindices onto dseg */
2470                                 if ((super == NULL) || !IS_IMM(superindex)) {
2471                                         /* disp was computed before we added the patcher */
2472                                         M_DSEG_LOAD(REG_ITMP2, disp);
2473                                         M_CMP(REG_ITMP3, REG_ITMP2);
2474                                 } else {
2475                                         assert(IS_IMM(superindex));
2476                                         M_CMP_IMM(REG_ITMP3, superindex);
2477                                 }
2478
2479                                 emit_classcast_check(cd, iptr, BRANCH_LE, REG_ITMP3, s1);
2480
2481                                 /* if we loaded the superindex out of the dseg above, we do
2482                                    things differently here! */
2483                                 if ((super == NULL) || !IS_IMM(superindex)) {
2484
2485                                         M_LDR_INTERN(REG_ITMP3, s1, OFFSET(java_objectheader, vftbl));
2486
2487                                         /* this assumes something */
2488                                         assert(OFFSET(vftbl_t, interfacetable[0]) == 0);
2489
2490                                         /* this does: REG_ITMP3 - superindex * sizeof(methodptr*) */
2491                                         assert(sizeof(methodptr*) == 4);
2492                                         M_SUB(REG_ITMP2, REG_ITMP3, REG_LSL(REG_ITMP2, 2));
2493
2494                                         s2 = 0;
2495
2496                                 } else {
2497
2498                                         s2 = OFFSET(vftbl_t, interfacetable[0]) -
2499                                                                 superindex * sizeof(methodptr*);
2500
2501                                 }
2502
2503                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP2, s2);
2504                                 M_TST(REG_ITMP3, REG_ITMP3);
2505                                 emit_classcast_check(cd, iptr, BRANCH_EQ, REG_ITMP3, s1);
2506
2507                                 if (super == NULL)
2508                                         emit_label_br(cd, BRANCH_LABEL_4);
2509                                 else
2510                                         emit_label(cd, BRANCH_LABEL_3);
2511                         }
2512
2513                         /* class checkcast code */
2514
2515                         if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
2516                                 if (super == NULL) {
2517                                         emit_label(cd, BRANCH_LABEL_2);
2518
2519                                         disp = dseg_add_unique_address(cd, NULL);
2520
2521                                         codegen_addpatchref(cd, PATCHER_checkcast_instanceof_class,
2522                                                             iptr->sx.s23.s3.c.ref,
2523                                                                                 disp);
2524
2525                                         if (opt_showdisassemble)
2526                                                 M_NOP;
2527                                 }
2528                                 else {
2529                                         disp = dseg_add_address(cd, super->vftbl);
2530
2531                                         M_TST(s1, s1);
2532                                         emit_label_beq(cd, BRANCH_LABEL_5);
2533                                 }
2534
2535                                 M_LDR_INTERN(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2536                                 M_DSEG_LOAD(REG_ITMP3, disp);
2537
2538                                 CODEGEN_CRITICAL_SECTION_START;
2539
2540                                 M_LDR_INTERN(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
2541                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, baseval));
2542                                 M_SUB(REG_ITMP2, REG_ITMP2, REG_ITMP3);
2543                                 M_DSEG_LOAD(REG_ITMP3, disp);
2544                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval));
2545
2546                                 CODEGEN_CRITICAL_SECTION_END;
2547
2548                                 M_CMP(REG_ITMP2, REG_ITMP3);
2549                                 emit_classcast_check(cd, iptr, BRANCH_UGT, 0, s1);
2550
2551                                 if (super != NULL)
2552                                         emit_label(cd, BRANCH_LABEL_5);
2553                         }
2554
2555                         if (super == NULL) {
2556                                 emit_label(cd, BRANCH_LABEL_1);
2557                                 emit_label(cd, BRANCH_LABEL_4);
2558                         }
2559
2560                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
2561                         }
2562                         else {
2563                                 /* array type cast-check */
2564
2565                                 s1 = emit_load_s1(jd, iptr, REG_A0);
2566                                 M_INTMOVE(s1, REG_A0);
2567
2568                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2569                                         disp = dseg_add_unique_address(cd, NULL);
2570
2571                                         codegen_addpatchref(cd, PATCHER_builtin_arraycheckcast,
2572                                                                                 iptr->sx.s23.s3.c.ref,
2573                                                                                 disp);
2574
2575                                         if (opt_showdisassemble)
2576                                                 M_NOP;
2577                                 }
2578                                 else
2579                                         disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2580
2581                                 M_DSEG_LOAD(REG_A1, disp);
2582                                 disp = dseg_add_functionptr(cd, BUILTIN_arraycheckcast);
2583                                 M_DSEG_BRANCH(disp);
2584
2585                                 /* recompute pv */
2586                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2587                                 M_RECOMPUTE_PV(disp);
2588
2589                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2590                                 M_TST(REG_RESULT, REG_RESULT);
2591                                 emit_classcast_check(cd, iptr, BRANCH_EQ, REG_RESULT, s1);
2592
2593                                 d = codegen_reg_of_dst(jd, iptr, s1);
2594                         }
2595
2596                         M_INTMOVE(s1, d);
2597                         emit_store_dst(jd, iptr, d);
2598                         break;
2599
2600                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
2601
2602                         {
2603                         classinfo *super;
2604                         s4         superindex;
2605
2606                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2607                                 super      = NULL;
2608                                 superindex = 0;
2609                         }
2610                         else {
2611                                 super      = iptr->sx.s23.s3.c.cls;
2612                                 superindex = super->index;
2613                         }
2614
2615                         if ((super == NULL) || !(super->flags & ACC_INTERFACE))
2616                                 CODEGEN_CRITICAL_SECTION_NEW;
2617
2618                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2619                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
2620
2621                         if (s1 == d) {
2622                                 M_MOV(REG_ITMP1, s1);
2623                                 s1 = REG_ITMP1;
2624                         }
2625
2626                         /* if class is not resolved, check which code to call */
2627
2628                         if (super == NULL) {
2629                                 M_EOR(d, d, d);
2630
2631                                 M_TST(s1, s1);
2632                                 emit_label_beq(cd, BRANCH_LABEL_1);
2633
2634                                 disp = dseg_add_unique_s4(cd, 0); /* super->flags */
2635                                 codegen_addpatchref(cd, PATCHER_checkcast_instanceof_flags,
2636                                                     iptr->sx.s23.s3.c.ref, disp);
2637
2638                                 if (opt_showdisassemble)
2639                                         M_NOP;
2640
2641                                 M_DSEG_LOAD(REG_ITMP2, disp);
2642                                 disp = dseg_add_s4(cd, ACC_INTERFACE);
2643                                 M_DSEG_LOAD(REG_ITMP3, disp);
2644                                 M_TST(REG_ITMP2, REG_ITMP3);
2645                                 emit_label_beq(cd, BRANCH_LABEL_2);
2646                         }
2647
2648                         /* interface checkcast code */
2649
2650                         if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
2651                                 if ((super == NULL) || !IS_IMM(superindex)) {
2652                                         disp = dseg_add_unique_s4(cd, superindex);
2653                                 }
2654                                 if (super == NULL) {
2655                                         /* If d == REG_ITMP2, then it's destroyed in check
2656                                            code above.  */
2657                                         if (d == REG_ITMP2)
2658                                                 M_EOR(d, d, d);
2659
2660                                         codegen_addpatchref(cd,
2661                                                             PATCHER_checkcast_instanceof_interface,
2662                                                             iptr->sx.s23.s3.c.ref, disp);
2663
2664                                         if (opt_showdisassemble)
2665                                                 M_NOP;
2666                                 }
2667                                 else {
2668                                         M_EOR(d, d, d);
2669                                         M_TST(s1, s1);
2670                                         emit_label_beq(cd, BRANCH_LABEL_3);
2671                                 }
2672
2673                                 M_LDR_INTERN(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
2674                                 M_LDR_INTERN(REG_ITMP3,
2675                                                          REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
2676
2677                                 /* we put unresolved or non-immediate superindices onto dseg
2678                                    and do things slightly different */
2679                                 if ((super == NULL) || !IS_IMM(superindex)) {
2680                                         /* disp was computed before we added the patcher */
2681                                         M_DSEG_LOAD(REG_ITMP2, disp);
2682                                         M_CMP(REG_ITMP3, REG_ITMP2);
2683
2684                                         if (d == REG_ITMP2) {
2685                                                 M_EORLE(d, d, d);
2686                                                 M_BLE(4);
2687                                         } else {
2688                                                 M_BLE(3);
2689                                         }
2690
2691                                         /* this assumes something */
2692                                         assert(OFFSET(vftbl_t, interfacetable[0]) == 0);
2693
2694                                         /* this does: REG_ITMP3 - superindex * sizeof(methodptr*) */
2695                                         assert(sizeof(methodptr*) == 4);
2696                                         M_SUB(REG_ITMP1, REG_ITMP1, REG_LSL(REG_ITMP2, 2));
2697
2698                                         if (d == REG_ITMP2) {
2699                                                 M_EOR(d, d, d);
2700                                         }
2701
2702                                         s2 = 0;
2703
2704                                 } else {
2705                                         assert(IS_IMM(superindex));
2706                                         M_CMP_IMM(REG_ITMP3, superindex);
2707
2708                                         M_BLE(2);
2709
2710                                         s2 = OFFSET(vftbl_t, interfacetable[0]) -
2711                                                 superindex * sizeof(methodptr*);
2712
2713                                 }
2714
2715                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP1, s2);
2716                                 M_TST(REG_ITMP3, REG_ITMP3);
2717                                 M_MOVNE_IMM(1, d);
2718
2719                                 if (super == NULL)
2720                                         emit_label_br(cd, BRANCH_LABEL_4);
2721                                 else
2722                                         emit_label(cd, BRANCH_LABEL_3);
2723                         }
2724
2725                         /* class checkcast code */
2726
2727                         if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
2728                                 if (super == NULL) {
2729                                         emit_label(cd, BRANCH_LABEL_2);
2730
2731                                         disp = dseg_add_unique_address(cd, NULL);
2732
2733                                         codegen_addpatchref(cd, PATCHER_checkcast_instanceof_class,
2734                                                             iptr->sx.s23.s3.c.ref,
2735                                                                                 disp);
2736
2737                                         if (opt_showdisassemble)
2738                                                 M_NOP;
2739                                 }
2740                                 else {
2741                                         disp = dseg_add_address(cd, super->vftbl);
2742
2743                                         M_EOR(d, d, d);
2744                                         M_TST(s1, s1);
2745                                         emit_label_beq(cd, BRANCH_LABEL_5);
2746                                 }
2747
2748                                 M_LDR_INTERN(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
2749                                 M_DSEG_LOAD(REG_ITMP2, disp);
2750
2751                                 CODEGEN_CRITICAL_SECTION_START;
2752
2753                                 M_LDR_INTERN(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
2754                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
2755                                 M_LDR_INTERN(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
2756
2757                                 CODEGEN_CRITICAL_SECTION_END;
2758
2759                                 M_SUB(REG_ITMP1, REG_ITMP1, REG_ITMP3);
2760                                 M_CMP(REG_ITMP1, REG_ITMP2);
2761                                 /* If d == REG_ITMP2, then it's destroyed */
2762                                 if (d == REG_ITMP2)
2763                                         M_EOR(d, d, d);
2764                                 M_MOVLS_IMM(1, d);
2765
2766                                 if (super != NULL)
2767                                         emit_label(cd, BRANCH_LABEL_5);
2768                         }
2769
2770                         if (super == NULL) {
2771                                 emit_label(cd, BRANCH_LABEL_1);
2772                                 emit_label(cd, BRANCH_LABEL_4);
2773                         }
2774
2775                         }
2776
2777                         emit_store_dst(jd, iptr, d);
2778                         break;
2779
2780                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
2781
2782                         /* copy sizes to stack if necessary  */
2783
2784                         MCODECHECK((iptr->s1.argcount << 1) + 64);
2785
2786                         for (s1 = iptr->s1.argcount; --s1 >= 0; ) {
2787
2788                                 var = VAR(iptr->sx.s23.s2.args[s1]);
2789         
2790                                 /* copy SAVEDVAR sizes to stack */
2791
2792                                 if (!(var->flags & PREALLOC)) {
2793                                         s2 = emit_load(jd, iptr, var, REG_ITMP1);
2794                                         M_STR(s2, REG_SP, s1 * 4);
2795                                 }
2796                         }
2797
2798                         /* a0 = dimension count */
2799
2800                         assert(IS_IMM(iptr->s1.argcount));
2801                         M_MOV_IMM(REG_A0, iptr->s1.argcount);
2802
2803                         /* is patcher function set? */
2804
2805                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2806                                 disp = dseg_add_unique_address(cd, NULL);
2807
2808                                 codegen_addpatchref(cd, PATCHER_builtin_multianewarray,
2809                                                                         iptr->sx.s23.s3.c.ref, disp);
2810
2811                                 if (opt_showdisassemble)
2812                                         M_NOP;
2813                         }
2814                         else
2815                                 disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2816
2817                         /* a1 = arraydescriptor */
2818
2819                         M_DSEG_LOAD(REG_A1, disp);
2820
2821                         /* a2 = pointer to dimensions = stack pointer */
2822
2823                         M_INTMOVE(REG_SP, REG_A2);
2824
2825                         /* call builtin_multianewarray here */
2826
2827                         disp = dseg_add_functionptr(cd, BUILTIN_multianewarray);
2828                         M_DSEG_BRANCH(disp);
2829
2830                         /* recompute pv */
2831
2832                         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2833                         M_RECOMPUTE_PV(s1);
2834
2835                         /* check for exception before result assignment */
2836
2837                         emit_exception_check(cd, iptr);
2838
2839                         /* get arrayref */
2840
2841                         d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2842                         M_INTMOVE(REG_RESULT, d);
2843                         emit_store_dst(jd, iptr, d);
2844                         break;
2845
2846                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
2847
2848                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2849                         emit_nullpointer_check(cd, iptr, s1);
2850                         break;
2851
2852                 default:
2853                         exceptions_throw_internalerror("Unknown ICMD %d during code generation",
2854                                                                                    iptr->opc);
2855                         return false;
2856                 } /* the big switch */
2857
2858                 } /* for all instructions */
2859
2860         } /* for all basic blocks */
2861
2862         dseg_createlinenumbertable(cd);
2863
2864
2865         /* generate stubs */
2866
2867         emit_patcher_stubs(jd);
2868
2869         /* everything's ok */
2870
2871         return true;
2872 }
2873
2874
2875 /* codegen_emit_stub_compiler **************************************************
2876
2877    Emits a stub routine which calls the compiler.
2878         
2879 *******************************************************************************/
2880
2881 void codegen_emit_stub_compiler(jitdata *jd)
2882 {
2883         methodinfo  *m;
2884         codegendata *cd;
2885
2886         /* get required compiler data */
2887
2888         m  = jd->m;
2889         cd = jd->cd;
2890
2891         /* code for the stub */
2892
2893         M_LDR_INTERN(REG_ITMP1, REG_PC, -(2 * 4 + 2 * SIZEOF_VOID_P));
2894         M_LDR_INTERN(REG_PC, REG_PC, -(3 * 4 + 3 * SIZEOF_VOID_P));
2895 }
2896
2897
2898 /* codegen_emit_stub_native ****************************************************
2899
2900    Emits a stub routine which calls a native method.
2901
2902 *******************************************************************************/
2903
2904 void codegen_emit_stub_native(jitdata *jd, methoddesc *nmd, functionptr f)
2905 {
2906         methodinfo  *m;
2907         codeinfo    *code;
2908         codegendata *cd;
2909         s4           nativeparams;
2910         methoddesc  *md;
2911         s4           i, j;
2912         s4           t;
2913         s4           disp, funcdisp, s1, s2;
2914
2915         /* get required compiler data */
2916
2917         m    = jd->m;
2918         code = jd->code;
2919         cd   = jd->cd;
2920
2921         /* initialize variables */
2922
2923         md = m->parseddesc;
2924         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
2925
2926         /* calculate stackframe size */
2927
2928         cd->stackframesize = 
2929                 1 +                                                /* return address  */
2930                 sizeof(stackframeinfo) / SIZEOF_VOID_P +           /* stackframeinfo  */
2931                 sizeof(localref_table) / SIZEOF_VOID_P +           /* localref_table  */
2932                 nmd->memuse;                                       /* stack arguments */
2933
2934         /* align stack to 8-byte */
2935
2936         cd->stackframesize = (cd->stackframesize + 1) & ~1;
2937
2938         /* create method header */
2939
2940         (void) dseg_add_unique_address(cd, code);              /* CodeinfoPointer */
2941         (void) dseg_add_unique_s4(cd, cd->stackframesize * 4); /* FrameSize       */
2942         (void) dseg_add_unique_s4(cd, 0);                      /* IsSync          */
2943         (void) dseg_add_unique_s4(cd, 0);                      /* IsLeaf          */
2944         (void) dseg_add_unique_s4(cd, 0);                      /* IntSave         */
2945         (void) dseg_add_unique_s4(cd, 0);                      /* FltSave         */
2946         (void) dseg_addlinenumbertablesize(cd);
2947         (void) dseg_add_unique_s4(cd, 0);                      /* ExTableSize     */
2948
2949         /* generate stub code */
2950
2951         M_STMFD(1<<REG_LR, REG_SP);
2952         M_SUB_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize - 1);
2953
2954 #if !defined(NDEBUG)
2955         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
2956                 emit_verbosecall_enter(jd);
2957 #endif
2958
2959         /* get function address (this must happen before the stackframeinfo) */
2960
2961         funcdisp = dseg_add_functionptr(cd, f);
2962
2963 #if !defined(WITH_STATIC_CLASSPATH)
2964         if (f == NULL) {
2965                 codegen_addpatchref(cd, PATCHER_resolve_native, m, funcdisp);
2966
2967                 if (opt_showdisassemble)
2968                         M_NOP;
2969         }
2970 #endif
2971
2972         /* Save integer and float argument registers (these are 4
2973            registers, stack is 8-byte aligned). */
2974
2975         M_STMFD(BITMASK_ARGS, REG_SP);
2976         /* TODO: floating point */
2977
2978         /* create native stackframe info */
2979
2980         assert(IS_IMM(4*4 + cd->stackframesize * 4));
2981         M_ADD_IMM(REG_A0, REG_SP, 4*4 + cd->stackframesize * 4 - SIZEOF_VOID_P);
2982         M_MOV(REG_A1, REG_PV);
2983         M_ADD_IMM(REG_A2, REG_SP, 4*4 + cd->stackframesize * 4);
2984         M_LDR_INTERN(REG_A3, REG_SP, 4*4 + cd->stackframesize * 4 - SIZEOF_VOID_P);
2985         disp = dseg_add_functionptr(cd, codegen_start_native_call);
2986         M_DSEG_BRANCH(disp);
2987
2988         /* recompute pv */
2989
2990         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2991         M_RECOMPUTE_PV(s1);
2992
2993         /* Restore integer and float argument registers (these are 4
2994            registers, stack is 8-byte aligned). */
2995
2996         M_LDMFD(BITMASK_ARGS, REG_SP);
2997         /* TODO: floating point */
2998
2999         /* copy or spill arguments to new locations */
3000         /* ATTENTION: the ARM has only integer argument registers! */
3001
3002         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
3003                 t = md->paramtypes[i].type;
3004
3005                 if (!md->params[i].inmemory) {
3006                         s1 = md->params[i].regoff;
3007                         s2 = nmd->params[j].regoff;
3008
3009                         if (!nmd->params[j].inmemory) {
3010 #if !defined(__ARM_EABI__)
3011                                 SPLIT_OPEN(t, s2, REG_ITMP1);
3012 #endif
3013
3014                                 if (IS_2_WORD_TYPE(t))
3015                                         M_LNGMOVE(s1, s2);
3016                                 else
3017                                         M_INTMOVE(s1, s2);
3018
3019 #if !defined(__ARM_EABI__)
3020                                 SPLIT_STORE_AND_CLOSE(t, s2, 0);
3021 #endif
3022                         }
3023                         else {
3024                                 if (IS_2_WORD_TYPE(t))
3025                                         M_LST(s1, REG_SP, s2 * 4);
3026                                 else
3027                                         M_IST(s1, REG_SP, s2 * 4);
3028                         }
3029                 }
3030                 else {
3031                         s1 = md->params[i].regoff + cd->stackframesize;
3032                         s2 = nmd->params[j].regoff;
3033
3034                         if (IS_2_WORD_TYPE(t)) {
3035                                 M_LLD(REG_ITMP12_PACKED, REG_SP, s1 * 4);
3036                                 M_LST(REG_ITMP12_PACKED, REG_SP, s2 * 4);
3037                         }
3038                         else {
3039                                 M_ILD(REG_ITMP1, REG_SP, s1 * 4);
3040                                 M_IST(REG_ITMP1, REG_SP, s2 * 4);
3041                         }
3042                 }
3043         }
3044
3045         /* put class into second argument register */
3046
3047         if (m->flags & ACC_STATIC) {
3048                 disp = dseg_add_address(cd, m->class);
3049                 M_DSEG_LOAD(REG_A1, disp);
3050         }
3051
3052         /* put env into first argument register */
3053
3054         disp = dseg_add_address(cd, _Jv_env);
3055         M_DSEG_LOAD(REG_A0, disp);
3056
3057         /* do the native function call */
3058
3059         M_DSEG_BRANCH(funcdisp);
3060
3061         /* recompute pv */
3062         /* TODO: this is only needed because of the tracer ... do we
3063            really need it? */
3064
3065         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
3066         M_RECOMPUTE_PV(s1);
3067
3068 #if !defined(__SOFTFP__)
3069         /* TODO: this is only a hack, since we use R0/R1 for float return! */
3070         /* this depends on gcc; it is independent from our ENABLE_SOFTFLOAT define */
3071         if (md->returntype.type != TYPE_VOID && IS_FLT_DBL_TYPE(md->returntype.type)) {
3072 #if 0 && !defined(NDEBUG)
3073                 dolog("NATIVESTUB that returns float or double (%s.%s)", m->class->name->text, m->name->text);
3074 #endif
3075                 /* we cannot use this macro, since it is not defined in ENABLE_SOFTFLOAT */
3076                 /* M_CAST_FLT_TO_INT_TYPED(md->returntype.type, REG_FRESULT, REG_RESULT_TYPED(md->returntype.type)); */
3077                 if (IS_2_WORD_TYPE(md->returntype.type)) {
3078                         DCD(0xed2d8102); /* stfd    f0, [sp, #-8]! */
3079                         M_LDRD_UPDATE(REG_RESULT_PACKED, REG_SP, 8);
3080                 } else {
3081                         DCD(0xed2d0101); /* stfs    f0, [sp, #-4]!*/
3082                         M_LDR_UPDATE(REG_RESULT, REG_SP, 4);
3083                 }
3084         }
3085 #endif
3086
3087 #if !defined(NDEBUG)
3088         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
3089                 emit_verbosecall_exit(jd);
3090 #endif
3091
3092         /* remove native stackframe info */
3093         /* TODO: improve this store/load */
3094
3095         M_STMFD(BITMASK_RESULT, REG_SP);
3096
3097         M_ADD_IMM(REG_A0, REG_SP, 2*4 + cd->stackframesize * 4 - SIZEOF_VOID_P);
3098         disp = dseg_add_functionptr(cd, codegen_finish_native_call);
3099         M_DSEG_BRANCH(disp);
3100         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
3101         M_RECOMPUTE_PV(s1);
3102
3103         M_MOV(REG_ITMP1_XPTR, REG_RESULT);
3104         M_LDMFD(BITMASK_RESULT, REG_SP);
3105
3106         /* finish stub code, but do not yet return to caller */
3107
3108         M_ADD_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize - 1);
3109         M_LDMFD(1<<REG_LR, REG_SP);
3110
3111         /* check for exception */
3112
3113         M_TST(REG_ITMP1_XPTR, REG_ITMP1_XPTR);
3114         M_MOVEQ(REG_LR, REG_PC);            /* if no exception, return to caller  */
3115
3116         /* handle exception here */
3117
3118         M_SUB_IMM(REG_ITMP2_XPC, REG_LR, 4);/* move fault address into xpc        */
3119
3120         disp = dseg_add_functionptr(cd, asm_handle_nat_exception);
3121         M_DSEG_LOAD(REG_ITMP3, disp);       /* load asm exception handler address */
3122         M_MOV(REG_PC, REG_ITMP3);           /* jump to asm exception handler      */
3123
3124         /* generate patcher stubs */
3125
3126         emit_patcher_stubs(jd);
3127 }
3128
3129
3130 /* asm_debug *******************************************************************
3131
3132    Lazy debugger!
3133
3134 *******************************************************************************/
3135
3136 void asm_debug(int a1, int a2, int a3, int a4)
3137 {
3138         printf("===> i am going to exit after this debugging message!\n");
3139         printf("got asm_debug(%p, %p, %p, %p)\n",(void*)a1,(void*)a2,(void*)a3,(void*)a4);
3140         vm_abort("leave you now");
3141 }
3142
3143
3144 /*
3145  * These are local overrides for various environment variables in Emacs.
3146  * Please do not remove this and leave it at the end of the file, where
3147  * Emacs will automagically detect them.
3148  * ---------------------------------------------------------------------
3149  * Local variables:
3150  * mode: c
3151  * indent-tabs-mode: t
3152  * c-basic-offset: 4
3153  * tab-width: 4
3154  * End:
3155  * vim:noexpandtab:sw=4:ts=4:
3156  */