src/vm/jit/arm/codegen.c

   1 /* src/vm/jit/arm/codegen.c - machine code generator for Arm
   2
   3    Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
   4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
   5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
   6    J. Wenninger, Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  23    02110-1301, USA.
  24
  25    $Id: codegen.c 7511 2007-03-13 16:32:56Z michi $
  26
  27 */
  28
  29
  30 #include "config.h"
  31
  32 #include <assert.h>
  33 #include <stdio.h>
  34
  35 #include "vm/types.h"
  36
  37 #include "md-abi.h"
  38
  39 #include "vm/jit/arm/arch.h"
  40 #include "vm/jit/arm/codegen.h"
  41
  42 #include "mm/memory.h"
  43
  44 #include "native/native.h"
  45
  46 #if defined(ENABLE_THREADS)
  47 # include "threads/native/lock.h"
  48 #endif
  49
  50 #include "vm/builtin.h"
  51 #include "vm/exceptions.h"
  52 #include "vm/global.h"
  53 #include "vm/vm.h"
  54
  55 #include "vm/jit/asmpart.h"
  56 #include "vm/jit/codegen-common.h"
  57 #include "vm/jit/dseg.h"
  58 #include "vm/jit/emit-common.h"
  59 #include "vm/jit/jit.h"
  60 #include "vm/jit/md.h"
  61 #include "vm/jit/methodheader.h"
  62 #include "vm/jit/parse.h"
  63 #include "vm/jit/patcher.h"
  64 #include "vm/jit/reg.h"
  65
  66 #if defined(ENABLE_LSRA)
  67 #include "vm/jit/allocator/lsra.h"
  68 #endif
  69
  70 #include "vmcore/loader.h"
  71 #include "vmcore/options.h"
  72
  73
  74 /* codegen *********************************************************************
  75
  76    Generates machine code.
  77
  78 *******************************************************************************/
  79
  80 bool codegen(jitdata *jd)
  81 {
  82         methodinfo         *m;
  83         codeinfo           *code;
  84         codegendata        *cd;
  85         registerdata       *rd;
  86         s4              i, t, len;
  87         s4              s1, s2, s3, d;
  88         s4              disp;
  89         varinfo        *var;
  90         basicblock     *bptr;
  91         instruction    *iptr;
  92         exception_entry *ex;
  93         s4              fieldtype;
  94         s4              varindex;
  95
  96         s4              spilledregs_num;
  97         s4              savedregs_num;
  98         u2              savedregs_bitmask;
  99         u2              currentline;
 100
 101         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE* */
 102         unresolved_method  *um;
 103         builtintable_entry *bte;
 104         methoddesc         *md;
 105
 106         /* get required compiler data */
 107
 108         m    = jd->m;
 109         code = jd->code;
 110         cd   = jd->cd;
 111         rd   = jd->rd;
 112
 113         /* prevent compiler warnings */
 114
 115         lm  = NULL;
 116         um  = NULL;
 117         bte = NULL;
 118
 119         fieldtype = -1;
 120
 121         /* space to save used callee saved registers */
 122
 123         savedregs_num = (jd->isleafmethod) ? 0 : 1;       /* space to save the LR */
 124         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
 125         savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
 126
 127         spilledregs_num = rd->memuse;
 128
 129 #if defined(ENABLE_THREADS)        /* space to save argument of monitor_enter */
 130         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 131                 spilledregs_num++;
 132 #endif
 133
 134         cd->stackframesize = spilledregs_num + savedregs_num;
 135
 136         /* XXX QUICK FIX: We shouldn't align the stack in Java code, but
 137            only in native stubs. */
 138         /* align stack to 8-byte */
 139
 140         cd->stackframesize = (cd->stackframesize + 1) & ~1;
 141
 142         /* SECTION: Method Header */
 143         /* create method header */
 144
 145         (void) dseg_add_unique_address(cd, code);              /* CodeinfoPointer */
 146         (void) dseg_add_unique_s4(cd, cd->stackframesize * 4); /* FrameSize       */
 147
 148 #if defined(ENABLE_THREADS)
 149         /* IsSync contains the offset relative to the stack pointer for the
 150            argument of monitor_exit used in the exception handler. Since the
 151            offset could be zero and give a wrong meaning of the flag it is
 152            offset by one.
 153         */
 154
 155         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 156                 (void) dseg_add_unique_s4(cd, (rd->memuse + 1) * 4);/* IsSync         */
 157         else
 158 #endif
 159                 (void) dseg_add_unique_s4(cd, 0);                  /* IsSync          */
 160
 161         (void) dseg_add_unique_s4(cd, jd->isleafmethod);       /* IsLeaf          */
 162         (void) dseg_add_unique_s4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave */
 163         (void) dseg_add_unique_s4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave */
 164         (void) dseg_addlinenumbertablesize(cd);
 165         (void) dseg_add_unique_s4(cd, jd->exceptiontablelength); /* ExTableSize   */
 166
 167         /* create exception table */
 168
 169         for (ex = jd->exceptiontable; ex != NULL; ex = ex->down) {
 170                 dseg_add_target(cd, ex->start);
 171                 dseg_add_target(cd, ex->end);
 172                 dseg_add_target(cd, ex->handler);
 173                 (void) dseg_add_unique_address(cd, ex->catchtype.any);
 174         }
 175
 176         /* save return address and used callee saved registers */
 177
 178         savedregs_bitmask = 0;
 179
 180         if (!jd->isleafmethod)
 181                 savedregs_bitmask = (1<<REG_LR);
 182
 183         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--)
 184                 savedregs_bitmask |= (1<<(rd->savintregs[i]));
 185
 186 #if !defined(NDEBUG)
 187         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
 188                 log_text("!!! CODEGEN: floating-point callee saved registers are not saved to stack (SEVERE! STACK IS MESSED UP!)");
 189                 /* TODO: floating-point */
 190         }
 191 #endif
 192
 193         if (savedregs_bitmask)
 194                 M_STMFD(savedregs_bitmask, REG_SP);
 195
 196         /* create additional stack frame for spilled variables (if necessary) */
 197
 198         if ((cd->stackframesize - savedregs_num) > 0)
 199                 M_SUB_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize - savedregs_num);
 200
 201         /* take arguments out of register or stack frame */
 202
 203         md = m->parseddesc;
 204         for (i = 0, len = 0; i < md->paramcount; i++) {
 205                 s1 = md->params[i].regoff;
 206                 t = md->paramtypes[i].type;
 207
 208                 varindex = jd->local_map[len * 5 + t];
 209
 210                 len += (IS_2_WORD_TYPE(t)) ? 2 : 1;          /* 2 word type arguments */
 211
 212                 if (varindex == UNUSED)
 213                         continue;
 214
 215                 var = VAR(varindex);
 216
 217                 /* ATTENTION: we use interger registers for all arguments (even float) */
 218 #if !defined(ENABLE_SOFTFLOAT)
 219                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 220 #endif
 221                         if (!md->params[i].inmemory) {           /* register arguments    */
 222                                 s2 = ARGUMENT_REGS(t, s1);           /* get argument register */
 223                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 224                                         if (GET_LOW_REG(var->vv.regoff) == REG_SPLIT || GET_HIGH_REG(var->vv.regoff) == REG_SPLIT) {
 225                                                 /* TODO: remove this!!! */
 226                                                 dolog("SPLIT in local var: %x>%x (%s.%s)", s2, var->vv.regoff, m->class->name->text, m->name->text);
 227                                                 assert(s2 == var->vv.regoff);
 228                                         }
 229                                         s3 = var->vv.regoff;
 230                                         SPLIT_OPEN(t, s2, REG_ITMP1);
 231                                         SPLIT_LOAD(t, s2, cd->stackframesize);
 232                                         SPLIT_OPEN(t, s3, REG_ITMP1);
 233
 234                                         if (IS_2_WORD_TYPE(t))
 235                                                 M_LNGMOVE(s2, s3);
 236                                         else
 237                                                 M_INTMOVE(s2, s3);
 238
 239                                         SPLIT_STORE_AND_CLOSE(t, s3, cd->stackframesize);
 240                                 }
 241                                 else {                               /* reg arg -> spilled    */
 242                                         SPLIT_OPEN(t, s2, REG_ITMP1);
 243                                         SPLIT_LOAD(t, s2, cd->stackframesize);
 244
 245                                         if (IS_2_WORD_TYPE(t))
 246                                                 M_LST(s2, REG_SP, var->vv.regoff * 4);
 247                                         else
 248                                                 M_IST(s2, REG_SP, var->vv.regoff * 4);
 249                                         /* no SPLIT_CLOSE here because arg is fully spilled now */
 250                                 }
 251                         }
 252                         else {                                   /* stack arguments       */
 253                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 254                                         if (IS_2_WORD_TYPE(t))
 255                                                 M_LLD(var->vv.regoff, REG_SP, (cd->stackframesize + s1) * 4);
 256                                         else
 257                                                 M_ILD(var->vv.regoff, REG_SP, (cd->stackframesize + s1) * 4);
 258                                 }
 259                                 else {                               /* stack arg -> spilled  */
 260                                         /* Reuse Memory Position on Caller Stack */
 261                                         var->vv.regoff = cd->stackframesize + s1;
 262                                 }
 263                         }
 264 #if !defined(ENABLE_SOFTFLOAT)
 265                 } else {                                     /* floating args         */
 266                         if (!md->params[i].inmemory) {           /* register arguments    */
 267                                 s2 = ARGUMENT_REGS(t, s1);           /* get argument register */
 268                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 269                                         SPLIT_OPEN(t, s2, REG_ITMP1);
 270                                         SPLIT_LOAD(t, s2, cd->stackframesize);
 271                                         M_CAST_INT_TO_FLT_TYPED(t, s2, var->vv.regoff);
 272                                 }
 273                                 else {                               /* reg arg -> spilled    */
 274                                         SPLIT_OPEN(t, s2, REG_ITMP1);
 275                                         SPLIT_LOAD(t, s2, cd->stackframesize);
 276
 277                                         if (IS_2_WORD_TYPE(t))
 278                                                 M_LST(s2, REG_SP, var->vv.regoff * 4);
 279                                         else
 280                                                 M_IST(s2, REG_SP, var->vv.regoff * 4);
 281                                         /* no SPLIT_CLOSE here because arg is fully spilled now */
 282                                 }
 283                         }
 284                         else {                                   /* stack arguments       */
 285                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 286                                         if (IS_2_WORD_TYPE(t))
 287                                                 M_DLD(var->vv.regoff, REG_SP, (cd->stackframesize + s1) * 4);
 288                                         else
 289                                                 M_FLD(var->vv.regoff, REG_SP, (cd->stackframesize + s1) * 4);
 290                                 }
 291                                 else {                               /* stack arg -> spilled  */
 292                                         /* Reuse Memory Position on Caller Stack */
 293                                         var->vv.regoff = cd->stackframesize + s1;
 294                                 }
 295                         }
 296                 }
 297 #endif /* !defined(ENABLE_SOFTFLOAT) */
 298         }
 299
 300 #if defined(ENABLE_THREADS)
 301         /* call monitorenter function */
 302
 303         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 304                 /* stack offset for monitor argument */
 305
 306                 s1 = rd->memuse;
 307
 308 # if !defined(NDEBUG)
 309                 if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
 310                         M_STMFD(BITMASK_ARGS, REG_SP);
 311                         s1 += 4;
 312                 }
 313 # endif
 314
 315                 /* get the correct lock object */
 316
 317                 if (m->flags & ACC_STATIC) {
 318                         disp = dseg_add_address(cd, &m->class->object.header);
 319                         M_DSEG_LOAD(REG_A0, disp);
 320                 }
 321                 else {
 322                         M_TST(REG_A0, REG_A0);
 323                         M_BEQ(0);
 324                         codegen_add_nullpointerexception_ref(cd);
 325                 }
 326
 327                 M_STR(REG_A0, REG_SP, s1 * 4);
 328                 disp = dseg_add_functionptr(cd, LOCK_monitor_enter);
 329                 M_DSEG_BRANCH(disp);
 330                 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
 331                 M_RECOMPUTE_PV(s1);
 332
 333 # if !defined(NDEBUG)
 334                 if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
 335                         M_LDMFD(BITMASK_ARGS, REG_SP);
 336 # endif
 337         }
 338 #endif
 339
 340 #if !defined(NDEBUG)
 341         /* call trace function */
 342
 343         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
 344                 emit_verbosecall_enter(jd);
 345 #endif
 346
 347         /* end of header generation */
 348
 349         /* SECTION: ICMD Code Generation */
 350         /* for all basic blocks */
 351
 352         for (bptr = jd->basicblocks; bptr != NULL; bptr = bptr->next) {
 353
 354                 bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase);
 355
 356                 /* is this basic block reached? */
 357
 358                 if (bptr->flags < BBREACHED)
 359                         continue;
 360
 361                 /* branch resolving */
 362
 363                 codegen_resolve_branchrefs(cd, bptr);
 364
 365                 /* copy interface registers to their destination */
 366
 367                 len = bptr->indepth;
 368
 369                 MCODECHECK(64+len);
 370
 371 #if defined(ENABLE_LSRA)
 372                 if (opt_lsra) {
 373                 while (len) {
 374                         len--;
 375                         var = VAR(bptr->invars[len]);
 376                         if ((len == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
 377                                 if (!(var->flags & INMEMORY))
 378                                         d= var->vv.regoff;
 379                                 else
 380                                         d=REG_ITMP1;
 381                                 M_INTMOVE(REG_ITMP1, d);
 382                                 emit_store(jd, NULL, var, d);
 383                         }
 384                 }
 385                 } else {
 386 #endif
 387                 while (len) {
 388                         len--;
 389                         var = VAR(bptr->invars[len]);
 390
 391                         if ((len == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
 392                                 d = codegen_reg_of_var(0, var, REG_ITMP1);
 393                                 M_INTMOVE(REG_ITMP1, d);
 394                                 emit_store(jd, NULL, var, d);
 395                         }
 396                         else {
 397                                 assert((var->flags & INOUT));
 398                         }
 399                 }
 400 #if defined(ENABLE_LSRA)
 401                 }
 402 #endif
 403
 404                 /* for all instructions */
 405                 len = bptr->icount;
 406                 currentline = 0;
 407                 for (iptr = bptr->iinstr; len > 0; len--, iptr++) {
 408
 409                         /* add line number */
 410                         if (iptr->line != currentline) {
 411                                 dseg_addlinenumber(cd, iptr->line);
 412                                 currentline = iptr->line;
 413                         }
 414
 415                         MCODECHECK(64);   /* an instruction usually needs < 64 words      */
 416
 417                         /* the big switch */
 418                         switch (iptr->opc) {
 419                 case ICMD_NOP:        /* ... ==> ...                                  */
 420                         break;
 421
 422         /* constant operations ************************************************/
 423
 424                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 425
 426                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 427                         ICONST(d, iptr->sx.val.i);
 428                         emit_store_dst(jd, iptr, d);
 429                         break;
 430
 431                 case ICMD_ACONST:     /* ... ==> ..., constant                        */
 432
 433                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 434                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
 435                                 disp = dseg_add_unique_address(cd, NULL);
 436
 437                                 codegen_addpatchref(cd, PATCHER_aconst,
 438                                                     iptr->sx.val.c.ref,
 439                                                                         disp);
 440
 441                                 if (opt_showdisassemble)
 442                                         M_NOP;
 443
 444                                 M_DSEG_LOAD(d, disp);
 445                         }
 446                         else {
 447                                 ICONST(d, (u4) iptr->sx.val.anyptr);
 448                         }
 449                         emit_store_dst(jd, iptr, d);
 450                         break;
 451
 452                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 453
 454                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
 455                         LCONST(d, iptr->sx.val.l);
 456                         emit_store_dst(jd, iptr, d);
 457                         break;
 458
 459                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 460
 461 #if defined(ENABLE_SOFTFLOAT)
 462                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 463                         ICONST(d, iptr->sx.val.i);
 464                         emit_store_dst(jd, iptr, d);
 465 #else
 466                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
 467                         FCONST(d, iptr->sx.val.f);
 468                         emit_store_dst(jd, iptr, d);
 469 #endif
 470                         break;
 471
 472                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 473
 474 #if defined(ENABLE_SOFTFLOAT)
 475                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
 476                         LCONST(d, iptr->sx.val.l);
 477                         emit_store_dst(jd, iptr, d);
 478 #else
 479                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
 480                         DCONST(d, iptr->sx.val.d);
 481                         emit_store_dst(jd, iptr, d);
 482 #endif
 483                         break;
 484
 485
 486                 /* load/store/copy/move operations ************************************/
 487
 488                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 489                 case ICMD_ALOAD:      /* op1 = local variable                         */
 490                 case ICMD_FLOAD:
 491                 case ICMD_LLOAD:
 492                 case ICMD_DLOAD:
 493                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 494                 case ICMD_FSTORE:
 495                 case ICMD_LSTORE:
 496                 case ICMD_DSTORE:
 497                 case ICMD_COPY:
 498                 case ICMD_MOVE:
 499
 500                         emit_copy(jd, iptr, VAROP(iptr->s1), VAROP(iptr->dst));
 501                         break;
 502
 503                 case ICMD_ASTORE:
 504                         if (!(iptr->flags.bits & INS_FLAG_RETADDR))
 505                                 emit_copy(jd, iptr, VAROP(iptr->s1), VAROP(iptr->dst));
 506                         break;
 507
 508                 /* pop operations *****************************************************/
 509
 510                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 511
 512                 case ICMD_POP:        /* ..., value  ==> ...                          */
 513                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 514
 515                         break;
 516
 517
 518                 /* integer operations *************************************************/
 519
 520                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 521
 522                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 523                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 524                         M_MOV(d, REG_LSL(s1, 24));
 525                         M_MOV(d, REG_ASR(d, 24));
 526                         emit_store_dst(jd, iptr, d);
 527                         break;
 528
 529                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 530
 531                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 532                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 533                         M_MOV(d, REG_LSL(s1, 16));
 534                         M_MOV(d, REG_LSR(d, 16)); /* ATTENTION: char is unsigned */
 535                         emit_store_dst(jd, iptr, d);
 536                         break;
 537
 538                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 539
 540                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 541                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 542                         M_MOV(d, REG_LSL(s1, 16));
 543                         M_MOV(d, REG_ASR(d, 16));
 544                         emit_store_dst(jd, iptr, d);
 545                         break;
 546
 547                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 548
 549                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 550                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
 551                         M_INTMOVE(s1, GET_LOW_REG(d));
 552                         M_MOV(GET_HIGH_REG(d), REG_ASR(s1, 31));
 553                         emit_store_dst(jd, iptr, d);
 554                         break;
 555
 556                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 557
 558                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
 559                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 560                         M_INTMOVE(s1, d);
 561                         emit_store_dst(jd, iptr, d);
 562                         break;
 563
 564                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 565
 566                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 567                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 568                         M_RSB_IMM(d, s1, 0);
 569                         emit_store_dst(jd, iptr, d);
 570                         break;
 571
 572                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 573
 574                         s1 = emit_load_s1(jd, iptr, REG_ITMP12_PACKED);
 575                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
 576                         M_RSB_IMMS(GET_LOW_REG(d), GET_LOW_REG(s1), 0);
 577                         M_RSC_IMM(GET_HIGH_REG(d), GET_HIGH_REG(s1), 0);
 578                         emit_store_dst(jd, iptr, d);
 579                         break;
 580
 581                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 582
 583                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 584                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 585                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 586                         M_ADD(d, s1, s2);
 587                         emit_store_dst(jd, iptr, d);
 588                         break;
 589
 590                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 591
 592                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
 593                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
 594                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
 595                         M_ADD_S(GET_LOW_REG(d), s1, s2);
 596                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
 597                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
 598                         M_ADC(GET_HIGH_REG(d), s1, s2);
 599                         emit_store_dst(jd, iptr, d);
 600                         break;
 601
 602                 case ICMD_IADDCONST:
 603                 case ICMD_IINC:
 604
 605                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 606                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 607
 608                         if (IS_IMM(iptr->sx.val.i)) {
 609                                 M_ADD_IMM(d, s1, iptr->sx.val.i);
 610                         } else if (IS_IMM(-iptr->sx.val.i)) {
 611                                 M_SUB_IMM(d, s1, (-iptr->sx.val.i));
 612                         } else {
 613                                 ICONST(REG_ITMP3, iptr->sx.val.i);
 614                                 M_ADD(d, s1, REG_ITMP3);
 615                         }
 616
 617                         emit_store_dst(jd, iptr, d);
 618                         break;
 619
 620                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 621                                       /* sx.val.l = constant                          */
 622
 623                         s3 = iptr->sx.val.l & 0xffffffff;
 624                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
 625                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
 626                         if (IS_IMM(s3))
 627                                 M_ADD_IMMS(GET_LOW_REG(d), s1, s3);
 628                         else {
 629                                 ICONST(REG_ITMP3, s3);
 630                                 M_ADD_S(GET_LOW_REG(d), s1, REG_ITMP3);
 631                         }
 632                         s3 = iptr->sx.val.l >> 32;
 633                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP2);
 634                         if (IS_IMM(s3))
 635                                 M_ADC_IMM(GET_HIGH_REG(d), s1, s3);
 636                         else {
 637                                 ICONST(REG_ITMP3, s3);
 638                                 M_ADC(GET_HIGH_REG(d), s1, REG_ITMP3);
 639                         }
 640                         emit_store_dst(jd, iptr, d);
 641                         break;
 642
 643                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 644
 645                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 646                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 647                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 648                         M_SUB(d, s1, s2);
 649                         emit_store_dst(jd, iptr, d);
 650                         break;
 651
 652                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 653
 654                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
 655                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
 656                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
 657                         M_SUB_S(GET_LOW_REG(d), s1, s2);
 658                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
 659                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
 660                         M_SBC(GET_HIGH_REG(d), s1, s2);
 661                         emit_store_dst(jd, iptr, d);
 662                         break;
 663
 664                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 665                                       /* sx.val.i = constant                          */
 666
 667                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 668                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 669                         if (IS_IMM(iptr->sx.val.i))
 670                                 M_SUB_IMM(d, s1, iptr->sx.val.i);
 671                         else {
 672                                 ICONST(REG_ITMP3, iptr->sx.val.i);
 673                                 M_SUB(d, s1, REG_ITMP3);
 674                         }
 675                         emit_store_dst(jd, iptr, d);
 676                         break;
 677
 678                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 679                                       /* sx.val.l = constant                          */
 680
 681                         s3 = iptr->sx.val.l & 0xffffffff;
 682                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
 683                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
 684                         if (IS_IMM(s3))
 685                                 M_SUB_IMMS(GET_LOW_REG(d), s1, s3);
 686                         else {
 687                                 ICONST(REG_ITMP3, s3);
 688                                 M_SUB_S(GET_LOW_REG(d), s1, REG_ITMP3);
 689                         }
 690                         s3 = iptr->sx.val.l >> 32;
 691                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP2);
 692                         if (IS_IMM(s3))
 693                                 M_SBC_IMM(GET_HIGH_REG(d), s1, s3);
 694                         else {
 695                                 ICONST(REG_ITMP3, s3);
 696                                 M_SBC(GET_HIGH_REG(d), s1, REG_ITMP3);
 697                         }
 698                         emit_store_dst(jd, iptr, d);
 699                         break;
 700
 701                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 702
 703                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 704                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 705                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 706                         M_MUL(d, s1, s2);
 707                         emit_store_dst(jd, iptr, d);
 708                         break;
 709
 710                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 711                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 712
 713                         s1 = emit_load_s1(jd, iptr, REG_A0);
 714                         s2 = emit_load_s2(jd, iptr, REG_A1);
 715                         gen_div_check(VAROP(iptr->sx.s23.s2)->type, s2);
 716
 717                         /* move arguments into argument registers */
 718                         M_INTMOVE(s1, REG_A0);
 719                         M_INTMOVE(s2, REG_A1);
 720
 721                         /* call builtin function */
 722                         bte = iptr->sx.s23.s3.bte;
 723                         disp = dseg_add_functionptr(cd, bte->fp);
 724                         M_DSEG_BRANCH(disp);
 725
 726                         /* recompute pv */
 727                         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
 728                         M_RECOMPUTE_PV(s1);
 729
 730                         /* move result into destination register */
 731                         d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
 732                         M_INTMOVE(REG_RESULT, d);
 733                         emit_store_dst(jd, iptr, d);
 734                         break;
 735
 736                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 737                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 738
 739                         /* move arguments into argument registers */
 740
 741                         s1 = emit_load_s1(jd, iptr, REG_A0_A1_PACKED);
 742                         M_LNGMOVE(s1, REG_A0_A1_PACKED);
 743
 744                         s2 = emit_load_s2(jd, iptr, REG_A2_A3_PACKED);
 745                         M_LNGMOVE(s2, REG_A2_A3_PACKED);
 746
 747                         gen_div_check(VAROP(iptr->sx.s23.s2)->type, s2);
 748
 749                         /* call builtin function */
 750                         bte = iptr->sx.s23.s3.bte;
 751                         disp = dseg_add_functionptr(cd, bte->fp);
 752                         M_DSEG_BRANCH(disp);
 753
 754                         /* recompute pv */
 755                         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
 756                         M_RECOMPUTE_PV(s1);
 757
 758                         /* move result into destination register */
 759                         d = codegen_reg_of_dst(jd, iptr, REG_RESULT_PACKED);
 760                         M_LNGMOVE(REG_RESULT_PACKED, d);
 761                         emit_store_dst(jd, iptr, d);
 762                         break;
 763
 764                 case ICMD_IMULPOW2:   /* ..., value  ==> ..., value * (2 ^ constant)  */
 765                                       /* sx.val.i = constant                          */
 766
 767                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 768                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 769                         M_MOV(d, REG_LSL(s1, iptr->sx.val.i));
 770                         emit_store_dst(jd, iptr, d);
 771                         break;
 772
 773                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value / (2 ^ constant)  */
 774                                       /* sx.val.i = constant                          */
 775
 776                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 777                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 778                         /* this rounds towards 0 as java likes it */
 779                         M_MOV(REG_ITMP3, REG_ASR(s1, 31));
 780                         M_ADD(REG_ITMP3, s1, REG_LSR(REG_ITMP3, 32 - iptr->sx.val.i));
 781                         M_MOV(d, REG_ASR(REG_ITMP3, iptr->sx.val.i));
 782                         /* this rounds towards nearest, not java style */
 783                         /*M_MOV_S(d, REG_ASR(s1, iptr->sx.val.i));
 784                         M_ADCMI_IMM(d, d, 0);*/
 785                         emit_store_dst(jd, iptr, d);
 786                         break;
 787
 788                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
 789                                       /* sx.val.i = constant [ (2 ^ x) - 1 ]          */
 790
 791                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 792                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 793                         M_MOV_S(REG_ITMP1, s1);
 794                         M_RSBMI_IMM(REG_ITMP1, REG_ITMP1, 0);
 795                         if (IS_IMM(iptr->sx.val.i))
 796                                 M_AND_IMM(REG_ITMP1, iptr->sx.val.i, d);
 797                         else {
 798                                 ICONST(REG_ITMP3, iptr->sx.val.i);
 799                                 M_AND(REG_ITMP1, REG_ITMP3, d);
 800                         }
 801                         M_RSBMI_IMM(d, d, 0);
 802                         emit_store_dst(jd, iptr, d);
 803                         break;
 804
 805                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 806
 807                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 808                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 809                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 810                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
 811                         M_MOV(d, REG_LSL_REG(s1, REG_ITMP2));
 812                         emit_store_dst(jd, iptr, d);
 813                         break;
 814
 815                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
 816
 817                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 818                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 819                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 820                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
 821                         M_MOV(d, REG_ASR_REG(s1, REG_ITMP2));
 822                         emit_store_dst(jd, iptr, d);
 823                         break;
 824
 825                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
 826
 827                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 828                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 829                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 830                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
 831                         M_MOV(d, REG_LSR_REG(s1, REG_ITMP2));
 832                         emit_store_dst(jd, iptr, d);
 833                         break;
 834
 835                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
 836                                       /* sx.val.i = constant                          */
 837
 838                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 839                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 840                         M_MOV(d, REG_LSL(s1, iptr->sx.val.i & 0x1f));
 841                         emit_store_dst(jd, iptr, d);
 842                         break;
 843
 844                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
 845                                       /* sx.val.i = constant                          */
 846
 847                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 848                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 849                         /* we need to check for zero here because arm interprets it as SHR by 32 */
 850                         if ((iptr->sx.val.i & 0x1f) == 0) {
 851                                 M_INTMOVE(s1, d);
 852                         } else {
 853                                 M_MOV(d, REG_ASR(s1, iptr->sx.val.i & 0x1f));
 854                         }
 855                         emit_store_dst(jd, iptr, d);
 856                         break;
 857
 858                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
 859                                       /* sx.val.i = constant                          */
 860
 861                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 862                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 863                         /* we need to check for zero here because arm interprets it as SHR by 32 */
 864                         if ((iptr->sx.val.i & 0x1f) == 0)
 865                                 M_INTMOVE(s1, d);
 866                         else
 867                                 M_MOV(d, REG_LSR(s1, iptr->sx.val.i & 0x1f));
 868                         emit_store_dst(jd, iptr, d);
 869                         break;
 870
 871                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
 872
 873                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 874                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 875                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 876                         M_AND(s1, s2, d);
 877                         emit_store_dst(jd, iptr, d);
 878                         break;
 879
 880                 case ICMD_LAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
 881
 882                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
 883                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
 884                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
 885                         M_AND(s1, s2, GET_LOW_REG(d));
 886                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
 887                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
 888                         M_AND(s1, s2, GET_HIGH_REG(d));
 889                         emit_store_dst(jd, iptr, d);
 890                         break;
 891
 892                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
 893
 894                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 895                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 896                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 897                         M_ORR(s1, s2, d);
 898                         emit_store_dst(jd, iptr, d);
 899                         break;
 900
 901                 case ICMD_LOR:       /* ..., val1, val2  ==> ..., val1 | val2        */
 902
 903                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
 904                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
 905                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
 906                         M_ORR(s1, s2, GET_LOW_REG(d));
 907                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
 908                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
 909                         M_ORR(s1, s2, GET_HIGH_REG(d));
 910                         emit_store_dst(jd, iptr, d);
 911                         break;
 912
 913                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
 914
 915                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 916                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 917                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 918                         M_EOR(s1, s2, d);
 919                         emit_store_dst(jd, iptr, d);
 920                         break;
 921
 922                 case ICMD_LXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
 923
 924                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
 925                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
 926                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
 927                         M_EOR(s1, s2, GET_LOW_REG(d));
 928                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
 929                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
 930                         M_EOR(s1, s2, GET_HIGH_REG(d));
 931                         emit_store_dst(jd, iptr, d);
 932                         break;
 933
 934
 935         /* floating operations ************************************************/
 936
 937 #if !defined(ENABLE_SOFTFLOAT)
 938
 939                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
 940
 941                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
 942                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
 943                         M_MNFS(d, s1);
 944                         emit_store_dst(jd, iptr, d);
 945                         break;
 946
 947                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 948
 949                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
 950                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
 951                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
 952                         M_ADFS(d, s1, s2);
 953                         emit_store_dst(jd, iptr, d);
 954                         break;
 955
 956                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 957
 958                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
 959                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
 960                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
 961                         M_SUFS(d, s1, s2);
 962                         emit_store_dst(jd, iptr, d);
 963                         break;
 964
 965                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 966
 967                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
 968                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
 969                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
 970                         M_MUFS(d, s1, s2);
 971                         emit_store_dst(jd, iptr, d);
 972                         break;
 973
 974                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 975                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
 976                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
 977                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
 978                         M_DVFS(d, s1, s2);
 979                         emit_store_dst(jd, iptr, d);
 980                         break;
 981
 982                 /* ATTENTION: Jave does not want IEEE behaviour in FREM, do
 983                    not use this */
 984
 985                 case ICMD_FREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 986
 987                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
 988                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
 989                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
 990                         M_RMFS(d, s1, s2);
 991                         emit_store_dst(jd, iptr, d);
 992                         break;
 993
 994                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
 995
 996                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
 997                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
 998                         M_MNFD(d, s1);
 999                         emit_store_dst(jd, iptr, d);
1000                         break;
1001
1002                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1003
1004                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1005                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1006                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1007                         M_ADFD(d, s1, s2);
1008                         emit_store_dst(jd, iptr, d);
1009                         break;
1010
1011                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1012
1013                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1014                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1015                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1016                         M_SUFD(d, s1, s2);
1017                         emit_store_dst(jd, iptr, d);
1018                         break;
1019
1020                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1021
1022                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1023                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1024                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1025                         M_MUFD(d, s1, s2);
1026                         emit_store_dst(jd, iptr, d);
1027                         break;
1028
1029                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1030
1031                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1032                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1033                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1034                         M_DVFD(d, s1, s2);
1035                         emit_store_dst(jd, iptr, d);
1036                         break;
1037
1038                 /* ATTENTION: Jave does not want IEEE behaviour in DREM, do
1039                    not use this */
1040
1041                 case ICMD_DREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1042
1043                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1044                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1045                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1046                         M_RMFD(d, s1, s2);
1047                         emit_store_dst(jd, iptr, d);
1048                         break;
1049
1050                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1051
1052                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1053                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1054                         M_FLTS(d, s1);
1055                         emit_store_dst(jd, iptr, d);
1056                         break;
1057
1058                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1059
1060                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1061                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1062                         M_FLTD(d, s1);
1063                         emit_store_dst(jd, iptr, d);
1064                         break;
1065
1066                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1067
1068                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1069                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1070                         /* this uses round towards zero, as Java likes it */
1071                         M_FIX(d, s1);
1072                         /* this checks for NaN; to return zero as Java likes it */
1073                         M_CMF(s1, 0x8);
1074                         M_MOVVS_IMM(0, d);
1075                         emit_store_dst(jd, iptr, d);
1076                         break;
1077
1078                 case ICMD_D2I:       /* ..., value  ==> ..., (int) value              */
1079
1080                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1081                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1082                         /* this uses round towards zero, as Java likes it */
1083                         M_FIX(d, s1);
1084                         /* this checks for NaN; to return zero as Java likes it */
1085                         M_CMF(s1, 0x8);
1086                         M_MOVVS_IMM(0, d);
1087                         emit_store_dst(jd, iptr, d);
1088                         break;
1089
1090                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1091
1092                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1093                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1094                         M_MVFS(d,s1);
1095                         emit_store_dst(jd, iptr, d);
1096                         break;
1097
1098                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1099
1100                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1101                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1102                         M_MVFD(d,s1);
1103                         emit_store_dst(jd, iptr, d);
1104                         break;
1105
1106                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1107
1108                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1109                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1110                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1111                         M_CMF(s2, s1);
1112                         M_MOV_IMM(d, 0);
1113                         M_SUBGT_IMM(d, d, 1);
1114                         M_ADDLT_IMM(d, d, 1);
1115                         emit_store_dst(jd, iptr, d);
1116                         break;
1117
1118                 case ICMD_DCMPG:      /* ..., val1, val2  ==> ..., val1 dcmpg val2    */
1119
1120                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1121                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1122                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1123                         M_CMF(s2, s1);
1124                         M_MOV_IMM(d, 0);
1125                         M_SUBGT_IMM(d, d, 1);
1126                         M_ADDLT_IMM(d, d, 1);
1127                         emit_store_dst(jd, iptr, d);
1128                         break;
1129
1130                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1131
1132                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1133                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1134                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1135                         M_CMF(s1, s2);
1136                         M_MOV_IMM(d, 0);
1137                         M_SUBLT_IMM(d, d, 1);
1138                         M_ADDGT_IMM(d, d, 1);
1139                         emit_store_dst(jd, iptr, d);
1140                         break;
1141
1142                 case ICMD_DCMPL:      /* ..., val1, val2  ==> ..., val1 dcmpl val2    */
1143
1144                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1145                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1146                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1147                         M_CMF(s1, s2);
1148                         M_MOV_IMM(d, 0);
1149                         M_SUBLT_IMM(d, d, 1);
1150                         M_ADDGT_IMM(d, d, 1);
1151                         emit_store_dst(jd, iptr, d);
1152                         break;
1153
1154 #endif /* !defined(ENABLE_SOFTFLOAT) */
1155
1156
1157                 /* memory operations **************************************************/
1158
1159                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1160
1161                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1162                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1163                         gen_nullptr_check(s1);
1164                         M_ILD_INTERN(d, s1, OFFSET(java_arrayheader, size));
1165                         emit_store_dst(jd, iptr, d);
1166                         break;
1167
1168                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1169
1170                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1171                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1172                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1173                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1174                                 gen_nullptr_check(s1);
1175                                 gen_bound_check(s1, s2);
1176                         }
1177                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1178                         M_LDR_INTERN(d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1179                         emit_store_dst(jd, iptr, d);
1180                         break;
1181
1182                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1183
1184                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1185                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1186                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1187                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1188                                 gen_nullptr_check(s1);
1189                                 gen_bound_check(s1, s2);
1190                         }
1191                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1192                         M_ILD_INTERN(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1193                         emit_store_dst(jd, iptr, d);
1194                         break;
1195
1196                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1197
1198                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1199                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1200                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1201                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1202                                 gen_nullptr_check(s1);
1203                                 gen_bound_check(s1, s2);
1204                         }
1205                         M_ADD(REG_ITMP1, s1, s2); /* REG_ITMP1 = s1 + 1 * s2 */
1206                         M_LDRSB(d, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1207                         emit_store_dst(jd, iptr, d);
1208                         break;
1209
1210                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1211
1212                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1213                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1214                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1215                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1216                                 gen_nullptr_check(s1);
1217                                 gen_bound_check(s1, s2);
1218                         }
1219                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1220                         M_LDRH(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1221                         emit_store_dst(jd, iptr, d);
1222                         break;
1223
1224                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1225
1226                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1227                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1228                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1229                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1230                                 gen_nullptr_check(s1);
1231                                 gen_bound_check(s1, s2);
1232                         }
1233                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1234                         M_LDRSH(d, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1235                         emit_store_dst(jd, iptr, d);
1236                         break;
1237
1238                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1239
1240                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1241                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1242                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1243                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1244                                 gen_nullptr_check(s1);
1245                                 gen_bound_check(s1, s2);
1246                         }
1247                         M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1248                         M_LLD_INTERN(d, REG_ITMP3, OFFSET(java_longarray, data[0]));
1249                         emit_store_dst(jd, iptr, d);
1250                         break;
1251
1252                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1253
1254                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1255                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1256                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1257                                 gen_nullptr_check(s1);
1258                                 gen_bound_check(s1, s2);
1259                         }
1260                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1261 #if !defined(ENABLE_SOFTFLOAT)
1262                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1263                         M_FLD_INTERN(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1264 #else
1265                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1266                         M_ILD_INTERN(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1267 #endif
1268                         emit_store_dst(jd, iptr, d);
1269                         break;
1270
1271                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1272
1273                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1274                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1275                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1276                                 gen_nullptr_check(s1);
1277                                 gen_bound_check(s1, s2);
1278                         }
1279                         M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1280 #if !defined(ENABLE_SOFTFLOAT)
1281                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1282                         M_DLD_INTERN(d, REG_ITMP3, OFFSET(java_doublearray, data[0]));
1283 #else
1284                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1285                         M_LLD_INTERN(d, REG_ITMP3, OFFSET(java_doublearray, data[0]));
1286 #endif
1287                         emit_store_dst(jd, iptr, d);
1288                         break;
1289
1290                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1291
1292                         s1 = emit_load_s1(jd, iptr, REG_A0);
1293                         s2 = emit_load_s2(jd, iptr, REG_ITMP1);
1294                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1295                                 gen_nullptr_check(s1);
1296                                 gen_bound_check(s1, s2);
1297                         }
1298                         s3 = emit_load_s3(jd, iptr, REG_A1);
1299
1300                         /* move arguments to argument registers */
1301                         M_INTMOVE(s1, REG_A0);
1302                         M_INTMOVE(s3, REG_A1);
1303
1304                         /* call builtin function */
1305                         disp = dseg_add_functionptr(cd, BUILTIN_canstore);
1306                         M_DSEG_BRANCH(disp);
1307
1308                         /* recompute pv */
1309                         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
1310                         M_RECOMPUTE_PV(s1);
1311
1312                         /* check resturn value of builtin */
1313                         M_TST(REG_RESULT, REG_RESULT);
1314                         M_BEQ(0);
1315                         codegen_add_arraystoreexception_ref(cd);
1316
1317                         /* finally store address into array */
1318                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1319                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1320                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1321                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1322                         M_STR_INTERN(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1323                         break;
1324
1325                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1326
1327                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1328                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1329                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1330                                 gen_nullptr_check(s1);
1331                                 gen_bound_check(s1, s2);
1332                         }
1333                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1334                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1335                         M_IST_INTERN(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1336                         break;
1337
1338                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1339
1340                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1341                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1342                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1343                                 gen_nullptr_check(s1);
1344                                 gen_bound_check(s1, s2);
1345                         }
1346                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1347                         M_ADD(REG_ITMP1, s1, s2); /* REG_ITMP1 = s1 + 1 * s2 */
1348                         M_STRB(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1349                         break;
1350
1351                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1352
1353                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1354                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1355                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1356                                 gen_nullptr_check(s1);
1357                                 gen_bound_check(s1, s2);
1358                         }
1359                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1360                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1361                         M_STRH(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1362                         break;
1363
1364                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1365
1366                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1367                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1368                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1369                                 gen_nullptr_check(s1);
1370                                 gen_bound_check(s1, s2);
1371                         }
1372                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1373                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1374                         M_STRH(s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1375                         break;
1376
1377                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1378
1379                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1380                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1381                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1382                                 gen_nullptr_check(s1);
1383                                 gen_bound_check(s1, s2);
1384                         }
1385                         M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1386                         s3 = emit_load_s3(jd, iptr, REG_ITMP12_PACKED);
1387                         M_LST_INTERN(s3, REG_ITMP3, OFFSET(java_longarray, data[0]));
1388                         break;
1389
1390                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1391
1392                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1393                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1394                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1395                                 gen_nullptr_check(s1);
1396                                 gen_bound_check(s1, s2);
1397                         }
1398                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1399 #if !defined(ENABLE_SOFTFLOAT)
1400                         s3 = emit_load_s3(jd, iptr, REG_FTMP1);
1401                         M_FST_INTERN(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1402 #else
1403                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1404                         M_IST_INTERN(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1405 #endif
1406                         break;
1407
1408                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1409
1410                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1411                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1412                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1413                                 gen_nullptr_check(s1);
1414                                 gen_bound_check(s1, s2);
1415                         }
1416                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 3)); /* REG_ITMP1 = s1 + 8 * s2 */
1417 #if !defined(ENABLE_SOFTFLOAT)
1418                         s3 = emit_load_s3(jd, iptr, REG_FTMP1);
1419                         M_DST_INTERN(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1420 #else
1421                         s3 = emit_load_s3(jd, iptr, REG_ITMP23_PACKED);
1422                         M_LST_INTERN(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1423 #endif
1424                         break;
1425
1426                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
1427
1428                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1429                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1430
1431                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1432
1433                                 disp = dseg_add_unique_address(cd, NULL);
1434
1435                                 codegen_addpatchref(cd, PATCHER_get_putstatic, uf, disp);
1436
1437                                 if (opt_showdisassemble)
1438                                         M_NOP;
1439                         }
1440                         else {
1441                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1442
1443                                 fieldtype = fi->type;
1444
1445                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1446                                         codegen_addpatchref(cd, PATCHER_clinit, fi->class, 0);
1447
1448                                         if (opt_showdisassemble)
1449                                                 M_NOP;
1450                                 }
1451
1452                                 disp = dseg_add_address(cd, &(fi->value));
1453                         }
1454
1455                         M_DSEG_LOAD(REG_ITMP3, disp);
1456                         switch (fieldtype) {
1457                         case TYPE_INT:
1458 #if defined(ENABLE_SOFTFLOAT)
1459                         case TYPE_FLT:
1460 #endif
1461                         case TYPE_ADR:
1462                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1463                                 M_ILD_INTERN(d, REG_ITMP3, 0);
1464                                 break;
1465                         case TYPE_LNG:
1466 #if defined(ENABLE_SOFTFLOAT)
1467                         case TYPE_DBL:
1468 #endif
1469                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1470                                 M_LLD_INTERN(d, REG_ITMP3, 0);
1471                                 break;
1472 #if !defined(ENABLE_SOFTFLOAT)
1473                         case TYPE_FLT:
1474                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1475                                 M_FLD_INTERN(d, REG_ITMP3, 0);
1476                                 break;
1477                         case TYPE_DBL:
1478                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1479                                 M_DLD_INTERN(d, REG_ITMP3, 0);
1480                                 break;
1481 #endif
1482                         default:
1483                                 assert(0);
1484                         }
1485                         emit_store_dst(jd, iptr, d);
1486                         break;
1487
1488                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
1489
1490                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1491                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1492
1493                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1494
1495                                 disp = dseg_add_unique_address(cd, NULL);
1496
1497                                 codegen_addpatchref(cd, PATCHER_get_putstatic, uf, disp);
1498
1499                                 if (opt_showdisassemble)
1500                                         M_NOP;
1501                         }
1502                         else {
1503                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1504
1505                                 fieldtype = fi->type;
1506
1507                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1508                                         codegen_addpatchref(cd, PATCHER_clinit, fi->class, 0);
1509
1510                                         if (opt_showdisassemble)
1511                                                 M_NOP;
1512                                 }
1513
1514                                 disp = dseg_add_address(cd, &(fi->value));
1515                         }
1516
1517                         M_DSEG_LOAD(REG_ITMP3, disp);
1518                         switch (fieldtype) {
1519                         case TYPE_INT:
1520 #if defined(ENABLE_SOFTFLOAT)
1521                         case TYPE_FLT:
1522 #endif
1523                         case TYPE_ADR:
1524                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1525                                 M_IST_INTERN(s1, REG_ITMP3, 0);
1526                                 break;
1527                         case TYPE_LNG:
1528 #if defined(ENABLE_SOFTFLOAT)
1529                         case TYPE_DBL:
1530 #endif
1531                                 s1 = emit_load_s1(jd, iptr, REG_ITMP12_PACKED);
1532                                 M_LST_INTERN(s1, REG_ITMP3, 0);
1533                                 break;
1534 #if !defined(ENABLE_SOFTFLOAT)
1535                         case TYPE_FLT:
1536                                 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1537                                 M_FST_INTERN(s1, REG_ITMP3, 0);
1538                                 break;
1539                         case TYPE_DBL:
1540                                 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1541                                 M_DST_INTERN(s1, REG_ITMP3, 0);
1542                                 break;
1543 #endif
1544                         default:
1545                                 assert(0);
1546                         }
1547                         break;
1548
1549                 case ICMD_GETFIELD:   /* ..., objectref, value  ==> ...               */
1550
1551                         s1 = emit_load_s1(jd, iptr, REG_ITMP3);
1552                         gen_nullptr_check(s1);
1553 #if !defined(ENABLE_SOFTFLOAT)
1554                         /* HACK: softnull checks on floats */
1555                         if (!checknull && IS_FLT_DBL_TYPE(fieldtype))
1556                                 gen_nullptr_check_intern(s1);
1557 #endif
1558
1559                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1560                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1561
1562                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1563
1564                                 codegen_addpatchref(cd, PATCHER_get_putfield,
1565                                                                         iptr->sx.s23.s3.uf, 0);
1566
1567                                 if (opt_showdisassemble)
1568                                         M_NOP;
1569
1570                                 disp = 0;
1571                         }
1572                         else {
1573                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1574
1575                                 fieldtype = fi->type;
1576                                 disp      = fi->offset;
1577                         }
1578
1579                         switch (fieldtype) {
1580                         case TYPE_INT:
1581 #if defined(ENABLE_SOFTFLOAT)
1582                         case TYPE_FLT:
1583 #endif
1584                         case TYPE_ADR:
1585                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1586                                 M_ILD(d, s1, disp);
1587                                 break;
1588                         case TYPE_LNG:
1589 #if defined(ENABLE_SOFTFLOAT)
1590                         case TYPE_DBL:
1591 #endif
1592                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1593                                 M_LLD(d, s1, disp);
1594                                 break;
1595 #if !defined(ENABLE_SOFTFLOAT)
1596                         case TYPE_FLT:
1597                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1598                                 M_FLD(d, s1, disp);
1599                                 break;
1600                         case TYPE_DBL:
1601                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1602                                 M_DLD(d, s1, disp);
1603                                 break;
1604 #endif
1605                         default:
1606                                 assert(0);
1607                         }
1608                         emit_store_dst(jd, iptr, d);
1609                         break;
1610
1611                 case ICMD_PUTFIELD:   /* ..., objectref, value  ==> ...               */
1612
1613                         s1 = emit_load_s1(jd, iptr, REG_ITMP3);
1614                         gen_nullptr_check(s1);
1615
1616 #if !defined(ENABLE_SOFTFLOAT)
1617                         /* HACK: softnull checks on floats */
1618                         if (!checknull && IS_FLT_DBL_TYPE(fieldtype))
1619                                 gen_nullptr_check_intern(s1);
1620 #endif
1621
1622                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1623                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1624
1625                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1626                         }
1627                         else {
1628                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1629
1630                                 fieldtype = fi->type;
1631                                 disp      = fi->offset;
1632                         }
1633
1634                         switch (fieldtype) {
1635                         case TYPE_INT:
1636 #if defined(ENABLE_SOFTFLOAT)
1637                         case TYPE_FLT:
1638 #endif
1639                         case TYPE_ADR:
1640                                 s2 = emit_load_s2(jd, iptr, REG_ITMP1);
1641                                 break;
1642 #if defined(ENABLE_SOFTFLOAT)
1643                         case TYPE_DBL: /* fall through */
1644 #endif
1645                         case TYPE_LNG:
1646                                 s2 = emit_load_s2(jd, iptr, REG_ITMP12_PACKED);
1647                                 break;
1648 #if !defined(ENABLE_SOFTFLOAT)
1649                         case TYPE_FLT:
1650                         case TYPE_DBL:
1651                                 s2 = emit_load_s2(jd, iptr, REG_FTMP1);
1652                                 break;
1653 #endif
1654                         default:
1655                                 assert(0);
1656                         }
1657
1658                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1659                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1660
1661                                 codegen_addpatchref(cd, PATCHER_get_putfield, uf, 0);
1662
1663                                 if (opt_showdisassemble)
1664                                         M_NOP;
1665
1666                                 disp = 0;
1667                         }
1668
1669                         switch (fieldtype) {
1670                         case TYPE_INT:
1671 #if defined(ENABLE_SOFTFLOAT)
1672                         case TYPE_FLT:
1673 #endif
1674                         case TYPE_ADR:
1675                                 M_IST(s2, s1, disp);
1676                                 break;
1677                         case TYPE_LNG:
1678 #if defined(ENABLE_SOFTFLOAT)
1679                         case TYPE_DBL:
1680 #endif
1681                                 M_LST(s2, s1, disp);
1682                                 break;
1683 #if !defined(ENABLE_SOFTFLOAT)
1684                         case TYPE_FLT:
1685                                 M_FST(s2, s1, disp);
1686                                 break;
1687                         case TYPE_DBL:
1688                                 M_DST(s2, s1, disp);
1689                                 break;
1690 #endif
1691                         default:
1692                                 assert(0);
1693                         }
1694                         break;
1695
1696
1697                 /* branch operations **************************************************/
1698
1699                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
1700
1701                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1702                         M_INTMOVE(s1, REG_ITMP1_XPTR);
1703                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1704                                 codegen_addpatchref(cd, PATCHER_athrow_areturn,
1705                                                                         iptr->sx.s23.s2.uc, 0);
1706
1707                                 if (opt_showdisassemble)
1708                                         M_NOP;
1709                         }
1710                         disp = dseg_add_functionptr(cd, asm_handle_exception);
1711                         M_DSEG_LOAD(REG_ITMP3, disp);
1712                         M_MOV(REG_ITMP2_XPC, REG_PC);
1713                         M_MOV(REG_PC, REG_ITMP3);
1714                         M_NOP;              /* nop ensures that XPC is less than the end  */
1715                                             /* of basic block                             */
1716                         break;
1717
1718                 case ICMD_GOTO:         /* ... ==> ...                                */
1719                 case ICMD_RET:
1720
1721                         M_B(0);
1722                         codegen_addreference(cd, iptr->dst.block);
1723                         break;
1724
1725                 case ICMD_JSR:          /* ... ==> ...                                */
1726
1727                         M_B(0);
1728                         codegen_addreference(cd, iptr->sx.s23.s3.jsrtarget.block);
1729                         break;
1730
1731                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
1732
1733                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1734                         M_TEQ_IMM(s1, 0);
1735                         M_BEQ(0);
1736                         codegen_addreference(cd, iptr->dst.block);
1737                         break;
1738
1739                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
1740
1741                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1742                         M_TEQ_IMM(s1, 0);
1743                         M_BNE(0);
1744                         codegen_addreference(cd, iptr->dst.block);
1745                         break;
1746
1747                 case ICMD_IFLT:         /* ..., value ==> ...                         */
1748                 case ICMD_IFLE:         /* op1 = target JavaVM pc, val.i = constant   */
1749                 case ICMD_IFGT:
1750                 case ICMD_IFGE:
1751                 case ICMD_IFEQ:
1752                 case ICMD_IFNE:
1753
1754                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1755                         M_COMPARE(s1, iptr->sx.val.i);
1756
1757                         switch(iptr->opc) {
1758                         case ICMD_IFLT:
1759                                 M_BLT(0);
1760                                 break;
1761                         case ICMD_IFLE:
1762                                 M_BLE(0);
1763                                 break;
1764                         case ICMD_IFGT:
1765                                 M_BGT(0);
1766                                 break;
1767                         case ICMD_IFGE:
1768                                 M_BGE(0);
1769                                 break;
1770                         case ICMD_IFEQ:
1771                                 M_BEQ(0);
1772                                 break;
1773                         case ICMD_IFNE:
1774                                 M_BNE(0);
1775                                 break;
1776                         default:
1777                                 assert(0);
1778                         }
1779                         codegen_addreference(cd, iptr->dst.block);
1780                         break;
1781
1782                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
1783
1784                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1785                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1786                         if (iptr->sx.val.l == 0) {
1787                                 M_ORR_S(s1, s2, REG_ITMP3);
1788                         }
1789                         else {
1790                                 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1791                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1792                                 M_CMP(s1, REG_ITMP3);*/
1793                                 ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1794                                 M_CMPEQ(s2, REG_ITMP3);
1795                         }
1796                         M_BEQ(0);
1797                         codegen_addreference(cd, iptr->dst.block);
1798                         break;
1799
1800                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
1801
1802                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1803                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1804                         if (iptr->sx.val.l == 0) {
1805                                 /* if high word is less than zero, the whole long is too */
1806                                 M_CMP_IMM(s1, 0);
1807                                 M_BLT(0);
1808                                 codegen_add_branch_ref(cd, iptr->dst.block);
1809                         }
1810                         else {
1811                                 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1812                                 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1813                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1814                                 M_CMP(s1, REG_ITMP3);*/
1815                                 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1816                                 M_MOVGT_IMM(2, REG_ITMP1);
1817                                 M_MOVEQ_IMM(1, REG_ITMP1);
1818
1819                                 /* low compare: x=x-1(ifLO) */
1820                                 M_COMPARE(s2, (iptr->sx.val.l & 0xffffffff));
1821                                 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1822                                 M_CMP(s2, REG_ITMP3);*/
1823                                 M_SUBLO_IMM(REG_ITMP1, REG_ITMP1, 1);
1824
1825                                 /* branch if (x LT 1) */
1826                                 M_CMP_IMM(REG_ITMP1, 1);
1827                                 M_BLT(0);
1828                                 codegen_add_branch_ref(cd, iptr->dst.block);
1829                         }
1830                         break;
1831
1832                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
1833
1834                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1835                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1836                         if (iptr->sx.val.l == 0) {
1837                                 /* if high word is less than zero, the whole long is too  */
1838                                 M_CMP_IMM(s1, 0);
1839                                 M_BLT(0);
1840                                 codegen_add_branch_ref(cd, iptr->dst.block);
1841
1842                                 /* ... otherwise the low word has to be zero (tricky!) */
1843                                 M_CMPEQ_IMM(s2, 0);
1844                                 M_BEQ(0);
1845                                 codegen_add_branch_ref(cd, iptr->dst.block);
1846                         }
1847                         else {
1848                                 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1849                                 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1850                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1851                                 M_CMP(s1, REG_ITMP3);*/
1852                                 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1853                                 M_MOVGT_IMM(2, REG_ITMP1);
1854                                 M_MOVEQ_IMM(1, REG_ITMP1);
1855
1856                                 /* low compare: x=x+1(ifHI) */
1857                                 M_COMPARE(s2, (iptr->sx.val.l & 0xffffffff));
1858                                 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1859                                 M_CMP(s2, REG_ITMP3);*/
1860                                 M_ADDHI_IMM(REG_ITMP1, REG_ITMP1, 1);
1861
1862                                 /* branch if (x LE 1) */
1863                                 M_CMP_IMM(REG_ITMP1, 1);
1864                                 M_BLE(0);
1865                                 codegen_add_branch_ref(cd, iptr->dst.block);
1866                         }
1867                         break;
1868
1869                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
1870
1871                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1872                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1873                         if (iptr->sx.val.l == 0) {
1874                                 /* if high word is greater or equal zero, the whole long is too */
1875                                 M_CMP_IMM(s1, 0);
1876                                 M_BGE(0);
1877                                 codegen_add_branch_ref(cd, iptr->dst.block);
1878                         }
1879                         else {
1880                                 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1881                                 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1882                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1883                                 M_CMP(s1, REG_ITMP3);*/
1884                                 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1885                                 M_MOVGT_IMM(2, REG_ITMP1);
1886                                 M_MOVEQ_IMM(1, REG_ITMP1);
1887
1888                                 /* low compare: x=x-1(ifLO) */
1889                                 M_COMPARE(s2, (iptr->sx.val.l & 0xffffffff));
1890                                 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1891                                 M_CMP(s2, REG_ITMP3);*/
1892                                 M_SUBLO_IMM(REG_ITMP1, REG_ITMP1, 1);
1893
1894                                 /* branch if (x GE 1) */
1895                                 M_CMP_IMM(REG_ITMP1, 1);
1896                                 M_BGE(0);
1897                                 codegen_add_branch_ref(cd, iptr->dst.block);
1898                         }
1899                         break;
1900
1901                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
1902
1903                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1904                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1905 #if 0
1906                         if (iptr->sx.val.l == 0) {
1907                                 /* if high word is greater than zero, the whole long is too */
1908                                 M_CMP_IMM(s1, 0);
1909                                 M_BGT(0);
1910                                 codegen_add_branch_ref(cd, iptr->dst.block);
1911
1912                                 /* ... or high was zero and low is non zero (tricky!) */
1913                                 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1914                                 M_MOVLT_IMM(1, REG_ITMP3);
1915                                 M_ORR_S(REG_ITMP3, s2, REG_ITMP3);
1916                                 M_BNE(0);
1917                                 codegen_add_branch_ref(cd, iptr->dst.block);
1918                         }
1919                         else {
1920 #endif
1921                                 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1922                                 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1923                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1924                                 M_CMP(s1, REG_ITMP3);*/
1925                                 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1926                                 M_MOVGT_IMM(2, REG_ITMP1);
1927                                 M_MOVEQ_IMM(1, REG_ITMP1);
1928
1929                                 /* low compare: x=x+1(ifHI) */
1930                                 M_COMPARE(s2, (iptr->sx.val.l & 0xffffffff));
1931                                 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1932                                 M_CMP(s2, REG_ITMP3);*/
1933                                 M_ADDHI_IMM(REG_ITMP1, REG_ITMP1, 1);
1934
1935                                 /* branch if (x GT 1) */
1936                                 M_CMP_IMM(REG_ITMP1, 1);
1937                                 M_BGT(0);
1938                                 codegen_add_branch_ref(cd, iptr->dst.block);
1939 #if 0
1940                         }
1941 #endif
1942                         break;
1943
1944                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
1945
1946                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1947                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1948                         if (iptr->sx.val.l == 0) {
1949                                 M_ORR_S(s1, s2, REG_ITMP3);
1950                         }
1951                         else {
1952                                 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1953                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1954                                 M_CMP(s1, REG_ITMP3);*/
1955                                 ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1956                                 M_CMPEQ(s2, REG_ITMP3);
1957                         }
1958                         M_BNE(0);
1959                         codegen_add_branch_ref(cd, iptr->dst.block);
1960                         break;
1961
1962                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
1963                 case ICMD_IF_ACMPEQ:    /* op1 = target JavaVM pc                     */
1964                 case ICMD_IF_ICMPNE:
1965                 case ICMD_IF_ACMPNE:
1966                 case ICMD_IF_ICMPLT:
1967                 case ICMD_IF_ICMPLE:
1968                 case ICMD_IF_ICMPGT:
1969                 case ICMD_IF_ICMPGE:
1970
1971                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1972                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1973                         M_CMP(s1, s2);
1974                         switch(iptr->opc) {
1975                         case ICMD_IF_ICMPLT:
1976                                 M_BLT(0);
1977                                 break;
1978                         case ICMD_IF_ICMPLE:
1979                                 M_BLE(0);
1980                                 break;
1981                         case ICMD_IF_ICMPGT:
1982                                 M_BGT(0);
1983                                 break;
1984                         case ICMD_IF_ICMPGE:
1985                                 M_BGE(0);
1986                                 break;
1987                         case ICMD_IF_ICMPEQ:
1988                         case ICMD_IF_ACMPEQ:
1989                                 M_BEQ(0);
1990                                 break;
1991                         case ICMD_IF_ICMPNE:
1992                         case ICMD_IF_ACMPNE:
1993                                 M_BNE(0);
1994                                 break;
1995                         default:
1996                                 assert(0);
1997                         }
1998                         codegen_addreference(cd, iptr->dst.block);
1999                         break;
2000
2001                 case ICMD_IF_LCMPEQ:    /* ..., value, value ==> ...                  */
2002                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2003                 case ICMD_IF_LCMPLT:
2004                 case ICMD_IF_LCMPLE:
2005                 case ICMD_IF_LCMPGT:
2006                 case ICMD_IF_LCMPGE:
2007
2008                         /* ATTENTION: compare high words signed and low words unsigned */
2009                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
2010                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
2011                         M_CMP(s1, s2);
2012
2013                         switch(iptr->opc) {
2014                         case ICMD_IF_LCMPEQ: /* EQ and NE are the same for unsigned */
2015                         case ICMD_IF_LCMPNE:
2016                                 break;
2017                         case ICMD_IF_LCMPLT:
2018                         case ICMD_IF_LCMPLE:
2019                                 M_BLT(0);
2020                                 codegen_addreference(cd, iptr->dst.block);
2021                                 break;
2022                         case ICMD_IF_LCMPGT:
2023                         case ICMD_IF_LCMPGE:
2024                                 M_BGT(0);
2025                                 codegen_addreference(cd, iptr->dst.block);
2026                                 break;
2027                         default:
2028                                 assert(0);
2029                         }
2030
2031                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
2032                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
2033
2034                         switch(iptr->opc) {
2035                         case ICMD_IF_LCMPEQ:
2036                                 M_DAT(COND_EQ,0x0a,0,s1,1,0,s2);
2037                                 M_BEQ(0);
2038                                 break;
2039                         case ICMD_IF_LCMPNE:
2040                                 M_DAT(COND_EQ,0x0a,0,s1,1,0,s2);
2041                                 M_BNE(0);
2042                                 break;
2043                         case ICMD_IF_LCMPLT:
2044                                 M_BNE(1);
2045                                 M_CMP(s1, s2);
2046                                 M_BLO(0);
2047                                 break;
2048                         case ICMD_IF_LCMPLE:
2049                                 M_BNE(1);
2050                                 M_CMP(s1, s2);
2051                                 M_BLS(0);
2052                                 break;
2053                         case ICMD_IF_LCMPGT:
2054                                 M_BNE(1);
2055                                 M_CMP(s1, s2);
2056                                 M_BHI(0);
2057                                 break;
2058                         case ICMD_IF_LCMPGE:
2059                                 M_BNE(1);
2060                                 M_CMP(s1, s2);
2061                                 M_BHS(0);
2062                                 break;
2063                         default:
2064                                 assert(0);
2065                         }
2066                         codegen_addreference(cd, iptr->dst.block);
2067                         break;
2068
2069                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2070                         {
2071                         s4 i, l;
2072                         branch_target_t *table;
2073
2074                         table = iptr->dst.table;
2075
2076                         l = iptr->sx.s23.s2.tablelow;
2077                         i = iptr->sx.s23.s3.tablehigh;
2078
2079                         /* calculate new index (index - low) */
2080                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2081                         if (l  == 0) {
2082                                 M_INTMOVE(s1, REG_ITMP1);
2083                         } else if (IS_IMM(l)) {
2084                                 M_SUB_IMM(REG_ITMP1, s1, l);
2085                         } else {
2086                                 ICONST(REG_ITMP2, l);
2087                                 M_SUB(REG_ITMP1, s1, REG_ITMP2);
2088                         }
2089
2090                         /* range check (index <= high-low) */
2091                         i = i - l + 1;
2092                         M_COMPARE(REG_ITMP1, i-1);
2093                         M_BHI(0); /* unsigned greater than */
2094                         codegen_addreference(cd, table[0].block);
2095
2096                         /* build jump table top down and use address of lowest entry */
2097
2098                         table += i;
2099
2100                         while (--i >= 0) {
2101                                 dseg_add_target(cd, table->block);
2102                                 --table;
2103                         }
2104                         }
2105
2106                         /* length of dataseg after last dseg_add_target is used by load */
2107                         /* TODO: this loads from data-segment */
2108                         M_ADD(REG_ITMP2, REG_PV, REG_LSL(REG_ITMP1, 2));
2109                         M_LDR(REG_PC, REG_ITMP2, -(cd->dseglen));
2110                         break;
2111
2112                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2113                         {
2114                         s4 i;
2115                         lookup_target_t *lookup;
2116
2117                         lookup = iptr->dst.lookup;
2118
2119                         i = iptr->sx.s23.s2.lookupcount;
2120
2121                         /* compare keys */
2122                         MCODECHECK((i<<2)+8);
2123                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2124
2125                         while (--i >= 0) {
2126                                 M_COMPARE(s1, lookup->value);
2127                                 M_BEQ(0);
2128                                 codegen_addreference(cd, lookup->target.block);
2129                                 lookup++;
2130                         }
2131
2132                         /* default branch */
2133                         M_B(0);
2134                         codegen_addreference(cd, iptr->sx.s23.s3.lookupdefault.block);
2135                         }
2136                         break;
2137
2138                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2139
2140 #if !defined(ENABLE_SOFTFLOAT)
2141                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
2142                         M_CAST_FLT_TO_INT_TYPED(VAROP(iptr->s1)->type, s1, REG_RESULT);
2143                         goto ICMD_RETURN_do;
2144 #endif
2145
2146                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2147
2148                         s1 = emit_load_s1(jd, iptr, REG_RESULT);
2149                         M_INTMOVE(s1, REG_RESULT);
2150                         goto ICMD_RETURN_do;
2151
2152                 case ICMD_DRETURN:      /* ..., retvalue ==> ...                      */
2153
2154 #if !defined(ENABLE_SOFTFLOAT)
2155                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
2156                         M_CAST_FLT_TO_INT_TYPED(VAROP(iptr->s1)->type, s1, REG_RESULT_PACKED);
2157                         goto ICMD_RETURN_do;
2158 #endif
2159
2160                 case ICMD_LRETURN:      /* ..., retvalue ==> ...                      */
2161
2162                         s1 = emit_load_s1(jd, iptr, REG_RESULT_PACKED);
2163                         M_LNGMOVE(s1, REG_RESULT_PACKED);
2164                         goto ICMD_RETURN_do;
2165
2166                 case ICMD_ARETURN:      /* ..., retvalue ==> ...                      */
2167
2168                         s1 = emit_load_s1(jd, iptr, REG_RESULT);
2169                         M_INTMOVE(s1, REG_RESULT);
2170                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2171                                 codegen_addpatchref(cd, PATCHER_athrow_areturn,
2172                                                                         iptr->sx.s23.s2.uc, 0);
2173
2174                                 if (opt_showdisassemble)
2175                                         M_NOP;
2176                         }
2177                         goto ICMD_RETURN_do;
2178
2179                 case ICMD_RETURN:       /* ...  ==> ...                               */
2180                         ICMD_RETURN_do:
2181
2182 #if !defined(NDEBUG)
2183                         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
2184                                 emit_verbosecall_exit(jd);
2185 #endif
2186
2187 #if defined(ENABLE_THREADS)
2188                         /* call monitorexit function */
2189
2190                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2191                                 /* stack offset for monitor argument */
2192
2193                                 s1 = rd->memuse;
2194
2195                                 /* we need to save the proper return value */
2196
2197                                 switch (iptr->opc) {
2198                                 case ICMD_IRETURN:
2199                                 case ICMD_ARETURN:
2200                                 case ICMD_LRETURN:
2201                                 case ICMD_FRETURN: /* XXX TWISTI: is that correct? */
2202                                 case ICMD_DRETURN:
2203                                         M_STMFD(BITMASK_RESULT, REG_SP);
2204                                         s1 += 2;
2205                                         break;
2206                                 }
2207
2208                                 M_LDR(REG_A0, REG_SP, s1 * 4);
2209                                 disp = dseg_add_functionptr(cd, LOCK_monitor_exit);
2210                                 M_DSEG_BRANCH(disp);
2211
2212                                 /* we no longer need PV here, no more loading */
2213                                 /*s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2214                                 M_RECOMPUTE_PV(s1);*/
2215
2216                                 switch (iptr->opc) {
2217                                 case ICMD_IRETURN:
2218                                 case ICMD_ARETURN:
2219                                 case ICMD_LRETURN:
2220                                 case ICMD_FRETURN: /* XXX TWISTI: is that correct? */
2221                                 case ICMD_DRETURN:
2222                                         M_LDMFD(BITMASK_RESULT, REG_SP);
2223                                         break;
2224                                 }
2225                         }
2226 #endif
2227
2228                         /* deallocate stackframe for spilled variables */
2229
2230                         if ((cd->stackframesize - savedregs_num) > 0)
2231                                 M_ADD_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize - savedregs_num);
2232
2233                         /* restore callee saved registers + do return */
2234
2235                         if (savedregs_bitmask) {
2236                                 if (!jd->isleafmethod) {
2237                                         savedregs_bitmask &= ~(1<<REG_LR);
2238                                         savedregs_bitmask |= (1<<REG_PC);
2239                                 }
2240                                 M_LDMFD(savedregs_bitmask, REG_SP);
2241                         }
2242
2243                         /* if LR was not on stack, we need to return manually */
2244
2245                         if (jd->isleafmethod)
2246                                 M_MOV(REG_PC, REG_LR);
2247                         break;
2248
2249                 case ICMD_BUILTIN:      /* ..., arg1, arg2, arg3 ==> ...              */
2250
2251                         bte = iptr->sx.s23.s3.bte;
2252                         md  = bte->md;
2253                         goto ICMD_INVOKE_do;
2254
2255                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
2256                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2257                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
2258                 case ICMD_INVOKEINTERFACE:
2259
2260                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2261                                 lm = NULL;
2262                                 um = iptr->sx.s23.s3.um;
2263                                 md = um->methodref->parseddesc.md;
2264                         }
2265                         else {
2266                                 lm = iptr->sx.s23.s3.fmiref->p.method;
2267                                 um = NULL;
2268                                 md = lm->parseddesc;
2269                         }
2270
2271                 ICMD_INVOKE_do:
2272                         /* copy arguments to registers or stack location */
2273
2274                         s3 = md->paramcount;
2275
2276                         MCODECHECK((s3 << 1) + 64);
2277
2278                         for (s3 = s3 - 1; s3 >= 0; s3--) {
2279                                 var = VAR(iptr->sx.s23.s2.args[s3]);
2280
2281                                 if (var->flags & PREALLOC) /* argument was precolored? */
2282                                         continue;
2283
2284                                 /* TODO: document me */
2285 #if !defined(ENABLE_SOFTFLOAT)
2286                                 if (IS_INT_LNG_TYPE(var->type)) {
2287 #endif /* !defined(ENABLE_SOFTFLOAT) */
2288                                         if (!md->params[s3].inmemory) {
2289                                                 s1 = ARGUMENT_REGS(var->type, md->params[s3].regoff);
2290                                                 SPLIT_OPEN(var->type, s1, REG_ITMP2);
2291                                                 d = emit_load(jd, iptr, var, s1);
2292
2293                                                 if (IS_2_WORD_TYPE(var->type))
2294                                                         M_LNGMOVE(d, s1);
2295                                                 else
2296                                                         M_INTMOVE(d, s1);
2297
2298                                                 SPLIT_STORE_AND_CLOSE(var->type, s1, 0);
2299                                         }
2300                                         else {
2301                                                 if (IS_2_WORD_TYPE(var->type)) {
2302                                                         d = emit_load(jd, iptr, var, REG_ITMP12_PACKED);
2303                                                         M_LST(d, REG_SP, md->params[s3].regoff * 4);
2304                                                 }
2305                                                 else {
2306                                                         d = emit_load(jd, iptr, var, REG_ITMP1);
2307                                                         M_IST(d, REG_SP, md->params[s3].regoff * 4);
2308                                                 }
2309                                         }
2310 #if !defined(ENABLE_SOFTFLOAT)
2311                                 }
2312                                 else {
2313                                         if (!md->params[s3].inmemory) {
2314                                                 s1 = ARGUMENT_REGS(var->type, md->params[s3].regoff);
2315                                                 d = emit_load(jd, iptr, var, REG_FTMP1);
2316                                                 SPLIT_OPEN(var->type, s1, REG_ITMP1);
2317                                                 M_CAST_FLT_TO_INT_TYPED(var->type, d, s1);
2318                                                 SPLIT_STORE_AND_CLOSE(var->type, s1, 0);
2319                                         }
2320                                         else {
2321                                                 d = emit_load(jd, iptr, var, REG_FTMP1);
2322                                                 if (IS_2_WORD_TYPE(var->type))
2323                                                         M_DST(d, REG_SP, md->params[s3].regoff * 4);
2324                                                 else
2325                                                         M_FST(d, REG_SP, md->params[s3].regoff * 4);
2326                                         }
2327                                 }
2328 #endif /* !defined(ENABLE_SOFTFLOAT) */
2329                         }
2330
2331                         switch (iptr->opc) {
2332                         case ICMD_BUILTIN:
2333                                 disp = dseg_add_functionptr(cd, bte->fp);
2334
2335                                 M_DSEG_LOAD(REG_PV, disp); /* Pointer to built-in-function */
2336                                 break;
2337
2338                         case ICMD_INVOKESPECIAL:
2339                                 M_TST(REG_A0, REG_A0);
2340                                 M_BEQ(0);
2341                                 codegen_add_nullpointerexception_ref(cd);
2342                                 /* fall through */
2343
2344                         case ICMD_INVOKESTATIC:
2345                                 if (lm == NULL) {
2346                                         disp = dseg_add_unique_address(cd, NULL);
2347
2348                                         codegen_addpatchref(cd, PATCHER_invokestatic_special,
2349                                                                                 um, disp);
2350
2351                                         if (opt_showdisassemble)
2352                                                 M_NOP;
2353                                 }
2354                                 else
2355                                         disp = dseg_add_address(cd, lm->stubroutine);
2356
2357                                 M_DSEG_LOAD(REG_PV, disp);            /* Pointer to method */
2358                                 break;
2359
2360                         case ICMD_INVOKEVIRTUAL:
2361                                 gen_nullptr_check(REG_A0);
2362
2363                                 if (lm == NULL) {
2364                                         codegen_addpatchref(cd, PATCHER_invokevirtual, um, 0);
2365
2366                                         if (opt_showdisassemble)
2367                                                 M_NOP;
2368
2369                                         s1 = 0;
2370                                 }
2371                                 else
2372                                         s1 = OFFSET(vftbl_t, table[0]) +
2373                                                 sizeof(methodptr) * lm->vftblindex;
2374
2375                                 M_LDR_INTERN(REG_METHODPTR, REG_A0,
2376                                                          OFFSET(java_objectheader, vftbl));
2377                                 M_LDR_INTERN(REG_PV, REG_METHODPTR, s1);
2378                                 break;
2379
2380                         case ICMD_INVOKEINTERFACE:
2381                                 gen_nullptr_check(REG_A0);
2382
2383                                 if (lm == NULL) {
2384                                         codegen_addpatchref(cd, PATCHER_invokeinterface, um, 0);
2385
2386                                         if (opt_showdisassemble)
2387                                                 M_NOP;
2388
2389                                         s1 = 0;
2390                                         s2 = 0;
2391                                 }
2392                                 else {
2393                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
2394                                                 sizeof(methodptr*) * lm->class->index;
2395                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
2396                                 }
2397
2398                                 M_LDR_INTERN(REG_METHODPTR, REG_A0,
2399                                                          OFFSET(java_objectheader, vftbl));
2400                                 M_LDR_INTERN(REG_METHODPTR, REG_METHODPTR, s1);
2401                                 M_LDR_INTERN(REG_PV, REG_METHODPTR, s2);
2402                                 break;
2403                         }
2404
2405                         /* generate the actual call */
2406
2407                         M_MOV(REG_LR, REG_PC);               /* save return address in LR */
2408                         M_MOV(REG_PC, REG_PV);               /* branch to method          */
2409                         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2410                         M_RECOMPUTE_PV(s1);
2411
2412                         /* actually only used for ICMD_BUILTIN */
2413
2414                         if (INSTRUCTION_MUST_CHECK(iptr)) {
2415                                 M_TST(REG_RESULT, REG_RESULT);
2416                                 M_BEQ(0);
2417                                 codegen_add_fillinstacktrace_ref(cd);
2418                         }
2419
2420                         /* store return value */
2421
2422                         d = md->returntype.type;
2423
2424 #if !defined(__SOFTFP__)
2425                         /* TODO: this is only a hack, since we use R0/R1 for float
2426                            return!  this depends on gcc; it is independent from
2427                            our ENABLE_SOFTFLOAT define */
2428                         if (iptr->opc == ICMD_BUILTIN && d != TYPE_VOID && IS_FLT_DBL_TYPE(d)) {
2429 #if 0 && !defined(NDEBUG)
2430                                 dolog("BUILTIN that returns float or double (%s.%s)", m->class->name->text, m->name->text);
2431 #endif
2432                                 /* we cannot use this macro, since it is not defined
2433                                    in ENABLE_SOFTFLOAT M_CAST_FLT_TO_INT_TYPED(d,
2434                                    REG_FRESULT, REG_RESULT_TYPED(d)); */
2435                                 if (IS_2_WORD_TYPE(d)) {
2436                                         DCD(0xed2d8102); /* stfd    f0, [sp, #-8]! */
2437                                         M_LDRD_UPDATE(REG_RESULT_PACKED, REG_SP, 8);
2438                                 } else {
2439                                         DCD(0xed2d0101); /* stfs    f0, [sp, #-4]!*/
2440                                         M_LDR_UPDATE(REG_RESULT, REG_SP, 4);
2441                                 }
2442                         }
2443 #endif
2444
2445                         if (d != TYPE_VOID) {
2446 #if !defined(ENABLE_SOFTFLOAT)
2447                                 if (IS_INT_LNG_TYPE(d)) {
2448 #endif /* !defined(ENABLE_SOFTFLOAT) */
2449                                         if (IS_2_WORD_TYPE(d)) {
2450                                                 s1 = codegen_reg_of_dst(jd, iptr, REG_RESULT_PACKED);
2451                                                 M_LNGMOVE(REG_RESULT_PACKED, s1);
2452                                         }
2453                                         else {
2454                                                 s1 = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2455                                                 M_INTMOVE(REG_RESULT, s1);
2456                                         }
2457
2458 #if !defined(ENABLE_SOFTFLOAT)
2459                                 } else {
2460                                         s1 = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
2461                                         M_CAST_INT_TO_FLT_TYPED(VAROP(iptr->dst)->type, REG_RESULT_TYPED(VAROP(iptr->dst)->type), s1);
2462                                 }
2463 #endif /* !defined(ENABLE_SOFTFLOAT) */
2464
2465                                 emit_store_dst(jd, iptr, s1);
2466                         }
2467                         break;
2468
2469                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
2470                                       /* val.a: (classinfo*) superclass               */
2471
2472                         if (!(iptr->flags.bits & INS_FLAG_ARRAY)) {
2473                                 /* object type cast-check */
2474
2475                         classinfo *super;
2476                         s4         superindex;
2477                         u1        *branch1 = NULL;
2478                         u1        *branch2 = NULL;
2479                         u1        *branch3 = NULL;
2480
2481                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2482                                 super      = NULL;
2483                                 superindex = 0;
2484                         }
2485                         else {
2486                                 super      = iptr->sx.s23.s3.c.cls;
2487                                 superindex = super->index;
2488                         }
2489
2490 #if defined(ENABLE_THREADS)
2491                         codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
2492 #endif
2493                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2494
2495                         /* if class is not resolved, check which code to call */
2496
2497                         if (super == NULL) {
2498                                 M_TST(s1, s1);
2499                                 M_BEQ(0);
2500                                 branch1 = cd->mcodeptr;
2501
2502                                 disp = dseg_add_unique_s4(cd, 0); /* super->flags */
2503                                 codegen_addpatchref(cd, PATCHER_checkcast_instanceof_flags,
2504                                                     iptr->sx.s23.s3.c.ref, disp);
2505
2506                                 if (opt_showdisassemble)
2507                                         M_NOP;
2508
2509                                 M_DSEG_LOAD(REG_ITMP2, disp);
2510                                 disp = dseg_add_s4(cd, ACC_INTERFACE);
2511                                 M_DSEG_LOAD(REG_ITMP3, disp);
2512                                 M_TST(REG_ITMP2, REG_ITMP3);
2513                                 M_BEQ(0);
2514                                 branch2 = cd->mcodeptr;
2515                         }
2516
2517                         /* interface checkcast code */
2518
2519                         if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
2520                                 if (super == NULL) {
2521                                         codegen_addpatchref(cd,
2522                                                             PATCHER_checkcast_instanceof_interface,
2523                                                             iptr->sx.s23.s3.c.ref, 0);
2524
2525                                         if (opt_showdisassemble)
2526                                                 M_NOP;
2527                                 }
2528                                 else {
2529                                         M_TST(s1, s1);
2530                                         M_BEQ(0);
2531                                         branch1 = cd->mcodeptr;
2532                                 }
2533
2534                                 M_LDR_INTERN(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2535                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
2536                                 assert(IS_IMM(superindex));
2537                                 M_CMP_IMM(REG_ITMP3, superindex);
2538                                 M_BLE(0);
2539                                 codegen_add_classcastexception_ref(cd, s1);
2540
2541                                 s2 = OFFSET(vftbl_t, interfacetable[0]) -
2542                                         superindex * sizeof(methodptr*);
2543
2544                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP2, s2);
2545                                 M_TST(REG_ITMP3, REG_ITMP3);
2546                                 M_BEQ(0);
2547                                 codegen_add_classcastexception_ref(cd, s1);
2548
2549                                 if (super == NULL) {
2550                                         M_B(0);
2551                                         branch3 = cd->mcodeptr;
2552                                 }
2553                         }
2554
2555                         if (branch2) {
2556                                 gen_resolvebranch(branch2, branch2 - cd->mcodebase,
2557                                                                   cd->mcodeptr - cd->mcodebase);
2558                         }
2559
2560                         /* class checkcast code */
2561
2562                         if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
2563                                 if (super == NULL) {
2564                                         disp = dseg_add_unique_address(cd, NULL);
2565
2566                                         codegen_addpatchref(cd, PATCHER_checkcast_instanceof_class,
2567                                                             iptr->sx.s23.s3.c.ref,
2568                                                                                 disp);
2569
2570                                         if (opt_showdisassemble)
2571                                                 M_NOP;
2572                                 }
2573                                 else {
2574                                         disp = dseg_add_address(cd, super->vftbl);
2575
2576                                         M_TST(s1, s1);
2577                                         M_BEQ(0);
2578                                         branch1 = cd->mcodeptr;
2579                                 }
2580
2581                                 M_LDR_INTERN(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2582                                 M_DSEG_LOAD(REG_ITMP3, disp);
2583 #if defined(ENABLE_THREADS)
2584                                 codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
2585 #endif
2586                                 M_LDR_INTERN(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
2587                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, baseval));
2588                                 M_SUB(REG_ITMP2, REG_ITMP2, REG_ITMP3);
2589                                 M_DSEG_LOAD(REG_ITMP3, disp);
2590                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval));
2591 #if defined(ENABLE_THREADS)
2592                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
2593 #endif
2594                                 M_CMP(REG_ITMP2, REG_ITMP3);
2595                                 M_BHI(0);
2596                                 codegen_add_classcastexception_ref(cd, s1);
2597                         }
2598
2599                         if (branch1) {
2600                                 gen_resolvebranch(branch1, branch1 - cd->mcodebase,
2601                                                                   cd->mcodeptr - cd->mcodebase);
2602                         }
2603
2604                         if (branch3) {
2605                                 gen_resolvebranch(branch3, branch3 - cd->mcodebase,
2606                                                                   cd->mcodeptr - cd->mcodebase);
2607                         }
2608
2609                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
2610                         }
2611                         else {
2612                                 /* array type cast-check */
2613
2614                                 s1 = emit_load_s1(jd, iptr, REG_A0);
2615                                 M_INTMOVE(s1, REG_A0);
2616
2617                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2618                                         disp = dseg_add_unique_address(cd, NULL);
2619
2620                                         codegen_addpatchref(cd, PATCHER_builtin_arraycheckcast,
2621                                                                                 iptr->sx.s23.s3.c.ref,
2622                                                                                 disp);
2623
2624                                         if (opt_showdisassemble)
2625                                                 M_NOP;
2626                                 }
2627                                 else
2628                                         disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2629
2630                                 M_DSEG_LOAD(REG_A1, disp);
2631                                 disp = dseg_add_functionptr(cd, BUILTIN_arraycheckcast);
2632                                 M_DSEG_BRANCH(disp);
2633
2634                                 /* recompute pv */
2635                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2636                                 M_RECOMPUTE_PV(disp);
2637
2638                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2639                                 M_TST(REG_RESULT, REG_RESULT);
2640                                 M_BEQ(0);
2641                                 codegen_add_classcastexception_ref(cd, s1);
2642
2643                                 d = codegen_reg_of_dst(jd, iptr, s1);
2644                         }
2645
2646                         M_INTMOVE(s1, d);
2647                         emit_store_dst(jd, iptr, d);
2648                         break;
2649
2650                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
2651                                       /* val.a: (classinfo*) superclass               */
2652                         {
2653                         classinfo *super;
2654                         s4         superindex;
2655                         u1        *branch1 = NULL;
2656                         u1        *branch2 = NULL;
2657                         u1        *branch3 = NULL;
2658
2659                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2660                                 super      = NULL;
2661                                 superindex = 0;
2662                         }
2663                         else {
2664                                 super      = iptr->sx.s23.s3.c.cls;
2665                                 superindex = super->index;
2666                         }
2667
2668 #if defined(ENABLE_THREADS)
2669                         codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
2670 #endif
2671                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2672                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
2673                         if (s1 == d) {
2674                                 M_MOV(REG_ITMP1, s1);
2675                                 s1 = REG_ITMP1;
2676                         }
2677
2678                         /* if class is not resolved, check which code to call */
2679
2680                         if (super == NULL) {
2681                                 M_EOR(d, d, d);
2682                                 M_TST(s1, s1);
2683                                 M_BEQ(0);
2684                                 branch1 = cd->mcodeptr;
2685
2686                                 disp = dseg_add_unique_s4(cd, 0); /* super->flags */
2687                                 codegen_addpatchref(cd, PATCHER_checkcast_instanceof_flags,
2688                                                     iptr->sx.s23.s3.c.ref, disp);
2689
2690                                 if (opt_showdisassemble)
2691                                         M_NOP;
2692
2693                                 M_DSEG_LOAD(REG_ITMP2, disp);
2694                                 disp = dseg_add_s4(cd, ACC_INTERFACE);
2695                                 M_DSEG_LOAD(REG_ITMP3, disp);
2696                                 M_TST(REG_ITMP2, REG_ITMP3);
2697                                 M_BEQ(0);
2698                                 branch2 = cd->mcodeptr;
2699                         }
2700
2701                         /* interface checkcast code */
2702
2703                         if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
2704                                 if (super == NULL) {
2705                                         /* If d == REG_ITMP2, then it's destroyed in check
2706                                            code above.  */
2707                                         if (d == REG_ITMP2)
2708                                                 M_EOR(d, d, d);
2709
2710                                         codegen_addpatchref(cd,
2711                                                             PATCHER_checkcast_instanceof_interface,
2712                                                             iptr->sx.s23.s3.c.ref, 0);
2713
2714                                         if (opt_showdisassemble)
2715                                                 M_NOP;
2716                                 }
2717                                 else {
2718                                         M_EOR(d, d, d);
2719                                         M_TST(s1, s1);
2720                                         M_BEQ(0);
2721                                         branch1 = cd->mcodeptr;
2722                                 }
2723
2724                                 M_LDR_INTERN(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
2725                                 M_LDR_INTERN(REG_ITMP3,
2726                                                          REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
2727                                 assert(IS_IMM(superindex));
2728                                 M_CMP_IMM(REG_ITMP3, superindex);
2729                                 M_BLE(2);
2730
2731                                 s2 = OFFSET(vftbl_t, interfacetable[0]) -
2732                                         superindex * sizeof(methodptr*);
2733
2734                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP1, s2);
2735                                 M_TST(REG_ITMP3, REG_ITMP3);
2736                                 M_MOVNE_IMM(1, d);
2737
2738                                 if (super == NULL) {
2739                                         M_B(0);
2740                                         branch3 = cd->mcodeptr;
2741                                 }
2742                         }
2743
2744                         if (branch2) {
2745                                 gen_resolvebranch(branch2, branch2 - cd->mcodebase,
2746                                                                   cd->mcodeptr - cd->mcodebase);
2747                         }
2748
2749                         /* class checkcast code */
2750
2751                         if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
2752                                 if (super == NULL) {
2753                                         disp = dseg_add_unique_address(cd, NULL);
2754
2755                                         codegen_addpatchref(cd, PATCHER_checkcast_instanceof_class,
2756                                                             iptr->sx.s23.s3.c.ref,
2757                                                                                 disp);
2758
2759                                         if (opt_showdisassemble)
2760                                                 M_NOP;
2761                                 }
2762                                 else {
2763                                         disp = dseg_add_address(cd, super->vftbl);
2764
2765                                         M_EOR(d, d, d);
2766                                         M_TST(s1, s1);
2767                                         M_BEQ(0);
2768                                         branch1 = cd->mcodeptr;
2769                                 }
2770
2771                                 M_LDR_INTERN(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
2772                                 M_DSEG_LOAD(REG_ITMP2, disp);
2773 #if defined(ENABLE_THREADS)
2774                                 codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
2775 #endif
2776                                 M_LDR_INTERN(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
2777                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
2778                                 M_LDR_INTERN(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
2779 #if defined(ENABLE_THREADS)
2780                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
2781 #endif
2782                                 M_SUB(REG_ITMP1, REG_ITMP1, REG_ITMP3);
2783                                 M_CMP(REG_ITMP1, REG_ITMP2);
2784                                 /* If d == REG_ITMP2, then it's destroyed */
2785                                 if (d == REG_ITMP2)
2786                                         M_EOR(d, d, d);
2787                                 M_MOVLS_IMM(1, d);
2788                         }
2789
2790                         if (branch1) {
2791                                 gen_resolvebranch(branch1, branch1 - cd->mcodebase,
2792                                                                   cd->mcodeptr - cd->mcodebase);
2793                         }
2794
2795                         if (branch3) {
2796                                 gen_resolvebranch(branch3, branch3 - cd->mcodebase,
2797                                                                   cd->mcodeptr - cd->mcodebase);
2798                         }
2799
2800                         }
2801
2802                         emit_store_dst(jd, iptr, d);
2803                         break;
2804
2805                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
2806
2807                         /* copy sizes to stack if necessary  */
2808
2809                         MCODECHECK((iptr->s1.argcount << 1) + 64);
2810
2811                         for (s1 = iptr->s1.argcount; --s1 >= 0; ) {
2812
2813                                 var = VAR(iptr->sx.s23.s2.args[s1]);
2814
2815                                 /* copy SAVEDVAR sizes to stack */
2816
2817                                 if (!(var->flags & PREALLOC)) {
2818                                         s2 = emit_load(jd, iptr, var, REG_ITMP1);
2819                                         M_STR(s2, REG_SP, s1 * 4);
2820                                 }
2821                         }
2822
2823                         /* a0 = dimension count */
2824
2825                         assert(IS_IMM(iptr->s1.argcount));
2826                         M_MOV_IMM(REG_A0, iptr->s1.argcount);
2827
2828                         /* is patcher function set? */
2829
2830                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2831                                 disp = dseg_add_unique_address(cd, NULL);
2832
2833                                 codegen_addpatchref(cd, PATCHER_builtin_multianewarray,
2834                                                                         iptr->sx.s23.s3.c.ref, disp);
2835
2836                                 if (opt_showdisassemble)
2837                                         M_NOP;
2838                         }
2839                         else
2840                                 disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2841
2842                         /* a1 = arraydescriptor */
2843
2844                         M_DSEG_LOAD(REG_A1, disp);
2845
2846                         /* a2 = pointer to dimensions = stack pointer */
2847
2848                         M_INTMOVE(REG_SP, REG_A2);
2849
2850                         /* call builtin_multianewarray here */
2851
2852                         disp = dseg_add_functionptr(cd, BUILTIN_multianewarray);
2853                         M_DSEG_BRANCH(disp);
2854
2855                         /* recompute pv */
2856
2857                         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2858                         M_RECOMPUTE_PV(s1);
2859
2860                         /* check for exception before result assignment */
2861
2862                         M_TST(REG_RESULT, REG_RESULT);
2863                         M_BEQ(0);
2864                         codegen_add_fillinstacktrace_ref(cd);
2865
2866                         /* get arrayref */
2867
2868                         d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2869                         M_INTMOVE(REG_RESULT, d);
2870                         emit_store_dst(jd, iptr, d);
2871                         break;
2872
2873                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
2874
2875                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2876                         M_TST(s1, s1);
2877                         M_BEQ(0);
2878                         codegen_add_nullpointerexception_ref(cd);
2879                         break;
2880
2881                 default:
2882                         exceptions_throw_internalerror("Unknown ICMD %d during code generation",
2883                                                                                    iptr->opc);
2884                         return false;
2885                 } /* the big switch */
2886
2887                 } /* for all instructions */
2888
2889         } /* for all basic blocks */
2890
2891         dseg_createlinenumbertable(cd);
2892
2893
2894         /* generate exception and patcher stubs */
2895
2896         emit_exception_stubs(jd);
2897         emit_patcher_stubs(jd);
2898
2899         codegen_finish(jd);
2900
2901         /* everything's ok */
2902
2903         return true;
2904 }
2905
2906
2907 /* createcompilerstub **********************************************************
2908
2909    creates a stub routine which calls the compiler
2910
2911 *******************************************************************************/
2912
2913 #define COMPILERSTUB_DATASIZE    3 * SIZEOF_VOID_P
2914 #define COMPILERSTUB_CODESIZE    2 * 4
2915
2916 #define COMPILERSTUB_SIZE        COMPILERSTUB_DATASIZE + COMPILERSTUB_CODESIZE
2917
2918
2919 u1 *createcompilerstub(methodinfo *m)
2920 {
2921         u1          *s;                     /* memory to hold the stub            */
2922         ptrint      *d;
2923         codegendata *cd;
2924         s4           dumpsize;              /* code generation pointer            */
2925
2926         s = CNEW(u1, COMPILERSTUB_SIZE);
2927
2928         /* set data pointer and code pointer */
2929
2930         d = (ptrint *) s;
2931         s = s + COMPILERSTUB_DATASIZE;
2932
2933         /* mark start of dump memory area */
2934
2935         dumpsize = dump_size();
2936
2937         cd = DNEW(codegendata);
2938         cd->mcodeptr = s;
2939
2940         /* The codeinfo pointer is actually a pointer to the
2941            methodinfo. This fakes a codeinfo structure. */
2942
2943         d[0] = (ptrint) asm_call_jit_compiler;
2944         d[1] = (ptrint) m;
2945         d[2] = (ptrint) &d[1];                                    /* fake code->m */
2946
2947         /* code for the stub */
2948
2949         M_LDR_INTERN(REG_ITMP1, REG_PC, -(2 * 4 + 2 * SIZEOF_VOID_P));
2950         M_LDR_INTERN(REG_PC, REG_PC, -(3 * 4 + 3 * SIZEOF_VOID_P));
2951
2952 #if defined(ENABLE_STATISTICS)
2953         if (opt_stat)
2954                 count_cstub_len += COMPILERSTUB_SIZE * 4;
2955 #endif
2956
2957         /* release dump area */
2958
2959         dump_release(dumpsize);
2960
2961         /* synchronize instruction and data cache */
2962
2963         md_cacheflush(s, cd->mcodeptr - (u1 *) d);
2964
2965         return s;
2966 }
2967
2968
2969 /* createnativestub ************************************************************
2970
2971    Creates a stub routine which calls a native method.
2972
2973 *******************************************************************************/
2974
2975 u1 *createnativestub(functionptr f, jitdata *jd, methoddesc *nmd)
2976 {
2977         methodinfo   *m;
2978         codeinfo     *code;
2979         codegendata  *cd;
2980         registerdata *rd;
2981         s4            nativeparams;
2982         methoddesc   *md;
2983         s4            i, j;
2984         s4            t;
2985         s4            disp, funcdisp, s1, s2;
2986
2987         /* get required compiler data */
2988
2989         m    = jd->m;
2990         code = jd->code;
2991         cd   = jd->cd;
2992         rd   = jd->rd;
2993
2994         /* initialize variables */
2995
2996         md = m->parseddesc;
2997         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
2998
2999         /* calculate stackframe size */
3000
3001         cd->stackframesize =
3002                 1 +                                                /* return address  */
3003                 sizeof(stackframeinfo) / SIZEOF_VOID_P +           /* stackframeinfo  */
3004                 sizeof(localref_table) / SIZEOF_VOID_P +           /* localref_table  */
3005                 nmd->memuse;                                       /* stack arguments */
3006
3007         /* align stack to 8-byte */
3008
3009         cd->stackframesize = (cd->stackframesize + 1) & ~1;
3010
3011         /* create method header */
3012
3013         (void) dseg_add_unique_address(cd, code);              /* CodeinfoPointer */
3014         (void) dseg_add_unique_s4(cd, cd->stackframesize * 4); /* FrameSize       */
3015         (void) dseg_add_unique_s4(cd, 0);                      /* IsSync          */
3016         (void) dseg_add_unique_s4(cd, 0);                      /* IsLeaf          */
3017         (void) dseg_add_unique_s4(cd, 0);                      /* IntSave         */
3018         (void) dseg_add_unique_s4(cd, 0);                      /* FltSave         */
3019         (void) dseg_addlinenumbertablesize(cd);
3020         (void) dseg_add_unique_s4(cd, 0);                      /* ExTableSize     */
3021
3022         /* generate stub code */
3023
3024         M_STMFD(1<<REG_LR, REG_SP);
3025         M_SUB_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize - 1);
3026
3027 #if !defined(NDEBUG)
3028         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
3029                 emit_verbosecall_enter(jd);
3030 #endif
3031
3032         /* get function address (this must happen before the stackframeinfo) */
3033
3034         funcdisp = dseg_add_functionptr(cd, f);
3035
3036 #if !defined(WITH_STATIC_CLASSPATH)
3037         if (f == NULL) {
3038                 codegen_addpatchref(cd, PATCHER_resolve_native, m, funcdisp);
3039
3040                 if (opt_showdisassemble)
3041                         M_NOP;
3042         }
3043 #endif
3044
3045         /* Save integer and float argument registers (these are 4
3046            registers, stack is 8-byte aligned). */
3047
3048         M_STMFD(BITMASK_ARGS, REG_SP);
3049         /* TODO: floating point */
3050
3051         /* create native stackframe info */
3052
3053         assert(IS_IMM(4*4 + cd->stackframesize * 4));
3054         M_ADD_IMM(REG_A0, REG_SP, 4*4 + cd->stackframesize * 4 - SIZEOF_VOID_P);
3055         M_MOV(REG_A1, REG_PV);
3056         M_ADD_IMM(REG_A2, REG_SP, 4*4 + cd->stackframesize * 4);
3057         M_LDR_INTERN(REG_A3, REG_SP, 4*4 + cd->stackframesize * 4 - SIZEOF_VOID_P);
3058         disp = dseg_add_functionptr(cd, codegen_start_native_call);
3059         M_DSEG_BRANCH(disp);
3060
3061         /* recompute pv */
3062
3063         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
3064         M_RECOMPUTE_PV(s1);
3065
3066         /* Restore integer and float argument registers (these are 4
3067            registers, stack is 8-byte aligned). */
3068
3069         M_LDMFD(BITMASK_ARGS, REG_SP);
3070         /* TODO: floating point */
3071
3072         /* copy or spill arguments to new locations */
3073         /* ATTENTION: the ARM has only integer argument registers! */
3074
3075         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
3076                 t = md->paramtypes[i].type;
3077
3078                 if (!md->params[i].inmemory) {
3079                         s1 = ARGUMENT_REGS(t, md->params[i].regoff);
3080
3081                         if (!nmd->params[j].inmemory) {
3082                                 s2 = ARGUMENT_REGS(t, nmd->params[j].regoff);
3083
3084 #if !defined(__ARM_EABI__)
3085                                 SPLIT_OPEN(t, s1, REG_ITMP1);
3086                                 SPLIT_LOAD(t, s1, cd->stackframesize);
3087                                 SPLIT_OPEN(t, s2, REG_ITMP1);
3088 #endif
3089
3090                                 if (IS_2_WORD_TYPE(t))
3091                                         M_LNGMOVE(s1, s2);
3092                                 else
3093                                         M_INTMOVE(s1, s2);
3094
3095 #if !defined(__ARM_EABI__)
3096                                 SPLIT_STORE_AND_CLOSE(t, s2, 0);
3097 #endif
3098                         }
3099                         else {
3100                                 s2 = nmd->params[j].regoff;
3101
3102 #if !defined(__ARM_EABI__)
3103                                 SPLIT_OPEN(t, s1, REG_ITMP1);
3104                                 SPLIT_LOAD(t, s1, cd->stackframesize);
3105 #endif
3106
3107                                 if (IS_2_WORD_TYPE(t))
3108                                         M_LST(s1, REG_SP, s2 * 4);
3109                                 else
3110                                         M_IST(s1, REG_SP, s2 * 4);
3111                                 /* no SPLIT_CLOSE here because argument is fully on stack now */
3112                         }
3113                 }
3114                 else {
3115                         s1 = md->params[i].regoff + cd->stackframesize;
3116                         s2 = nmd->params[j].regoff;
3117
3118                         if (IS_2_WORD_TYPE(t)) {
3119                                 M_LLD(REG_ITMP12_PACKED, REG_SP, s1 * 4);
3120                                 M_LST(REG_ITMP12_PACKED, REG_SP, s2 * 4);
3121                         }
3122                         else {
3123                                 M_ILD(REG_ITMP1, REG_SP, s1 * 4);
3124                                 M_IST(REG_ITMP1, REG_SP, s2 * 4);
3125                         }
3126                 }
3127         }
3128
3129         /* put class into second argument register */
3130
3131         if (m->flags & ACC_STATIC) {
3132                 disp = dseg_add_address(cd, m->class);
3133                 M_DSEG_LOAD(REG_A1, disp);
3134         }
3135
3136         /* put env into first argument register */
3137
3138         disp = dseg_add_address(cd, _Jv_env);
3139         M_DSEG_LOAD(REG_A0, disp);
3140
3141         /* do the native function call */
3142
3143         M_DSEG_BRANCH(funcdisp);
3144
3145         /* recompute pv */
3146         /* TODO: this is only needed because of the tracer ... do we
3147            really need it? */
3148
3149         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
3150         M_RECOMPUTE_PV(s1);
3151
3152 #if !defined(__SOFTFP__)
3153         /* TODO: this is only a hack, since we use R0/R1 for float return! */
3154         /* this depends on gcc; it is independent from our ENABLE_SOFTFLOAT define */
3155         if (md->returntype.type != TYPE_VOID && IS_FLT_DBL_TYPE(md->returntype.type)) {
3156 #if 0 && !defined(NDEBUG)
3157                 dolog("NATIVESTUB that returns float or double (%s.%s)", m->class->name->text, m->name->text);
3158 #endif
3159                 /* we cannot use this macro, since it is not defined in ENABLE_SOFTFLOAT */
3160                 /* M_CAST_FLT_TO_INT_TYPED(md->returntype.type, REG_FRESULT, REG_RESULT_TYPED(md->returntype.type)); */
3161                 if (IS_2_WORD_TYPE(md->returntype.type)) {
3162                         DCD(0xed2d8102); /* stfd    f0, [sp, #-8]! */
3163                         M_LDRD_UPDATE(REG_RESULT_PACKED, REG_SP, 8);
3164                 } else {
3165                         DCD(0xed2d0101); /* stfs    f0, [sp, #-4]!*/
3166                         M_LDR_UPDATE(REG_RESULT, REG_SP, 4);
3167                 }
3168         }
3169 #endif
3170
3171 #if !defined(NDEBUG)
3172         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
3173                 emit_verbosecall_exit(jd);
3174 #endif
3175
3176         /* remove native stackframe info */
3177         /* TODO: improve this store/load */
3178
3179         M_STMFD(BITMASK_RESULT, REG_SP);
3180
3181         M_ADD_IMM(REG_A0, REG_SP, 2*4 + cd->stackframesize * 4 - SIZEOF_VOID_P);
3182         disp = dseg_add_functionptr(cd, codegen_finish_native_call);
3183         M_DSEG_BRANCH(disp);
3184         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
3185         M_RECOMPUTE_PV(s1);
3186
3187         M_MOV(REG_ITMP1_XPTR, REG_RESULT);
3188         M_LDMFD(BITMASK_RESULT, REG_SP);
3189
3190         /* finish stub code, but do not yet return to caller */
3191
3192         M_ADD_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize - 1);
3193         M_LDMFD(1<<REG_LR, REG_SP);
3194
3195         /* check for exception */
3196
3197         M_TST(REG_ITMP1_XPTR, REG_ITMP1_XPTR);
3198         M_MOVEQ(REG_LR, REG_PC);            /* if no exception, return to caller  */
3199
3200         /* handle exception here */
3201
3202         M_SUB_IMM(REG_ITMP2_XPC, REG_LR, 4);/* move fault address into xpc        */
3203
3204         disp = dseg_add_functionptr(cd, asm_handle_nat_exception);
3205         M_DSEG_LOAD(REG_ITMP3, disp);       /* load asm exception handler address */
3206         M_MOV(REG_PC, REG_ITMP3);           /* jump to asm exception handler      */
3207
3208         /* generate patcher stubs */
3209
3210         emit_patcher_stubs(jd);
3211
3212         codegen_finish(jd);
3213
3214         return code->entrypoint;
3215 }
3216
3217
3218 /* asm_debug *******************************************************************
3219
3220    Lazy debugger!
3221
3222 *******************************************************************************/
3223
3224 void asm_debug(int a1, int a2, int a3, int a4)
3225 {
3226         printf("===> i am going to exit after this debugging message!\n");
3227         printf("got asm_debug(%p, %p, %p, %p)\n",(void*)a1,(void*)a2,(void*)a3,(void*)a4);
3228         vm_abort("leave you now");
3229 }
3230
3231
3232 /*
3233  * These are local overrides for various environment variables in Emacs.
3234  * Please do not remove this and leave it at the end of the file, where
3235  * Emacs will automagically detect them.
3236  * ---------------------------------------------------------------------
3237  * Local variables:
3238  * mode: c
3239  * indent-tabs-mode: t
3240  * c-basic-offset: 4
3241  * tab-width: 4
3242  * End:
3243  * vim:noexpandtab:sw=4:ts=4:
3244  */