Merged revisions 8137-8178 via svnmerge from
[cacao.git] / src / vm / jit / arm / codegen.c
1 /* src/vm/jit/arm/codegen.c - machine code generator for Arm
2
3    Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6    J. Wenninger, Institut f. Computersprachen - TU Wien
7
8    This file is part of CACAO.
9
10    This program is free software; you can redistribute it and/or
11    modify it under the terms of the GNU General Public License as
12    published by the Free Software Foundation; either version 2, or (at
13    your option) any later version.
14
15    This program is distributed in the hope that it will be useful, but
16    WITHOUT ANY WARRANTY; without even the implied warranty of
17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18    General Public License for more details.
19
20    You should have received a copy of the GNU General Public License
21    along with this program; if not, write to the Free Software
22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23    02110-1301, USA.
24
25    $Id: codegen.c 8160 2007-06-28 01:52:19Z michi $
26
27 */
28
29
30 #include "config.h"
31
32 #include <assert.h>
33 #include <stdio.h>
34
35 #include "vm/types.h"
36
37 #include "md-abi.h"
38
39 #include "vm/jit/arm/arch.h"
40 #include "vm/jit/arm/codegen.h"
41
42 #include "mm/memory.h"
43
44 #include "native/native.h"
45
46 #include "threads/lock-common.h"
47
48 #include "vm/builtin.h"
49 #include "vm/exceptions.h"
50 #include "vm/global.h"
51 #include "vm/vm.h"
52
53 #include "vm/jit/asmpart.h"
54 #include "vm/jit/codegen-common.h"
55 #include "vm/jit/dseg.h"
56 #include "vm/jit/emit-common.h"
57 #include "vm/jit/jit.h"
58 #include "vm/jit/md.h"
59 #include "vm/jit/methodheader.h"
60 #include "vm/jit/parse.h"
61 #include "vm/jit/patcher-common.h"
62 #include "vm/jit/reg.h"
63
64 #if defined(ENABLE_LSRA)
65 #include "vm/jit/allocator/lsra.h"
66 #endif
67
68 #include "vmcore/loader.h"
69 #include "vmcore/options.h"
70
71
72 /* codegen_emit ****************************************************************
73
74    Generates machine code.
75
76 *******************************************************************************/
77
78 bool codegen_emit(jitdata *jd)
79 {
80         methodinfo         *m;
81         codeinfo           *code;
82         codegendata        *cd;
83         registerdata       *rd;
84         s4              i, t, len;
85         s4              s1, s2, s3, d;
86         s4              disp;
87         varinfo        *var;
88         basicblock     *bptr;
89         instruction    *iptr;
90         exception_entry *ex;
91         s4              fieldtype;
92         s4              varindex;
93
94         s4              spilledregs_num;
95         s4              savedregs_num;
96         u2              savedregs_bitmask;
97         u2              currentline;
98
99         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE* */
100         unresolved_method  *um;
101         builtintable_entry *bte;
102         methoddesc         *md;
103
104         /* get required compiler data */
105
106         m    = jd->m;
107         code = jd->code;
108         cd   = jd->cd;
109         rd   = jd->rd;
110
111         /* prevent compiler warnings */
112
113         lm  = NULL;
114         um  = NULL;
115         bte = NULL;
116
117         fieldtype = -1;
118         
119         /* space to save used callee saved registers */
120
121         savedregs_num = (jd->isleafmethod) ? 0 : 1;       /* space to save the LR */
122         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
123         /*savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);*/
124         assert((FLT_SAV_CNT - rd->savfltreguse) == 0);
125
126         spilledregs_num = rd->memuse;
127
128 #if defined(ENABLE_THREADS)        /* space to save argument of monitor_enter */
129         if (checksync && (m->flags & ACC_SYNCHRONIZED))
130                 spilledregs_num++;
131 #endif
132
133         cd->stackframesize = spilledregs_num * 8 + savedregs_num * 4;
134
135         /* XXX QUICK FIX: We shouldn't align the stack in Java code, but
136            only in native stubs. */
137         /* align stack to 8-byte */
138
139         cd->stackframesize = (cd->stackframesize + 4) & ~4;
140
141         /* SECTION: Method Header */
142         /* create method header */
143
144         (void) dseg_add_unique_address(cd, code);              /* CodeinfoPointer */
145         (void) dseg_add_unique_s4(cd, cd->stackframesize);     /* FrameSize       */
146
147 #if defined(ENABLE_THREADS)
148         /* IsSync contains the offset relative to the stack pointer for the
149            argument of monitor_exit used in the exception handler. Since the
150            offset could be zero and give a wrong meaning of the flag it is
151            offset by one.
152         */
153
154         if (checksync && (m->flags & ACC_SYNCHRONIZED))
155                 (void) dseg_add_unique_s4(cd, rd->memuse * 8 + 4);/* IsSync         */
156         else
157 #endif
158                 (void) dseg_add_unique_s4(cd, 0);                  /* IsSync          */
159
160         (void) dseg_add_unique_s4(cd, jd->isleafmethod);       /* IsLeaf          */
161         (void) dseg_add_unique_s4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave */
162         (void) dseg_add_unique_s4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave */
163         (void) dseg_addlinenumbertablesize(cd);
164         (void) dseg_add_unique_s4(cd, jd->exceptiontablelength); /* ExTableSize   */
165
166         /* create exception table */
167
168         for (ex = jd->exceptiontable; ex != NULL; ex = ex->down) {
169                 dseg_add_target(cd, ex->start);
170                 dseg_add_target(cd, ex->end);
171                 dseg_add_target(cd, ex->handler);
172                 (void) dseg_add_unique_address(cd, ex->catchtype.any);
173         }
174
175         /* save return address and used callee saved registers */
176
177         savedregs_bitmask = 0;
178
179         if (!jd->isleafmethod)
180                 savedregs_bitmask = (1<<REG_LR);
181
182         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--)
183                 savedregs_bitmask |= (1<<(rd->savintregs[i]));
184
185 #if !defined(NDEBUG)
186         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
187                 log_text("!!! CODEGEN: floating-point callee saved registers are not saved to stack (SEVERE! STACK IS MESSED UP!)");
188                 /* TODO: floating-point */
189         }
190 #endif
191
192         if (savedregs_bitmask)
193                 M_STMFD(savedregs_bitmask, REG_SP);
194
195         /* create additional stack frame for spilled variables (if necessary) */
196
197         if ((cd->stackframesize / 4 - savedregs_num) > 0)
198                 M_SUB_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize / 4 - savedregs_num);
199
200         /* take arguments out of register or stack frame */
201
202         md = m->parseddesc;
203         for (i = 0, len = 0; i < md->paramcount; i++) {
204                 s1 = md->params[i].regoff;
205                 t = md->paramtypes[i].type;
206
207                 varindex = jd->local_map[len * 5 + t];
208
209                 len += (IS_2_WORD_TYPE(t)) ? 2 : 1;          /* 2 word type arguments */
210
211                 if (varindex == UNUSED)
212                         continue;
213
214                 var = VAR(varindex);
215
216                 /* ATTENTION: we use interger registers for all arguments (even float) */
217 #if !defined(ENABLE_SOFTFLOAT)
218                 if (IS_INT_LNG_TYPE(t)) {
219 #endif
220                         if (!md->params[i].inmemory) {
221                                 if (!(var->flags & INMEMORY)) {
222                                         if (IS_2_WORD_TYPE(t))
223                                                 M_LNGMOVE(s1, var->vv.regoff);
224                                         else
225                                                 M_INTMOVE(s1, var->vv.regoff);
226                                 }
227                                 else {
228                                         if (IS_2_WORD_TYPE(t))
229                                                 M_LST(s1, REG_SP, var->vv.regoff);
230                                         else
231                                                 M_IST(s1, REG_SP, var->vv.regoff);
232                                 }
233                         }
234                         else {                                   /* stack arguments       */
235                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
236                                         if (IS_2_WORD_TYPE(t))
237                                                 M_LLD(var->vv.regoff, REG_SP, cd->stackframesize + s1);
238                                         else
239                                                 M_ILD(var->vv.regoff, REG_SP, cd->stackframesize + s1);
240                                 }
241                                 else {                               /* stack arg -> spilled  */
242                                         /* Reuse Memory Position on Caller Stack */
243                                         var->vv.regoff = cd->stackframesize + s1;
244                                 }
245                         }
246 #if !defined(ENABLE_SOFTFLOAT)
247                 }
248                 else {
249                         if (!md->params[i].inmemory) {
250                                 if (!(var->flags & INMEMORY)) {
251                                         M_CAST_INT_TO_FLT_TYPED(t, s1, var->vv.regoff);
252                                 }
253                                 else {
254                                         if (IS_2_WORD_TYPE(t))
255                                                 M_LST(s1, REG_SP, var->vv.regoff);
256                                         else
257                                                 M_IST(s1, REG_SP, var->vv.regoff);
258                                 }
259                         }
260                         else {
261                                 if (!(var->flags & INMEMORY)) {
262                                         if (IS_2_WORD_TYPE(t))
263                                                 M_DLD(var->vv.regoff, REG_SP, cd->stackframesize + s1);
264                                         else
265                                                 M_FLD(var->vv.regoff, REG_SP, cd->stackframesize + s1);
266                                 }
267                                 else {
268                                         /* Reuse Memory Position on Caller Stack */
269                                         var->vv.regoff = cd->stackframesize + s1;
270                                 }
271                         }
272                 }
273 #endif /* !defined(ENABLE_SOFTFLOAT) */
274         }
275
276 #if defined(ENABLE_THREADS)
277         /* call monitorenter function */
278
279         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
280                 /* stack offset for monitor argument */
281
282                 s1 = rd->memuse * 8;
283
284 # if !defined(NDEBUG)
285                 if (JITDATA_HAS_FLAG_VERBOSECALL(jd)) {
286                         M_STMFD(BITMASK_ARGS, REG_SP);
287                         s1 += 4 * 4;
288                 }
289 # endif
290
291                 /* get the correct lock object */
292
293                 if (m->flags & ACC_STATIC) {
294                         disp = dseg_add_address(cd, &m->class->object.header);
295                         M_DSEG_LOAD(REG_A0, disp);
296                 }
297                 else {
298                         emit_nullpointer_check_force(cd, iptr, REG_A0);
299                 }
300
301                 M_STR(REG_A0, REG_SP, s1);
302                 disp = dseg_add_functionptr(cd, LOCK_monitor_enter);
303                 M_DSEG_BRANCH(disp);
304                 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
305                 M_RECOMPUTE_PV(s1);
306
307 # if !defined(NDEBUG)
308                 if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
309                         M_LDMFD(BITMASK_ARGS, REG_SP);
310 # endif
311         }
312 #endif
313
314 #if !defined(NDEBUG)
315         /* call trace function */
316
317         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
318                 emit_verbosecall_enter(jd);
319 #endif
320
321         /* end of header generation */
322
323         /* SECTION: ICMD Code Generation */
324         /* for all basic blocks */
325
326         for (bptr = jd->basicblocks; bptr != NULL; bptr = bptr->next) {
327
328                 bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase);
329
330                 /* is this basic block reached? */
331
332                 if (bptr->flags < BBREACHED)
333                         continue;
334
335                 /* branch resolving */
336
337                 codegen_resolve_branchrefs(cd, bptr);
338
339                 /* copy interface registers to their destination */
340
341                 len = bptr->indepth;
342
343                 MCODECHECK(64+len);
344
345 #if defined(ENABLE_LSRA)
346                 if (opt_lsra) {
347                 while (len) {
348                         len--;
349                         var = VAR(bptr->invars[len]);
350                         if ((len == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
351                                 if (!(var->flags & INMEMORY))
352                                         d= var->vv.regoff;
353                                 else
354                                         d=REG_ITMP1;
355                                 M_INTMOVE(REG_ITMP1, d);
356                                 emit_store(jd, NULL, var, d);   
357                         }
358                 }
359                 } else {
360 #endif
361                 while (len) {
362                         len--;
363                         var = VAR(bptr->invars[len]);
364
365                         if ((len == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
366                                 d = codegen_reg_of_var(0, var, REG_ITMP1);
367                                 M_INTMOVE(REG_ITMP1, d);
368                                 emit_store(jd, NULL, var, d);
369                         }
370                         else {
371                                 assert((var->flags & INOUT));
372                         }
373                 }
374 #if defined(ENABLE_LSRA)
375                 }
376 #endif
377
378                 /* for all instructions */
379                 len = bptr->icount;
380                 currentline = 0;
381                 for (iptr = bptr->iinstr; len > 0; len--, iptr++) {
382
383                         /* add line number */
384                         if (iptr->line != currentline) {
385                                 dseg_addlinenumber(cd, iptr->line);
386                                 currentline = iptr->line;
387                         }
388
389                         MCODECHECK(64);   /* an instruction usually needs < 64 words      */
390
391                         /* the big switch */
392                         switch (iptr->opc) {
393                 case ICMD_NOP:        /* ... ==> ...                                  */
394                         break;
395
396         /* constant operations ************************************************/
397
398                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
399
400                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
401                         ICONST(d, iptr->sx.val.i);
402                         emit_store_dst(jd, iptr, d);
403                         break;
404
405                 case ICMD_ACONST:     /* ... ==> ..., constant                        */
406
407                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
408                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
409                                 disp = dseg_add_unique_address(cd, NULL);
410
411                                 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_classinfo,
412                                                     iptr->sx.val.c.ref, disp);
413
414                                 if (opt_showdisassemble)
415                                         M_NOP;
416
417                                 M_DSEG_LOAD(d, disp);
418                         }
419                         else {
420                                 ICONST(d, (u4) iptr->sx.val.anyptr);
421                         }
422                         emit_store_dst(jd, iptr, d);
423                         break;
424
425                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
426
427                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
428                         LCONST(d, iptr->sx.val.l);
429                         emit_store_dst(jd, iptr, d);
430                         break;
431
432                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
433
434 #if defined(ENABLE_SOFTFLOAT)
435                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
436                         ICONST(d, iptr->sx.val.i);
437                         emit_store_dst(jd, iptr, d);
438 #else
439                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
440                         FCONST(d, iptr->sx.val.f);
441                         emit_store_dst(jd, iptr, d);
442 #endif
443                         break;
444
445                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
446
447 #if defined(ENABLE_SOFTFLOAT)
448                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
449                         LCONST(d, iptr->sx.val.l);
450                         emit_store_dst(jd, iptr, d);
451 #else
452                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
453                         DCONST(d, iptr->sx.val.d);
454                         emit_store_dst(jd, iptr, d);
455 #endif
456                         break;
457
458
459                 /* load/store/copy/move operations ************************************/
460
461                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
462                 case ICMD_ALOAD:      /* op1 = local variable                         */
463                 case ICMD_FLOAD:
464                 case ICMD_LLOAD:
465                 case ICMD_DLOAD:
466                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
467                 case ICMD_FSTORE:
468                 case ICMD_LSTORE:
469                 case ICMD_DSTORE:
470                 case ICMD_COPY:
471                 case ICMD_MOVE:
472
473                         emit_copy(jd, iptr);
474                         break;
475
476                 case ICMD_ASTORE:
477                         if (!(iptr->flags.bits & INS_FLAG_RETADDR))
478                                 emit_copy(jd, iptr);
479                         break;
480
481                 /* pop operations *****************************************************/
482
483                 /* attention: double and longs are only one entry in CACAO ICMDs      */
484
485                 case ICMD_POP:        /* ..., value  ==> ...                          */
486                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
487
488                         break;
489
490
491                 /* integer operations *************************************************/
492
493                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
494
495                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
496                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
497                         M_MOV(d, REG_LSL(s1, 24));
498                         M_MOV(d, REG_ASR(d, 24));
499                         emit_store_dst(jd, iptr, d);
500                         break;
501
502                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
503
504                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
505                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
506                         M_MOV(d, REG_LSL(s1, 16));
507                         M_MOV(d, REG_LSR(d, 16)); /* ATTENTION: char is unsigned */
508                         emit_store_dst(jd, iptr, d);
509                         break;
510
511                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
512
513                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
514                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
515                         M_MOV(d, REG_LSL(s1, 16));
516                         M_MOV(d, REG_ASR(d, 16));
517                         emit_store_dst(jd, iptr, d);
518                         break;
519
520                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
521
522                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
523                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
524                         M_INTMOVE(s1, GET_LOW_REG(d));
525                         M_MOV(GET_HIGH_REG(d), REG_ASR(s1, 31));
526                         emit_store_dst(jd, iptr, d);
527                         break;
528
529                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
530
531                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
532                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
533                         M_INTMOVE(s1, d);
534                         emit_store_dst(jd, iptr, d);
535                         break;
536
537                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
538
539                         s1 = emit_load_s1(jd, iptr, REG_ITMP1); 
540                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
541                         M_RSB_IMM(d, s1, 0);
542                         emit_store_dst(jd, iptr, d);
543                         break;
544
545                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
546
547                         s1 = emit_load_s1(jd, iptr, REG_ITMP12_PACKED);
548                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
549                         M_RSB_IMMS(GET_LOW_REG(d), GET_LOW_REG(s1), 0);
550                         M_RSC_IMM(GET_HIGH_REG(d), GET_HIGH_REG(s1), 0);
551                         emit_store_dst(jd, iptr, d);
552                         break;
553
554                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
555
556                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
557                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
558                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
559                         M_ADD(d, s1, s2);
560                         emit_store_dst(jd, iptr, d);
561                         break;
562
563                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
564
565                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
566                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
567                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
568                         M_ADD_S(GET_LOW_REG(d), s1, s2);
569                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
570                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
571                         M_ADC(GET_HIGH_REG(d), s1, s2);
572                         emit_store_dst(jd, iptr, d);
573                         break;
574
575                 case ICMD_IADDCONST:
576                 case ICMD_IINC:
577
578                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
579                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
580
581                         if (IS_IMM(iptr->sx.val.i)) {
582                                 M_ADD_IMM(d, s1, iptr->sx.val.i);
583                         } else if (IS_IMM(-iptr->sx.val.i)) {
584                                 M_SUB_IMM(d, s1, (-iptr->sx.val.i));
585                         } else {
586                                 ICONST(REG_ITMP3, iptr->sx.val.i);
587                                 M_ADD(d, s1, REG_ITMP3);
588                         }
589
590                         emit_store_dst(jd, iptr, d);
591                         break;
592
593                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
594                                       /* sx.val.l = constant                          */
595
596                         s3 = iptr->sx.val.l & 0xffffffff;
597                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
598                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
599                         if (IS_IMM(s3))
600                                 M_ADD_IMMS(GET_LOW_REG(d), s1, s3);
601                         else {
602                                 ICONST(REG_ITMP3, s3);
603                                 M_ADD_S(GET_LOW_REG(d), s1, REG_ITMP3);
604                         }
605                         s3 = iptr->sx.val.l >> 32;
606                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP2);
607                         if (IS_IMM(s3))
608                                 M_ADC_IMM(GET_HIGH_REG(d), s1, s3);
609                         else {
610                                 ICONST(REG_ITMP3, s3);
611                                 M_ADC(GET_HIGH_REG(d), s1, REG_ITMP3);
612                         }
613                         emit_store_dst(jd, iptr, d);
614                         break;
615
616                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
617
618                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
619                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
620                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
621                         M_SUB(d, s1, s2);
622                         emit_store_dst(jd, iptr, d);
623                         break;
624
625                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
626
627                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
628                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
629                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
630                         M_SUB_S(GET_LOW_REG(d), s1, s2);
631                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
632                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
633                         M_SBC(GET_HIGH_REG(d), s1, s2);
634                         emit_store_dst(jd, iptr, d);
635                         break;
636
637                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
638                                       /* sx.val.i = constant                          */
639
640                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
641                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
642                         if (IS_IMM(iptr->sx.val.i))
643                                 M_SUB_IMM(d, s1, iptr->sx.val.i);
644                         else {
645                                 ICONST(REG_ITMP3, iptr->sx.val.i);
646                                 M_SUB(d, s1, REG_ITMP3);
647                         }
648                         emit_store_dst(jd, iptr, d);
649                         break;
650
651                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
652                                       /* sx.val.l = constant                          */
653
654                         s3 = iptr->sx.val.l & 0xffffffff;
655                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
656                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
657                         if (IS_IMM(s3))
658                                 M_SUB_IMMS(GET_LOW_REG(d), s1, s3);
659                         else {
660                                 ICONST(REG_ITMP3, s3);
661                                 M_SUB_S(GET_LOW_REG(d), s1, REG_ITMP3);
662                         }
663                         s3 = iptr->sx.val.l >> 32;
664                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP2);
665                         if (IS_IMM(s3))
666                                 M_SBC_IMM(GET_HIGH_REG(d), s1, s3);
667                         else {
668                                 ICONST(REG_ITMP3, s3);
669                                 M_SBC(GET_HIGH_REG(d), s1, REG_ITMP3);
670                         }
671                         emit_store_dst(jd, iptr, d);
672                         break;
673
674                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
675
676                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
677                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
678                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
679                         M_MUL(d, s1, s2);
680                         emit_store_dst(jd, iptr, d);
681                         break;
682
683                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
684                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
685
686                         s1 = emit_load_s1(jd, iptr, REG_A0);
687                         s2 = emit_load_s2(jd, iptr, REG_A1);
688                         emit_arithmetic_check(cd, iptr, s2);
689
690                         /* move arguments into argument registers */
691                         M_INTMOVE(s1, REG_A0);
692                         M_INTMOVE(s2, REG_A1);
693
694                         /* call builtin function */
695                         bte = iptr->sx.s23.s3.bte;
696                         disp = dseg_add_functionptr(cd, bte->fp);
697                         M_DSEG_BRANCH(disp);
698
699                         /* recompute pv */
700                         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
701                         M_RECOMPUTE_PV(s1);
702
703                         /* move result into destination register */
704                         d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
705                         M_INTMOVE(REG_RESULT, d);
706                         emit_store_dst(jd, iptr, d);
707                         break;
708
709                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
710                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
711
712                         /* move arguments into argument registers */
713
714                         s1 = emit_load_s1(jd, iptr, REG_A0_A1_PACKED);
715                         s2 = emit_load_s2(jd, iptr, REG_A2_A3_PACKED);
716                         /* XXX TODO: only do this if arithmetic check is really done! */
717                         M_ORR(GET_HIGH_REG(s2), GET_LOW_REG(s2), REG_ITMP3);
718                         emit_arithmetic_check(cd, iptr, REG_ITMP3);
719
720                         M_LNGMOVE(s1, REG_A0_A1_PACKED);
721                         M_LNGMOVE(s2, REG_A2_A3_PACKED);
722
723                         /* call builtin function */
724                         bte = iptr->sx.s23.s3.bte;
725                         disp = dseg_add_functionptr(cd, bte->fp);
726                         M_DSEG_BRANCH(disp);
727
728                         /* recompute pv */
729                         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
730                         M_RECOMPUTE_PV(s1);
731
732                         /* move result into destination register */
733                         d = codegen_reg_of_dst(jd, iptr, REG_RESULT_PACKED);
734                         M_LNGMOVE(REG_RESULT_PACKED, d);
735                         emit_store_dst(jd, iptr, d);
736                         break;
737
738                 case ICMD_IMULPOW2:   /* ..., value  ==> ..., value * (2 ^ constant)  */
739                                       /* sx.val.i = constant                          */
740
741                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
742                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
743                         M_MOV(d, REG_LSL(s1, iptr->sx.val.i));
744                         emit_store_dst(jd, iptr, d);
745                         break;
746
747                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value / (2 ^ constant)  */
748                                       /* sx.val.i = constant                          */
749
750                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
751                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
752                         /* this rounds towards 0 as java likes it */
753                         M_MOV(REG_ITMP3, REG_ASR(s1, 31));
754                         M_ADD(REG_ITMP3, s1, REG_LSR(REG_ITMP3, 32 - iptr->sx.val.i));
755                         M_MOV(d, REG_ASR(REG_ITMP3, iptr->sx.val.i));
756                         /* this rounds towards nearest, not java style */
757                         /*M_MOV_S(d, REG_ASR(s1, iptr->sx.val.i));
758                         M_ADCMI_IMM(d, d, 0);*/
759                         emit_store_dst(jd, iptr, d);
760                         break;
761
762                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
763                                       /* sx.val.i = constant [ (2 ^ x) - 1 ]          */
764
765                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
766                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
767                         M_MOV_S(REG_ITMP1, s1);
768                         M_RSBMI_IMM(REG_ITMP1, REG_ITMP1, 0);
769                         if (IS_IMM(iptr->sx.val.i))
770                                 M_AND_IMM(REG_ITMP1, iptr->sx.val.i, d);
771                         else {
772                                 ICONST(REG_ITMP3, iptr->sx.val.i);
773                                 M_AND(REG_ITMP1, REG_ITMP3, d);
774                         }
775                         M_RSBMI_IMM(d, d, 0);
776                         emit_store_dst(jd, iptr, d);
777                         break;
778
779                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
780
781                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
782                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
783                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
784                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
785                         M_MOV(d, REG_LSL_REG(s1, REG_ITMP2));
786                         emit_store_dst(jd, iptr, d);
787                         break;
788
789                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
790
791                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
792                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
793                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
794                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
795                         M_MOV(d, REG_ASR_REG(s1, REG_ITMP2));
796                         emit_store_dst(jd, iptr, d);
797                         break;
798
799                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
800
801                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
802                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
803                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
804                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
805                         M_MOV(d, REG_LSR_REG(s1, REG_ITMP2));
806                         emit_store_dst(jd, iptr, d);
807                         break;
808
809                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
810                                       /* sx.val.i = constant                          */
811
812                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
813                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
814                         M_MOV(d, REG_LSL(s1, iptr->sx.val.i & 0x1f));
815                         emit_store_dst(jd, iptr, d);
816                         break;
817
818                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
819                                       /* sx.val.i = constant                          */
820
821                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
822                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
823                         /* we need to check for zero here because arm interprets it as SHR by 32 */
824                         if ((iptr->sx.val.i & 0x1f) == 0) {
825                                 M_INTMOVE(s1, d);
826                         } else {
827                                 M_MOV(d, REG_ASR(s1, iptr->sx.val.i & 0x1f));
828                         }
829                         emit_store_dst(jd, iptr, d);
830                         break;
831
832                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
833                                       /* sx.val.i = constant                          */
834
835                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
836                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
837                         /* we need to check for zero here because arm interprets it as SHR by 32 */
838                         if ((iptr->sx.val.i & 0x1f) == 0)
839                                 M_INTMOVE(s1, d);
840                         else
841                                 M_MOV(d, REG_LSR(s1, iptr->sx.val.i & 0x1f));
842                         emit_store_dst(jd, iptr, d);
843                         break;
844
845                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
846
847                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
848                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
849                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
850                         M_AND(s1, s2, d);
851                         emit_store_dst(jd, iptr, d);
852                         break;
853
854                 case ICMD_LAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
855
856                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
857                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
858                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
859                         M_AND(s1, s2, GET_LOW_REG(d));
860                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
861                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
862                         M_AND(s1, s2, GET_HIGH_REG(d));
863                         emit_store_dst(jd, iptr, d);
864                         break;
865
866                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
867
868                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
869                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
870                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
871                         M_ORR(s1, s2, d);
872                         emit_store_dst(jd, iptr, d);
873                         break;
874
875                 case ICMD_LOR:       /* ..., val1, val2  ==> ..., val1 | val2        */ 
876
877                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
878                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
879                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
880                         M_ORR(s1, s2, GET_LOW_REG(d));
881                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
882                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
883                         M_ORR(s1, s2, GET_HIGH_REG(d));
884                         emit_store_dst(jd, iptr, d);
885                         break;
886
887                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
888
889                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
890                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
891                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
892                         M_EOR(s1, s2, d);
893                         emit_store_dst(jd, iptr, d);
894                         break;
895
896                 case ICMD_LXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
897
898                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP3);
899                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP1);
900                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
901                         M_EOR(s1, s2, GET_LOW_REG(d));
902                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP3);
903                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
904                         M_EOR(s1, s2, GET_HIGH_REG(d));
905                         emit_store_dst(jd, iptr, d);
906                         break;
907
908
909         /* floating operations ************************************************/
910
911 #if !defined(ENABLE_SOFTFLOAT)
912
913                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
914
915                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
916                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
917                         M_MNFS(d, s1);
918                         emit_store_dst(jd, iptr, d);
919                         break;
920
921                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
922
923                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
924                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
925                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
926                         M_ADFS(d, s1, s2);
927                         emit_store_dst(jd, iptr, d);
928                         break;
929
930                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
931
932                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
933                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
934                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
935                         M_SUFS(d, s1, s2);
936                         emit_store_dst(jd, iptr, d);
937                         break;
938
939                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
940
941                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
942                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
943                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
944                         M_MUFS(d, s1, s2);
945                         emit_store_dst(jd, iptr, d);
946                         break;
947
948                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
949                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
950                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
951                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
952                         M_DVFS(d, s1, s2);
953                         emit_store_dst(jd, iptr, d);
954                         break;
955
956                 /* ATTENTION: Jave does not want IEEE behaviour in FREM, do
957                    not use this */
958
959                 case ICMD_FREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
960
961                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
962                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
963                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
964                         M_RMFS(d, s1, s2);
965                         emit_store_dst(jd, iptr, d);
966                         break;
967
968                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
969
970                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
971                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
972                         M_MNFD(d, s1);
973                         emit_store_dst(jd, iptr, d);
974                         break;
975
976                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
977
978                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
979                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
980                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
981                         M_ADFD(d, s1, s2);
982                         emit_store_dst(jd, iptr, d);
983                         break;
984
985                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
986
987                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
988                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
989                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
990                         M_SUFD(d, s1, s2);
991                         emit_store_dst(jd, iptr, d);
992                         break;
993
994                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
995
996                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
997                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
998                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
999                         M_MUFD(d, s1, s2);
1000                         emit_store_dst(jd, iptr, d);
1001                         break;
1002
1003                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1004
1005                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1006                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1007                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1008                         M_DVFD(d, s1, s2);
1009                         emit_store_dst(jd, iptr, d);
1010                         break;
1011
1012                 /* ATTENTION: Jave does not want IEEE behaviour in DREM, do
1013                    not use this */
1014
1015                 case ICMD_DREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1016
1017                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1018                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1019                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1020                         M_RMFD(d, s1, s2);
1021                         emit_store_dst(jd, iptr, d);
1022                         break;
1023
1024                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1025
1026                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1027                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1028                         M_FLTS(d, s1);
1029                         emit_store_dst(jd, iptr, d);
1030                         break;
1031
1032                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1033
1034                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1035                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1036                         M_FLTD(d, s1);
1037                         emit_store_dst(jd, iptr, d);
1038                         break;
1039
1040                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1041
1042                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1043                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1044                         /* this uses round towards zero, as Java likes it */
1045                         M_FIX(d, s1);
1046                         /* this checks for NaN; to return zero as Java likes it */
1047                         M_CMF(s1, 0x8);
1048                         M_MOVVS_IMM(0, d);
1049                         emit_store_dst(jd, iptr, d);
1050                         break;
1051
1052                 case ICMD_D2I:       /* ..., value  ==> ..., (int) value              */
1053
1054                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1055                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1056                         /* this uses round towards zero, as Java likes it */
1057                         M_FIX(d, s1);
1058                         /* this checks for NaN; to return zero as Java likes it */
1059                         M_CMF(s1, 0x8);
1060                         M_MOVVS_IMM(0, d);
1061                         emit_store_dst(jd, iptr, d);
1062                         break;
1063
1064                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1065
1066                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1067                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1068                         M_MVFS(d,s1);
1069                         emit_store_dst(jd, iptr, d);
1070                         break;
1071
1072                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1073
1074                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1075                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1076                         M_MVFD(d,s1);
1077                         emit_store_dst(jd, iptr, d);
1078                         break;
1079
1080                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1081
1082                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1083                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1084                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1085                         M_CMF(s2, s1);
1086                         M_MOV_IMM(d, 0);
1087                         M_SUBGT_IMM(d, d, 1);
1088                         M_ADDLT_IMM(d, d, 1);
1089                         emit_store_dst(jd, iptr, d);
1090                         break;
1091
1092                 case ICMD_DCMPG:      /* ..., val1, val2  ==> ..., val1 dcmpg val2    */
1093
1094                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1095                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1096                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1097                         M_CMF(s2, s1);
1098                         M_MOV_IMM(d, 0);
1099                         M_SUBGT_IMM(d, d, 1);
1100                         M_ADDLT_IMM(d, d, 1);
1101                         emit_store_dst(jd, iptr, d);
1102                         break;
1103
1104                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1105
1106                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1107                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1108                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1109                         M_CMF(s1, s2);
1110                         M_MOV_IMM(d, 0);
1111                         M_SUBLT_IMM(d, d, 1);
1112                         M_ADDGT_IMM(d, d, 1);
1113                         emit_store_dst(jd, iptr, d);
1114                         break;
1115
1116                 case ICMD_DCMPL:      /* ..., val1, val2  ==> ..., val1 dcmpl val2    */
1117
1118                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1119                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1120                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1121                         M_CMF(s1, s2);
1122                         M_MOV_IMM(d, 0);
1123                         M_SUBLT_IMM(d, d, 1);
1124                         M_ADDGT_IMM(d, d, 1);
1125                         emit_store_dst(jd, iptr, d);
1126                         break;
1127
1128 #endif /* !defined(ENABLE_SOFTFLOAT) */
1129
1130
1131                 /* memory operations **************************************************/
1132
1133                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1134
1135                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1136                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1137                         /* implicit null-pointer check */
1138                         M_ILD_INTERN(d, s1, OFFSET(java_arrayheader, size));
1139                         emit_store_dst(jd, iptr, d);
1140                         break;
1141
1142                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1143
1144                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1145                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1146                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1147                         /* implicit null-pointer check */
1148                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1149                         M_ADD(REG_ITMP1, s1, s2); /* REG_ITMP1 = s1 + 1 * s2 */
1150                         M_LDRSB(d, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1151                         emit_store_dst(jd, iptr, d);
1152                         break;
1153
1154                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1155
1156                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1157                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1158                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1159                         /* implicit null-pointer check */
1160                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1161                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1162                         M_LDRH(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1163                         emit_store_dst(jd, iptr, d);
1164                         break;
1165
1166                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1167
1168                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1169                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1170                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1171                         /* implicit null-pointer check */
1172                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1173                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1174                         M_LDRSH(d, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1175                         emit_store_dst(jd, iptr, d);
1176                         break;
1177
1178                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1179
1180                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1181                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1182                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1183                         /* implicit null-pointer check */
1184                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1185                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1186                         M_ILD_INTERN(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1187                         emit_store_dst(jd, iptr, d);
1188                         break;
1189
1190                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1191
1192                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1193                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1194                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1195                         /* implicit null-pointer check */
1196                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1197                         M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1198                         M_LLD_INTERN(d, REG_ITMP3, OFFSET(java_longarray, data[0]));
1199                         emit_store_dst(jd, iptr, d);
1200                         break;
1201
1202                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1203
1204                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1205                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1206                         /* implicit null-pointer check */
1207                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1208                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1209 #if !defined(ENABLE_SOFTFLOAT)
1210                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1211                         M_FLD_INTERN(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1212 #else
1213                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1214                         M_ILD_INTERN(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1215 #endif
1216                         emit_store_dst(jd, iptr, d);
1217                         break;
1218
1219                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1220
1221                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1222                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1223                         /* implicit null-pointer check */
1224                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1225                         M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1226 #if !defined(ENABLE_SOFTFLOAT)
1227                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1228                         M_DLD_INTERN(d, REG_ITMP3, OFFSET(java_doublearray, data[0]));
1229 #else
1230                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1231                         M_LLD_INTERN(d, REG_ITMP3, OFFSET(java_doublearray, data[0]));
1232 #endif
1233                         emit_store_dst(jd, iptr, d);
1234                         break;
1235
1236                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1237
1238                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1239                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1240                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1241                         /* implicit null-pointer check */
1242                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1243                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1244                         M_LDR_INTERN(d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1245                         emit_store_dst(jd, iptr, d);
1246                         break;
1247
1248                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1249
1250                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1251                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1252                         /* implicit null-pointer check */
1253                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1254                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1255                         M_ADD(REG_ITMP1, s1, s2); /* REG_ITMP1 = s1 + 1 * s2 */
1256                         M_STRB(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1257                         break;
1258
1259                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1260
1261                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1262                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1263                         /* implicit null-pointer check */
1264                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1265                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1266                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1267                         M_STRH(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1268                         break;
1269
1270                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1271
1272                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1273                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1274                         /* implicit null-pointer check */
1275                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1276                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1277                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 1)); /* REG_ITMP1 = s1 + 2 * s2 */
1278                         M_STRH(s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1279                         break;
1280
1281                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1282
1283                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1284                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1285                         /* implicit null-pointer check */
1286                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1287                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1288                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1289                         M_IST_INTERN(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1290                         break;
1291
1292                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1293
1294                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1295                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1296                         /* implicit null-pointer check */
1297                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1298                         M_ADD(REG_ITMP3, s1, REG_LSL(s2, 3)); /* REG_ITMP3 = s1 + 8 * s2 */
1299                         s3 = emit_load_s3(jd, iptr, REG_ITMP12_PACKED);
1300                         M_LST_INTERN(s3, REG_ITMP3, OFFSET(java_longarray, data[0]));
1301                         break;
1302
1303                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1304
1305                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1306                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1307                         /* implicit null-pointer check */
1308                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1309                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1310 #if !defined(ENABLE_SOFTFLOAT)
1311                         s3 = emit_load_s3(jd, iptr, REG_FTMP1);
1312                         M_FST_INTERN(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1313 #else
1314                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1315                         M_IST_INTERN(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1316 #endif
1317                         break;
1318
1319                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1320
1321                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1322                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1323                         /* implicit null-pointer check */
1324                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1325                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 3)); /* REG_ITMP1 = s1 + 8 * s2 */
1326 #if !defined(ENABLE_SOFTFLOAT)
1327                         s3 = emit_load_s3(jd, iptr, REG_FTMP1);
1328                         M_DST_INTERN(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1329 #else
1330                         s3 = emit_load_s3(jd, iptr, REG_ITMP23_PACKED);
1331                         M_LST_INTERN(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1332 #endif
1333                         break;
1334
1335                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1336
1337                         s1 = emit_load_s1(jd, iptr, REG_A0);
1338                         s2 = emit_load_s2(jd, iptr, REG_ITMP1);
1339                         s3 = emit_load_s3(jd, iptr, REG_A1);
1340
1341                         /* implicit null-pointer check */
1342                         emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
1343
1344                         /* move arguments to argument registers */
1345                         M_INTMOVE(s1, REG_A0);
1346                         M_INTMOVE(s3, REG_A1);
1347
1348                         /* call builtin function */
1349                         disp = dseg_add_functionptr(cd, BUILTIN_canstore);
1350                         M_DSEG_BRANCH(disp);
1351
1352                         /* recompute pv */
1353                         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
1354                         M_RECOMPUTE_PV(s1);
1355
1356                         /* check resturn value of builtin */
1357                         emit_exception_check(cd, iptr);
1358
1359                         /* finally store address into array */
1360                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1361                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1362                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1363                         M_ADD(REG_ITMP1, s1, REG_LSL(s2, 2)); /* REG_ITMP1 = s1 + 4 * s2 */
1364                         M_STR_INTERN(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1365                         break;
1366
1367                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
1368
1369                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1370                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1371
1372                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1373
1374                                 disp = dseg_add_unique_address(cd, NULL);
1375
1376                                 patcher_add_patch_ref(jd, PATCHER_get_putstatic, uf, disp);
1377
1378                                 if (opt_showdisassemble)
1379                                         M_NOP;
1380                         }
1381                         else {
1382                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1383
1384                                 fieldtype = fi->type;
1385
1386                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1387                                         patcher_add_patch_ref(jd, PATCHER_initialize_class,
1388                                                             fi->class, 0);
1389
1390                                         if (opt_showdisassemble)
1391                                                 M_NOP;
1392                                 }
1393
1394                                 disp = dseg_add_address(cd, &(fi->value));
1395                         }
1396
1397                         M_DSEG_LOAD(REG_ITMP3, disp);
1398                         switch (fieldtype) {
1399                         case TYPE_INT:
1400 #if defined(ENABLE_SOFTFLOAT)
1401                         case TYPE_FLT:
1402 #endif
1403                         case TYPE_ADR:
1404                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1405                                 M_ILD_INTERN(d, REG_ITMP3, 0);
1406                                 break;
1407                         case TYPE_LNG:
1408 #if defined(ENABLE_SOFTFLOAT)
1409                         case TYPE_DBL:
1410 #endif
1411                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1412                                 M_LLD_INTERN(d, REG_ITMP3, 0);
1413                                 break;
1414 #if !defined(ENABLE_SOFTFLOAT)
1415                         case TYPE_FLT:
1416                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1417                                 M_FLD_INTERN(d, REG_ITMP3, 0);
1418                                 break;
1419                         case TYPE_DBL:
1420                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1421                                 M_DLD_INTERN(d, REG_ITMP3, 0);
1422                                 break;
1423 #endif
1424                         default:
1425                                 assert(0);
1426                         }
1427                         emit_store_dst(jd, iptr, d);
1428                         break;
1429
1430                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
1431
1432                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1433                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1434
1435                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1436
1437                                 disp = dseg_add_unique_address(cd, NULL);
1438
1439                                 patcher_add_patch_ref(jd, PATCHER_get_putstatic, uf, disp);
1440
1441                                 if (opt_showdisassemble)
1442                                         M_NOP;
1443                         }
1444                         else {
1445                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1446
1447                                 fieldtype = fi->type;
1448
1449                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1450                                         patcher_add_patch_ref(jd, PATCHER_initialize_class,
1451                                                             fi->class, 0);
1452
1453                                         if (opt_showdisassemble)
1454                                                 M_NOP;
1455                                 }
1456
1457                                 disp = dseg_add_address(cd, &(fi->value));
1458                         }
1459
1460                         M_DSEG_LOAD(REG_ITMP3, disp);
1461                         switch (fieldtype) {
1462                         case TYPE_INT:
1463 #if defined(ENABLE_SOFTFLOAT)
1464                         case TYPE_FLT:
1465 #endif
1466                         case TYPE_ADR:
1467                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1468                                 M_IST_INTERN(s1, REG_ITMP3, 0);
1469                                 break;
1470                         case TYPE_LNG:
1471 #if defined(ENABLE_SOFTFLOAT)
1472                         case TYPE_DBL:
1473 #endif
1474                                 s1 = emit_load_s1(jd, iptr, REG_ITMP12_PACKED);
1475                                 M_LST_INTERN(s1, REG_ITMP3, 0);
1476                                 break;
1477 #if !defined(ENABLE_SOFTFLOAT)
1478                         case TYPE_FLT:
1479                                 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1480                                 M_FST_INTERN(s1, REG_ITMP3, 0);
1481                                 break;
1482                         case TYPE_DBL:
1483                                 s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1484                                 M_DST_INTERN(s1, REG_ITMP3, 0);
1485                                 break;
1486 #endif
1487                         default:
1488                                 assert(0);
1489                         }
1490                         break;
1491
1492                 case ICMD_GETFIELD:   /* ..., objectref, value  ==> ...               */
1493
1494                         s1 = emit_load_s1(jd, iptr, REG_ITMP3);
1495                         emit_nullpointer_check(cd, iptr, s1);
1496
1497
1498                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1499                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1500
1501                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1502                         }
1503                         else {
1504                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1505
1506                                 fieldtype = fi->type;
1507                                 disp      = fi->offset;
1508                         }
1509
1510 #if !defined(ENABLE_SOFTFLOAT)
1511                         /* HACK: softnull checks on floats */
1512                         if (!INSTRUCTION_MUST_CHECK(iptr) && IS_FLT_DBL_TYPE(fieldtype))
1513                                 emit_nullpointer_check_force(cd, iptr, s1);
1514 #endif
1515
1516                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1517                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1518
1519                                 patcher_add_patch_ref(jd, PATCHER_get_putfield, uf, 0);
1520
1521                                 if (opt_showdisassemble)
1522                                         M_NOP;
1523
1524                                 disp = 0;
1525                         }
1526
1527                         switch (fieldtype) {
1528                         case TYPE_INT:
1529 #if defined(ENABLE_SOFTFLOAT)
1530                         case TYPE_FLT:
1531 #endif
1532                         case TYPE_ADR:
1533                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1534                                 M_ILD(d, s1, disp);
1535                                 break;
1536                         case TYPE_LNG:
1537 #if defined(ENABLE_SOFTFLOAT)
1538                         case TYPE_DBL:
1539 #endif
1540                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP12_PACKED);
1541                                 M_LLD(d, s1, disp);
1542                                 break;
1543 #if !defined(ENABLE_SOFTFLOAT)
1544                         case TYPE_FLT:
1545                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1546                                 M_FLD(d, s1, disp);
1547                                 break;
1548                         case TYPE_DBL:
1549                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1550                                 M_DLD(d, s1, disp);
1551                                 break;
1552 #endif
1553                         default:
1554                                 assert(0);
1555                         }
1556                         emit_store_dst(jd, iptr, d);
1557                         break;
1558
1559                 case ICMD_PUTFIELD:   /* ..., objectref, value  ==> ...               */
1560
1561                         s1 = emit_load_s1(jd, iptr, REG_ITMP3);
1562                         emit_nullpointer_check(cd, iptr, s1);
1563
1564                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1565                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1566
1567                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1568                         }
1569                         else {
1570                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1571
1572                                 fieldtype = fi->type;
1573                                 disp      = fi->offset;
1574                         }
1575
1576 #if !defined(ENABLE_SOFTFLOAT)
1577                         /* HACK: softnull checks on floats */
1578                         if (!INSTRUCTION_MUST_CHECK(iptr) && IS_FLT_DBL_TYPE(fieldtype))
1579                                 emit_nullpointer_check_force(cd, iptr, s1);
1580 #endif
1581
1582                         switch (fieldtype) {
1583                         case TYPE_INT:
1584 #if defined(ENABLE_SOFTFLOAT)
1585                         case TYPE_FLT:
1586 #endif
1587                         case TYPE_ADR:
1588                                 s2 = emit_load_s2(jd, iptr, REG_ITMP1);
1589                                 break;
1590 #if defined(ENABLE_SOFTFLOAT)
1591                         case TYPE_DBL: /* fall through */
1592 #endif
1593                         case TYPE_LNG:
1594                                 s2 = emit_load_s2(jd, iptr, REG_ITMP12_PACKED);
1595                                 break;
1596 #if !defined(ENABLE_SOFTFLOAT)
1597                         case TYPE_FLT:
1598                         case TYPE_DBL:
1599                                 s2 = emit_load_s2(jd, iptr, REG_FTMP1);
1600                                 break;
1601 #endif
1602                         default:
1603                                 assert(0);
1604                         }
1605
1606                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1607                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1608
1609                                 patcher_add_patch_ref(jd, PATCHER_get_putfield, uf, 0);
1610
1611                                 if (opt_showdisassemble)
1612                                         M_NOP;
1613
1614                                 disp = 0;
1615                         }
1616
1617                         switch (fieldtype) {
1618                         case TYPE_INT:
1619 #if defined(ENABLE_SOFTFLOAT)
1620                         case TYPE_FLT:
1621 #endif
1622                         case TYPE_ADR:
1623                                 M_IST(s2, s1, disp);
1624                                 break;
1625                         case TYPE_LNG:
1626 #if defined(ENABLE_SOFTFLOAT)
1627                         case TYPE_DBL:
1628 #endif
1629                                 M_LST(s2, s1, disp);
1630                                 break;
1631 #if !defined(ENABLE_SOFTFLOAT)
1632                         case TYPE_FLT:
1633                                 M_FST(s2, s1, disp);
1634                                 break;
1635                         case TYPE_DBL:
1636                                 M_DST(s2, s1, disp);
1637                                 break;
1638 #endif
1639                         default:
1640                                 assert(0);
1641                         }
1642                         break;
1643
1644
1645                 /* branch operations **************************************************/
1646
1647                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
1648
1649                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1650                         M_INTMOVE(s1, REG_ITMP1_XPTR);
1651                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1652                                 patcher_add_patch_ref(jd, PATCHER_resolve_class,
1653                                                                         iptr->sx.s23.s2.uc, 0);
1654
1655                                 if (opt_showdisassemble)
1656                                         M_NOP;
1657                         }
1658                         disp = dseg_add_functionptr(cd, asm_handle_exception);
1659                         M_DSEG_LOAD(REG_ITMP3, disp);
1660                         M_MOV(REG_ITMP2_XPC, REG_PC);
1661                         M_MOV(REG_PC, REG_ITMP3);
1662                         M_NOP;              /* nop ensures that XPC is less than the end  */
1663                                             /* of basic block                             */
1664                         break;
1665
1666                 case ICMD_GOTO:         /* ... ==> ...                                */
1667                 case ICMD_RET:
1668
1669                         emit_br(cd, iptr->dst.block);
1670                         break;
1671
1672                 case ICMD_JSR:          /* ... ==> ...                                */
1673
1674                         emit_br(cd, iptr->sx.s23.s3.jsrtarget.block);
1675                         break;
1676                 
1677                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
1678                 case ICMD_IFNONNULL:
1679
1680                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1681                         M_TEQ_IMM(s1, 0);
1682                         emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IFNULL, BRANCH_OPT_NONE);
1683                         break;
1684
1685                 case ICMD_IFLT:         /* ..., value ==> ...                         */
1686                 case ICMD_IFLE:         /* op1 = target JavaVM pc, val.i = constant   */
1687                 case ICMD_IFGT:
1688                 case ICMD_IFGE:
1689                 case ICMD_IFEQ:
1690                 case ICMD_IFNE:
1691
1692                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1693                         M_COMPARE(s1, iptr->sx.val.i);
1694                         emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IFEQ, BRANCH_OPT_NONE);
1695                         break;
1696
1697                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
1698
1699                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1700                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1701                         if (iptr->sx.val.l == 0) {
1702                                 M_ORR_S(s1, s2, REG_ITMP3);
1703                         }
1704                         else {
1705                                 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1706                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1707                                 M_CMP(s1, REG_ITMP3);*/
1708                                 ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1709                                 M_CMPEQ(s2, REG_ITMP3);
1710                         }
1711                         emit_beq(cd, iptr->dst.block);
1712                         break;
1713
1714                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
1715
1716                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1717                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1718                         if (iptr->sx.val.l == 0) {
1719                                 /* if high word is less than zero, the whole long is too */
1720                                 M_CMP_IMM(s1, 0);
1721                                 emit_blt(cd, iptr->dst.block);
1722                         }
1723                         else {
1724                                 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1725                                 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1726                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1727                                 M_CMP(s1, REG_ITMP3);*/
1728                                 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1729                                 M_MOVGT_IMM(2, REG_ITMP1);
1730                                 M_MOVEQ_IMM(1, REG_ITMP1);
1731
1732                                 /* low compare: x=x-1(ifLO) */
1733                                 M_COMPARE(s2, (iptr->sx.val.l & 0xffffffff));
1734                                 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1735                                 M_CMP(s2, REG_ITMP3);*/
1736                                 M_SUBLO_IMM(REG_ITMP1, REG_ITMP1, 1);
1737
1738                                 /* branch if (x LT 1) */
1739                                 M_CMP_IMM(REG_ITMP1, 1);
1740                                 emit_blt(cd, iptr->dst.block);
1741                         }
1742                         break;
1743
1744                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
1745
1746                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1747                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1748                         if (iptr->sx.val.l == 0) {
1749                                 /* if high word is less than zero, the whole long is too  */
1750                                 M_CMP_IMM(s1, 0);
1751                                 emit_blt(cd, iptr->dst.block);
1752
1753                                 /* ... otherwise the low word has to be zero (tricky!) */
1754                                 M_CMPEQ_IMM(s2, 0);
1755                                 emit_beq(cd, iptr->dst.block);
1756                         }
1757                         else {
1758                                 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1759                                 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1760                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1761                                 M_CMP(s1, REG_ITMP3);*/
1762                                 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1763                                 M_MOVGT_IMM(2, REG_ITMP1);
1764                                 M_MOVEQ_IMM(1, REG_ITMP1);
1765
1766                                 /* low compare: x=x+1(ifHI) */
1767                                 M_COMPARE(s2, (iptr->sx.val.l & 0xffffffff));
1768                                 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1769                                 M_CMP(s2, REG_ITMP3);*/
1770                                 M_ADDHI_IMM(REG_ITMP1, REG_ITMP1, 1);
1771
1772                                 /* branch if (x LE 1) */
1773                                 M_CMP_IMM(REG_ITMP1, 1);
1774                                 emit_ble(cd, iptr->dst.block);
1775                         }
1776                         break;
1777
1778                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
1779
1780                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1781                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1782                         if (iptr->sx.val.l == 0) {
1783                                 /* if high word is greater or equal zero, the whole long is too */
1784                                 M_CMP_IMM(s1, 0);
1785                                 emit_bge(cd, iptr->dst.block);
1786                         }
1787                         else {
1788                                 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1789                                 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1790                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1791                                 M_CMP(s1, REG_ITMP3);*/
1792                                 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1793                                 M_MOVGT_IMM(2, REG_ITMP1);
1794                                 M_MOVEQ_IMM(1, REG_ITMP1);
1795
1796                                 /* low compare: x=x-1(ifLO) */
1797                                 M_COMPARE(s2, (iptr->sx.val.l & 0xffffffff));
1798                                 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1799                                 M_CMP(s2, REG_ITMP3);*/
1800                                 M_SUBLO_IMM(REG_ITMP1, REG_ITMP1, 1);
1801
1802                                 /* branch if (x GE 1) */
1803                                 M_CMP_IMM(REG_ITMP1, 1);
1804                                 emit_bge(cd, iptr->dst.block);
1805                         }
1806                         break;
1807
1808                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
1809
1810                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1811                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1812 #if 0
1813                         if (iptr->sx.val.l == 0) {
1814                                 /* if high word is greater than zero, the whole long is too */
1815                                 M_CMP_IMM(s1, 0);
1816                                 M_BGT(0);
1817                                 codegen_add_branch_ref(cd, iptr->dst.block);
1818
1819                                 /* ... or high was zero and low is non zero (tricky!) */
1820                                 M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1821                                 M_MOVLT_IMM(1, REG_ITMP3);
1822                                 M_ORR_S(REG_ITMP3, s2, REG_ITMP3);
1823                                 M_BNE(0);
1824                                 codegen_add_branch_ref(cd, iptr->dst.block);
1825                         }
1826                         else {
1827 #endif
1828                                 /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1829                                 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1830                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1831                                 M_CMP(s1, REG_ITMP3);*/
1832                                 M_EOR(REG_ITMP1, REG_ITMP1, REG_ITMP1);
1833                                 M_MOVGT_IMM(2, REG_ITMP1);
1834                                 M_MOVEQ_IMM(1, REG_ITMP1);
1835
1836                                 /* low compare: x=x+1(ifHI) */
1837                                 M_COMPARE(s2, (iptr->sx.val.l & 0xffffffff));
1838                                 /*ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1839                                 M_CMP(s2, REG_ITMP3);*/
1840                                 M_ADDHI_IMM(REG_ITMP1, REG_ITMP1, 1);
1841
1842                                 /* branch if (x GT 1) */
1843                                 M_CMP_IMM(REG_ITMP1, 1);
1844                                 emit_bgt(cd, iptr->dst.block);
1845 #if 0
1846                         }
1847 #endif
1848                         break;
1849
1850                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
1851
1852                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1853                         s2 = emit_load_s1_low(jd, iptr, REG_ITMP2);
1854                         if (iptr->sx.val.l == 0) {
1855                                 M_ORR_S(s1, s2, REG_ITMP3);
1856                         }
1857                         else {
1858                                 M_COMPARE(s1, (iptr->sx.val.l >> 32));
1859                                 /*ICONST(REG_ITMP3, iptr->sx.val.l >> 32);
1860                                 M_CMP(s1, REG_ITMP3);*/
1861                                 ICONST(REG_ITMP3, iptr->sx.val.l & 0xffffffff);
1862                                 M_CMPEQ(s2, REG_ITMP3);
1863                         }
1864                         emit_bne(cd, iptr->dst.block);
1865                         break;
1866                         
1867                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
1868                 case ICMD_IF_ICMPNE:
1869                 case ICMD_IF_ICMPLT:
1870                 case ICMD_IF_ICMPLE:
1871                 case ICMD_IF_ICMPGT:
1872                 case ICMD_IF_ICMPGE:
1873
1874                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1875                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1876                         M_CMP(s1, s2);
1877                         emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IF_ICMPEQ, BRANCH_OPT_NONE);
1878                         break;
1879
1880                 case ICMD_IF_ACMPEQ:    /* ..., value, value ==> ...                  */
1881                 case ICMD_IF_ACMPNE:
1882
1883                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1884                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1885                         M_CMP(s1, s2);
1886                         emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IF_ACMPEQ, BRANCH_OPT_NONE);
1887                         break;
1888
1889                 case ICMD_IF_LCMPEQ:    /* ..., value, value ==> ...                  */
1890                                         /* op1 = target JavaVM pc                     */
1891
1892                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1893                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1894                         M_CMP(s1, s2);
1895
1896                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1897                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1898                         M_CMPEQ(s1, s2);
1899
1900                         emit_beq(cd, iptr->dst.block);
1901                         break;
1902
1903                 case ICMD_IF_LCMPNE:    /* ..., value, value ==> ...                  */
1904                                         /* op1 = target JavaVM pc                     */
1905
1906                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1907                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1908                         M_CMP(s1, s2);
1909
1910                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1911                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1912                         M_CMPEQ(s1, s2);
1913
1914                         emit_bne(cd, iptr->dst.block);
1915                         break;
1916
1917                 case ICMD_IF_LCMPLT:    /* ..., value, value ==> ...                  */
1918                                         /* op1 = target JavaVM pc                     */
1919
1920                         /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1921                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1922                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1923                         M_CMP(s1, s2);
1924                         M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1925                         M_MOVGT_IMM(2, REG_ITMP3);
1926                         M_MOVEQ_IMM(1, REG_ITMP3);
1927
1928                         /* low compare: x=x-1(ifLO) */
1929                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1930                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1931                         M_CMP(s1, s2);
1932                         M_SUBLO_IMM(REG_ITMP3, REG_ITMP3, 1);
1933
1934                         /* branch if (x LT 1) */
1935                         M_CMP_IMM(REG_ITMP3, 1);
1936                         emit_blt(cd, iptr->dst.block);
1937                         break;
1938
1939                 case ICMD_IF_LCMPLE:    /* ..., value, value ==> ...                  */
1940                                         /* op1 = target JavaVM pc                     */
1941
1942                         /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1943                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1944                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1945                         M_CMP(s1, s2);
1946                         M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1947                         M_MOVGT_IMM(2, REG_ITMP3);
1948                         M_MOVEQ_IMM(1, REG_ITMP3);
1949
1950                         /* low compare: x=x-1(ifLO) */
1951                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1952                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1953                         M_CMP(s1, s2);
1954                         M_ADDHI_IMM(REG_ITMP3, REG_ITMP3, 1);
1955
1956                         /* branch if (x LE 1) */
1957                         M_CMP_IMM(REG_ITMP3, 1);
1958                         emit_ble(cd, iptr->dst.block);
1959                         break;
1960
1961                 case ICMD_IF_LCMPGT:    /* ..., value, value ==> ...                  */
1962                                         /* op1 = target JavaVM pc                     */
1963
1964                         /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1965                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1966                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1967                         M_CMP(s1, s2);
1968                         M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1969                         M_MOVGT_IMM(2, REG_ITMP3);
1970                         M_MOVEQ_IMM(1, REG_ITMP3);
1971
1972                         /* low compare: x=x-1(ifLO) */
1973                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1974                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1975                         M_CMP(s1, s2);
1976                         M_ADDHI_IMM(REG_ITMP3, REG_ITMP3, 1);
1977
1978                         /* branch if (x GT 1) */
1979                         M_CMP_IMM(REG_ITMP3, 1);
1980                         emit_bgt(cd, iptr->dst.block);
1981                         break;
1982
1983                 case ICMD_IF_LCMPGE:    /* ..., value, value ==> ...                  */
1984                                         /* op1 = target JavaVM pc                     */
1985
1986                         /* high compare: x=0(ifLT) ; x=1(ifEQ) ; x=2(ifGT) */
1987                         s1 = emit_load_s1_high(jd, iptr, REG_ITMP1);
1988                         s2 = emit_load_s2_high(jd, iptr, REG_ITMP2);
1989                         M_CMP(s1, s2);
1990                         M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
1991                         M_MOVGT_IMM(2, REG_ITMP3);
1992                         M_MOVEQ_IMM(1, REG_ITMP3);
1993
1994                         /* low compare: x=x-1(ifLO) */
1995                         s1 = emit_load_s1_low(jd, iptr, REG_ITMP1);
1996                         s2 = emit_load_s2_low(jd, iptr, REG_ITMP2);
1997                         M_CMP(s1, s2);
1998                         M_SUBLO_IMM(REG_ITMP3, REG_ITMP3, 1);
1999
2000                         /* branch if (x GE 1) */
2001                         M_CMP_IMM(REG_ITMP3, 1);
2002                         emit_bge(cd, iptr->dst.block);
2003                         break;
2004
2005                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2006                         {
2007                         s4 i, l;
2008                         branch_target_t *table;
2009
2010                         table = iptr->dst.table;
2011
2012                         l = iptr->sx.s23.s2.tablelow;
2013                         i = iptr->sx.s23.s3.tablehigh;
2014
2015                         /* calculate new index (index - low) */
2016                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2017                         if (l  == 0) {
2018                                 M_INTMOVE(s1, REG_ITMP1);
2019                         } else if (IS_IMM(l)) {
2020                                 M_SUB_IMM(REG_ITMP1, s1, l);
2021                         } else {
2022                                 ICONST(REG_ITMP2, l);
2023                                 M_SUB(REG_ITMP1, s1, REG_ITMP2);
2024                         }
2025
2026                         /* range check (index <= high-low) */
2027                         i = i - l + 1;
2028                         M_COMPARE(REG_ITMP1, i-1);
2029                         emit_bugt(cd, table[0].block);
2030
2031                         /* build jump table top down and use address of lowest entry */
2032
2033                         table += i;
2034
2035                         while (--i >= 0) {
2036                                 dseg_add_target(cd, table->block);
2037                                 --table;
2038                         }
2039                         }
2040
2041                         /* length of dataseg after last dseg_add_target is used by load */
2042                         /* TODO: this loads from data-segment */
2043                         M_ADD(REG_ITMP2, REG_PV, REG_LSL(REG_ITMP1, 2));
2044                         M_LDR(REG_PC, REG_ITMP2, -(cd->dseglen));
2045                         break;
2046
2047                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2048                         {
2049                         s4 i;
2050                         lookup_target_t *lookup;
2051
2052                         lookup = iptr->dst.lookup;
2053
2054                         i = iptr->sx.s23.s2.lookupcount;
2055                         
2056                         /* compare keys */
2057                         MCODECHECK((i<<2)+8);
2058                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2059
2060                         while (--i >= 0) {
2061                                 M_COMPARE(s1, lookup->value);
2062                                 emit_beq(cd, lookup->target.block);
2063                                 lookup++;
2064                         }
2065
2066                         /* default branch */
2067                         emit_br(cd, iptr->sx.s23.s3.lookupdefault.block);
2068                         }
2069                         break;
2070
2071                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2072
2073 #if !defined(ENABLE_SOFTFLOAT)
2074                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
2075                         M_CAST_FLT_TO_INT_TYPED(VAROP(iptr->s1)->type, s1, REG_RESULT);
2076                         goto ICMD_RETURN_do;
2077 #endif
2078
2079                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2080
2081                         s1 = emit_load_s1(jd, iptr, REG_RESULT);
2082                         M_INTMOVE(s1, REG_RESULT);
2083                         goto ICMD_RETURN_do;
2084
2085                 case ICMD_DRETURN:      /* ..., retvalue ==> ...                      */
2086
2087 #if !defined(ENABLE_SOFTFLOAT)
2088                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
2089                         M_CAST_FLT_TO_INT_TYPED(VAROP(iptr->s1)->type, s1, REG_RESULT_PACKED);
2090                         goto ICMD_RETURN_do;
2091 #endif
2092
2093                 case ICMD_LRETURN:      /* ..., retvalue ==> ...                      */
2094
2095                         s1 = emit_load_s1(jd, iptr, REG_RESULT_PACKED);
2096                         M_LNGMOVE(s1, REG_RESULT_PACKED);
2097                         goto ICMD_RETURN_do;
2098
2099                 case ICMD_ARETURN:      /* ..., retvalue ==> ...                      */
2100
2101                         s1 = emit_load_s1(jd, iptr, REG_RESULT);
2102                         M_INTMOVE(s1, REG_RESULT);
2103                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2104                                 patcher_add_patch_ref(jd, PATCHER_resolve_class,
2105                                                                         iptr->sx.s23.s2.uc, 0);
2106
2107                                 if (opt_showdisassemble)
2108                                         M_NOP;
2109                         }
2110                         goto ICMD_RETURN_do;
2111
2112                 case ICMD_RETURN:       /* ...  ==> ...                               */
2113                         ICMD_RETURN_do:
2114
2115 #if !defined(NDEBUG)
2116                         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
2117                                 emit_verbosecall_exit(jd);
2118 #endif
2119
2120 #if defined(ENABLE_THREADS)
2121                         /* call monitorexit function */
2122
2123                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2124                                 /* stack offset for monitor argument */
2125
2126                                 s1 = rd->memuse * 8;
2127
2128                                 /* we need to save the proper return value */
2129
2130                                 switch (iptr->opc) {
2131                                 case ICMD_IRETURN:
2132                                 case ICMD_ARETURN:
2133                                 case ICMD_LRETURN:
2134                                 case ICMD_FRETURN: /* XXX TWISTI: is that correct? */
2135                                 case ICMD_DRETURN:
2136                                         M_STMFD(BITMASK_RESULT, REG_SP);
2137                                         s1 += 2 * 4;
2138                                         break;
2139                                 }
2140
2141                                 M_LDR(REG_A0, REG_SP, s1);
2142                                 disp = dseg_add_functionptr(cd, LOCK_monitor_exit);
2143                                 M_DSEG_BRANCH(disp);
2144
2145                                 /* we no longer need PV here, no more loading */
2146                                 /*s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2147                                 M_RECOMPUTE_PV(s1);*/
2148
2149                                 switch (iptr->opc) {
2150                                 case ICMD_IRETURN:
2151                                 case ICMD_ARETURN:
2152                                 case ICMD_LRETURN:
2153                                 case ICMD_FRETURN: /* XXX TWISTI: is that correct? */
2154                                 case ICMD_DRETURN:
2155                                         M_LDMFD(BITMASK_RESULT, REG_SP);
2156                                         break;
2157                                 }
2158                         }
2159 #endif
2160
2161                         /* deallocate stackframe for spilled variables */
2162
2163                         if ((cd->stackframesize / 4 - savedregs_num) > 0)
2164                                 M_ADD_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize / 4 - savedregs_num);
2165
2166                         /* restore callee saved registers + do return */
2167
2168                         if (savedregs_bitmask) {
2169                                 if (!jd->isleafmethod) {
2170                                         savedregs_bitmask &= ~(1<<REG_LR);
2171                                         savedregs_bitmask |= (1<<REG_PC);
2172                                 }
2173                                 M_LDMFD(savedregs_bitmask, REG_SP);
2174                         }
2175
2176                         /* if LR was not on stack, we need to return manually */
2177
2178                         if (jd->isleafmethod)
2179                                 M_MOV(REG_PC, REG_LR);
2180                         break;
2181
2182                 case ICMD_BUILTIN:      /* ..., arg1, arg2, arg3 ==> ...              */
2183
2184                         bte = iptr->sx.s23.s3.bte;
2185                         md  = bte->md;
2186                         goto ICMD_INVOKE_do;
2187
2188                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
2189                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2190                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
2191                 case ICMD_INVOKEINTERFACE:
2192
2193                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2194                                 lm = NULL;
2195                                 um = iptr->sx.s23.s3.um;
2196                                 md = um->methodref->parseddesc.md;
2197                         }
2198                         else {
2199                                 lm = iptr->sx.s23.s3.fmiref->p.method;
2200                                 um = NULL;
2201                                 md = lm->parseddesc;
2202                         }
2203
2204                 ICMD_INVOKE_do:
2205                         /* copy arguments to registers or stack location */
2206
2207                         s3 = md->paramcount;
2208
2209                         MCODECHECK((s3 << 1) + 64);
2210
2211                         for (s3 = s3 - 1; s3 >= 0; s3--) {
2212                                 var = VAR(iptr->sx.s23.s2.args[s3]);
2213                                 d   = md->params[s3].regoff;
2214
2215                                 if (var->flags & PREALLOC) /* argument was precolored? */
2216                                         continue;
2217
2218                                 /* TODO: document me */
2219 #if !defined(ENABLE_SOFTFLOAT)
2220                                 if (IS_INT_LNG_TYPE(var->type)) {
2221 #endif /* !defined(ENABLE_SOFTFLOAT) */
2222                                         if (!md->params[s3].inmemory) {
2223                                                 s1 = emit_load(jd, iptr, var, d);
2224
2225                                                 if (IS_2_WORD_TYPE(var->type))
2226                                                         M_LNGMOVE(s1, d);
2227                                                 else
2228                                                         M_INTMOVE(s1, d);
2229                                         }
2230                                         else {
2231                                                 if (IS_2_WORD_TYPE(var->type)) {
2232                                                         s1 = emit_load(jd, iptr, var, REG_ITMP12_PACKED);
2233                                                         M_LST(s1, REG_SP, d);
2234                                                 }
2235                                                 else {
2236                                                         s1 = emit_load(jd, iptr, var, REG_ITMP1);
2237                                                         M_IST(s1, REG_SP, d);
2238                                                 }
2239                                         }
2240 #if !defined(ENABLE_SOFTFLOAT)
2241                                 }
2242                                 else {
2243                                         if (!md->params[s3].inmemory) {
2244                                                 s1 = emit_load(jd, iptr, var, REG_FTMP1);
2245                                                 M_CAST_FLT_TO_INT_TYPED(var->type, s1, d);
2246                                         }
2247                                         else {
2248                                                 s1 = emit_load(jd, iptr, var, REG_FTMP1);
2249                                                 if (IS_2_WORD_TYPE(var->type))
2250                                                         M_DST(s1, REG_SP, d);
2251                                                 else
2252                                                         M_FST(s1, REG_SP, d);
2253                                         }
2254                                 }
2255 #endif /* !defined(ENABLE_SOFTFLOAT) */
2256                         }
2257
2258                         switch (iptr->opc) {
2259                         case ICMD_BUILTIN:
2260                                 disp = dseg_add_functionptr(cd, bte->fp);
2261
2262                                 M_DSEG_LOAD(REG_PV, disp); /* pointer to built-in-function */
2263
2264                                 /* generate the actual call */
2265
2266                                 M_MOV(REG_LR, REG_PC);
2267                                 M_MOV(REG_PC, REG_PV);
2268                                 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2269                                 M_RECOMPUTE_PV(s1);
2270
2271                                 emit_exception_check(cd, iptr);
2272                                 break;
2273
2274                         case ICMD_INVOKESPECIAL:
2275                                 emit_nullpointer_check(cd, iptr, REG_A0);
2276                                 /* fall through */
2277
2278                         case ICMD_INVOKESTATIC:
2279                                 if (lm == NULL) {
2280                                         disp = dseg_add_unique_address(cd, NULL);
2281
2282                                         patcher_add_patch_ref(jd, PATCHER_invokestatic_special,
2283                                                                                 um, disp);
2284
2285                                         if (opt_showdisassemble)
2286                                                 M_NOP;
2287                                 }
2288                                 else
2289                                         disp = dseg_add_address(cd, lm->stubroutine);
2290
2291                                 M_DSEG_LOAD(REG_PV, disp);            /* Pointer to method */
2292
2293                                 /* generate the actual call */
2294
2295                                 M_MOV(REG_LR, REG_PC);
2296                                 M_MOV(REG_PC, REG_PV);
2297                                 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2298                                 M_RECOMPUTE_PV(s1);
2299                                 break;
2300
2301                         case ICMD_INVOKEVIRTUAL:
2302                                 if (lm == NULL) {
2303                                         patcher_add_patch_ref(jd, PATCHER_invokevirtual, um, 0);
2304
2305                                         if (opt_showdisassemble)
2306                                                 M_NOP;
2307
2308                                         s1 = 0;
2309                                 }
2310                                 else
2311                                         s1 = OFFSET(vftbl_t, table[0]) +
2312                                                 sizeof(methodptr) * lm->vftblindex;
2313
2314                                 /* implicit null-pointer check */
2315                                 M_LDR_INTERN(REG_METHODPTR, REG_A0,
2316                                                          OFFSET(java_objectheader, vftbl));
2317                                 M_LDR_INTERN(REG_PV, REG_METHODPTR, s1);
2318
2319                                 /* generate the actual call */
2320
2321                                 M_MOV(REG_LR, REG_PC);
2322                                 M_MOV(REG_PC, REG_PV);
2323                                 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2324                                 M_RECOMPUTE_PV(s1);
2325                                 break;
2326
2327                         case ICMD_INVOKEINTERFACE:
2328                                 if (lm == NULL) {
2329                                         patcher_add_patch_ref(jd, PATCHER_invokeinterface, um, 0);
2330
2331                                         if (opt_showdisassemble)
2332                                                 M_NOP;
2333
2334                                         s1 = 0;
2335                                         s2 = 0;
2336                                 }
2337                                 else {
2338                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
2339                                                 sizeof(methodptr*) * lm->class->index;
2340                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
2341                                 }
2342
2343                                 /* implicit null-pointer check */
2344                                 M_LDR_INTERN(REG_METHODPTR, REG_A0,
2345                                                          OFFSET(java_objectheader, vftbl));
2346                                 M_LDR_INTERN(REG_METHODPTR, REG_METHODPTR, s1);
2347                                 M_LDR_INTERN(REG_PV, REG_METHODPTR, s2);
2348
2349                                 /* generate the actual call */
2350
2351                                 M_MOV(REG_LR, REG_PC);
2352                                 M_MOV(REG_PC, REG_PV);
2353                                 s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2354                                 M_RECOMPUTE_PV(s1);
2355                                 break;
2356                         }
2357
2358                         /* store return value */
2359
2360                         d = md->returntype.type;
2361
2362 #if !defined(__SOFTFP__)
2363                         /* TODO: this is only a hack, since we use R0/R1 for float
2364                            return!  this depends on gcc; it is independent from
2365                            our ENABLE_SOFTFLOAT define */
2366                         if (iptr->opc == ICMD_BUILTIN && d != TYPE_VOID && IS_FLT_DBL_TYPE(d)) {
2367 #if 0 && !defined(NDEBUG)
2368                                 dolog("BUILTIN that returns float or double (%s.%s)", m->class->name->text, m->name->text);
2369 #endif
2370                                 /* we cannot use this macro, since it is not defined
2371                                    in ENABLE_SOFTFLOAT M_CAST_FLT_TO_INT_TYPED(d,
2372                                    REG_FRESULT, REG_RESULT_TYPED(d)); */
2373                                 if (IS_2_WORD_TYPE(d)) {
2374                                         DCD(0xed2d8102); /* stfd    f0, [sp, #-8]! */
2375                                         M_LDRD_UPDATE(REG_RESULT_PACKED, REG_SP, 8);
2376                                 } else {
2377                                         DCD(0xed2d0101); /* stfs    f0, [sp, #-4]!*/
2378                                         M_LDR_UPDATE(REG_RESULT, REG_SP, 4);
2379                                 }
2380                         }
2381 #endif
2382
2383                         if (d != TYPE_VOID) {
2384 #if !defined(ENABLE_SOFTFLOAT)
2385                                 if (IS_INT_LNG_TYPE(d)) {
2386 #endif /* !defined(ENABLE_SOFTFLOAT) */
2387                                         if (IS_2_WORD_TYPE(d)) {
2388                                                 s1 = codegen_reg_of_dst(jd, iptr, REG_RESULT_PACKED);
2389                                                 M_LNGMOVE(REG_RESULT_PACKED, s1);
2390                                         }
2391                                         else {
2392                                                 s1 = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2393                                                 M_INTMOVE(REG_RESULT, s1);
2394                                         }
2395
2396 #if !defined(ENABLE_SOFTFLOAT)
2397                                 } else {
2398                                         s1 = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
2399                                         M_CAST_INT_TO_FLT_TYPED(VAROP(iptr->dst)->type, REG_RESULT_TYPED(VAROP(iptr->dst)->type), s1);
2400                                 }
2401 #endif /* !defined(ENABLE_SOFTFLOAT) */
2402
2403                                 emit_store_dst(jd, iptr, s1);
2404                         }
2405                         break;
2406
2407                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
2408
2409                         if (!(iptr->flags.bits & INS_FLAG_ARRAY)) {
2410                                 /* object type cast-check */
2411
2412                         classinfo *super;
2413                         s4         superindex;
2414
2415                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2416                                 super      = NULL;
2417                                 superindex = 0;
2418                         }
2419                         else {
2420                                 super      = iptr->sx.s23.s3.c.cls;
2421                                 superindex = super->index;
2422                         }
2423
2424                                 if ((super == NULL) || !(super->flags & ACC_INTERFACE))
2425                                         CODEGEN_CRITICAL_SECTION_NEW;
2426
2427                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2428
2429                         /* if class is not resolved, check which code to call */
2430
2431                         if (super == NULL) {
2432                                 M_TST(s1, s1);
2433                                 emit_label_beq(cd, BRANCH_LABEL_1);
2434
2435                                 disp = dseg_add_unique_s4(cd, 0); /* super->flags */
2436                                 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_flags,
2437                                                     iptr->sx.s23.s3.c.ref, disp);
2438
2439                                 if (opt_showdisassemble)
2440                                         M_NOP;
2441
2442                                 M_DSEG_LOAD(REG_ITMP2, disp);
2443                                 disp = dseg_add_s4(cd, ACC_INTERFACE);
2444                                 M_DSEG_LOAD(REG_ITMP3, disp);
2445                                 M_TST(REG_ITMP2, REG_ITMP3);
2446                                 emit_label_beq(cd, BRANCH_LABEL_2);
2447                         }
2448
2449                         /* interface checkcast code */
2450
2451                         if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
2452                                 if ((super == NULL) || !IS_IMM(superindex)) {
2453                                         disp = dseg_add_unique_s4(cd, superindex);
2454                                 }
2455                                 if (super == NULL) {
2456                                         patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_index,
2457                                                             iptr->sx.s23.s3.c.ref, disp);
2458
2459                                         if (opt_showdisassemble)
2460                                                 M_NOP;
2461                                 }
2462                                 else {
2463                                         M_TST(s1, s1);
2464                                         emit_label_beq(cd, BRANCH_LABEL_3);
2465                                 }
2466
2467                                 M_LDR_INTERN(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2468                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
2469
2470                                 /* we put unresolved or non-immediate superindices onto dseg */
2471                                 if ((super == NULL) || !IS_IMM(superindex)) {
2472                                         /* disp was computed before we added the patcher */
2473                                         M_DSEG_LOAD(REG_ITMP2, disp);
2474                                         M_CMP(REG_ITMP3, REG_ITMP2);
2475                                 } else {
2476                                         assert(IS_IMM(superindex));
2477                                         M_CMP_IMM(REG_ITMP3, superindex);
2478                                 }
2479
2480                                 emit_classcast_check(cd, iptr, BRANCH_LE, REG_ITMP3, s1);
2481
2482                                 /* if we loaded the superindex out of the dseg above, we do
2483                                    things differently here! */
2484                                 if ((super == NULL) || !IS_IMM(superindex)) {
2485
2486                                         M_LDR_INTERN(REG_ITMP3, s1, OFFSET(java_objectheader, vftbl));
2487
2488                                         /* this assumes something */
2489                                         assert(OFFSET(vftbl_t, interfacetable[0]) == 0);
2490
2491                                         /* this does: REG_ITMP3 - superindex * sizeof(methodptr*) */
2492                                         assert(sizeof(methodptr*) == 4);
2493                                         M_SUB(REG_ITMP2, REG_ITMP3, REG_LSL(REG_ITMP2, 2));
2494
2495                                         s2 = 0;
2496
2497                                 } else {
2498
2499                                         s2 = OFFSET(vftbl_t, interfacetable[0]) -
2500                                                                 superindex * sizeof(methodptr*);
2501
2502                                 }
2503
2504                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP2, s2);
2505                                 M_TST(REG_ITMP3, REG_ITMP3);
2506                                 emit_classcast_check(cd, iptr, BRANCH_EQ, REG_ITMP3, s1);
2507
2508                                 if (super == NULL)
2509                                         emit_label_br(cd, BRANCH_LABEL_4);
2510                                 else
2511                                         emit_label(cd, BRANCH_LABEL_3);
2512                         }
2513
2514                         /* class checkcast code */
2515
2516                         if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
2517                                 if (super == NULL) {
2518                                         emit_label(cd, BRANCH_LABEL_2);
2519
2520                                         disp = dseg_add_unique_address(cd, NULL);
2521
2522                                         patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_vftbl,
2523                                                             iptr->sx.s23.s3.c.ref,
2524                                                                                 disp);
2525
2526                                         if (opt_showdisassemble)
2527                                                 M_NOP;
2528                                 }
2529                                 else {
2530                                         disp = dseg_add_address(cd, super->vftbl);
2531
2532                                         M_TST(s1, s1);
2533                                         emit_label_beq(cd, BRANCH_LABEL_5);
2534                                 }
2535
2536                                 M_LDR_INTERN(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2537                                 M_DSEG_LOAD(REG_ITMP3, disp);
2538
2539                                 CODEGEN_CRITICAL_SECTION_START;
2540
2541                                 M_LDR_INTERN(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
2542                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, baseval));
2543                                 M_SUB(REG_ITMP2, REG_ITMP2, REG_ITMP3);
2544                                 M_DSEG_LOAD(REG_ITMP3, disp);
2545                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval));
2546
2547                                 CODEGEN_CRITICAL_SECTION_END;
2548
2549                                 M_CMP(REG_ITMP2, REG_ITMP3);
2550                                 emit_classcast_check(cd, iptr, BRANCH_UGT, 0, s1);
2551
2552                                 if (super != NULL)
2553                                         emit_label(cd, BRANCH_LABEL_5);
2554                         }
2555
2556                         if (super == NULL) {
2557                                 emit_label(cd, BRANCH_LABEL_1);
2558                                 emit_label(cd, BRANCH_LABEL_4);
2559                         }
2560
2561                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
2562                         }
2563                         else {
2564                                 /* array type cast-check */
2565
2566                                 s1 = emit_load_s1(jd, iptr, REG_A0);
2567                                 M_INTMOVE(s1, REG_A0);
2568
2569                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2570                                         disp = dseg_add_unique_address(cd, NULL);
2571
2572                                         patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_classinfo,
2573                                                                                 iptr->sx.s23.s3.c.ref,
2574                                                                                 disp);
2575
2576                                         if (opt_showdisassemble)
2577                                                 M_NOP;
2578                                 }
2579                                 else
2580                                         disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2581
2582                                 M_DSEG_LOAD(REG_A1, disp);
2583                                 disp = dseg_add_functionptr(cd, BUILTIN_arraycheckcast);
2584                                 M_DSEG_BRANCH(disp);
2585
2586                                 /* recompute pv */
2587                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2588                                 M_RECOMPUTE_PV(disp);
2589
2590                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2591                                 M_TST(REG_RESULT, REG_RESULT);
2592                                 emit_classcast_check(cd, iptr, BRANCH_EQ, REG_RESULT, s1);
2593
2594                                 d = codegen_reg_of_dst(jd, iptr, s1);
2595                         }
2596
2597                         M_INTMOVE(s1, d);
2598                         emit_store_dst(jd, iptr, d);
2599                         break;
2600
2601                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
2602
2603                         {
2604                         classinfo *super;
2605                         s4         superindex;
2606
2607                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2608                                 super      = NULL;
2609                                 superindex = 0;
2610                         }
2611                         else {
2612                                 super      = iptr->sx.s23.s3.c.cls;
2613                                 superindex = super->index;
2614                         }
2615
2616                         if ((super == NULL) || !(super->flags & ACC_INTERFACE))
2617                                 CODEGEN_CRITICAL_SECTION_NEW;
2618
2619                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2620                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
2621
2622                         if (s1 == d) {
2623                                 M_MOV(REG_ITMP1, s1);
2624                                 s1 = REG_ITMP1;
2625                         }
2626
2627                         /* if class is not resolved, check which code to call */
2628
2629                         if (super == NULL) {
2630                                 M_EOR(d, d, d);
2631
2632                                 M_TST(s1, s1);
2633                                 emit_label_beq(cd, BRANCH_LABEL_1);
2634
2635                                 disp = dseg_add_unique_s4(cd, 0); /* super->flags */
2636                                 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_flags,
2637                                                     iptr->sx.s23.s3.c.ref, disp);
2638
2639                                 if (opt_showdisassemble)
2640                                         M_NOP;
2641
2642                                 M_DSEG_LOAD(REG_ITMP2, disp);
2643                                 disp = dseg_add_s4(cd, ACC_INTERFACE);
2644                                 M_DSEG_LOAD(REG_ITMP3, disp);
2645                                 M_TST(REG_ITMP2, REG_ITMP3);
2646                                 emit_label_beq(cd, BRANCH_LABEL_2);
2647                         }
2648
2649                         /* interface checkcast code */
2650
2651                         if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
2652                                 if ((super == NULL) || !IS_IMM(superindex)) {
2653                                         disp = dseg_add_unique_s4(cd, superindex);
2654                                 }
2655                                 if (super == NULL) {
2656                                         /* If d == REG_ITMP2, then it's destroyed in check
2657                                            code above.  */
2658                                         if (d == REG_ITMP2)
2659                                                 M_EOR(d, d, d);
2660
2661                                         patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_index,
2662                                                             iptr->sx.s23.s3.c.ref, disp);
2663
2664                                         if (opt_showdisassemble)
2665                                                 M_NOP;
2666                                 }
2667                                 else {
2668                                         M_EOR(d, d, d);
2669                                         M_TST(s1, s1);
2670                                         emit_label_beq(cd, BRANCH_LABEL_3);
2671                                 }
2672
2673                                 M_LDR_INTERN(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
2674                                 M_LDR_INTERN(REG_ITMP3,
2675                                                          REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
2676
2677                                 /* we put unresolved or non-immediate superindices onto dseg
2678                                    and do things slightly different */
2679                                 if ((super == NULL) || !IS_IMM(superindex)) {
2680                                         /* disp was computed before we added the patcher */
2681                                         M_DSEG_LOAD(REG_ITMP2, disp);
2682                                         M_CMP(REG_ITMP3, REG_ITMP2);
2683
2684                                         if (d == REG_ITMP2) {
2685                                                 M_EORLE(d, d, d);
2686                                                 M_BLE(4);
2687                                         } else {
2688                                                 M_BLE(3);
2689                                         }
2690
2691                                         /* this assumes something */
2692                                         assert(OFFSET(vftbl_t, interfacetable[0]) == 0);
2693
2694                                         /* this does: REG_ITMP3 - superindex * sizeof(methodptr*) */
2695                                         assert(sizeof(methodptr*) == 4);
2696                                         M_SUB(REG_ITMP1, REG_ITMP1, REG_LSL(REG_ITMP2, 2));
2697
2698                                         if (d == REG_ITMP2) {
2699                                                 M_EOR(d, d, d);
2700                                         }
2701
2702                                         s2 = 0;
2703
2704                                 } else {
2705                                         assert(IS_IMM(superindex));
2706                                         M_CMP_IMM(REG_ITMP3, superindex);
2707
2708                                         M_BLE(2);
2709
2710                                         s2 = OFFSET(vftbl_t, interfacetable[0]) -
2711                                                 superindex * sizeof(methodptr*);
2712
2713                                 }
2714
2715                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP1, s2);
2716                                 M_TST(REG_ITMP3, REG_ITMP3);
2717                                 M_MOVNE_IMM(1, d);
2718
2719                                 if (super == NULL)
2720                                         emit_label_br(cd, BRANCH_LABEL_4);
2721                                 else
2722                                         emit_label(cd, BRANCH_LABEL_3);
2723                         }
2724
2725                         /* class checkcast code */
2726
2727                         if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
2728                                 if (super == NULL) {
2729                                         emit_label(cd, BRANCH_LABEL_2);
2730
2731                                         disp = dseg_add_unique_address(cd, NULL);
2732
2733                                         patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_vftbl,
2734                                                             iptr->sx.s23.s3.c.ref, disp);
2735
2736                                         if (opt_showdisassemble)
2737                                                 M_NOP;
2738                                 }
2739                                 else {
2740                                         disp = dseg_add_address(cd, super->vftbl);
2741
2742                                         M_EOR(d, d, d);
2743                                         M_TST(s1, s1);
2744                                         emit_label_beq(cd, BRANCH_LABEL_5);
2745                                 }
2746
2747                                 M_LDR_INTERN(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
2748                                 M_DSEG_LOAD(REG_ITMP2, disp);
2749
2750                                 CODEGEN_CRITICAL_SECTION_START;
2751
2752                                 M_LDR_INTERN(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
2753                                 M_LDR_INTERN(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
2754                                 M_LDR_INTERN(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
2755
2756                                 CODEGEN_CRITICAL_SECTION_END;
2757
2758                                 M_SUB(REG_ITMP1, REG_ITMP1, REG_ITMP3);
2759                                 M_CMP(REG_ITMP1, REG_ITMP2);
2760                                 /* If d == REG_ITMP2, then it's destroyed */
2761                                 if (d == REG_ITMP2)
2762                                         M_EOR(d, d, d);
2763                                 M_MOVLS_IMM(1, d);
2764
2765                                 if (super != NULL)
2766                                         emit_label(cd, BRANCH_LABEL_5);
2767                         }
2768
2769                         if (super == NULL) {
2770                                 emit_label(cd, BRANCH_LABEL_1);
2771                                 emit_label(cd, BRANCH_LABEL_4);
2772                         }
2773
2774                         }
2775
2776                         emit_store_dst(jd, iptr, d);
2777                         break;
2778
2779                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
2780
2781                         /* copy sizes to stack if necessary  */
2782
2783                         MCODECHECK((iptr->s1.argcount << 1) + 64);
2784
2785                         for (s1 = iptr->s1.argcount; --s1 >= 0; ) {
2786
2787                                 var = VAR(iptr->sx.s23.s2.args[s1]);
2788         
2789                                 /* copy SAVEDVAR sizes to stack */
2790
2791                                 if (!(var->flags & PREALLOC)) {
2792                                         s2 = emit_load(jd, iptr, var, REG_ITMP1);
2793                                         M_STR(s2, REG_SP, s1 * 4);
2794                                 }
2795                         }
2796
2797                         /* a0 = dimension count */
2798
2799                         assert(IS_IMM(iptr->s1.argcount));
2800                         M_MOV_IMM(REG_A0, iptr->s1.argcount);
2801
2802                         /* is patcher function set? */
2803
2804                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2805                                 disp = dseg_add_unique_address(cd, NULL);
2806
2807                                 patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_classinfo,
2808                                                                         iptr->sx.s23.s3.c.ref, disp);
2809
2810                                 if (opt_showdisassemble)
2811                                         M_NOP;
2812                         }
2813                         else
2814                                 disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
2815
2816                         /* a1 = arraydescriptor */
2817
2818                         M_DSEG_LOAD(REG_A1, disp);
2819
2820                         /* a2 = pointer to dimensions = stack pointer */
2821
2822                         M_INTMOVE(REG_SP, REG_A2);
2823
2824                         /* call builtin_multianewarray here */
2825
2826                         disp = dseg_add_functionptr(cd, BUILTIN_multianewarray);
2827                         M_DSEG_BRANCH(disp);
2828
2829                         /* recompute pv */
2830
2831                         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2832                         M_RECOMPUTE_PV(s1);
2833
2834                         /* check for exception before result assignment */
2835
2836                         emit_exception_check(cd, iptr);
2837
2838                         /* get arrayref */
2839
2840                         d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2841                         M_INTMOVE(REG_RESULT, d);
2842                         emit_store_dst(jd, iptr, d);
2843                         break;
2844
2845                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
2846
2847                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2848                         emit_nullpointer_check(cd, iptr, s1);
2849                         break;
2850
2851                 default:
2852                         exceptions_throw_internalerror("Unknown ICMD %d during code generation",
2853                                                                                    iptr->opc);
2854                         return false;
2855                 } /* the big switch */
2856
2857                 } /* for all instructions */
2858
2859         } /* for all basic blocks */
2860
2861         dseg_createlinenumbertable(cd);
2862
2863
2864         /* generate stubs */
2865
2866         emit_patcher_traps(jd);
2867
2868         /* everything's ok */
2869
2870         return true;
2871 }
2872
2873
2874 /* codegen_emit_stub_compiler **************************************************
2875
2876    Emits a stub routine which calls the compiler.
2877         
2878 *******************************************************************************/
2879
2880 void codegen_emit_stub_compiler(jitdata *jd)
2881 {
2882         methodinfo  *m;
2883         codegendata *cd;
2884
2885         /* get required compiler data */
2886
2887         m  = jd->m;
2888         cd = jd->cd;
2889
2890         /* code for the stub */
2891
2892         M_LDR_INTERN(REG_ITMP1, REG_PC, -(2 * 4 + 2 * SIZEOF_VOID_P));
2893         M_LDR_INTERN(REG_PC, REG_PC, -(3 * 4 + 3 * SIZEOF_VOID_P));
2894 }
2895
2896
2897 /* codegen_emit_stub_native ****************************************************
2898
2899    Emits a stub routine which calls a native method.
2900
2901 *******************************************************************************/
2902
2903 void codegen_emit_stub_native(jitdata *jd, methoddesc *nmd, functionptr f)
2904 {
2905         methodinfo  *m;
2906         codeinfo    *code;
2907         codegendata *cd;
2908         s4           nativeparams;
2909         methoddesc  *md;
2910         s4           i, j;
2911         s4           t;
2912         s4           disp, funcdisp, s1, s2;
2913
2914         /* get required compiler data */
2915
2916         m    = jd->m;
2917         code = jd->code;
2918         cd   = jd->cd;
2919
2920         /* initialize variables */
2921
2922         md = m->parseddesc;
2923         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
2924
2925         /* calculate stackframe size */
2926
2927         cd->stackframesize =
2928                 4 +                                                /* return address  */
2929                 sizeof(stackframeinfo) +                           /* stackframeinfo  */
2930                 sizeof(localref_table) +                           /* localref_table  */
2931                 nmd->memuse * 4;                                   /* stack arguments */
2932
2933         /* align stack to 8-byte */
2934
2935         cd->stackframesize = (cd->stackframesize + 4) & ~4;
2936
2937         /* create method header */
2938
2939         (void) dseg_add_unique_address(cd, code);              /* CodeinfoPointer */
2940         (void) dseg_add_unique_s4(cd, cd->stackframesize);     /* FrameSize       */
2941         (void) dseg_add_unique_s4(cd, 0);                      /* IsSync          */
2942         (void) dseg_add_unique_s4(cd, 0);                      /* IsLeaf          */
2943         (void) dseg_add_unique_s4(cd, 0);                      /* IntSave         */
2944         (void) dseg_add_unique_s4(cd, 0);                      /* FltSave         */
2945         (void) dseg_addlinenumbertablesize(cd);
2946         (void) dseg_add_unique_s4(cd, 0);                      /* ExTableSize     */
2947
2948         /* generate stub code */
2949
2950         M_STMFD(1<<REG_LR, REG_SP);
2951         M_SUB_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize / 4 - 1);
2952
2953 #if !defined(NDEBUG)
2954         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
2955                 emit_verbosecall_enter(jd);
2956 #endif
2957
2958         /* get function address (this must happen before the stackframeinfo) */
2959
2960         funcdisp = dseg_add_functionptr(cd, f);
2961
2962 #if !defined(WITH_STATIC_CLASSPATH)
2963         if (f == NULL) {
2964                 patcher_add_patch_ref(jd, PATCHER_resolve_native_function, m, funcdisp);
2965
2966                 if (opt_showdisassemble)
2967                         M_NOP;
2968         }
2969 #endif
2970
2971         /* Save integer and float argument registers (these are 4
2972            registers, stack is 8-byte aligned). */
2973
2974         M_STMFD(BITMASK_ARGS, REG_SP);
2975         /* TODO: floating point */
2976
2977         /* create native stackframe info */
2978
2979         assert(IS_IMM(4*4 + cd->stackframesize));
2980         M_ADD_IMM(REG_A0, REG_SP, 4*4 + cd->stackframesize - SIZEOF_VOID_P);
2981         M_MOV(REG_A1, REG_PV);
2982         M_ADD_IMM(REG_A2, REG_SP, 4*4 + cd->stackframesize);
2983         M_LDR_INTERN(REG_A3, REG_SP, 4*4 + cd->stackframesize - SIZEOF_VOID_P);
2984         disp = dseg_add_functionptr(cd, codegen_start_native_call);
2985         M_DSEG_BRANCH(disp);
2986
2987         /* recompute pv */
2988
2989         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
2990         M_RECOMPUTE_PV(s1);
2991
2992         /* Restore integer and float argument registers (these are 4
2993            registers, stack is 8-byte aligned). */
2994
2995         M_LDMFD(BITMASK_ARGS, REG_SP);
2996         /* TODO: floating point */
2997
2998         /* copy or spill arguments to new locations */
2999         /* ATTENTION: the ARM has only integer argument registers! */
3000
3001         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
3002                 t = md->paramtypes[i].type;
3003
3004                 if (!md->params[i].inmemory) {
3005                         s1 = md->params[i].regoff;
3006                         s2 = nmd->params[j].regoff;
3007
3008                         if (!nmd->params[j].inmemory) {
3009 #if !defined(__ARM_EABI__)
3010                                 SPLIT_OPEN(t, s2, REG_ITMP1);
3011 #endif
3012
3013                                 if (IS_2_WORD_TYPE(t))
3014                                         M_LNGMOVE(s1, s2);
3015                                 else
3016                                         M_INTMOVE(s1, s2);
3017
3018 #if !defined(__ARM_EABI__)
3019                                 SPLIT_STORE_AND_CLOSE(t, s2, 0);
3020 #endif
3021                         }
3022                         else {
3023                                 if (IS_2_WORD_TYPE(t))
3024                                         M_LST(s1, REG_SP, s2);
3025                                 else
3026                                         M_IST(s1, REG_SP, s2);
3027                         }
3028                 }
3029                 else {
3030                         s1 = md->params[i].regoff + cd->stackframesize;
3031                         s2 = nmd->params[j].regoff;
3032
3033                         if (IS_2_WORD_TYPE(t)) {
3034                                 M_LLD(REG_ITMP12_PACKED, REG_SP, s1);
3035                                 M_LST(REG_ITMP12_PACKED, REG_SP, s2);
3036                         }
3037                         else {
3038                                 M_ILD(REG_ITMP1, REG_SP, s1);
3039                                 M_IST(REG_ITMP1, REG_SP, s2);
3040                         }
3041                 }
3042         }
3043
3044         /* put class into second argument register */
3045
3046         if (m->flags & ACC_STATIC) {
3047                 disp = dseg_add_address(cd, m->class);
3048                 M_DSEG_LOAD(REG_A1, disp);
3049         }
3050
3051         /* put env into first argument register */
3052
3053         disp = dseg_add_address(cd, _Jv_env);
3054         M_DSEG_LOAD(REG_A0, disp);
3055
3056         /* do the native function call */
3057
3058         M_DSEG_BRANCH(funcdisp);
3059
3060         /* recompute pv */
3061         /* TODO: this is only needed because of the tracer ... do we
3062            really need it? */
3063
3064         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
3065         M_RECOMPUTE_PV(s1);
3066
3067 #if !defined(__SOFTFP__)
3068         /* TODO: this is only a hack, since we use R0/R1 for float return! */
3069         /* this depends on gcc; it is independent from our ENABLE_SOFTFLOAT define */
3070         if (md->returntype.type != TYPE_VOID && IS_FLT_DBL_TYPE(md->returntype.type)) {
3071 #if 0 && !defined(NDEBUG)
3072                 dolog("NATIVESTUB that returns float or double (%s.%s)", m->class->name->text, m->name->text);
3073 #endif
3074                 /* we cannot use this macro, since it is not defined in ENABLE_SOFTFLOAT */
3075                 /* M_CAST_FLT_TO_INT_TYPED(md->returntype.type, REG_FRESULT, REG_RESULT_TYPED(md->returntype.type)); */
3076                 if (IS_2_WORD_TYPE(md->returntype.type)) {
3077                         DCD(0xed2d8102); /* stfd    f0, [sp, #-8]! */
3078                         M_LDRD_UPDATE(REG_RESULT_PACKED, REG_SP, 8);
3079                 } else {
3080                         DCD(0xed2d0101); /* stfs    f0, [sp, #-4]!*/
3081                         M_LDR_UPDATE(REG_RESULT, REG_SP, 4);
3082                 }
3083         }
3084 #endif
3085
3086 #if !defined(NDEBUG)
3087         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
3088                 emit_verbosecall_exit(jd);
3089 #endif
3090
3091         /* remove native stackframe info */
3092         /* TODO: improve this store/load */
3093
3094         M_STMFD(BITMASK_RESULT, REG_SP);
3095
3096         M_ADD_IMM(REG_A0, REG_SP, 2*4 + cd->stackframesize - SIZEOF_VOID_P);
3097         disp = dseg_add_functionptr(cd, codegen_finish_native_call);
3098         M_DSEG_BRANCH(disp);
3099         s1 = (s4) (cd->mcodeptr - cd->mcodebase);
3100         M_RECOMPUTE_PV(s1);
3101
3102         M_MOV(REG_ITMP1_XPTR, REG_RESULT);
3103         M_LDMFD(BITMASK_RESULT, REG_SP);
3104
3105         /* finish stub code, but do not yet return to caller */
3106
3107         M_ADD_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize / 4 - 1);
3108         M_LDMFD(1<<REG_LR, REG_SP);
3109
3110         /* check for exception */
3111
3112         M_TST(REG_ITMP1_XPTR, REG_ITMP1_XPTR);
3113         M_MOVEQ(REG_LR, REG_PC);            /* if no exception, return to caller  */
3114
3115         /* handle exception here */
3116
3117         M_SUB_IMM(REG_ITMP2_XPC, REG_LR, 4);/* move fault address into xpc        */
3118
3119         disp = dseg_add_functionptr(cd, asm_handle_nat_exception);
3120         M_DSEG_LOAD(REG_ITMP3, disp);       /* load asm exception handler address */
3121         M_MOV(REG_PC, REG_ITMP3);           /* jump to asm exception handler      */
3122
3123         /* generate patcher stubs */
3124
3125         emit_patcher_traps(jd);
3126 }
3127
3128
3129 /* asm_debug *******************************************************************
3130
3131    Lazy debugger!
3132
3133 *******************************************************************************/
3134
3135 void asm_debug(int a1, int a2, int a3, int a4)
3136 {
3137         printf("===> i am going to exit after this debugging message!\n");
3138         printf("got asm_debug(%p, %p, %p, %p)\n",(void*)a1,(void*)a2,(void*)a3,(void*)a4);
3139         vm_abort("leave you now");
3140 }
3141
3142
3143 /*
3144  * These are local overrides for various environment variables in Emacs.
3145  * Please do not remove this and leave it at the end of the file, where
3146  * Emacs will automagically detect them.
3147  * ---------------------------------------------------------------------
3148  * Local variables:
3149  * mode: c
3150  * indent-tabs-mode: t
3151  * c-basic-offset: 4
3152  * tab-width: 4
3153  * End:
3154  * vim:noexpandtab:sw=4:ts=4:
3155  */