src/vm/jit/alpha/codegen.c

   1 /* jit/alpha/codegen.c - machine code generator for alpha
   2
   3    Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
   4    Institut f. Computersprachen, TU Wien
   5    R. Grafl, A. Krall, C. Kruegel, C. Oates, R. Obermaisser, M. Probst,
   6    S. Ring, E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich,
   7    J. Wenninger
   8
   9    This file is part of CACAO.
  10
  11    This program is free software; you can redistribute it and/or
  12    modify it under the terms of the GNU General Public License as
  13    published by the Free Software Foundation; either version 2, or (at
  14    your option) any later version.
  15
  16    This program is distributed in the hope that it will be useful, but
  17    WITHOUT ANY WARRANTY; without even the implied warranty of
  18    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19    General Public License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software
  23    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  24    02111-1307, USA.
  25
  26    Contact: cacao@complang.tuwien.ac.at
  27
  28    Authors: Andreas Krall
  29             Reinhard Grafl
  30
  31    $Id: codegen.c 1319 2004-07-16 13:45:50Z twisti $
  32
  33 */
  34
  35
  36 #include "global.h"
  37 #include <stdio.h>
  38 #include <signal.h>
  39 #include "types.h"
  40 #include "main.h"
  41 #include "jit/alpha/codegen.h"
  42 #include "jit/jit.h"
  43 #include "jit/parse.h"
  44 #include "jit/reg.h"
  45 #include "builtin.h"
  46 #include "asmpart.h"
  47 #include "jni.h"
  48 #include "loader.h"
  49 #include "tables.h"
  50 #include "native.h"
  51 #include "main.h"
  52
  53 /* include independent code generation stuff */
  54 #include "jit/codegen.inc"
  55 #include "jit/reg.inc"
  56
  57
  58 /* *****************************************************************************
  59
  60 Datatypes and Register Allocations:
  61 -----------------------------------
  62
  63 On 64-bit-machines (like the Alpha) all operands are stored in the
  64 registers in a 64-bit form, even when the correspondig JavaVM  operands
  65 only need 32 bits. This is done by a canonical representation:
  66
  67 32-bit integers are allways stored as sign-extended 64-bit values (this
  68 approach is directly supported by the Alpha architecture and is very easy
  69 to implement).
  70
  71 32-bit-floats are stored in a 64-bit doubleprecision register by simply
  72 expanding the exponent and mantissa with zeroes. (also supported by the
  73 architecture)
  74
  75
  76 Stackframes:
  77
  78 The calling conventions and the layout of the stack is  explained in detail
  79 in the documention file: calling.doc
  80
  81 *******************************************************************************/
  82
  83
  84 /* register descripton - array ************************************************/
  85
  86 /* #define REG_RES   0         reserved register for OS or code generator     */
  87 /* #define REG_RET   1         return value register                          */
  88 /* #define REG_EXC   2         exception value register (only old jit)        */
  89 /* #define REG_SAV   3         (callee) saved register                        */
  90 /* #define REG_TMP   4         scratch temporary register (caller saved)      */
  91 /* #define REG_ARG   5         argument register (caller saved)               */
  92
  93 /* #define REG_END   -1        last entry in tables */
  94
  95 int nregdescint[] = {
  96         REG_RET, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
  97         REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
  98         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP,
  99         REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES,
 100         REG_END };
 101
 102 /* for use of reserved registers, see comment above */
 103
 104 int nregdescfloat[] = {
 105         REG_RET, REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
 106         REG_SAV, REG_SAV, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
 107         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP,
 108         REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES,
 109         REG_END };
 110
 111 /* for use of reserved registers, see comment above */
 112
 113
 114 /* NullPointerException handlers and exception handling initialisation        */
 115
 116 typedef struct sigctx_struct {
 117
 118         long          sc_onstack;           /* sigstack state to restore          */
 119         long          sc_mask;              /* signal mask to restore             */
 120         long          sc_pc;                /* pc at time of signal               */
 121         long          sc_ps;                /* psl to retore                      */
 122         long          sc_regs[32];          /* processor regs 0 to 31             */
 123         long          sc_ownedfp;           /* fp has been used                   */
 124         long          sc_fpregs[32];        /* fp regs 0 to 31                    */
 125         unsigned long sc_fpcr;              /* floating point control register    */
 126         unsigned long sc_fp_control;        /* software fpcr                      */
 127                                             /* rest is unused                     */
 128         unsigned long sc_reserved1, sc_reserved2;
 129         unsigned long sc_ssize;
 130         char          *sc_sbase;
 131         unsigned long sc_traparg_a0;
 132         unsigned long sc_traparg_a1;
 133         unsigned long sc_traparg_a2;
 134         unsigned long sc_fp_trap_pc;
 135         unsigned long sc_fp_trigger_sum;
 136         unsigned long sc_fp_trigger_inst;
 137         unsigned long sc_retcode[2];
 138 } sigctx_struct;
 139
 140
 141 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
 142 void thread_restartcriticalsection(ucontext_t *uc)
 143 {
 144         void *critical;
 145         if ((critical = thread_checkcritical((void*) uc->uc_mcontext.sc_pc)) != NULL)
 146                 uc->uc_mcontext.sc_pc = (u8) critical;
 147 }
 148 #endif
 149
 150 /* NullPointerException signal handler for hardware null pointer check */
 151
 152 void catch_NullPointerException(int sig, int code, sigctx_struct *sigctx)
 153 {
 154         sigset_t nsig;
 155         int      instr;
 156         long     faultaddr;
 157         java_objectheader *xptr;
 158
 159         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 160
 161         instr = *((int*)(sigctx->sc_pc));
 162         faultaddr = sigctx->sc_regs[(instr >> 16) & 0x1f];
 163
 164         if (faultaddr == 0) {
 165                 signal(sig, (void*) catch_NullPointerException); /* reinstall handler */
 166                 sigemptyset(&nsig);
 167                 sigaddset(&nsig, sig);
 168                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 169
 170                 xptr = new_exception(string_java_lang_NullPointerException);
 171
 172                 sigctx->sc_regs[REG_ITMP1_XPTR] = (u8) xptr;
 173                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 174                 sigctx->sc_pc = (u8) asm_handle_exception;
 175                 return;
 176
 177         } else {
 178                 faultaddr += (long) ((instr << 16) >> 16);
 179                 fprintf(stderr, "faulting address: 0x%016lx\n", faultaddr);
 180                 panic("Stack overflow");
 181         }
 182 }
 183
 184
 185 #ifdef __osf__
 186
 187 void init_exceptions(void)
 188 {
 189
 190 #else /* Linux */
 191
 192 /* Linux on Digital Alpha needs an initialisation of the ieee floating point
 193         control for IEEE compliant arithmetic (option -mieee of GCC). Under
 194         Digital Unix this is done automatically.
 195 */
 196
 197 #include <asm/fpu.h>
 198
 199 extern unsigned long ieee_get_fp_control();
 200 extern void ieee_set_fp_control(unsigned long fp_control);
 201
 202 void init_exceptions(void)
 203 {
 204 /* initialize floating point control */
 205
 206 ieee_set_fp_control(ieee_get_fp_control()
 207                     & ~IEEE_TRAP_ENABLE_INV
 208                     & ~IEEE_TRAP_ENABLE_DZE
 209 /*                  & ~IEEE_TRAP_ENABLE_UNF   we dont want underflow */
 210                     & ~IEEE_TRAP_ENABLE_OVF);
 211 #endif
 212
 213         /* install signal handlers we need to convert to exceptions */
 214
 215         if (!checknull) {
 216 #if defined(SIGSEGV)
 217                 signal(SIGSEGV, (void*) catch_NullPointerException);
 218 #endif
 219
 220 #if defined(SIGBUS)
 221                 signal(SIGBUS, (void*) catch_NullPointerException);
 222 #endif
 223         }
 224 }
 225
 226
 227 /* function gen_mcode **********************************************************
 228
 229         generates machine code
 230
 231 *******************************************************************************/
 232
 233 void codegen(methodinfo *m)
 234 {
 235         s4 len, s1, s2, s3, d;
 236         s4 a;
 237         s4 parentargs_base;
 238         s4             *mcodeptr;
 239         stackptr        src;
 240         varinfo        *var;
 241         basicblock     *bptr;
 242         instruction    *iptr;
 243         exceptiontable *ex;
 244         registerdata   *r;
 245
 246         {
 247         s4 i, p, pa, t, l;
 248         s4 savedregs_num;
 249
 250         /* keep code size smaller */
 251         r = m->registerdata;
 252
 253         savedregs_num = (m->isleafmethod) ? 0 : 1;        /* space to save the RA */
 254
 255         /* space to save used callee saved registers */
 256
 257         savedregs_num += (r->savintregcnt - r->maxsavintreguse);
 258         savedregs_num += (r->savfltregcnt - r->maxsavfltreguse);
 259
 260         parentargs_base = r->maxmemuse + savedregs_num;
 261
 262 #if defined(USE_THREADS)           /* space to save argument of monitor_enter */
 263
 264         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 265                 parentargs_base++;
 266
 267 #endif
 268
 269         /* create method header */
 270
 271         (void) dseg_addaddress(m);                              /* MethodPointer  */
 272         (void) dseg_adds4(parentargs_base * 8);                 /* FrameSize      */
 273
 274 #if defined(USE_THREADS)
 275
 276         /* IsSync contains the offset relative to the stack pointer for the
 277            argument of monitor_exit used in the exception handler. Since the
 278            offset could be zero and give a wrong meaning of the flag it is
 279            offset by one.
 280         */
 281
 282         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 283                 (void) dseg_adds4((r->maxmemuse + 1) * 8);          /* IsSync         */
 284         else
 285
 286 #endif
 287
 288         (void) dseg_adds4(0);                                   /* IsSync         */
 289
 290         (void) dseg_adds4(m->isleafmethod);                     /* IsLeaf         */
 291         (void) dseg_adds4(r->savintregcnt - r->maxsavintreguse);/* IntSave        */
 292         (void) dseg_adds4(r->savfltregcnt - r->maxsavfltreguse);/* FltSave        */
 293
 294         dseg_addlinenumbertablesize();
 295
 296         (void) dseg_adds4(m->exceptiontablelength);             /* ExTableSize    */
 297
 298         /* create exception table */
 299
 300         for (ex = m->exceptiontable; ex != NULL; ex = ex->down) {
 301                 dseg_addtarget(ex->start);
 302                 dseg_addtarget(ex->end);
 303                 dseg_addtarget(ex->handler);
 304                 (void) dseg_addaddress(ex->catchtype);
 305         }
 306
 307         /* initialize mcode variables */
 308
 309         mcodeptr = (s4*) mcodebase;
 310         mcodeend = (s4*) (mcodebase + mcodesize);
 311         MCODECHECK(128 + m->paramcount);
 312
 313         /* create stack frame (if necessary) */
 314
 315         if (parentargs_base) {
 316                 M_LDA (REG_SP, REG_SP, -parentargs_base * 8);
 317         }
 318
 319         /* save return address and used callee saved registers */
 320
 321         p = parentargs_base;
 322         if (!m->isleafmethod) {
 323                 p--; M_AST(REG_RA, REG_SP, p * 8);
 324         }
 325         for (i = r->savintregcnt - 1; i >= r->maxsavintreguse; i--) {
 326                 p--; M_LST(r->savintregs[i], REG_SP, p * 8);
 327         }
 328         for (i = r->savfltregcnt - 1; i >= r->maxsavfltreguse; i--) {
 329                 p--; M_DST(r->savfltregs[i], REG_SP, p * 8);
 330         }
 331
 332         /* save monitorenter argument */
 333
 334 #if defined(USE_THREADS)
 335         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 336                 if (m->flags & ACC_STATIC) {
 337                         p = dseg_addaddress(m->class);
 338                         M_ALD(REG_ITMP1, REG_PV, p);
 339                         M_AST(REG_ITMP1, REG_SP, r->maxmemuse * 8);
 340
 341                 } else {
 342                         M_AST(r->argintregs[0], REG_SP, r->maxmemuse * 8);
 343                 }
 344         }
 345 #endif
 346
 347         /* copy argument registers to stack and call trace function with pointer
 348            to arguments on stack.
 349         */
 350
 351         if (runverbose) {
 352                 s4 disp;
 353                 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
 354                 M_AST(REG_RA, REG_SP, 1 * 8);
 355
 356                 /* save integer argument registers */
 357                 for (p = 0; /* p < m->paramcount && */ p < INT_ARG_CNT; p++) {
 358                         M_LST(r->argintregs[p], REG_SP,  (2 + p) * 8);
 359                 }
 360
 361                 /* save and copy float arguments into integer registers */
 362                 for (p = 0; /* p < m->paramcount && */ p < FLT_ARG_CNT; p++) {
 363                         t = m->paramtypes[p];
 364
 365                         if (IS_FLT_DBL_TYPE(t)) {
 366                                 if (IS_2_WORD_TYPE(t)) {
 367                                         M_DST(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 368
 369                                 } else {
 370                                         M_FST(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 371                                 }
 372
 373                                 M_LLD(r->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 374
 375                         } else {
 376                                 M_DST(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 377                         }
 378                 }
 379
 380                 p = dseg_addaddress(m);
 381                 M_ALD(REG_ITMP1, REG_PV, p);
 382                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
 383                 p = dseg_addaddress((void *) builtin_trace_args);
 384                 M_ALD(REG_PV, REG_PV, p);
 385                 M_JSR(REG_RA, REG_PV);
 386                 disp = -(s4) ((u1 *) mcodeptr - mcodebase);
 387                 M_LDA(REG_PV, REG_RA, disp);
 388                 M_ALD(REG_RA, REG_SP, 1 * 8);
 389
 390                 for (p = 0; /* p < mparamcount && */ p < INT_ARG_CNT; p++) {
 391                         M_LLD(r->argintregs[p], REG_SP,  (2 + p) * 8);
 392                 }
 393
 394                 for (p = 0; /* p < mparamcount && */ p < FLT_ARG_CNT; p++) {
 395                         t = m->paramtypes[p];
 396
 397                         if (IS_FLT_DBL_TYPE(t)) {
 398                                 if (IS_2_WORD_TYPE(t)) {
 399                                         M_DLD(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 400
 401                                 } else {
 402                                         M_FLD(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 403                                 }
 404
 405                         } else {
 406                                 M_DLD(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 407                         }
 408                 }
 409
 410                 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
 411         }
 412
 413         /* take arguments out of register or stack frame */
 414
 415         for (p = 0, l = 0; p < m->paramcount; p++) {
 416                 t = m->paramtypes[p];
 417                 var = &(r->locals[l][t]);
 418                 l++;
 419                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 420                         l++;
 421                 if (var->type < 0)
 422                         continue;
 423                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 424                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 425                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 426                                         M_INTMOVE(r->argintregs[p], var->regoff);
 427                                 } else {                             /* reg arg -> spilled    */
 428                                         M_LST(r->argintregs[p], REG_SP, 8 * var->regoff);
 429                                 }
 430
 431                         } else {                                 /* stack arguments       */
 432                                 pa = p - INT_ARG_CNT;
 433                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 434                                         M_LLD(var->regoff, REG_SP, 8 * (parentargs_base + pa));
 435
 436                                 } else {                             /* stack arg -> spilled  */
 437                                         M_LLD(REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 438                                         M_LST(REG_ITMP1, REG_SP, 8 * var->regoff);
 439                                 }
 440                         }
 441
 442                 } else {                                     /* floating args         */
 443                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 444                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 445                                         M_FLTMOVE(r->argfltregs[p], var->regoff);
 446
 447                                 } else {                                         /* reg arg -> spilled    */
 448                                         M_DST(r->argfltregs[p], REG_SP, 8 * var->regoff);
 449                                 }
 450
 451                         } else {                                 /* stack arguments       */
 452                                 pa = p - FLT_ARG_CNT;
 453                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 454                                         M_DLD(var->regoff, REG_SP, 8 * (parentargs_base + pa) );
 455
 456                                 } else {                             /* stack-arg -> spilled  */
 457                                         M_DLD(REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 458                                         M_DST(REG_FTMP1, REG_SP, 8 * var->regoff);
 459                                 }
 460                         }
 461                 }
 462         } /* end for */
 463
 464         /* call monitorenter function */
 465
 466 #if defined(USE_THREADS)
 467         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 468                 s4 disp;
 469                 s8 func_enter = (m->flags & ACC_STATIC) ?
 470                         (s8) builtin_staticmonitorenter : (s8) builtin_monitorenter;
 471                 p = dseg_addaddress((void*) func_enter);
 472                 M_ALD(REG_PV, REG_PV, p);
 473                 M_ALD(r->argintregs[0], REG_SP, r->maxmemuse * 8);
 474                 M_JSR(REG_RA, REG_PV);
 475                 disp = -(s4) ((u1 *) mcodeptr - mcodebase);
 476                 M_LDA(REG_PV, REG_RA, disp);
 477         }
 478 #endif
 479         }
 480
 481         /* end of header generation */
 482
 483         /* walk through all basic blocks */
 484         for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
 485
 486                 bptr->mpc = (s4) ((u1 *) mcodeptr - mcodebase);
 487
 488                 if (bptr->flags >= BBREACHED) {
 489
 490                 /* branch resolving */
 491
 492                 {
 493                 branchref *brefs;
 494                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 495                         gen_resolvebranch((u1*) mcodebase + brefs->branchpos,
 496                                           brefs->branchpos, bptr->mpc);
 497                         }
 498                 }
 499
 500                 /* copy interface registers to their destination */
 501
 502                 src = bptr->instack;
 503                 len = bptr->indepth;
 504                 MCODECHECK(64+len);
 505                 while (src != NULL) {
 506                         len--;
 507                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 508                                 d = reg_of_var(m, src, REG_ITMP1);
 509                                 M_INTMOVE(REG_ITMP1, d);
 510                                 store_reg_to_var_int(src, d);
 511                                 }
 512                         else {
 513                                 d = reg_of_var(m, src, REG_IFTMP);
 514                                 if ((src->varkind != STACKVAR)) {
 515                                         s2 = src->type;
 516                                         if (IS_FLT_DBL_TYPE(s2)) {
 517                                                 if (!(r->interfaces[len][s2].flags & INMEMORY)) {
 518                                                         s1 = r->interfaces[len][s2].regoff;
 519                                                         M_FLTMOVE(s1,d);
 520                                                         }
 521                                                 else {
 522                                                         M_DLD(d, REG_SP, 8 * r->interfaces[len][s2].regoff);
 523                                                         }
 524                                                 store_reg_to_var_flt(src, d);
 525                                                 }
 526                                         else {
 527                                                 if (!(r->interfaces[len][s2].flags & INMEMORY)) {
 528                                                         s1 = r->interfaces[len][s2].regoff;
 529                                                         M_INTMOVE(s1,d);
 530                                                         }
 531                                                 else {
 532                                                         M_LLD(d, REG_SP, 8 * r->interfaces[len][s2].regoff);
 533                                                         }
 534                                                 store_reg_to_var_int(src, d);
 535                                                 }
 536                                         }
 537                                 }
 538                         src = src->prev;
 539                         }
 540
 541                 /* walk through all instructions */
 542
 543                 src = bptr->instack;
 544                 len = bptr->icount;
 545                 for (iptr = bptr->iinstr;
 546                     len > 0;
 547                     src = iptr->dst, len--, iptr++) {
 548
 549         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 550         switch (iptr->opc) {
 551
 552                 case ICMD_NOP:        /* ...  ==> ...                                 */
 553                         break;
 554
 555                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 556
 557                         var_to_reg_int(s1, src, REG_ITMP1);
 558                         M_BEQZ(s1, 0);
 559                         codegen_addxnullrefs(mcodeptr);
 560                         break;
 561
 562                 /* constant operations ************************************************/
 563
 564 #define ICONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 565                     else{a=dseg_adds4(c);M_ILD(r,REG_PV,a);}
 566
 567 #define LCONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 568                     else{a=dseg_adds8(c);M_LLD(r,REG_PV,a);}
 569
 570                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 571                                       /* op1 = 0, val.i = constant                    */
 572
 573                         d = reg_of_var(m, iptr->dst, REG_ITMP1);
 574                         ICONST(d, iptr->val.i);
 575                         store_reg_to_var_int(iptr->dst, d);
 576                         break;
 577
 578                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 579                                       /* op1 = 0, val.l = constant                    */
 580
 581                         d = reg_of_var(m, iptr->dst, REG_ITMP1);
 582                         LCONST(d, iptr->val.l);
 583                         store_reg_to_var_int(iptr->dst, d);
 584                         break;
 585
 586                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 587                                       /* op1 = 0, val.f = constant                    */
 588
 589                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
 590                         a = dseg_addfloat(iptr->val.f);
 591                         M_FLD(d, REG_PV, a);
 592                         store_reg_to_var_flt(iptr->dst, d);
 593                         break;
 594
 595                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 596                                       /* op1 = 0, val.d = constant                    */
 597
 598                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
 599                         a = dseg_adddouble(iptr->val.d);
 600                         M_DLD(d, REG_PV, a);
 601                         store_reg_to_var_flt(iptr->dst, d);
 602                         break;
 603
 604                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 605                                       /* op1 = 0, val.a = constant                    */
 606
 607                         d = reg_of_var(m, iptr->dst, REG_ITMP1);
 608                         if (iptr->val.a) {
 609                                 a = dseg_addaddress (iptr->val.a);
 610                                 M_ALD(d, REG_PV, a);
 611                                 }
 612                         else {
 613                                 M_INTMOVE(REG_ZERO, d);
 614                                 }
 615                         store_reg_to_var_int(iptr->dst, d);
 616                         break;
 617
 618
 619                 /* load/store operations **********************************************/
 620
 621                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 622                 case ICMD_LLOAD:      /* op1 = local variable                         */
 623                 case ICMD_ALOAD:
 624
 625                         d = reg_of_var(m, iptr->dst, REG_ITMP1);
 626                         if ((iptr->dst->varkind == LOCALVAR) &&
 627                             (iptr->dst->varnum == iptr->op1))
 628                                 break;
 629                         var = &(r->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 630                         if (var->flags & INMEMORY)
 631                                 M_LLD(d, REG_SP, 8 * var->regoff);
 632                         else
 633                                 {M_INTMOVE(var->regoff,d);}
 634                         store_reg_to_var_int(iptr->dst, d);
 635                         break;
 636
 637                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 638                 case ICMD_DLOAD:      /* op1 = local variable                         */
 639
 640                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
 641                         if ((iptr->dst->varkind == LOCALVAR) &&
 642                             (iptr->dst->varnum == iptr->op1))
 643                                 break;
 644                         var = &(r->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 645                         if (var->flags & INMEMORY)
 646                                 M_DLD(d, REG_SP, 8 * var->regoff);
 647                         else
 648                                 {M_FLTMOVE(var->regoff,d);}
 649                         store_reg_to_var_flt(iptr->dst, d);
 650                         break;
 651
 652
 653                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 654                 case ICMD_LSTORE:     /* op1 = local variable                         */
 655                 case ICMD_ASTORE:
 656
 657                         if ((src->varkind == LOCALVAR) &&
 658                             (src->varnum == iptr->op1))
 659                                 break;
 660                         var = &(r->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 661                         if (var->flags & INMEMORY) {
 662                                 var_to_reg_int(s1, src, REG_ITMP1);
 663                                 M_LST(s1, REG_SP, 8 * var->regoff);
 664                                 }
 665                         else {
 666                                 var_to_reg_int(s1, src, var->regoff);
 667                                 M_INTMOVE(s1, var->regoff);
 668                                 }
 669                         break;
 670
 671                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 672                 case ICMD_DSTORE:     /* op1 = local variable                         */
 673
 674                         if ((src->varkind == LOCALVAR) &&
 675                             (src->varnum == iptr->op1))
 676                                 break;
 677                         var = &(r->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 678                         if (var->flags & INMEMORY) {
 679                                 var_to_reg_flt(s1, src, REG_FTMP1);
 680                                 M_DST(s1, REG_SP, 8 * var->regoff);
 681                                 }
 682                         else {
 683                                 var_to_reg_flt(s1, src, var->regoff);
 684                                 M_FLTMOVE(s1, var->regoff);
 685                                 }
 686                         break;
 687
 688
 689                 /* pop/dup/swap operations ********************************************/
 690
 691                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 692
 693                 case ICMD_POP:        /* ..., value  ==> ...                          */
 694                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 695                         break;
 696
 697                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 698                         M_COPY(src, iptr->dst);
 699                         break;
 700
 701                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 702
 703                         M_COPY(src,       iptr->dst);
 704                         M_COPY(src->prev, iptr->dst->prev);
 705                         M_COPY(iptr->dst, iptr->dst->prev->prev);
 706                         break;
 707
 708                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 709
 710                         M_COPY(src,             iptr->dst);
 711                         M_COPY(src->prev,       iptr->dst->prev);
 712                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 713                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 714                         break;
 715
 716                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 717
 718                         M_COPY(src,       iptr->dst);
 719                         M_COPY(src->prev, iptr->dst->prev);
 720                         break;
 721
 722                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 723
 724                         M_COPY(src,             iptr->dst);
 725                         M_COPY(src->prev,       iptr->dst->prev);
 726                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 727                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 728                         M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
 729                         break;
 730
 731                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 732
 733                         M_COPY(src,                   iptr->dst);
 734                         M_COPY(src->prev,             iptr->dst->prev);
 735                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 736                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 737                         M_COPY(iptr->dst,             iptr->dst->prev->prev->prev->prev);
 738                         M_COPY(iptr->dst->prev,       iptr->dst->prev->prev->prev->prev->prev);
 739                         break;
 740
 741                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 742
 743                         M_COPY(src,       iptr->dst->prev);
 744                         M_COPY(src->prev, iptr->dst);
 745                         break;
 746
 747
 748                 /* integer operations *************************************************/
 749
 750                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 751
 752                         var_to_reg_int(s1, src, REG_ITMP1);
 753                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 754                         M_ISUB(REG_ZERO, s1, d);
 755                         store_reg_to_var_int(iptr->dst, d);
 756                         break;
 757
 758                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 759
 760                         var_to_reg_int(s1, src, REG_ITMP1);
 761                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 762                         M_LSUB(REG_ZERO, s1, d);
 763                         store_reg_to_var_int(iptr->dst, d);
 764                         break;
 765
 766                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 767
 768                         var_to_reg_int(s1, src, REG_ITMP1);
 769                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 770                         M_INTMOVE(s1, d);
 771                         store_reg_to_var_int(iptr->dst, d);
 772                         break;
 773
 774                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 775
 776                         var_to_reg_int(s1, src, REG_ITMP1);
 777                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 778                         M_IADD(s1, REG_ZERO, d );
 779                         store_reg_to_var_int(iptr->dst, d);
 780                         break;
 781
 782                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 783
 784                         var_to_reg_int(s1, src, REG_ITMP1);
 785                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 786                         if (has_ext_instr_set) {
 787                                 M_BSEXT(s1, d);
 788                                 }
 789                         else {
 790                                 M_SLL_IMM(s1, 56, d);
 791                                 M_SRA_IMM( d, 56, d);
 792                                 }
 793                         store_reg_to_var_int(iptr->dst, d);
 794                         break;
 795
 796                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 797
 798                         var_to_reg_int(s1, src, REG_ITMP1);
 799                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 800             M_CZEXT(s1, d);
 801                         store_reg_to_var_int(iptr->dst, d);
 802                         break;
 803
 804                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 805
 806                         var_to_reg_int(s1, src, REG_ITMP1);
 807                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 808                         if (has_ext_instr_set) {
 809                                 M_SSEXT(s1, d);
 810                                 }
 811                         else {
 812                                 M_SLL_IMM(s1, 48, d);
 813                                 M_SRA_IMM( d, 48, d);
 814                                 }
 815                         store_reg_to_var_int(iptr->dst, d);
 816                         break;
 817
 818
 819                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 820
 821                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 822                         var_to_reg_int(s2, src, REG_ITMP2);
 823                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 824                         M_IADD(s1, s2, d);
 825                         store_reg_to_var_int(iptr->dst, d);
 826                         break;
 827
 828                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 829                                       /* val.i = constant                             */
 830
 831                         var_to_reg_int(s1, src, REG_ITMP1);
 832                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 833                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 834                                 M_IADD_IMM(s1, iptr->val.i, d);
 835                                 }
 836                         else {
 837                                 ICONST(REG_ITMP2, iptr->val.i);
 838                                 M_IADD(s1, REG_ITMP2, d);
 839                                 }
 840                         store_reg_to_var_int(iptr->dst, d);
 841                         break;
 842
 843                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 844
 845                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 846                         var_to_reg_int(s2, src, REG_ITMP2);
 847                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 848                         M_LADD(s1, s2, d);
 849                         store_reg_to_var_int(iptr->dst, d);
 850                         break;
 851
 852                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 853                                       /* val.l = constant                             */
 854
 855                         var_to_reg_int(s1, src, REG_ITMP1);
 856                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 857                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 858                                 M_LADD_IMM(s1, iptr->val.l, d);
 859                                 }
 860                         else {
 861                                 LCONST(REG_ITMP2, iptr->val.l);
 862                                 M_LADD(s1, REG_ITMP2, d);
 863                                 }
 864                         store_reg_to_var_int(iptr->dst, d);
 865                         break;
 866
 867                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 868
 869                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 870                         var_to_reg_int(s2, src, REG_ITMP2);
 871                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 872                         M_ISUB(s1, s2, d);
 873                         store_reg_to_var_int(iptr->dst, d);
 874                         break;
 875
 876                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 877                                       /* val.i = constant                             */
 878
 879                         var_to_reg_int(s1, src, REG_ITMP1);
 880                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 881                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 882                                 M_ISUB_IMM(s1, iptr->val.i, d);
 883                                 }
 884                         else {
 885                                 ICONST(REG_ITMP2, iptr->val.i);
 886                                 M_ISUB(s1, REG_ITMP2, d);
 887                                 }
 888                         store_reg_to_var_int(iptr->dst, d);
 889                         break;
 890
 891                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 892
 893                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 894                         var_to_reg_int(s2, src, REG_ITMP2);
 895                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 896                         M_LSUB(s1, s2, d);
 897                         store_reg_to_var_int(iptr->dst, d);
 898                         break;
 899
 900                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 901                                       /* val.l = constant                             */
 902
 903                         var_to_reg_int(s1, src, REG_ITMP1);
 904                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 905                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 906                                 M_LSUB_IMM(s1, iptr->val.l, d);
 907                                 }
 908                         else {
 909                                 LCONST(REG_ITMP2, iptr->val.l);
 910                                 M_LSUB(s1, REG_ITMP2, d);
 911                                 }
 912                         store_reg_to_var_int(iptr->dst, d);
 913                         break;
 914
 915                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 916
 917                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 918                         var_to_reg_int(s2, src, REG_ITMP2);
 919                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 920                         M_IMUL(s1, s2, d);
 921                         store_reg_to_var_int(iptr->dst, d);
 922                         break;
 923
 924                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 925                                       /* val.i = constant                             */
 926
 927                         var_to_reg_int(s1, src, REG_ITMP1);
 928                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 929                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 930                                 M_IMUL_IMM(s1, iptr->val.i, d);
 931                                 }
 932                         else {
 933                                 ICONST(REG_ITMP2, iptr->val.i);
 934                                 M_IMUL(s1, REG_ITMP2, d);
 935                                 }
 936                         store_reg_to_var_int(iptr->dst, d);
 937                         break;
 938
 939                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 940
 941                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 942                         var_to_reg_int(s2, src, REG_ITMP2);
 943                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 944                         M_LMUL (s1, s2, d);
 945                         store_reg_to_var_int(iptr->dst, d);
 946                         break;
 947
 948                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
 949                                       /* val.l = constant                             */
 950
 951                         var_to_reg_int(s1, src, REG_ITMP1);
 952                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 953                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 954                                 M_LMUL_IMM(s1, iptr->val.l, d);
 955                                 }
 956                         else {
 957                                 LCONST(REG_ITMP2, iptr->val.l);
 958                                 M_LMUL(s1, REG_ITMP2, d);
 959                                 }
 960                         store_reg_to_var_int(iptr->dst, d);
 961                         break;
 962
 963                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
 964                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
 965
 966                         var_to_reg_int(s1, src, REG_ITMP1);
 967                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 968                         if (iptr->val.i <= 15) {
 969                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
 970                                 M_CMOVGE(s1, s1, REG_ITMP2);
 971                                 }
 972                         else {
 973                                 M_SRA_IMM(s1, 63, REG_ITMP2);
 974                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
 975                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
 976                                 }
 977                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
 978                         store_reg_to_var_int(iptr->dst, d);
 979                         break;
 980
 981                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 982
 983                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 984                         var_to_reg_int(s2, src, REG_ITMP2);
 985                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 986                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 987                         M_SLL(s1, REG_ITMP3, d);
 988                         M_IADD(d, REG_ZERO, d);
 989                         store_reg_to_var_int(iptr->dst, d);
 990                         break;
 991
 992                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
 993                                       /* val.i = constant                             */
 994
 995                         var_to_reg_int(s1, src, REG_ITMP1);
 996                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 997                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
 998                         M_IADD(d, REG_ZERO, d);
 999                         store_reg_to_var_int(iptr->dst, d);
1000                         break;
1001
1002                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1003
1004                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1005                         var_to_reg_int(s2, src, REG_ITMP2);
1006                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1007                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1008                         M_SRA(s1, REG_ITMP3, d);
1009                         store_reg_to_var_int(iptr->dst, d);
1010                         break;
1011
1012                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1013                                       /* val.i = constant                             */
1014
1015                         var_to_reg_int(s1, src, REG_ITMP1);
1016                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1017                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1018                         store_reg_to_var_int(iptr->dst, d);
1019                         break;
1020
1021                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1022
1023                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1024                         var_to_reg_int(s2, src, REG_ITMP2);
1025                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1026                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1027             M_IZEXT(s1, d);
1028                         M_SRL(d, REG_ITMP2, d);
1029                         M_IADD(d, REG_ZERO, d);
1030                         store_reg_to_var_int(iptr->dst, d);
1031                         break;
1032
1033                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1034                                       /* val.i = constant                             */
1035
1036                         var_to_reg_int(s1, src, REG_ITMP1);
1037                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1038             M_IZEXT(s1, d);
1039                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
1040                         M_IADD(d, REG_ZERO, d);
1041                         store_reg_to_var_int(iptr->dst, d);
1042                         break;
1043
1044                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1045
1046                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1047                         var_to_reg_int(s2, src, REG_ITMP2);
1048                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1049                         M_SLL(s1, s2, d);
1050                         store_reg_to_var_int(iptr->dst, d);
1051                         break;
1052
1053                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1054                                       /* val.i = constant                             */
1055
1056                         var_to_reg_int(s1, src, REG_ITMP1);
1057                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1058                         M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
1059                         store_reg_to_var_int(iptr->dst, d);
1060                         break;
1061
1062                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1063
1064                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1065                         var_to_reg_int(s2, src, REG_ITMP2);
1066                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1067                         M_SRA(s1, s2, d);
1068                         store_reg_to_var_int(iptr->dst, d);
1069                         break;
1070
1071                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1072                                       /* val.i = constant                             */
1073
1074                         var_to_reg_int(s1, src, REG_ITMP1);
1075                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1076                         M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
1077                         store_reg_to_var_int(iptr->dst, d);
1078                         break;
1079
1080                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1081
1082                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1083                         var_to_reg_int(s2, src, REG_ITMP2);
1084                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1085                         M_SRL(s1, s2, d);
1086                         store_reg_to_var_int(iptr->dst, d);
1087                         break;
1088
1089                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1090                                       /* val.i = constant                             */
1091
1092                         var_to_reg_int(s1, src, REG_ITMP1);
1093                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1094                         M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
1095                         store_reg_to_var_int(iptr->dst, d);
1096                         break;
1097
1098                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1099                 case ICMD_LAND:
1100
1101                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1102                         var_to_reg_int(s2, src, REG_ITMP2);
1103                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1104                         M_AND(s1, s2, d);
1105                         store_reg_to_var_int(iptr->dst, d);
1106                         break;
1107
1108                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1109                                       /* val.i = constant                             */
1110
1111                         var_to_reg_int(s1, src, REG_ITMP1);
1112                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1113                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1114                                 M_AND_IMM(s1, iptr->val.i, d);
1115                                 }
1116                         else if (iptr->val.i == 0xffff) {
1117                                 M_CZEXT(s1, d);
1118                                 }
1119                         else if (iptr->val.i == 0xffffff) {
1120                                 M_ZAPNOT_IMM(s1, 0x07, d);
1121                                 }
1122                         else {
1123                                 ICONST(REG_ITMP2, iptr->val.i);
1124                                 M_AND(s1, REG_ITMP2, d);
1125                                 }
1126                         store_reg_to_var_int(iptr->dst, d);
1127                         break;
1128
1129                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1130                                       /* val.i = constant                             */
1131
1132                         var_to_reg_int(s1, src, REG_ITMP1);
1133                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1134                         if (s1 == d) {
1135                                 M_MOV(s1, REG_ITMP1);
1136                                 s1 = REG_ITMP1;
1137                                 }
1138                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1139                                 M_AND_IMM(s1, iptr->val.i, d);
1140                                 M_BGEZ(s1, 3);
1141                                 M_ISUB(REG_ZERO, s1, d);
1142                                 M_AND_IMM(d, iptr->val.i, d);
1143                                 }
1144                         else if (iptr->val.i == 0xffff) {
1145                                 M_CZEXT(s1, d);
1146                                 M_BGEZ(s1, 3);
1147                                 M_ISUB(REG_ZERO, s1, d);
1148                                 M_CZEXT(d, d);
1149                                 }
1150                         else if (iptr->val.i == 0xffffff) {
1151                                 M_ZAPNOT_IMM(s1, 0x07, d);
1152                                 M_BGEZ(s1, 3);
1153                                 M_ISUB(REG_ZERO, s1, d);
1154                                 M_ZAPNOT_IMM(d, 0x07, d);
1155                                 }
1156                         else {
1157                                 ICONST(REG_ITMP2, iptr->val.i);
1158                                 M_AND(s1, REG_ITMP2, d);
1159                                 M_BGEZ(s1, 3);
1160                                 M_ISUB(REG_ZERO, s1, d);
1161                                 M_AND(d, REG_ITMP2, d);
1162                                 }
1163                         M_ISUB(REG_ZERO, d, d);
1164                         store_reg_to_var_int(iptr->dst, d);
1165                         break;
1166
1167                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1168                                       /* val.l = constant                             */
1169
1170                         var_to_reg_int(s1, src, REG_ITMP1);
1171                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1172                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1173                                 M_AND_IMM(s1, iptr->val.l, d);
1174                                 }
1175                         else if (iptr->val.l == 0xffffL) {
1176                                 M_CZEXT(s1, d);
1177                                 }
1178                         else if (iptr->val.l == 0xffffffL) {
1179                                 M_ZAPNOT_IMM(s1, 0x07, d);
1180                                 }
1181                         else if (iptr->val.l == 0xffffffffL) {
1182                                 M_IZEXT(s1, d);
1183                                 }
1184                         else if (iptr->val.l == 0xffffffffffL) {
1185                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1186                                 }
1187                         else if (iptr->val.l == 0xffffffffffffL) {
1188                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1189                                 }
1190                         else if (iptr->val.l == 0xffffffffffffffL) {
1191                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1192                                 }
1193                         else {
1194                                 LCONST(REG_ITMP2, iptr->val.l);
1195                                 M_AND(s1, REG_ITMP2, d);
1196                                 }
1197                         store_reg_to_var_int(iptr->dst, d);
1198                         break;
1199
1200                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1201                                       /* val.l = constant                             */
1202
1203                         var_to_reg_int(s1, src, REG_ITMP1);
1204                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1205                         if (s1 == d) {
1206                                 M_MOV(s1, REG_ITMP1);
1207                                 s1 = REG_ITMP1;
1208                                 }
1209                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1210                                 M_AND_IMM(s1, iptr->val.l, d);
1211                                 M_BGEZ(s1, 3);
1212                                 M_LSUB(REG_ZERO, s1, d);
1213                                 M_AND_IMM(d, iptr->val.l, d);
1214                                 }
1215                         else if (iptr->val.l == 0xffffL) {
1216                                 M_CZEXT(s1, d);
1217                                 M_BGEZ(s1, 3);
1218                                 M_LSUB(REG_ZERO, s1, d);
1219                                 M_CZEXT(d, d);
1220                                 }
1221                         else if (iptr->val.l == 0xffffffL) {
1222                                 M_ZAPNOT_IMM(s1, 0x07, d);
1223                                 M_BGEZ(s1, 3);
1224                                 M_LSUB(REG_ZERO, s1, d);
1225                                 M_ZAPNOT_IMM(d, 0x07, d);
1226                                 }
1227                         else if (iptr->val.l == 0xffffffffL) {
1228                                 M_IZEXT(s1, d);
1229                                 M_BGEZ(s1, 3);
1230                                 M_LSUB(REG_ZERO, s1, d);
1231                                 M_IZEXT(d, d);
1232                                 }
1233                         else if (iptr->val.l == 0xffffffffffL) {
1234                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1235                                 M_BGEZ(s1, 3);
1236                                 M_LSUB(REG_ZERO, s1, d);
1237                                 M_ZAPNOT_IMM(d, 0x1f, d);
1238                                 }
1239                         else if (iptr->val.l == 0xffffffffffffL) {
1240                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1241                                 M_BGEZ(s1, 3);
1242                                 M_LSUB(REG_ZERO, s1, d);
1243                                 M_ZAPNOT_IMM(d, 0x3f, d);
1244                                 }
1245                         else if (iptr->val.l == 0xffffffffffffffL) {
1246                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1247                                 M_BGEZ(s1, 3);
1248                                 M_LSUB(REG_ZERO, s1, d);
1249                                 M_ZAPNOT_IMM(d, 0x7f, d);
1250                                 }
1251                         else {
1252                                 LCONST(REG_ITMP2, iptr->val.l);
1253                                 M_AND(s1, REG_ITMP2, d);
1254                                 M_BGEZ(s1, 3);
1255                                 M_LSUB(REG_ZERO, s1, d);
1256                                 M_AND(d, REG_ITMP2, d);
1257                                 }
1258                         M_LSUB(REG_ZERO, d, d);
1259                         store_reg_to_var_int(iptr->dst, d);
1260                         break;
1261
1262                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1263                 case ICMD_LOR:
1264
1265                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1266                         var_to_reg_int(s2, src, REG_ITMP2);
1267                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1268                         M_OR( s1,s2, d);
1269                         store_reg_to_var_int(iptr->dst, d);
1270                         break;
1271
1272                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1273                                       /* val.i = constant                             */
1274
1275                         var_to_reg_int(s1, src, REG_ITMP1);
1276                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1277                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1278                                 M_OR_IMM(s1, iptr->val.i, d);
1279                                 }
1280                         else {
1281                                 ICONST(REG_ITMP2, iptr->val.i);
1282                                 M_OR(s1, REG_ITMP2, d);
1283                                 }
1284                         store_reg_to_var_int(iptr->dst, d);
1285                         break;
1286
1287                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1288                                       /* val.l = constant                             */
1289
1290                         var_to_reg_int(s1, src, REG_ITMP1);
1291                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1292                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1293                                 M_OR_IMM(s1, iptr->val.l, d);
1294                                 }
1295                         else {
1296                                 LCONST(REG_ITMP2, iptr->val.l);
1297                                 M_OR(s1, REG_ITMP2, d);
1298                                 }
1299                         store_reg_to_var_int(iptr->dst, d);
1300                         break;
1301
1302                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1303                 case ICMD_LXOR:
1304
1305                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1306                         var_to_reg_int(s2, src, REG_ITMP2);
1307                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1308                         M_XOR(s1, s2, d);
1309                         store_reg_to_var_int(iptr->dst, d);
1310                         break;
1311
1312                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1313                                       /* val.i = constant                             */
1314
1315                         var_to_reg_int(s1, src, REG_ITMP1);
1316                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1317                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1318                                 M_XOR_IMM(s1, iptr->val.i, d);
1319                                 }
1320                         else {
1321                                 ICONST(REG_ITMP2, iptr->val.i);
1322                                 M_XOR(s1, REG_ITMP2, d);
1323                                 }
1324                         store_reg_to_var_int(iptr->dst, d);
1325                         break;
1326
1327                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1328                                       /* val.l = constant                             */
1329
1330                         var_to_reg_int(s1, src, REG_ITMP1);
1331                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1332                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1333                                 M_XOR_IMM(s1, iptr->val.l, d);
1334                                 }
1335                         else {
1336                                 LCONST(REG_ITMP2, iptr->val.l);
1337                                 M_XOR(s1, REG_ITMP2, d);
1338                                 }
1339                         store_reg_to_var_int(iptr->dst, d);
1340                         break;
1341
1342
1343                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1344
1345                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1346                         var_to_reg_int(s2, src, REG_ITMP2);
1347                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1348                         M_CMPLT(s1, s2, REG_ITMP3);
1349                         M_CMPLT(s2, s1, REG_ITMP1);
1350                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1351                         store_reg_to_var_int(iptr->dst, d);
1352                         break;
1353
1354
1355                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1356                                       /* op1 = variable, val.i = constant             */
1357
1358                         var = &(r->locals[iptr->op1][TYPE_INT]);
1359                         if (var->flags & INMEMORY) {
1360                                 s1 = REG_ITMP1;
1361                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1362                                 }
1363                         else
1364                                 s1 = var->regoff;
1365                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1366                                 M_IADD_IMM(s1, iptr->val.i, s1);
1367                                 }
1368                         else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1369                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1370                                 }
1371                         else {
1372                                 M_LDA (s1, s1, iptr->val.i);
1373                                 M_IADD(s1, REG_ZERO, s1);
1374                                 }
1375                         if (var->flags & INMEMORY)
1376                                 M_LST(s1, REG_SP, 8 * var->regoff);
1377                         break;
1378
1379
1380                 /* floating operations ************************************************/
1381
1382                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1383
1384                         var_to_reg_flt(s1, src, REG_FTMP1);
1385                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1386                         M_FMOVN(s1, d);
1387                         store_reg_to_var_flt(iptr->dst, d);
1388                         break;
1389
1390                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1391
1392                         var_to_reg_flt(s1, src, REG_FTMP1);
1393                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1394                         M_FMOVN(s1, d);
1395                         store_reg_to_var_flt(iptr->dst, d);
1396                         break;
1397
1398                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1399
1400                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1401                         var_to_reg_flt(s2, src, REG_FTMP2);
1402                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1403                         if (opt_noieee) {
1404                                 M_FADD(s1, s2, d);
1405                                 }
1406                         else {
1407                                 if (d == s1 || d == s2) {
1408                                         M_FADDS(s1, s2, REG_FTMP3);
1409                                         M_TRAPB;
1410                                         M_FMOV(REG_FTMP3, d);
1411                                         }
1412                                 else {
1413                                         M_FADDS(s1, s2, d);
1414                                         M_TRAPB;
1415                                         }
1416                                 }
1417                         store_reg_to_var_flt(iptr->dst, d);
1418                         break;
1419
1420                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1421
1422                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1423                         var_to_reg_flt(s2, src, REG_FTMP2);
1424                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1425                         if (opt_noieee) {
1426                                 M_DADD(s1, s2, d);
1427                                 }
1428                         else {
1429                                 if (d == s1 || d == s2) {
1430                                         M_DADDS(s1, s2, REG_FTMP3);
1431                                         M_TRAPB;
1432                                         M_FMOV(REG_FTMP3, d);
1433                                         }
1434                                 else {
1435                                         M_DADDS(s1, s2, d);
1436                                         M_TRAPB;
1437                                         }
1438                                 }
1439                         store_reg_to_var_flt(iptr->dst, d);
1440                         break;
1441
1442                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1443
1444                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1445                         var_to_reg_flt(s2, src, REG_FTMP2);
1446                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1447                         if (opt_noieee) {
1448                                 M_FSUB(s1, s2, d);
1449                                 }
1450                         else {
1451                                 if (d == s1 || d == s2) {
1452                                         M_FSUBS(s1, s2, REG_FTMP3);
1453                                         M_TRAPB;
1454                                         M_FMOV(REG_FTMP3, d);
1455                                         }
1456                                 else {
1457                                         M_FSUBS(s1, s2, d);
1458                                         M_TRAPB;
1459                                         }
1460                                 }
1461                         store_reg_to_var_flt(iptr->dst, d);
1462                         break;
1463
1464                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1465
1466                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1467                         var_to_reg_flt(s2, src, REG_FTMP2);
1468                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1469                         if (opt_noieee) {
1470                                 M_DSUB(s1, s2, d);
1471                                 }
1472                         else {
1473                                 if (d == s1 || d == s2) {
1474                                         M_DSUBS(s1, s2, REG_FTMP3);
1475                                         M_TRAPB;
1476                                         M_FMOV(REG_FTMP3, d);
1477                                         }
1478                                 else {
1479                                         M_DSUBS(s1, s2, d);
1480                                         M_TRAPB;
1481                                         }
1482                                 }
1483                         store_reg_to_var_flt(iptr->dst, d);
1484                         break;
1485
1486                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1487
1488                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1489                         var_to_reg_flt(s2, src, REG_FTMP2);
1490                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1491                         if (opt_noieee) {
1492                                 M_FMUL(s1, s2, d);
1493                                 }
1494                         else {
1495                                 if (d == s1 || d == s2) {
1496                                         M_FMULS(s1, s2, REG_FTMP3);
1497                                         M_TRAPB;
1498                                         M_FMOV(REG_FTMP3, d);
1499                                         }
1500                                 else {
1501                                         M_FMULS(s1, s2, d);
1502                                         M_TRAPB;
1503                                         }
1504                                 }
1505                         store_reg_to_var_flt(iptr->dst, d);
1506                         break;
1507
1508                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1509
1510                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1511                         var_to_reg_flt(s2, src, REG_FTMP2);
1512                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1513                         if (opt_noieee) {
1514                                 M_DMUL(s1, s2, d);
1515                                 }
1516                         else {
1517                                 if (d == s1 || d == s2) {
1518                                         M_DMULS(s1, s2, REG_FTMP3);
1519                                         M_TRAPB;
1520                                         M_FMOV(REG_FTMP3, d);
1521                                         }
1522                                 else {
1523                                         M_DMULS(s1, s2, d);
1524                                         M_TRAPB;
1525                                         }
1526                                 }
1527                         store_reg_to_var_flt(iptr->dst, d);
1528                         break;
1529
1530                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1531
1532                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1533                         var_to_reg_flt(s2, src, REG_FTMP2);
1534                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1535                         if (opt_noieee) {
1536                                 M_FDIV(s1, s2, d);
1537                                 }
1538                         else {
1539                                 if (d == s1 || d == s2) {
1540                                         M_FDIVS(s1, s2, REG_FTMP3);
1541                                         M_TRAPB;
1542                                         M_FMOV(REG_FTMP3, d);
1543                                         }
1544                                 else {
1545                                         M_FDIVS(s1, s2, d);
1546                                         M_TRAPB;
1547                                         }
1548                                 }
1549                         store_reg_to_var_flt(iptr->dst, d);
1550                         break;
1551
1552                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1553
1554                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1555                         var_to_reg_flt(s2, src, REG_FTMP2);
1556                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1557                         if (opt_noieee) {
1558                                 M_DDIV(s1, s2, d);
1559                                 }
1560                         else {
1561                                 if (d == s1 || d == s2) {
1562                                         M_DDIVS(s1, s2, REG_FTMP3);
1563                                         M_TRAPB;
1564                                         M_FMOV(REG_FTMP3, d);
1565                                         }
1566                                 else {
1567                                         M_DDIVS(s1, s2, d);
1568                                         M_TRAPB;
1569                                         }
1570                                 }
1571                         store_reg_to_var_flt(iptr->dst, d);
1572                         break;
1573
1574                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1575                 case ICMD_L2F:
1576                         var_to_reg_int(s1, src, REG_ITMP1);
1577                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1578                         a = dseg_adddouble(0.0);
1579                         M_LST (s1, REG_PV, a);
1580                         M_DLD (d, REG_PV, a);
1581                         M_CVTLF(d, d);
1582                         store_reg_to_var_flt(iptr->dst, d);
1583                         break;
1584
1585                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1586                 case ICMD_L2D:
1587                         var_to_reg_int(s1, src, REG_ITMP1);
1588                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1589                         a = dseg_adddouble(0.0);
1590                         M_LST (s1, REG_PV, a);
1591                         M_DLD (d, REG_PV, a);
1592                         M_CVTLD(d, d);
1593                         store_reg_to_var_flt(iptr->dst, d);
1594                         break;
1595
1596                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1597                 case ICMD_D2I:
1598                         var_to_reg_flt(s1, src, REG_FTMP1);
1599                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1600                         a = dseg_adddouble(0.0);
1601                         M_CVTDL_C(s1, REG_FTMP2);
1602                         M_CVTLI(REG_FTMP2, REG_FTMP3);
1603                         M_DST (REG_FTMP3, REG_PV, a);
1604                         M_ILD (d, REG_PV, a);
1605                         store_reg_to_var_int(iptr->dst, d);
1606                         break;
1607
1608                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1609                 case ICMD_D2L:
1610                         var_to_reg_flt(s1, src, REG_FTMP1);
1611                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1612                         a = dseg_adddouble(0.0);
1613                         M_CVTDL_C(s1, REG_FTMP2);
1614                         M_DST (REG_FTMP2, REG_PV, a);
1615                         M_LLD (d, REG_PV, a);
1616                         store_reg_to_var_int(iptr->dst, d);
1617                         break;
1618
1619                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1620
1621                         var_to_reg_flt(s1, src, REG_FTMP1);
1622                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1623                         M_CVTFDS(s1, d);
1624                         M_TRAPB;
1625                         store_reg_to_var_flt(iptr->dst, d);
1626                         break;
1627
1628                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1629
1630                         var_to_reg_flt(s1, src, REG_FTMP1);
1631                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1632                         if (opt_noieee) {
1633                                 M_CVTDF(s1, d);
1634                                 }
1635                         else {
1636                                 M_CVTDFS(s1, d);
1637                                 M_TRAPB;
1638                                 }
1639                         store_reg_to_var_flt(iptr->dst, d);
1640                         break;
1641
1642                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1643                 case ICMD_DCMPL:
1644                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1645                         var_to_reg_flt(s2, src, REG_FTMP2);
1646                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1647                         if (opt_noieee) {
1648                                 M_LSUB_IMM(REG_ZERO, 1, d);
1649                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1650                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1651                                 M_CLR   (d);
1652                                 M_FCMPLT(s2, s1, REG_FTMP3);
1653                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1654                                 M_LADD_IMM(REG_ZERO, 1, d);
1655                                 }
1656                         else {
1657                                 M_LSUB_IMM(REG_ZERO, 1, d);
1658                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1659                                 M_TRAPB;
1660                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1661                                 M_CLR   (d);
1662                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1663                                 M_TRAPB;
1664                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1665                                 M_LADD_IMM(REG_ZERO, 1, d);
1666                                 }
1667                         store_reg_to_var_int(iptr->dst, d);
1668                         break;
1669
1670                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1671                 case ICMD_DCMPG:
1672                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1673                         var_to_reg_flt(s2, src, REG_FTMP2);
1674                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1675                         if (opt_noieee) {
1676                                 M_LADD_IMM(REG_ZERO, 1, d);
1677                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1678                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1679                                 M_CLR   (d);
1680                                 M_FCMPLT(s1, s2, REG_FTMP3);
1681                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1682                                 M_LSUB_IMM(REG_ZERO, 1, d);
1683                                 }
1684                         else {
1685                                 M_LADD_IMM(REG_ZERO, 1, d);
1686                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1687                                 M_TRAPB;
1688                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1689                                 M_CLR   (d);
1690                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1691                                 M_TRAPB;
1692                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1693                                 M_LSUB_IMM(REG_ZERO, 1, d);
1694                                 }
1695                         store_reg_to_var_int(iptr->dst, d);
1696                         break;
1697
1698
1699                 /* memory operations **************************************************/
1700
1701 #define gen_bound_check \
1702     if (checkbounds) { \
1703         M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1704         M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
1705         M_BEQZ(REG_ITMP3, 0);\
1706         codegen_addxboundrefs(mcodeptr, s2); \
1707     }
1708
1709                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1710
1711                         var_to_reg_int(s1, src, REG_ITMP1);
1712                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1713                         gen_nullptr_check(s1);
1714                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1715                         store_reg_to_var_int(iptr->dst, d);
1716                         break;
1717
1718                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1719
1720                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1721                         var_to_reg_int(s2, src, REG_ITMP2);
1722                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1723                         if (iptr->op1 == 0) {
1724                                 gen_nullptr_check(s1);
1725                                 gen_bound_check;
1726                                 }
1727                         M_SAADDQ(s2, s1, REG_ITMP1);
1728                         M_ALD( d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1729                         store_reg_to_var_int(iptr->dst, d);
1730                         break;
1731
1732                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1733
1734                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1735                         var_to_reg_int(s2, src, REG_ITMP2);
1736                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1737                         if (iptr->op1 == 0) {
1738                                 gen_nullptr_check(s1);
1739                                 gen_bound_check;
1740                                 }
1741                         M_S8ADDQ(s2, s1, REG_ITMP1);
1742                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1743                         store_reg_to_var_int(iptr->dst, d);
1744                         break;
1745
1746                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1747
1748                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1749                         var_to_reg_int(s2, src, REG_ITMP2);
1750                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1751                         if (iptr->op1 == 0) {
1752                                 gen_nullptr_check(s1);
1753                                 gen_bound_check;
1754                                 }
1755
1756                         M_S4ADDQ(s2, s1, REG_ITMP1);
1757                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1758                         store_reg_to_var_int(iptr->dst, d);
1759                         break;
1760
1761                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1762
1763                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1764                         var_to_reg_int(s2, src, REG_ITMP2);
1765                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1766                         if (iptr->op1 == 0) {
1767                                 gen_nullptr_check(s1);
1768                                 gen_bound_check;
1769                                 }
1770                         M_S4ADDQ(s2, s1, REG_ITMP1);
1771                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1772                         store_reg_to_var_flt(iptr->dst, d);
1773                         break;
1774
1775                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1776
1777                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1778                         var_to_reg_int(s2, src, REG_ITMP2);
1779                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1780                         if (iptr->op1 == 0) {
1781                                 gen_nullptr_check(s1);
1782                                 gen_bound_check;
1783                                 }
1784                         M_S8ADDQ(s2, s1, REG_ITMP1);
1785                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1786                         store_reg_to_var_flt(iptr->dst, d);
1787                         break;
1788
1789                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1790
1791                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1792                         var_to_reg_int(s2, src, REG_ITMP2);
1793                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1794                         if (iptr->op1 == 0) {
1795                                 gen_nullptr_check(s1);
1796                                 gen_bound_check;
1797                                 }
1798                         if (has_ext_instr_set) {
1799                                 M_LADD(s2, s1, REG_ITMP1);
1800                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1801                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1802                                 }
1803                         else {
1804                                 M_LADD (s2, s1, REG_ITMP1);
1805                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1806                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1807                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1808                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
1809                                 }
1810                         store_reg_to_var_int(iptr->dst, d);
1811                         break;
1812
1813                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1814
1815                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1816                         var_to_reg_int(s2, src, REG_ITMP2);
1817                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1818                         if (iptr->op1 == 0) {
1819                                 gen_nullptr_check(s1);
1820                                 gen_bound_check;
1821                                 }
1822                         if (has_ext_instr_set) {
1823                                 M_LADD(s2, s1, REG_ITMP1);
1824                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1825                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
1826                                 M_SSEXT(d, d);
1827                                 }
1828                         else {
1829                                 M_LADD(s2, s1, REG_ITMP1);
1830                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1831                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1832                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
1833                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1834                                 M_SRA_IMM(d, 48, d);
1835                                 }
1836                         store_reg_to_var_int(iptr->dst, d);
1837                         break;
1838
1839                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1840
1841                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1842                         var_to_reg_int(s2, src, REG_ITMP2);
1843                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1844                         if (iptr->op1 == 0) {
1845                                 gen_nullptr_check(s1);
1846                                 gen_bound_check;
1847                                 }
1848                         if (has_ext_instr_set) {
1849                                 M_LADD   (s2, s1, REG_ITMP1);
1850                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
1851                                 M_BSEXT  (d, d);
1852                                 }
1853                         else {
1854                                 M_LADD(s2, s1, REG_ITMP1);
1855                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1856                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
1857                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1858                                 M_SRA_IMM(d, 56, d);
1859                                 }
1860                         store_reg_to_var_int(iptr->dst, d);
1861                         break;
1862
1863
1864                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1865
1866                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1867                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1868                         if (iptr->op1 == 0) {
1869                                 gen_nullptr_check(s1);
1870                                 gen_bound_check;
1871                                 }
1872                         var_to_reg_int(s3, src, REG_ITMP3);
1873                         M_SAADDQ(s2, s1, REG_ITMP1);
1874                         M_AST   (s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1875                         break;
1876
1877                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1878
1879                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1880                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1881                         if (iptr->op1 == 0) {
1882                                 gen_nullptr_check(s1);
1883                                 gen_bound_check;
1884                                 }
1885                         var_to_reg_int(s3, src, REG_ITMP3);
1886                         M_S8ADDQ(s2, s1, REG_ITMP1);
1887                         M_LST   (s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1888                         break;
1889
1890                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1891
1892                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1893                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1894                         if (iptr->op1 == 0) {
1895                                 gen_nullptr_check(s1);
1896                                 gen_bound_check;
1897                                 }
1898
1899                         var_to_reg_int(s3, src, REG_ITMP3);
1900                         M_S4ADDQ(s2, s1, REG_ITMP1);
1901                         M_IST   (s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1902                         break;
1903
1904                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1905
1906                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1907                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1908                         if (iptr->op1 == 0) {
1909                                 gen_nullptr_check(s1);
1910                                 gen_bound_check;
1911                                 }
1912                         var_to_reg_flt(s3, src, REG_FTMP3);
1913                         M_S4ADDQ(s2, s1, REG_ITMP1);
1914                         M_FST   (s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1915                         break;
1916
1917                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1918
1919                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1920                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1921                         if (iptr->op1 == 0) {
1922                                 gen_nullptr_check(s1);
1923                                 gen_bound_check;
1924                                 }
1925                         var_to_reg_flt(s3, src, REG_FTMP3);
1926                         M_S8ADDQ(s2, s1, REG_ITMP1);
1927                         M_DST   (s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1928                         break;
1929
1930                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1931
1932                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1933                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1934                         if (iptr->op1 == 0) {
1935                                 gen_nullptr_check(s1);
1936                                 gen_bound_check;
1937                                 }
1938                         var_to_reg_int(s3, src, REG_ITMP3);
1939                         if (has_ext_instr_set) {
1940                                 M_LADD(s2, s1, REG_ITMP1);
1941                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1942                                 M_SST (s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1943                                 }
1944                         else {
1945                                 M_LADD (s2, s1, REG_ITMP1);
1946                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1947                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1948                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1949                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1950                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1951                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
1952                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1953                                 }
1954                         break;
1955
1956                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1957
1958                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1959                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1960                         if (iptr->op1 == 0) {
1961                                 gen_nullptr_check(s1);
1962                                 gen_bound_check;
1963                                 }
1964                         var_to_reg_int(s3, src, REG_ITMP3);
1965                         if (has_ext_instr_set) {
1966                                 M_LADD(s2, s1, REG_ITMP1);
1967                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1968                                 M_SST (s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1969                                 }
1970                         else {
1971                                 M_LADD (s2, s1, REG_ITMP1);
1972                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1973                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1974                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1975                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1976                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1977                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
1978                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1979                                 }
1980                         break;
1981
1982                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1983
1984                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1985                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1986                         if (iptr->op1 == 0) {
1987                                 gen_nullptr_check(s1);
1988                                 gen_bound_check;
1989                                 }
1990                         var_to_reg_int(s3, src, REG_ITMP3);
1991                         if (has_ext_instr_set) {
1992                                 M_LADD(s2, s1, REG_ITMP1);
1993                                 M_BST (s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1994                                 }
1995                         else {
1996                                 M_LADD (s2, s1, REG_ITMP1);
1997                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1998                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1999                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
2000                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2001                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2002                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2003                                 }
2004                         break;
2005
2006
2007                 case ICMD_IASTORECONST:   /* ..., arrayref, index  ==> ...            */
2008
2009                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2010                         var_to_reg_int(s2, src, REG_ITMP2);
2011                         if (iptr->op1 == 0) {
2012                                 gen_nullptr_check(s1);
2013                                 gen_bound_check;
2014                         }
2015                         M_S4ADDQ(s2, s1, REG_ITMP1);
2016                         M_IST(REG_ZERO, REG_ITMP1, OFFSET(java_intarray, data[0]));
2017                         break;
2018
2019                 case ICMD_LASTORECONST:   /* ..., arrayref, index  ==> ...            */
2020
2021                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2022                         var_to_reg_int(s2, src, REG_ITMP2);
2023                         if (iptr->op1 == 0) {
2024                                 gen_nullptr_check(s1);
2025                                 gen_bound_check;
2026                         }
2027                         M_S8ADDQ(s2, s1, REG_ITMP1);
2028                         M_LST(REG_ZERO, REG_ITMP1, OFFSET(java_longarray, data[0]));
2029                         break;
2030
2031                 case ICMD_AASTORECONST:   /* ..., arrayref, index  ==> ...            */
2032
2033                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2034                         var_to_reg_int(s2, src, REG_ITMP2);
2035                         if (iptr->op1 == 0) {
2036                                 gen_nullptr_check(s1);
2037                                 gen_bound_check;
2038                         }
2039                         M_SAADDQ(s2, s1, REG_ITMP1);
2040                         M_AST(REG_ZERO, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2041                         break;
2042
2043                 case ICMD_BASTORECONST:   /* ..., arrayref, index  ==> ...            */
2044
2045                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2046                         var_to_reg_int(s2, src, REG_ITMP2);
2047                         if (iptr->op1 == 0) {
2048                                 gen_nullptr_check(s1);
2049                                 gen_bound_check;
2050                         }
2051                         if (has_ext_instr_set) {
2052                                 M_LADD(s2, s1, REG_ITMP1);
2053                                 M_BST(REG_ZERO, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2054
2055                         } else {
2056                                 M_LADD(s2, s1, REG_ITMP1);
2057                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2058                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2059                                 M_INSBL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2060                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2061                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2062                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2063                         }
2064                         break;
2065
2066                 case ICMD_CASTORECONST:   /* ..., arrayref, index  ==> ...            */
2067
2068                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2069                         var_to_reg_int(s2, src, REG_ITMP2);
2070                         if (iptr->op1 == 0) {
2071                                 gen_nullptr_check(s1);
2072                                 gen_bound_check;
2073                         }
2074                         if (has_ext_instr_set) {
2075                                 M_LADD(s2, s1, REG_ITMP1);
2076                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2077                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_chararray, data[0]));
2078
2079                         } else {
2080                                 M_LADD(s2, s1, REG_ITMP1);
2081                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2082                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2083                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2084                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2085                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2086                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2087                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2088                         }
2089                         break;
2090
2091                 case ICMD_SASTORECONST:   /* ..., arrayref, index  ==> ...            */
2092
2093                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2094                         var_to_reg_int(s2, src, REG_ITMP2);
2095                         if (iptr->op1 == 0) {
2096                                 gen_nullptr_check(s1);
2097                                 gen_bound_check;
2098                         }
2099                         if (has_ext_instr_set) {
2100                                 M_LADD(s2, s1, REG_ITMP1);
2101                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2102                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2103
2104                         } else {
2105                                 M_LADD(s2, s1, REG_ITMP1);
2106                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2107                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2108                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2109                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2110                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2111                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2112                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2113                         }
2114                         break;
2115
2116
2117                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2118                                       /* op1 = type, val.a = field address            */
2119
2120                         /* if class isn't yet initialized, do it */
2121                         if (!((fieldinfo *) iptr->val.a)->class->initialized) {
2122                                 /* call helper function which patches this code */
2123                                 a = dseg_addaddress(((fieldinfo *) iptr->val.a)->class);
2124                                 M_ALD(REG_ITMP1, REG_PV, a);
2125                                 a = dseg_addaddress(asm_check_clinit);
2126                                 M_ALD(REG_PV, REG_PV, a);
2127                                 M_JSR(REG_RA, REG_PV);
2128
2129                                 /* recompute pv */
2130                                 s1 = (int) ((u1*) mcodeptr - mcodebase);
2131                                 if (s1 <= 32768) {
2132                                         M_LDA(REG_PV, REG_RA, -s1);
2133                                         M_NOP;
2134
2135                                 } else {
2136                                         s4 ml = -s1, mh = 0;
2137                                         while (ml < -32768) { ml += 65536; mh--; }
2138                                         M_LDA(REG_PV, REG_RA, ml);
2139                                         M_LDAH(REG_PV, REG_PV, mh);
2140                                 }
2141                         }
2142
2143                         a = dseg_addaddress(&(((fieldinfo *)(iptr->val.a))->value));
2144                         M_ALD(REG_ITMP1, REG_PV, a);
2145                         switch (iptr->op1) {
2146                                 case TYPE_INT:
2147                                         var_to_reg_int(s2, src, REG_ITMP2);
2148                                         M_IST(s2, REG_ITMP1, 0);
2149                                         break;
2150                                 case TYPE_LNG:
2151                                         var_to_reg_int(s2, src, REG_ITMP2);
2152                                         M_LST(s2, REG_ITMP1, 0);
2153                                         break;
2154                                 case TYPE_ADR:
2155                                         var_to_reg_int(s2, src, REG_ITMP2);
2156                                         M_AST(s2, REG_ITMP1, 0);
2157                                         break;
2158                                 case TYPE_FLT:
2159                                         var_to_reg_flt(s2, src, REG_FTMP2);
2160                                         M_FST(s2, REG_ITMP1, 0);
2161                                         break;
2162                                 case TYPE_DBL:
2163                                         var_to_reg_flt(s2, src, REG_FTMP2);
2164                                         M_DST(s2, REG_ITMP1, 0);
2165                                         break;
2166                                 default: panic ("internal error");
2167                                 }
2168                         break;
2169
2170                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2171                                       /* op1 = type, val.a = field address            */
2172
2173                         /* if class isn't yet initialized, do it */
2174                         if (!((fieldinfo *) iptr->val.a)->class->initialized) {
2175                                 /* call helper function which patches this code */
2176                                 a = dseg_addaddress(((fieldinfo *) iptr->val.a)->class);
2177                                 M_ALD(REG_ITMP1, REG_PV, a);
2178                                 a = dseg_addaddress(asm_check_clinit);
2179                                 M_ALD(REG_PV, REG_PV, a);
2180                                 M_JSR(REG_RA, REG_PV);
2181
2182                                 /* recompute pv */
2183                                 s1 = (int) ((u1*) mcodeptr - mcodebase);
2184                                 if (s1 <= 32768) {
2185                                         M_LDA(REG_PV, REG_RA, -s1);
2186                                         M_NOP;
2187
2188                                 } else {
2189                                         s4 ml = -s1, mh = 0;
2190                                         while (ml < -32768) { ml += 65536; mh--; }
2191                                         M_LDA(REG_PV, REG_RA, ml);
2192                                         M_LDAH(REG_PV, REG_PV, mh);
2193                                 }
2194                         }
2195
2196                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2197                         M_ALD(REG_ITMP1, REG_PV, a);
2198                         switch (iptr->op1) {
2199                                 case TYPE_INT:
2200                                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2201                                         M_ILD(d, REG_ITMP1, 0);
2202                                         store_reg_to_var_int(iptr->dst, d);
2203                                         break;
2204                                 case TYPE_LNG:
2205                                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2206                                         M_LLD(d, REG_ITMP1, 0);
2207                                         store_reg_to_var_int(iptr->dst, d);
2208                                         break;
2209                                 case TYPE_ADR:
2210                                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2211                                         M_ALD(d, REG_ITMP1, 0);
2212                                         store_reg_to_var_int(iptr->dst, d);
2213                                         break;
2214                                 case TYPE_FLT:
2215                                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
2216                                         M_FLD(d, REG_ITMP1, 0);
2217                                         store_reg_to_var_flt(iptr->dst, d);
2218                                         break;
2219                                 case TYPE_DBL:
2220                                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
2221                                         M_DLD(d, REG_ITMP1, 0);
2222                                         store_reg_to_var_flt(iptr->dst, d);
2223                                         break;
2224                                 default: panic ("internal error");
2225                                 }
2226                         break;
2227
2228
2229                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2230                                       /* op1 = type, val.i = field offset             */
2231
2232                         a = ((fieldinfo *)(iptr->val.a))->offset;
2233                         switch (iptr->op1) {
2234                                 case TYPE_INT:
2235                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2236                                         var_to_reg_int(s2, src, REG_ITMP2);
2237                                         gen_nullptr_check(s1);
2238                                         M_IST(s2, s1, a);
2239                                         break;
2240                                 case TYPE_LNG:
2241                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2242                                         var_to_reg_int(s2, src, REG_ITMP2);
2243                                         gen_nullptr_check(s1);
2244                                         M_LST(s2, s1, a);
2245                                         break;
2246                                 case TYPE_ADR:
2247                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2248                                         var_to_reg_int(s2, src, REG_ITMP2);
2249                                         gen_nullptr_check(s1);
2250                                         M_AST(s2, s1, a);
2251                                         break;
2252                                 case TYPE_FLT:
2253                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2254                                         var_to_reg_flt(s2, src, REG_FTMP2);
2255                                         gen_nullptr_check(s1);
2256                                         M_FST(s2, s1, a);
2257                                         break;
2258                                 case TYPE_DBL:
2259                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2260                                         var_to_reg_flt(s2, src, REG_FTMP2);
2261                                         gen_nullptr_check(s1);
2262                                         M_DST(s2, s1, a);
2263                                         break;
2264                                 default: panic ("internal error");
2265                                 }
2266                         break;
2267
2268                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2269                                       /* op1 = type, val.i = field offset             */
2270
2271                         a = ((fieldinfo *)(iptr->val.a))->offset;
2272                         switch (iptr->op1) {
2273                                 case TYPE_INT:
2274                                         var_to_reg_int(s1, src, REG_ITMP1);
2275                                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2276                                         gen_nullptr_check(s1);
2277                                         M_ILD(d, s1, a);
2278                                         store_reg_to_var_int(iptr->dst, d);
2279                                         break;
2280                                 case TYPE_LNG:
2281                                         var_to_reg_int(s1, src, REG_ITMP1);
2282                                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2283                                         gen_nullptr_check(s1);
2284                                         M_LLD(d, s1, a);
2285                                         store_reg_to_var_int(iptr->dst, d);
2286                                         break;
2287                                 case TYPE_ADR:
2288                                         var_to_reg_int(s1, src, REG_ITMP1);
2289                                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2290                                         gen_nullptr_check(s1);
2291                                         M_ALD(d, s1, a);
2292                                         store_reg_to_var_int(iptr->dst, d);
2293                                         break;
2294                                 case TYPE_FLT:
2295                                         var_to_reg_int(s1, src, REG_ITMP1);
2296                                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
2297                                         gen_nullptr_check(s1);
2298                                         M_FLD(d, s1, a);
2299                                         store_reg_to_var_flt(iptr->dst, d);
2300                                         break;
2301                                 case TYPE_DBL:
2302                                         var_to_reg_int(s1, src, REG_ITMP1);
2303                                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
2304                                         gen_nullptr_check(s1);
2305                                         M_DLD(d, s1, a);
2306                                         store_reg_to_var_flt(iptr->dst, d);
2307                                         break;
2308                                 default: panic ("internal error");
2309                                 }
2310                         break;
2311
2312
2313                 /* branch operations **************************************************/
2314
2315 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2316
2317                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2318
2319                         var_to_reg_int(s1, src, REG_ITMP1);
2320                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2321                         a = dseg_addaddress(asm_handle_exception);
2322                         M_ALD(REG_ITMP2, REG_PV, a);
2323                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2324                         M_NOP;              /* nop ensures that XPC is less than the end */
2325                                             /* of basic block                            */
2326                         ALIGNCODENOP;
2327                         break;
2328
2329                 case ICMD_GOTO:         /* ... ==> ...                                */
2330                                         /* op1 = target JavaVM pc                     */
2331                         M_BR(0);
2332                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2333                         ALIGNCODENOP;
2334                         break;
2335
2336                 case ICMD_JSR:          /* ... ==> ...                                */
2337                                         /* op1 = target JavaVM pc                     */
2338
2339                         M_BSR(REG_ITMP1, 0);
2340                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2341                         break;
2342
2343                 case ICMD_RET:          /* ... ==> ...                                */
2344                                         /* op1 = local variable                       */
2345
2346                         var = &(r->locals[iptr->op1][TYPE_ADR]);
2347                         if (var->flags & INMEMORY) {
2348                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2349                                 M_RET(REG_ZERO, REG_ITMP1);
2350                                 }
2351                         else
2352                                 M_RET(REG_ZERO, var->regoff);
2353                         ALIGNCODENOP;
2354                         break;
2355
2356                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2357                                         /* op1 = target JavaVM pc                     */
2358
2359                         var_to_reg_int(s1, src, REG_ITMP1);
2360                         M_BEQZ(s1, 0);
2361                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2362                         break;
2363
2364                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2365                                         /* op1 = target JavaVM pc                     */
2366
2367                         var_to_reg_int(s1, src, REG_ITMP1);
2368                         M_BNEZ(s1, 0);
2369                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2370                         break;
2371
2372                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2373                                         /* op1 = target JavaVM pc, val.i = constant   */
2374
2375                         var_to_reg_int(s1, src, REG_ITMP1);
2376                         if (iptr->val.i == 0) {
2377                                 M_BEQZ(s1, 0);
2378                                 }
2379                         else {
2380                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2381                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2382                                         }
2383                                 else {
2384                                         ICONST(REG_ITMP2, iptr->val.i);
2385                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2386                                         }
2387                                 M_BNEZ(REG_ITMP1, 0);
2388                                 }
2389                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2390                         break;
2391
2392                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2393                                         /* op1 = target JavaVM pc, val.i = constant   */
2394
2395                         var_to_reg_int(s1, src, REG_ITMP1);
2396                         if (iptr->val.i == 0) {
2397                                 M_BLTZ(s1, 0);
2398                                 }
2399                         else {
2400                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2401                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2402                                         }
2403                                 else {
2404                                         ICONST(REG_ITMP2, iptr->val.i);
2405                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2406                                         }
2407                                 M_BNEZ(REG_ITMP1, 0);
2408                                 }
2409                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2410                         break;
2411
2412                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2413                                         /* op1 = target JavaVM pc, val.i = constant   */
2414
2415                         var_to_reg_int(s1, src, REG_ITMP1);
2416                         if (iptr->val.i == 0) {
2417                                 M_BLEZ(s1, 0);
2418                                 }
2419                         else {
2420                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2421                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2422                                         }
2423                                 else {
2424                                         ICONST(REG_ITMP2, iptr->val.i);
2425                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2426                                         }
2427                                 M_BNEZ(REG_ITMP1, 0);
2428                                 }
2429                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2430                         break;
2431
2432                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2433                                         /* op1 = target JavaVM pc, val.i = constant   */
2434
2435                         var_to_reg_int(s1, src, REG_ITMP1);
2436                         if (iptr->val.i == 0) {
2437                                 M_BNEZ(s1, 0);
2438                                 }
2439                         else {
2440                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2441                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2442                                         }
2443                                 else {
2444                                         ICONST(REG_ITMP2, iptr->val.i);
2445                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2446                                         }
2447                                 M_BEQZ(REG_ITMP1, 0);
2448                                 }
2449                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2450                         break;
2451
2452                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2453                                         /* op1 = target JavaVM pc, val.i = constant   */
2454
2455                         var_to_reg_int(s1, src, REG_ITMP1);
2456                         if (iptr->val.i == 0) {
2457                                 M_BGTZ(s1, 0);
2458                                 }
2459                         else {
2460                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2461                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2462                                         }
2463                                 else {
2464                                         ICONST(REG_ITMP2, iptr->val.i);
2465                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2466                                         }
2467                                 M_BEQZ(REG_ITMP1, 0);
2468                                 }
2469                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2470                         break;
2471
2472                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2473                                         /* op1 = target JavaVM pc, val.i = constant   */
2474
2475                         var_to_reg_int(s1, src, REG_ITMP1);
2476                         if (iptr->val.i == 0) {
2477                                 M_BGEZ(s1, 0);
2478                                 }
2479                         else {
2480                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2481                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2482                                         }
2483                                 else {
2484                                         ICONST(REG_ITMP2, iptr->val.i);
2485                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2486                                         }
2487                                 M_BEQZ(REG_ITMP1, 0);
2488                                 }
2489                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2490                         break;
2491
2492                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2493                                         /* op1 = target JavaVM pc, val.l = constant   */
2494
2495                         var_to_reg_int(s1, src, REG_ITMP1);
2496                         if (iptr->val.l == 0) {
2497                                 M_BEQZ(s1, 0);
2498                                 }
2499                         else {
2500                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2501                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2502                                         }
2503                                 else {
2504                                         LCONST(REG_ITMP2, iptr->val.l);
2505                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2506                                         }
2507                                 M_BNEZ(REG_ITMP1, 0);
2508                                 }
2509                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2510                         break;
2511
2512                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2513                                         /* op1 = target JavaVM pc, val.l = constant   */
2514
2515                         var_to_reg_int(s1, src, REG_ITMP1);
2516                         if (iptr->val.l == 0) {
2517                                 M_BLTZ(s1, 0);
2518                                 }
2519                         else {
2520                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2521                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2522                                         }
2523                                 else {
2524                                         LCONST(REG_ITMP2, iptr->val.l);
2525                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2526                                         }
2527                                 M_BNEZ(REG_ITMP1, 0);
2528                                 }
2529                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2530                         break;
2531
2532                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2533                                         /* op1 = target JavaVM pc, val.l = constant   */
2534
2535                         var_to_reg_int(s1, src, REG_ITMP1);
2536                         if (iptr->val.l == 0) {
2537                                 M_BLEZ(s1, 0);
2538                                 }
2539                         else {
2540                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2541                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2542                                         }
2543                                 else {
2544                                         LCONST(REG_ITMP2, iptr->val.l);
2545                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2546                                         }
2547                                 M_BNEZ(REG_ITMP1, 0);
2548                                 }
2549                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2550                         break;
2551
2552                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2553                                         /* op1 = target JavaVM pc, val.l = constant   */
2554
2555                         var_to_reg_int(s1, src, REG_ITMP1);
2556                         if (iptr->val.l == 0) {
2557                                 M_BNEZ(s1, 0);
2558                                 }
2559                         else {
2560                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2561                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2562                                         }
2563                                 else {
2564                                         LCONST(REG_ITMP2, iptr->val.l);
2565                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2566                                         }
2567                                 M_BEQZ(REG_ITMP1, 0);
2568                                 }
2569                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2570                         break;
2571
2572                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2573                                         /* op1 = target JavaVM pc, val.l = constant   */
2574
2575                         var_to_reg_int(s1, src, REG_ITMP1);
2576                         if (iptr->val.l == 0) {
2577                                 M_BGTZ(s1, 0);
2578                                 }
2579                         else {
2580                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2581                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2582                                         }
2583                                 else {
2584                                         LCONST(REG_ITMP2, iptr->val.l);
2585                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2586                                         }
2587                                 M_BEQZ(REG_ITMP1, 0);
2588                                 }
2589                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2590                         break;
2591
2592                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2593                                         /* op1 = target JavaVM pc, val.l = constant   */
2594
2595                         var_to_reg_int(s1, src, REG_ITMP1);
2596                         if (iptr->val.l == 0) {
2597                                 M_BGEZ(s1, 0);
2598                                 }
2599                         else {
2600                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2601                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2602                                         }
2603                                 else {
2604                                         LCONST(REG_ITMP2, iptr->val.l);
2605                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2606                                         }
2607                                 M_BEQZ(REG_ITMP1, 0);
2608                                 }
2609                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2610                         break;
2611
2612                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2613                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2614                 case ICMD_IF_ACMPEQ:
2615
2616                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2617                         var_to_reg_int(s2, src, REG_ITMP2);
2618                         M_CMPEQ(s1, s2, REG_ITMP1);
2619                         M_BNEZ(REG_ITMP1, 0);
2620                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2621                         break;
2622
2623                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2624                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2625                 case ICMD_IF_ACMPNE:
2626
2627                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2628                         var_to_reg_int(s2, src, REG_ITMP2);
2629                         M_CMPEQ(s1, s2, REG_ITMP1);
2630                         M_BEQZ(REG_ITMP1, 0);
2631                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2632                         break;
2633
2634                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2635                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2636
2637                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2638                         var_to_reg_int(s2, src, REG_ITMP2);
2639                         M_CMPLT(s1, s2, REG_ITMP1);
2640                         M_BNEZ(REG_ITMP1, 0);
2641                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2642                         break;
2643
2644                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2645                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2646
2647                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2648                         var_to_reg_int(s2, src, REG_ITMP2);
2649                         M_CMPLE(s1, s2, REG_ITMP1);
2650                         M_BEQZ(REG_ITMP1, 0);
2651                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2652                         break;
2653
2654                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2655                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2656
2657                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2658                         var_to_reg_int(s2, src, REG_ITMP2);
2659                         M_CMPLE(s1, s2, REG_ITMP1);
2660                         M_BNEZ(REG_ITMP1, 0);
2661                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2662                         break;
2663
2664                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2665                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2666
2667                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2668                         var_to_reg_int(s2, src, REG_ITMP2);
2669                         M_CMPLT(s1, s2, REG_ITMP1);
2670                         M_BEQZ(REG_ITMP1, 0);
2671                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2672                         break;
2673
2674                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2675
2676                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2677                         break;
2678
2679                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2680                                         /* val.i = constant                           */
2681
2682                         var_to_reg_int(s1, src, REG_ITMP1);
2683                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2684                         s3 = iptr->val.i;
2685                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2686                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2687                                         M_CMPEQ(s1, REG_ZERO, d);
2688                                         store_reg_to_var_int(iptr->dst, d);
2689                                         break;
2690                                         }
2691                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2692                                         M_CMPEQ(s1, REG_ZERO, d);
2693                                         M_XOR_IMM(d, 1, d);
2694                                         store_reg_to_var_int(iptr->dst, d);
2695                                         break;
2696                                         }
2697                                 if (s1 == d) {
2698                                         M_MOV(s1, REG_ITMP1);
2699                                         s1 = REG_ITMP1;
2700                                         }
2701                                 ICONST(d, iptr[1].val.i);
2702                                 }
2703                         if ((s3 >= 0) && (s3 <= 255)) {
2704                                 M_CMOVEQ_IMM(s1, s3, d);
2705                                 }
2706                         else {
2707                                 ICONST(REG_ITMP2, s3);
2708                                 M_CMOVEQ(s1, REG_ITMP2, d);
2709                                 }
2710                         store_reg_to_var_int(iptr->dst, d);
2711                         break;
2712
2713                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2714                                         /* val.i = constant                           */
2715
2716                         var_to_reg_int(s1, src, REG_ITMP1);
2717                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2718                         s3 = iptr->val.i;
2719                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2720                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2721                                         M_CMPEQ(s1, REG_ZERO, d);
2722                                         store_reg_to_var_int(iptr->dst, d);
2723                                         break;
2724                                         }
2725                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2726                                         M_CMPEQ(s1, REG_ZERO, d);
2727                                         M_XOR_IMM(d, 1, d);
2728                                         store_reg_to_var_int(iptr->dst, d);
2729                                         break;
2730                                         }
2731                                 if (s1 == d) {
2732                                         M_MOV(s1, REG_ITMP1);
2733                                         s1 = REG_ITMP1;
2734                                         }
2735                                 ICONST(d, iptr[1].val.i);
2736                                 }
2737                         if ((s3 >= 0) && (s3 <= 255)) {
2738                                 M_CMOVNE_IMM(s1, s3, d);
2739                                 }
2740                         else {
2741                                 ICONST(REG_ITMP2, s3);
2742                                 M_CMOVNE(s1, REG_ITMP2, d);
2743                                 }
2744                         store_reg_to_var_int(iptr->dst, d);
2745                         break;
2746
2747                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2748                                         /* val.i = constant                           */
2749
2750                         var_to_reg_int(s1, src, REG_ITMP1);
2751                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2752                         s3 = iptr->val.i;
2753                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2754                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2755                                         M_CMPLT(s1, REG_ZERO, d);
2756                                         store_reg_to_var_int(iptr->dst, d);
2757                                         break;
2758                                         }
2759                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2760                                         M_CMPLE(REG_ZERO, s1, d);
2761                                         store_reg_to_var_int(iptr->dst, d);
2762                                         break;
2763                                         }
2764                                 if (s1 == d) {
2765                                         M_MOV(s1, REG_ITMP1);
2766                                         s1 = REG_ITMP1;
2767                                         }
2768                                 ICONST(d, iptr[1].val.i);
2769                                 }
2770                         if ((s3 >= 0) && (s3 <= 255)) {
2771                                 M_CMOVLT_IMM(s1, s3, d);
2772                                 }
2773                         else {
2774                                 ICONST(REG_ITMP2, s3);
2775                                 M_CMOVLT(s1, REG_ITMP2, d);
2776                                 }
2777                         store_reg_to_var_int(iptr->dst, d);
2778                         break;
2779
2780                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2781                                         /* val.i = constant                           */
2782
2783                         var_to_reg_int(s1, src, REG_ITMP1);
2784                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2785                         s3 = iptr->val.i;
2786                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2787                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2788                                         M_CMPLE(REG_ZERO, s1, d);
2789                                         store_reg_to_var_int(iptr->dst, d);
2790                                         break;
2791                                         }
2792                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2793                                         M_CMPLT(s1, REG_ZERO, d);
2794                                         store_reg_to_var_int(iptr->dst, d);
2795                                         break;
2796                                         }
2797                                 if (s1 == d) {
2798                                         M_MOV(s1, REG_ITMP1);
2799                                         s1 = REG_ITMP1;
2800                                         }
2801                                 ICONST(d, iptr[1].val.i);
2802                                 }
2803                         if ((s3 >= 0) && (s3 <= 255)) {
2804                                 M_CMOVGE_IMM(s1, s3, d);
2805                                 }
2806                         else {
2807                                 ICONST(REG_ITMP2, s3);
2808                                 M_CMOVGE(s1, REG_ITMP2, d);
2809                                 }
2810                         store_reg_to_var_int(iptr->dst, d);
2811                         break;
2812
2813                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2814                                         /* val.i = constant                           */
2815
2816                         var_to_reg_int(s1, src, REG_ITMP1);
2817                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2818                         s3 = iptr->val.i;
2819                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2820                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2821                                         M_CMPLT(REG_ZERO, s1, d);
2822                                         store_reg_to_var_int(iptr->dst, d);
2823                                         break;
2824                                         }
2825                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2826                                         M_CMPLE(s1, REG_ZERO, d);
2827                                         store_reg_to_var_int(iptr->dst, d);
2828                                         break;
2829                                         }
2830                                 if (s1 == d) {
2831                                         M_MOV(s1, REG_ITMP1);
2832                                         s1 = REG_ITMP1;
2833                                         }
2834                                 ICONST(d, iptr[1].val.i);
2835                                 }
2836                         if ((s3 >= 0) && (s3 <= 255)) {
2837                                 M_CMOVGT_IMM(s1, s3, d);
2838                                 }
2839                         else {
2840                                 ICONST(REG_ITMP2, s3);
2841                                 M_CMOVGT(s1, REG_ITMP2, d);
2842                                 }
2843                         store_reg_to_var_int(iptr->dst, d);
2844                         break;
2845
2846                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2847                                         /* val.i = constant                           */
2848
2849                         var_to_reg_int(s1, src, REG_ITMP1);
2850                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2851                         s3 = iptr->val.i;
2852                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2853                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2854                                         M_CMPLE(s1, REG_ZERO, d);
2855                                         store_reg_to_var_int(iptr->dst, d);
2856                                         break;
2857                                         }
2858                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2859                                         M_CMPLT(REG_ZERO, s1, d);
2860                                         store_reg_to_var_int(iptr->dst, d);
2861                                         break;
2862                                         }
2863                                 if (s1 == d) {
2864                                         M_MOV(s1, REG_ITMP1);
2865                                         s1 = REG_ITMP1;
2866                                         }
2867                                 ICONST(d, iptr[1].val.i);
2868                                 }
2869                         if ((s3 >= 0) && (s3 <= 255)) {
2870                                 M_CMOVLE_IMM(s1, s3, d);
2871                                 }
2872                         else {
2873                                 ICONST(REG_ITMP2, s3);
2874                                 M_CMOVLE(s1, REG_ITMP2, d);
2875                                 }
2876                         store_reg_to_var_int(iptr->dst, d);
2877                         break;
2878
2879
2880                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2881                 case ICMD_LRETURN:
2882                 case ICMD_ARETURN:
2883
2884                         var_to_reg_int(s1, src, REG_RESULT);
2885                         M_INTMOVE(s1, REG_RESULT);
2886
2887 #if defined(USE_THREADS)
2888                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2889                                 s4 disp;
2890                                 a = dseg_addaddress((void *) (builtin_monitorexit));
2891                                 M_ALD(REG_PV, REG_PV, a);
2892                                 M_ALD(r->argintregs[0], REG_SP, r->maxmemuse * 8);
2893                                 M_LST(REG_RESULT, REG_SP, r->maxmemuse * 8);
2894                                 M_JSR(REG_RA, REG_PV);
2895                                 disp = -(s4) ((u1 *) mcodeptr - mcodebase);
2896                                 M_LDA(REG_PV, REG_RA, disp);
2897                                 M_LLD(REG_RESULT, REG_SP, r->maxmemuse * 8);
2898                         }
2899 #endif
2900
2901                         goto nowperformreturn;
2902
2903                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2904                 case ICMD_DRETURN:
2905
2906                         var_to_reg_flt(s1, src, REG_FRESULT);
2907                         M_FLTMOVE(s1, REG_FRESULT);
2908
2909 #if defined(USE_THREADS)
2910                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2911                                 s4 disp;
2912                                 a = dseg_addaddress((void *) (builtin_monitorexit));
2913                                 M_ALD(REG_PV, REG_PV, a);
2914                                 M_ALD(r->argintregs[0], REG_SP, r->maxmemuse * 8);
2915                                 M_DST(REG_FRESULT, REG_SP, r->maxmemuse * 8);
2916                                 M_JSR(REG_RA, REG_PV);
2917                                 disp = -(s4) ((u1 *) mcodeptr - mcodebase);
2918                                 M_LDA(REG_PV, REG_RA, disp);
2919                                 M_DLD(REG_FRESULT, REG_SP, r->maxmemuse * 8);
2920                         }
2921 #endif
2922
2923                         goto nowperformreturn;
2924
2925                 case ICMD_RETURN:      /* ...  ==> ...                                */
2926
2927 #if defined(USE_THREADS)
2928                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2929                                 s4 disp;
2930                                 a = dseg_addaddress((void *) (builtin_monitorexit));
2931                                 M_ALD(REG_PV, REG_PV, a);
2932                                 M_ALD(r->argintregs[0], REG_SP, r->maxmemuse * 8);
2933                                 M_JSR(REG_RA, REG_PV);
2934                                 disp = -(s4) ((u1 *) mcodeptr - mcodebase);
2935                                 M_LDA(REG_PV, REG_RA, disp);
2936                         }
2937 #endif
2938
2939 nowperformreturn:
2940                         {
2941                         s4 i, p;
2942
2943                         p = parentargs_base;
2944
2945                         /* restore return address                                         */
2946
2947                         if (!m->isleafmethod) {
2948                                 p--; M_LLD(REG_RA, REG_SP, p * 8);
2949                         }
2950
2951                         /* restore saved registers                                        */
2952
2953                         for (i = r->savintregcnt - 1; i >= r->maxsavintreguse; i--) {
2954                                 p--; M_LLD(r->savintregs[i], REG_SP, p * 8);
2955                         }
2956                         for (i = r->savfltregcnt - 1; i >= r->maxsavfltreguse; i--) {
2957                                 p--; M_DLD(r->savfltregs[i], REG_SP, p * 8);
2958                         }
2959
2960                         /* deallocate stack                                               */
2961
2962                         if (parentargs_base) {
2963                                 M_LDA(REG_SP, REG_SP, parentargs_base * 8);
2964                         }
2965
2966                         /* call trace function */
2967
2968                         if (runverbose) {
2969                                 M_LDA(REG_SP, REG_SP, -3 * 8);
2970                                 M_AST(REG_RA, REG_SP, 0 * 8);
2971                                 M_LST(REG_RESULT, REG_SP, 1 * 8);
2972                                 M_DST(REG_FRESULT, REG_SP, 2 * 8);
2973                                 a = dseg_addaddress(m);
2974                                 M_ALD(r->argintregs[0], REG_PV, a);
2975                                 M_MOV(REG_RESULT, r->argintregs[1]);
2976                                 M_FLTMOVE(REG_FRESULT, r->argfltregs[2]);
2977                                 M_FLTMOVE(REG_FRESULT, r->argfltregs[3]);
2978                                 a = dseg_addaddress((void *) builtin_displaymethodstop);
2979                                 M_ALD(REG_PV, REG_PV, a);
2980                                 M_JSR(REG_RA, REG_PV);
2981                                 s1 = (s4) ((u1 *) mcodeptr - mcodebase);
2982                                 if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
2983                                 else {
2984                                         s4 ml = -s1, mh = 0;
2985                                         while (ml < -32768) { ml += 65536; mh--; }
2986                                         M_LDA(REG_PV, REG_RA, ml);
2987                                         M_LDAH(REG_PV, REG_PV, mh);
2988                                 }
2989                                 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
2990                                 M_LLD(REG_RESULT, REG_SP, 1 * 8);
2991                                 M_ALD(REG_RA, REG_SP, 0 * 8);
2992                                 M_LDA(REG_SP, REG_SP, 3 * 8);
2993                         }
2994
2995                         M_RET(REG_ZERO, REG_RA);
2996                         ALIGNCODENOP;
2997                         }
2998                         break;
2999
3000
3001                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
3002                         {
3003                         s4 i, l, *s4ptr;
3004                         void **tptr;
3005
3006                         tptr = (void **) iptr->target;
3007
3008                         s4ptr = iptr->val.a;
3009                         l = s4ptr[1];                          /* low     */
3010                         i = s4ptr[2];                          /* high    */
3011
3012                         var_to_reg_int(s1, src, REG_ITMP1);
3013                         if (l == 0)
3014                                 {M_INTMOVE(s1, REG_ITMP1);}
3015                         else if (l <= 32768) {
3016                                 M_LDA(REG_ITMP1, s1, -l);
3017                                 }
3018                         else {
3019                                 ICONST(REG_ITMP2, l);
3020                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3021                                 }
3022                         i = i - l + 1;
3023
3024                         /* range check */
3025
3026                         if (i <= 256)
3027                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3028                         else {
3029                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3030                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3031                                 }
3032                         M_BEQZ(REG_ITMP2, 0);
3033
3034
3035                         /* codegen_addreference(BlockPtrOfPC(s4ptr[0]), mcodeptr); */
3036                         codegen_addreference((basicblock *) tptr[0], mcodeptr);
3037
3038                         /* build jump table top down and use address of lowest entry */
3039
3040                         /* s4ptr += 3 + i; */
3041                         tptr += i;
3042
3043                         while (--i >= 0) {
3044                                 /* dseg_addtarget(BlockPtrOfPC(*--s4ptr)); */
3045                                 dseg_addtarget((basicblock *) tptr[0]);
3046                                 --tptr;
3047                                 }
3048                         }
3049
3050                         /* length of dataseg after last dseg_addtarget is used by load */
3051
3052                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3053                         M_ALD(REG_ITMP2, REG_ITMP2, -dseglen);
3054                         M_JMP(REG_ZERO, REG_ITMP2);
3055                         ALIGNCODENOP;
3056                         break;
3057
3058
3059                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3060                         {
3061                         s4 i, l, val, *s4ptr;
3062                         void **tptr;
3063
3064                         tptr = (void **) iptr->target;
3065
3066                         s4ptr = iptr->val.a;
3067                         l = s4ptr[0];                          /* default  */
3068                         i = s4ptr[1];                          /* count    */
3069
3070                         MCODECHECK((i<<2)+8);
3071                         var_to_reg_int(s1, src, REG_ITMP1);
3072                         while (--i >= 0) {
3073                                 s4ptr += 2;
3074                                 ++tptr;
3075
3076                                 val = s4ptr[0];
3077                                 if ((val >= 0) && (val <= 255)) {
3078                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
3079                                         }
3080                                 else {
3081                                         if ((val >= -32768) && (val <= 32767)) {
3082                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
3083                                                 }
3084                                         else {
3085                                                 a = dseg_adds4 (val);
3086                                                 M_ILD(REG_ITMP2, REG_PV, a);
3087                                                 }
3088                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3089                                         }
3090                                 M_BNEZ(REG_ITMP2, 0);
3091                                 /* codegen_addreference(BlockPtrOfPC(s4ptr[1]), mcodeptr); */
3092                                 codegen_addreference((basicblock *) tptr[0], mcodeptr);
3093                                 }
3094
3095                         M_BR(0);
3096                         /* codegen_addreference(BlockPtrOfPC(l), mcodeptr); */
3097
3098                         tptr = (void **) iptr->target;
3099                         codegen_addreference((basicblock *) tptr[0], mcodeptr);
3100
3101                         ALIGNCODENOP;
3102                         break;
3103                         }
3104
3105
3106                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
3107                                         /* op1 = return type, val.a = function pointer*/
3108                         s3 = 3;
3109                         goto gen_method;
3110
3111                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
3112                                         /* op1 = return type, val.a = function pointer*/
3113                         s3 = 2;
3114                         goto gen_method;
3115
3116                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
3117                                         /* op1 = return type, val.a = function pointer*/
3118                         s3 = 1;
3119                         goto gen_method;
3120
3121                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3122                                         /* op1 = arg count, val.a = method pointer    */
3123
3124                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3125                                         /* op1 = arg count, val.a = method pointer    */
3126
3127                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3128                                         /* op1 = arg count, val.a = method pointer    */
3129
3130                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
3131                                         /* op1 = arg count, val.a = method pointer    */
3132
3133                         s3 = iptr->op1;
3134
3135 gen_method: {
3136                         methodinfo *lm;
3137
3138                         MCODECHECK((s3 << 1) + 64);
3139
3140                         /* copy arguments to registers or stack location                  */
3141
3142                         for (; --s3 >= 0; src = src->prev) {
3143                                 if (src->varkind == ARGVAR)
3144                                         continue;
3145                                 if (IS_INT_LNG_TYPE(src->type)) {
3146                                         if (s3 < INT_ARG_CNT) {
3147                                                 s1 = r->argintregs[s3];
3148                                                 var_to_reg_int(d, src, s1);
3149                                                 M_INTMOVE(d, s1);
3150
3151                                         } else {
3152                                                 var_to_reg_int(d, src, REG_ITMP1);
3153                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
3154                                         }
3155
3156                                 } else {
3157                                         if (s3 < FLT_ARG_CNT) {
3158                                                 s1 = r->argfltregs[s3];
3159                                                 var_to_reg_flt(d, src, s1);
3160                                                 M_FLTMOVE(d, s1);
3161
3162                                         } else {
3163                                                 var_to_reg_flt(d, src, REG_FTMP1);
3164                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
3165                                         }
3166                                 }
3167                         } /* end of for */
3168
3169                         lm = iptr->val.a;
3170                         switch (iptr->opc) {
3171                         case ICMD_BUILTIN3:
3172                         case ICMD_BUILTIN2:
3173                         case ICMD_BUILTIN1:
3174                                 a = dseg_addaddress((void *) lm);
3175                                 d = iptr->op1;
3176
3177                                 M_ALD(REG_PV, REG_PV, a);     /* Pointer to built-in-function */
3178                                 break;
3179
3180                         case ICMD_INVOKESTATIC:
3181                         case ICMD_INVOKESPECIAL:
3182                                 a = dseg_addaddress(lm->stubroutine);
3183                                 d = lm->returntype;
3184
3185                                 M_ALD(REG_PV, REG_PV, a);            /* method pointer in r27 */
3186                                 break;
3187
3188                         case ICMD_INVOKEVIRTUAL:
3189                                 d = lm->returntype;
3190
3191                                 gen_nullptr_check(r->argintregs[0]);
3192                                 M_ALD(REG_METHODPTR, r->argintregs[0],
3193                                           OFFSET(java_objectheader, vftbl));
3194                                 M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl_t, table[0]) +
3195                                           sizeof(methodptr) * lm->vftblindex);
3196                                 break;
3197
3198                         case ICMD_INVOKEINTERFACE:
3199                                 d = lm->returntype;
3200
3201                                 gen_nullptr_check(r->argintregs[0]);
3202                                 M_ALD(REG_METHODPTR, r->argintregs[0],
3203                                           OFFSET(java_objectheader, vftbl));
3204                                 M_ALD(REG_METHODPTR, REG_METHODPTR,
3205                                           OFFSET(vftbl_t, interfacetable[0]) -
3206                                           sizeof(methodptr*) * lm->class->index);
3207                                 M_ALD(REG_PV, REG_METHODPTR,
3208                                           sizeof(methodptr) * (lm - lm->class->methods));
3209                                 break;
3210                         }
3211
3212                         M_JSR(REG_RA, REG_PV);
3213
3214                         /* recompute pv */
3215
3216                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3217                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3218                         else {
3219                                 s4 ml = -s1, mh = 0;
3220                                 while (ml < -32768) { ml += 65536; mh--; }
3221                                 M_LDA(REG_PV, REG_RA, ml);
3222                                 M_LDAH(REG_PV, REG_PV, mh);
3223                         }
3224
3225                         /* d contains return type */
3226
3227                         if (d != TYPE_VOID) {
3228                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3229                                         s1 = reg_of_var(m, iptr->dst, REG_RESULT);
3230                                         M_INTMOVE(REG_RESULT, s1);
3231                                         store_reg_to_var_int(iptr->dst, s1);
3232
3233                                 } else {
3234                                         s1 = reg_of_var(m, iptr->dst, REG_FRESULT);
3235                                         M_FLTMOVE(REG_FRESULT, s1);
3236                                         store_reg_to_var_flt(iptr->dst, s1);
3237                                 }
3238                         }
3239                         }
3240                         break;
3241
3242
3243                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3244
3245                                       /* op1:   0 == array, 1 == class                */
3246                                       /* val.a: (classinfo*) superclass               */
3247
3248 /*          superclass is an interface:
3249  *
3250  *          return (sub != NULL) &&
3251  *                 (sub->vftbl->interfacetablelength > super->index) &&
3252  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
3253  *
3254  *          superclass is a class:
3255  *
3256  *          return ((sub != NULL) && (0
3257  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3258  *                  super->vftbl->diffvall));
3259  */
3260
3261                         {
3262                         classinfo *super = (classinfo*) iptr->val.a;
3263
3264 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3265                         codegen_threadcritrestart((u1*) mcodeptr - mcodebase);
3266 #endif
3267                         var_to_reg_int(s1, src, REG_ITMP1);
3268                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
3269                         if (s1 == d) {
3270                                 M_MOV(s1, REG_ITMP1);
3271                                 s1 = REG_ITMP1;
3272                                 }
3273                         M_CLR(d);
3274                         if (iptr->op1) {                               /* class/interface */
3275                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3276                                         M_BEQZ(s1, 6);
3277                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3278                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3279                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3280                                         M_BLEZ(REG_ITMP2, 2);
3281                                         M_ALD(REG_ITMP1, REG_ITMP1,
3282                                               OFFSET(vftbl_t, interfacetable[0]) -
3283                                               super->index * sizeof(methodptr*));
3284                                         M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3285                                         }
3286                                 else {                                     /* class           */
3287 /*
3288                                         s2 = super->vftbl->diffval;
3289                                         M_BEQZ(s1, 4 + (s2 > 255));
3290                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3291                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3292                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3293                                         if (s2 <= 255)
3294                                                 M_CMPULE_IMM(REG_ITMP1, s2, d);
3295                                         else {
3296                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3297                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3298                                                 }
3299 */
3300                                         M_BEQZ(s1, 7);
3301                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3302                                         a = dseg_addaddress ((void*) super->vftbl);
3303                                         M_ALD(REG_ITMP2, REG_PV, a);
3304 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3305                                         codegen_threadcritstart((u1*) mcodeptr - mcodebase);
3306 #endif
3307                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3308                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3309                                         M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3310 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3311                                         codegen_threadcritstop((u1*) mcodeptr - mcodebase);
3312 #endif
3313                                         M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3314                                         M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3315                                         }
3316                                 }
3317                         else
3318                                 panic ("internal error: no inlined array instanceof");
3319                         }
3320                         store_reg_to_var_int(iptr->dst, d);
3321                         break;
3322
3323                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3324
3325                                       /* op1:   0 == array, 1 == class                */
3326                                       /* val.a: (classinfo*) superclass               */
3327
3328 /*          superclass is an interface:
3329  *
3330  *          OK if ((sub == NULL) ||
3331  *                 (sub->vftbl->interfacetablelength > super->index) &&
3332  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3333  *
3334  *          superclass is a class:
3335  *
3336  *          OK if ((sub == NULL) || (0
3337  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3338  *                 super->vftbl->diffvall));
3339  */
3340
3341                         {
3342                         classinfo *super = (classinfo*) iptr->val.a;
3343
3344 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3345                         codegen_threadcritrestart((u1*) mcodeptr - mcodebase);
3346 #endif
3347                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
3348                         var_to_reg_int(s1, src, d);
3349                         if (iptr->op1) {                               /* class/interface */
3350                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3351                                         M_BEQZ(s1, 6);
3352                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3353                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3354                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3355                                         M_BLEZ(REG_ITMP2, 0);
3356                                         codegen_addxcastrefs(mcodeptr);
3357                                         M_ALD(REG_ITMP2, REG_ITMP1,
3358                                               OFFSET(vftbl_t, interfacetable[0]) -
3359                                               super->index * sizeof(methodptr*));
3360                                         M_BEQZ(REG_ITMP2, 0);
3361                                         codegen_addxcastrefs(mcodeptr);
3362                                         }
3363                                 else {                                     /* class           */
3364 /*
3365                                         s2 = super->vftbl->diffval;
3366                                         M_BEQZ(s1, 4 + (s2 != 0) + (s2 > 255));
3367                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3368                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3369                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3370                                         if (s2 == 0) {
3371                                                 M_BNEZ(REG_ITMP1, 0);
3372                                                 }
3373                                         else if (s2 <= 255) {
3374                                                 M_CMPULE_IMM(REG_ITMP1, s2, REG_ITMP2);
3375                                                 M_BEQZ(REG_ITMP2, 0);
3376                                                 }
3377                                         else {
3378                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3379                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3380                                                 M_BEQZ(REG_ITMP2, 0);
3381                                                 }
3382 */
3383                                         M_BEQZ(s1, 8 + (d == REG_ITMP3));
3384                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3385                                         a = dseg_addaddress ((void*) super->vftbl);
3386                                         M_ALD(REG_ITMP2, REG_PV, a);
3387 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3388                                         codegen_threadcritstart((u1*) mcodeptr - mcodebase);
3389 #endif
3390                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3391                                         if (d != REG_ITMP3) {
3392                                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3393                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3394 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3395                                                 codegen_threadcritstop((u1*) mcodeptr - mcodebase);
3396 #endif
3397                                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3398                                                 }
3399                                         else {
3400                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3401                                                 M_ISUB(REG_ITMP1, REG_ITMP2, REG_ITMP1);
3402                                                 M_ALD(REG_ITMP2, REG_PV, a);
3403                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3404 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3405                                                 codegen_threadcritstop((u1*) mcodeptr - mcodebase);
3406 #endif
3407                                                 }
3408                                         M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3409                                         M_BEQZ(REG_ITMP2, 0);
3410                                         codegen_addxcastrefs(mcodeptr);
3411                                         }
3412                                 }
3413                         else
3414                                 panic ("internal error: no inlined array checkcast");
3415                         }
3416                         M_INTMOVE(s1, d);
3417                         store_reg_to_var_int(iptr->dst, d);
3418                         break;
3419
3420                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3421
3422                         var_to_reg_int(s1, src, REG_ITMP1);
3423                         M_BLTZ(s1, 0);
3424                         codegen_addxcheckarefs(mcodeptr);
3425                         break;
3426
3427                 case ICMD_CHECKEXCEPTION:    /* ... ==> ...                           */
3428
3429                         M_BEQZ(REG_RESULT, 0);
3430                         codegen_addxexceptionrefs(mcodeptr);
3431                         break;
3432
3433                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3434                                       /* op1 = dimension, val.a = array descriptor    */
3435
3436                         /* check for negative sizes and copy sizes to stack if necessary  */
3437
3438                         MCODECHECK((iptr->op1 << 1) + 64);
3439
3440                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3441                                 var_to_reg_int(s2, src, REG_ITMP1);
3442                                 M_BLTZ(s2, 0);
3443                                 codegen_addxcheckarefs(mcodeptr);
3444
3445                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3446
3447                                 if (src->varkind != ARGVAR) {
3448                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3449                                         }
3450                                 }
3451
3452                         /* a0 = dimension count */
3453
3454                         ICONST(r->argintregs[0], iptr->op1);
3455
3456                         /* a1 = arraydescriptor */
3457
3458                         a = dseg_addaddress(iptr->val.a);
3459                         M_ALD(r->argintregs[1], REG_PV, a);
3460
3461                         /* a2 = pointer to dimensions = stack pointer */
3462
3463                         M_INTMOVE(REG_SP, r->argintregs[2]);
3464
3465                         a = dseg_addaddress((void *) builtin_nmultianewarray);
3466                         M_ALD(REG_PV, REG_PV, a);
3467                         M_JSR(REG_RA, REG_PV);
3468                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3469                         if (s1 <= 32768)
3470                                 M_LDA(REG_PV, REG_RA, -s1);
3471                         else {
3472                                 s4 ml = -s1, mh = 0;
3473                                 while (ml < -32768) { ml += 65536; mh--; }
3474                                 M_LDA(REG_PV, REG_RA, ml);
3475                                 M_LDAH(REG_PV, REG_PV, mh);
3476                         }
3477                         s1 = reg_of_var(m, iptr->dst, REG_RESULT);
3478                         M_INTMOVE(REG_RESULT, s1);
3479                         store_reg_to_var_int(iptr->dst, s1);
3480                         break;
3481
3482
3483                 default: error ("Unknown pseudo command: %d", iptr->opc);
3484
3485
3486
3487         } /* switch */
3488
3489         } /* for instruction */
3490
3491         /* copy values to interface registers */
3492
3493         src = bptr->outstack;
3494         len = bptr->outdepth;
3495         MCODECHECK(64+len);
3496         while (src) {
3497                 len--;
3498                 if ((src->varkind != STACKVAR)) {
3499                         s2 = src->type;
3500                         if (IS_FLT_DBL_TYPE(s2)) {
3501                                 var_to_reg_flt(s1, src, REG_FTMP1);
3502                                 if (!(r->interfaces[len][s2].flags & INMEMORY)) {
3503                                         M_FLTMOVE(s1,r->interfaces[len][s2].regoff);
3504                                         }
3505                                 else {
3506                                         M_DST(s1, REG_SP, 8 * r->interfaces[len][s2].regoff);
3507                                         }
3508                                 }
3509                         else {
3510                                 var_to_reg_int(s1, src, REG_ITMP1);
3511                                 if (!(r->interfaces[len][s2].flags & INMEMORY)) {
3512                                         M_INTMOVE(s1,r->interfaces[len][s2].regoff);
3513                                         }
3514                                 else {
3515                                         M_LST(s1, REG_SP, 8 * r->interfaces[len][s2].regoff);
3516                                         }
3517                                 }
3518                         }
3519                 src = src->prev;
3520                 }
3521         } /* if (bptr -> flags >= BBREACHED) */
3522         } /* for basic block */
3523
3524         /* bptr -> mpc = (int)((u1*) mcodeptr - mcodebase); */
3525
3526         {
3527         /* generate bound check stubs */
3528
3529         s4 *xcodeptr = NULL;
3530
3531         for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) {
3532                 gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3533                                   xboundrefs->branchpos,
3534                                                   (u1*) mcodeptr - mcodebase);
3535
3536                 MCODECHECK(8);
3537
3538                 /* move index register into REG_ITMP1 */
3539                 M_MOV(xboundrefs->reg, REG_ITMP1);
3540                 M_LDA(REG_ITMP2_XPC, REG_PV, xboundrefs->branchpos - 4);
3541
3542                 if (xcodeptr != NULL) {
3543                         M_BR(xcodeptr - mcodeptr - 1);
3544
3545                 } else {
3546                         xcodeptr = mcodeptr;
3547
3548                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3549                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3550
3551                         a = dseg_addaddress(string_java_lang_ArrayIndexOutOfBoundsException);
3552                         M_ALD(r->argintregs[0], REG_PV, a);
3553                         M_MOV(REG_ITMP1, r->argintregs[1]);
3554
3555                         a = dseg_addaddress(new_exception_int);
3556                         M_ALD(REG_PV, REG_PV, a);
3557                         M_JSR(REG_RA, REG_PV);
3558
3559                         /* recompute pv */
3560                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3561                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3562                         else {
3563                                 s4 ml = -s1, mh = 0;
3564                                 while (ml < -32768) { ml += 65536; mh--; }
3565                                 M_LDA(REG_PV, REG_RA, ml);
3566                                 M_LDAH(REG_PV, REG_PV, mh);
3567                         }
3568
3569                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3570
3571                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3572                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3573
3574                         a = dseg_addaddress(asm_handle_exception);
3575                         M_ALD(REG_ITMP3, REG_PV, a);
3576
3577                         M_JMP(REG_ZERO, REG_ITMP3);
3578                 }
3579         }
3580
3581         /* generate negative array size check stubs */
3582
3583         xcodeptr = NULL;
3584
3585         for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) {
3586                 if ((m->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3587                         gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3588                                                           xcheckarefs->branchpos,
3589                                                           (u1*) xcodeptr - (u1*) mcodebase - 4);
3590                         continue;
3591                 }
3592
3593                 gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3594                                   xcheckarefs->branchpos,
3595                                                   (u1*) mcodeptr - mcodebase);
3596
3597                 MCODECHECK(8);
3598
3599                 M_LDA(REG_ITMP2_XPC, REG_PV, xcheckarefs->branchpos - 4);
3600
3601                 if (xcodeptr != NULL) {
3602                         M_BR(xcodeptr - mcodeptr - 1);
3603
3604                 } else {
3605                         xcodeptr = mcodeptr;
3606
3607                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3608                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3609
3610                         a = dseg_addaddress(string_java_lang_NegativeArraySizeException);
3611                         M_ALD(r->argintregs[0], REG_PV, a);
3612
3613                         a = dseg_addaddress(new_exception);
3614                         M_ALD(REG_PV, REG_PV, a);
3615                         M_JSR(REG_RA, REG_PV);
3616
3617                         /* recompute pv */
3618                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3619                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3620                         else {
3621                                 s4 ml = -s1, mh = 0;
3622                                 while (ml < -32768) { ml += 65536; mh--; }
3623                                 M_LDA(REG_PV, REG_RA, ml);
3624                                 M_LDAH(REG_PV, REG_PV, mh);
3625                         }
3626
3627                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3628
3629                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3630                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3631
3632                         a = dseg_addaddress(asm_handle_exception);
3633                         M_ALD(REG_ITMP3, REG_PV, a);
3634
3635                         M_JMP(REG_ZERO, REG_ITMP3);
3636                 }
3637         }
3638
3639         /* generate cast check stubs */
3640
3641         xcodeptr = NULL;
3642
3643         for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) {
3644                 if ((m->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3645                         gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3646                                                           xcastrefs->branchpos,
3647                                                           (u1*) xcodeptr - (u1*) mcodebase - 4);
3648                         continue;
3649                 }
3650
3651                 gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3652                                   xcastrefs->branchpos,
3653                                                   (u1*) mcodeptr - mcodebase);
3654
3655                 MCODECHECK(8);
3656
3657                 M_LDA(REG_ITMP2_XPC, REG_PV, xcastrefs->branchpos - 4);
3658
3659                 if (xcodeptr != NULL) {
3660                         M_BR(xcodeptr - mcodeptr - 1);
3661
3662                 } else {
3663                         xcodeptr = mcodeptr;
3664
3665                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3666                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3667
3668                         a = dseg_addaddress(string_java_lang_ClassCastException);
3669                         M_ALD(r->argintregs[0], REG_PV, a);
3670
3671                         a = dseg_addaddress(new_exception);
3672                         M_ALD(REG_PV, REG_PV, a);
3673                         M_JSR(REG_RA, REG_PV);
3674
3675                         /* recompute pv */
3676                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3677                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3678                         else {
3679                                 s4 ml = -s1, mh = 0;
3680                                 while (ml < -32768) { ml += 65536; mh--; }
3681                                 M_LDA(REG_PV, REG_RA, ml);
3682                                 M_LDAH(REG_PV, REG_PV, mh);
3683                         }
3684
3685                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3686
3687                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3688                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3689
3690                         a = dseg_addaddress(asm_handle_exception);
3691                         M_ALD(REG_ITMP3, REG_PV, a);
3692
3693                         M_JMP(REG_ZERO, REG_ITMP3);
3694                 }
3695         }
3696
3697         /* generate exception check stubs */
3698
3699         xcodeptr = NULL;
3700
3701         for (; xexceptionrefs != NULL; xexceptionrefs = xexceptionrefs->next) {
3702                 if ((m->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3703                         gen_resolvebranch((u1*) mcodebase + xexceptionrefs->branchpos,
3704                                                           xexceptionrefs->branchpos,
3705                                                           (u1*) xcodeptr - (u1*) mcodebase - 4);
3706                         continue;
3707                 }
3708
3709                 gen_resolvebranch((u1*) mcodebase + xexceptionrefs->branchpos,
3710                                   xexceptionrefs->branchpos,
3711                                                   (u1*) mcodeptr - mcodebase);
3712
3713                 MCODECHECK(8);
3714
3715                 M_LDA(REG_ITMP2_XPC, REG_PV, xexceptionrefs->branchpos - 4);
3716
3717                 if (xcodeptr != NULL) {
3718                         M_BR(xcodeptr - mcodeptr - 1);
3719
3720                 } else {
3721                         xcodeptr = mcodeptr;
3722
3723 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3724                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3725                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3726
3727                         a = dseg_addaddress(&builtin_get_exceptionptrptr);
3728                         M_ALD(REG_PV, REG_PV, a);
3729                         M_JSR(REG_RA, REG_PV);
3730
3731                         /* recompute pv */
3732                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3733                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3734                         else {
3735                                 s4 ml = -s1, mh = 0;
3736                                 while (ml < -32768) { ml += 65536; mh--; }
3737                                 M_LDA(REG_PV, REG_RA, ml);
3738                                 M_LDAH(REG_PV, REG_PV, mh);
3739                         }
3740
3741                         M_ALD(REG_ITMP1_XPTR, REG_RESULT, 0);
3742                         M_AST(REG_ZERO, REG_RESULT, 0);
3743
3744                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3745                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3746 #else
3747                         a = dseg_addaddress(&_exceptionptr);
3748                         M_ALD(REG_ITMP3, REG_PV, a);
3749                         M_ALD(REG_ITMP1_XPTR, REG_ITMP3, 0);
3750                         M_AST(REG_ZERO, REG_ITMP3, 0);
3751 #endif
3752
3753                         a = dseg_addaddress(asm_handle_exception);
3754                         M_ALD(REG_ITMP3, REG_PV, a);
3755
3756                         M_JMP(REG_ZERO, REG_ITMP3);
3757                 }
3758         }
3759
3760         /* generate null pointer check stubs */
3761
3762         xcodeptr = NULL;
3763
3764         for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) {
3765                 if ((m->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3766                         gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3767                                                           xnullrefs->branchpos,
3768                                                           (u1*) xcodeptr - (u1*) mcodebase - 4);
3769                         continue;
3770                 }
3771
3772                 gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3773                                   xnullrefs->branchpos,
3774                                                   (u1*) mcodeptr - mcodebase);
3775
3776                 MCODECHECK(8);
3777
3778                 M_LDA(REG_ITMP2_XPC, REG_PV, xnullrefs->branchpos - 4);
3779
3780                 if (xcodeptr != NULL) {
3781                         M_BR(xcodeptr - mcodeptr - 1);
3782
3783                 } else {
3784                         xcodeptr = mcodeptr;
3785
3786                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3787                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3788
3789                         a = dseg_addaddress(string_java_lang_NullPointerException);
3790                         M_ALD(r->argintregs[0], REG_PV, a);
3791
3792                         a = dseg_addaddress(new_exception);
3793                         M_ALD(REG_PV, REG_PV, a);
3794                         M_JSR(REG_RA, REG_PV);
3795
3796                         /* recompute pv */
3797                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3798                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3799                         else {
3800                                 s4 ml = -s1, mh = 0;
3801                                 while (ml < -32768) { ml += 65536; mh--; }
3802                                 M_LDA(REG_PV, REG_RA, ml);
3803                                 M_LDAH(REG_PV, REG_PV, mh);
3804                         }
3805
3806                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3807
3808                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3809                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3810
3811                         a = dseg_addaddress(asm_handle_exception);
3812                         M_ALD(REG_ITMP3, REG_PV, a);
3813
3814                         M_JMP(REG_ZERO, REG_ITMP3);
3815                 }
3816         }
3817         }
3818
3819         codegen_finish(m, (s4) ((u1 *) mcodeptr - mcodebase));
3820 }
3821
3822
3823 /* function createcompilerstub *************************************************
3824
3825         creates a stub routine which calls the compiler
3826
3827 *******************************************************************************/
3828
3829 #define COMPSTUBSIZE    3
3830
3831 u1 *createcompilerstub(methodinfo *m)
3832 {
3833         u8 *s = CNEW(u8, COMPSTUBSIZE);     /* memory to hold the stub            */
3834         s4 *mcodeptr = (s4 *) s;            /* code generation pointer            */
3835
3836                                             /* code for the stub                  */
3837         M_ALD(REG_PV, REG_PV, 16);          /* load pointer to the compiler       */
3838         M_JMP(0, REG_PV);                   /* jump to the compiler, return address
3839                                                in reg 0 is used as method pointer */
3840         s[1] = (u8) m;                      /* literals to be adressed            */
3841         s[2] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
3842
3843 #if defined(STATISTICS)
3844         if (opt_stat)
3845                 count_cstub_len += COMPSTUBSIZE * 8;
3846 #endif
3847
3848         return (u1 *) s;
3849 }
3850
3851
3852 /* function removecompilerstub *************************************************
3853
3854      deletes a compilerstub from memory  (simply by freeing it)
3855
3856 *******************************************************************************/
3857
3858 void removecompilerstub(u1 *stub)
3859 {
3860         CFREE(stub, COMPSTUBSIZE * 8);
3861 }
3862
3863
3864 /* function: createnativestub **************************************************
3865
3866         creates a stub routine which calls a native method
3867
3868 *******************************************************************************/
3869
3870 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3871 #define NATIVESTUBSTACK          2
3872 #define NATIVESTUBTHREADEXTRA    6
3873 #else
3874 #define NATIVESTUBSTACK          1
3875 #define NATIVESTUBTHREADEXTRA    1
3876 #endif
3877
3878 #define NATIVESTUBSIZE           (44 + NATIVESTUBTHREADEXTRA - 1)
3879 #define NATIVESTATICSIZE         5
3880 #define NATIVEVERBOSESIZE        (39 + 13)
3881 #define NATIVESTUBOFFSET         9
3882
3883 u1 *createnativestub(functionptr f, methodinfo *m)
3884 {
3885         u8 *s;                              /* memory pointer to hold the stub    */
3886         u8 *cs;
3887         s4 *mcodeptr;                       /* code generation pointer            */
3888         s4 stackframesize = 0;              /* size of stackframe if needed       */
3889         s4 disp;
3890         s4 stubsize;
3891         registerdata *r;
3892
3893         /* keep code size smaller */
3894         reg_init(m);
3895         r = m->registerdata;
3896
3897         descriptor2types(m);                /* set paramcount and paramtypes      */
3898
3899         stubsize = NATIVESTUBSIZE;          /* calculate nativestub size          */
3900         if ((m->flags & ACC_STATIC) && !m->class->initialized)
3901                 stubsize += NATIVESTATICSIZE;
3902
3903         if (runverbose)
3904                 stubsize += NATIVEVERBOSESIZE;
3905
3906         s = CNEW(u8, stubsize);             /* memory to hold the stub            */
3907         cs = s + NATIVESTUBOFFSET;
3908         mcodeptr = (s4 *) (cs);             /* code generation pointer            */
3909
3910         *(cs-1) = (u8) f;                   /* address of native method           */
3911 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3912         *(cs-2) = (u8) &builtin_get_exceptionptrptr;
3913 #else
3914         *(cs-2) = (u8) (&_exceptionptr);    /* address of exceptionptr            */
3915 #endif
3916         *(cs-3) = (u8) asm_handle_nat_exception; /* addr of asm exception handler */
3917         *(cs-4) = (u8) (&env);              /* addr of jni_environement           */
3918         *(cs-5) = (u8) builtin_trace_args;
3919         *(cs-6) = (u8) m;
3920         *(cs-7) = (u8) builtin_displaymethodstop;
3921         *(cs-8) = (u8) m->class;
3922         *(cs-9) = (u8) asm_check_clinit;
3923
3924         M_LDA(REG_SP, REG_SP, -NATIVESTUBSTACK * 8);      /* build up stackframe  */
3925         M_AST(REG_RA, REG_SP, 0 * 8);       /* store return address               */
3926
3927         /* if function is static, check for initialized */
3928
3929         if (m->flags & ACC_STATIC) {
3930         /* if class isn't yet initialized, do it */
3931                 if (!m->class->initialized) {
3932                         /* call helper function which patches this code */
3933                         M_ALD(REG_ITMP1, REG_PV, -8 * 8);     /* class                    */
3934                         M_ALD(REG_PV, REG_PV, -9 * 8);        /* asm_check_clinit         */
3935                         M_JSR(REG_RA, REG_PV);
3936                         disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
3937                         M_LDA(REG_PV, REG_RA, disp);
3938                         M_NOP;                  /* this is essential for code patching    */
3939                 }
3940         }
3941
3942         /* max. 39 instructions */
3943         if (runverbose) {
3944                 s4 p;
3945                 s4 t;
3946                 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
3947                 M_AST(REG_RA, REG_SP, 1 * 8);
3948
3949                 /* save integer argument registers */
3950                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
3951                         M_LST(r->argintregs[p], REG_SP, (2 + p) * 8);
3952                 }
3953
3954                 /* save and copy float arguments into integer registers */
3955                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
3956                         t = m->paramtypes[p];
3957
3958                         if (IS_FLT_DBL_TYPE(t)) {
3959                                 if (IS_2_WORD_TYPE(t)) {
3960                                         M_DST(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
3961                                         M_LLD(r->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
3962
3963                                 } else {
3964                                         M_FST(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
3965                                         M_ILD(r->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
3966                                 }
3967
3968                         } else {
3969                                 M_DST(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
3970                         }
3971                 }
3972
3973                 M_ALD(REG_ITMP1, REG_PV, -6 * 8);
3974                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
3975                 M_ALD(REG_PV, REG_PV, -5 * 8);
3976                 M_JSR(REG_RA, REG_PV);
3977                 disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
3978                 M_LDA(REG_PV, REG_RA, disp);
3979
3980                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
3981                         M_LLD(r->argintregs[p], REG_SP, (2 + p) * 8);
3982                 }
3983
3984                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
3985                         t = m->paramtypes[p];
3986
3987                         if (IS_FLT_DBL_TYPE(t)) {
3988                                 if (IS_2_WORD_TYPE(t)) {
3989                                         M_DLD(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
3990
3991                                 } else {
3992                                         M_FLD(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
3993                                 }
3994
3995                         } else {
3996                                 M_DLD(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
3997                         }
3998                 }
3999
4000                 M_ALD(REG_RA, REG_SP, 1 * 8);
4001                 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
4002         }
4003
4004         /* save argument registers on stack -- if we have to */
4005         if ((m->flags & ACC_STATIC && m->paramcount > (INT_ARG_CNT - 2)) || m->paramcount > (INT_ARG_CNT - 1)) {
4006                 s4 i;
4007                 s4 paramshiftcnt = (m->flags & ACC_STATIC) ? 2 : 1;
4008                 s4 stackparamcnt = (m->paramcount > INT_ARG_CNT) ? m->paramcount - INT_ARG_CNT : 0;
4009
4010                 stackframesize = stackparamcnt + paramshiftcnt;
4011
4012                 M_LDA(REG_SP, REG_SP, -stackframesize * 8);
4013
4014                 /* copy stack arguments into new stack frame -- if any */
4015                 for (i = 0; i < stackparamcnt; i++) {
4016                         M_LLD(REG_ITMP1, REG_SP, (stackparamcnt + 1 + i) * 8);
4017                         M_LST(REG_ITMP1, REG_SP, (paramshiftcnt + i) * 8);
4018                 }
4019
4020                 if (m->flags & ACC_STATIC) {
4021                         if (IS_FLT_DBL_TYPE(m->paramtypes[5])) {
4022                                 M_DST(r->argfltregs[5], REG_SP, 1 * 8);
4023                         } else {
4024                                 M_LST(r->argintregs[5], REG_SP, 1 * 8);
4025                         }
4026
4027                         if (IS_FLT_DBL_TYPE(m->paramtypes[4])) {
4028                                 M_DST(r->argfltregs[4], REG_SP, 0 * 8);
4029                         } else {
4030                                 M_LST(r->argintregs[4], REG_SP, 0 * 8);
4031                         }
4032
4033                 } else {
4034                         if (IS_FLT_DBL_TYPE(m->paramtypes[5])) {
4035                                 M_DST(r->argfltregs[5], REG_SP, 0 * 8);
4036                         } else {
4037                                 M_LST(r->argintregs[5], REG_SP, 0 * 8);
4038                         }
4039                 }
4040         }
4041
4042         if (m->flags & ACC_STATIC) {
4043                 M_MOV(r->argintregs[3], r->argintregs[5]);
4044                 M_MOV(r->argintregs[2], r->argintregs[4]);
4045                 M_MOV(r->argintregs[1], r->argintregs[3]);
4046                 M_MOV(r->argintregs[0], r->argintregs[2]);
4047                 M_FMOV(r->argfltregs[3], r->argfltregs[5]);
4048                 M_FMOV(r->argfltregs[2], r->argfltregs[4]);
4049                 M_FMOV(r->argfltregs[1], r->argfltregs[3]);
4050                 M_FMOV(r->argfltregs[0], r->argfltregs[2]);
4051
4052                 /* put class into second argument register */
4053                 M_ALD(r->argintregs[1], REG_PV, -8 * 8);
4054
4055         } else {
4056                 M_MOV(r->argintregs[4], r->argintregs[5]);
4057                 M_MOV(r->argintregs[3], r->argintregs[4]);
4058                 M_MOV(r->argintregs[2], r->argintregs[3]);
4059                 M_MOV(r->argintregs[1], r->argintregs[2]);
4060                 M_MOV(r->argintregs[0], r->argintregs[1]);
4061                 M_FMOV(r->argfltregs[4], r->argfltregs[5]);
4062                 M_FMOV(r->argfltregs[3], r->argfltregs[4]);
4063                 M_FMOV(r->argfltregs[2], r->argfltregs[3]);
4064                 M_FMOV(r->argfltregs[1], r->argfltregs[2]);
4065                 M_FMOV(r->argfltregs[0], r->argfltregs[1]);
4066         }
4067
4068         /* put env into first argument register */
4069         M_ALD(r->argintregs[0], REG_PV, -4 * 8);
4070
4071         M_ALD(REG_PV, REG_PV, -1 * 8);      /* load adress of native method       */
4072         M_JSR(REG_RA, REG_PV);              /* call native method                 */
4073         disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4074         M_LDA(REG_PV, REG_RA, disp);        /* recompute pv from ra               */
4075
4076         /* remove stackframe if there is one */
4077         if (stackframesize) {
4078                 M_LDA(REG_SP, REG_SP, stackframesize * 8);
4079         }
4080
4081         /* 13 instructions */
4082         if (runverbose) {
4083                 M_LDA(REG_SP, REG_SP, -2 * 8);
4084                 M_ALD(r->argintregs[0], REG_PV, -6 * 8); /* load method adress        */
4085                 M_LST(REG_RESULT, REG_SP, 0 * 8);
4086                 M_DST(REG_FRESULT, REG_SP, 1 * 8);
4087                 M_MOV(REG_RESULT, r->argintregs[1]);
4088                 M_FMOV(REG_FRESULT, r->argfltregs[2]);
4089                 M_FMOV(REG_FRESULT, r->argfltregs[3]);
4090                 M_ALD(REG_PV, REG_PV, -7 * 8);  /* builtin_displaymethodstop          */
4091                 M_JSR(REG_RA, REG_PV);
4092                 disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4093                 M_LDA(REG_PV, REG_RA, disp);
4094                 M_LLD(REG_RESULT, REG_SP, 0 * 8);
4095                 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
4096                 M_LDA(REG_SP, REG_SP, 2 * 8);
4097         }
4098
4099 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4100         if (IS_FLT_DBL_TYPE(m->returntype))
4101                 M_DST(REG_FRESULT, REG_SP, 1 * 8);
4102         else
4103                 M_AST(REG_RESULT, REG_SP, 1 * 8);
4104         M_ALD(REG_PV, REG_PV, -2 * 8);      /* builtin_get_exceptionptrptr        */
4105         M_JSR(REG_RA, REG_PV);
4106         disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4107         M_LDA(REG_PV, REG_RA, disp);
4108         M_MOV(REG_RESULT, REG_ITMP3);
4109         if (IS_FLT_DBL_TYPE(m->returntype))
4110                 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
4111         else
4112                 M_ALD(REG_RESULT, REG_SP, 1 * 8);
4113 #else
4114         M_ALD(REG_ITMP3, REG_PV, -2 * 8);   /* get address of exceptionptr        */
4115 #endif
4116         M_ALD(REG_ITMP1, REG_ITMP3, 0);     /* load exception into reg. itmp1     */
4117         M_BNEZ(REG_ITMP1, 3);               /* if no exception then return        */
4118
4119         M_ALD(REG_RA, REG_SP, 0 * 8);       /* load return address                */
4120         M_LDA(REG_SP, REG_SP, NATIVESTUBSTACK * 8); /* remove stackframe          */
4121         M_RET(REG_ZERO, REG_RA);            /* return to caller                   */
4122
4123         M_AST(REG_ZERO, REG_ITMP3, 0);      /* store NULL into exceptionptr       */
4124
4125         M_ALD(REG_RA, REG_SP, 0 * 8);       /* load return address                */
4126         M_LDA(REG_SP, REG_SP, NATIVESTUBSTACK * 8); /* remove stackframe          */
4127         M_LDA(REG_ITMP2, REG_RA, -4);       /* move fault address into reg. itmp2 */
4128         M_ALD(REG_ITMP3, REG_PV, -3 * 8);   /* load asm exception handler address */
4129         M_JMP(REG_ZERO, REG_ITMP3);         /* jump to asm exception handler      */
4130
4131 #if 0
4132         dolog_plain("stubsize: %d (for %d params)\n", (int) (mcodeptr - (s4*) s), m->paramcount);
4133 #endif
4134
4135 #if defined(STATISTICS)
4136         if (opt_stat)
4137                 count_nstub_len += NATIVESTUBSIZE * 8;
4138 #endif
4139
4140         return (u1 *) (s + NATIVESTUBOFFSET);
4141 }
4142
4143
4144 /* function: removenativestub **************************************************
4145
4146     removes a previously created native-stub from memory
4147
4148 *******************************************************************************/
4149
4150 void removenativestub(u1 *stub)
4151 {
4152         CFREE((u8 *) stub - NATIVESTUBOFFSET, NATIVESTUBSIZE * 8);
4153 }
4154
4155
4156 /*
4157  * These are local overrides for various environment variables in Emacs.
4158  * Please do not remove this and leave it at the end of the file, where
4159  * Emacs will automagically detect them.
4160  * ---------------------------------------------------------------------
4161  * Local variables:
4162  * mode: c
4163  * indent-tabs-mode: t
4164  * c-basic-offset: 4
4165  * tab-width: 4
4166  * End:
4167  */