src/vm/jit/alpha/codegen.c

   1 /* src/vm/jit/alpha/codegen.c - machine code generator for Alpha
   2
   3    Copyright (C) 1996-2005 R. Grafl, A. Krall, C. Kruegel, C. Oates,
   4    R. Obermaisser, M. Platter, M. Probst, S. Ring, E. Steiner,
   5    C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich, J. Wenninger,
   6    Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  23    02111-1307, USA.
  24
  25    Contact: cacao@complang.tuwien.ac.at
  26
  27    Authors: Andreas Krall
  28             Reinhard Grafl
  29
  30    Changes: Joseph Wenninger
  31             Christian Thalinger
  32
  33    $Id: codegen.c 2755 2005-06-20 18:26:03Z twisti $
  34
  35 */
  36
  37
  38 #include <stdio.h>
  39
  40 #include "config.h"
  41
  42 #include "md.h"
  43 #include "md-abi.h"
  44 #include "md-abi.inc"
  45
  46 #include "vm/jit/alpha/arch.h"
  47 #include "vm/jit/alpha/codegen.h"
  48 #include "vm/jit/alpha/types.h"
  49 #include "vm/jit/alpha/asmoffsets.h"
  50
  51 #include "cacao/cacao.h"
  52 #include "native/native.h"
  53 #include "vm/builtin.h"
  54 #include "vm/global.h"
  55 #include "vm/loader.h"
  56 #include "vm/stringlocal.h"
  57 #include "vm/tables.h"
  58 #include "vm/jit/asmpart.h"
  59 #include "vm/jit/codegen.inc"
  60 #include "vm/jit/jit.h"
  61
  62 #if defined(LSRA)
  63 # include "vm/jit/lsra.h"
  64 # include "vm/jit/lsra.inc"
  65 #endif
  66
  67 #include "vm/jit/parse.h"
  68 #include "vm/jit/patcher.h"
  69 #include "vm/jit/reg.h"
  70 #include "vm/jit/reg.inc"
  71
  72
  73 /* codegen *********************************************************************
  74
  75    Generates machine code.
  76
  77 *******************************************************************************/
  78
  79 void codegen(methodinfo *m, codegendata *cd, registerdata *rd)
  80 {
  81         s4                  len, s1, s2, s3, d;
  82         ptrint              a;
  83         s4                  parentargs_base;
  84         s4                 *mcodeptr;
  85         stackptr            src;
  86         varinfo            *var;
  87         basicblock         *bptr;
  88         instruction        *iptr;
  89         exceptiontable     *ex;
  90         u2                  currentline;
  91         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE*  */
  92         builtintable_entry *bte;
  93         methoddesc         *md;
  94
  95         {
  96         s4 i, p, t, l;
  97         s4 savedregs_num;
  98
  99         savedregs_num = (m->isleafmethod) ? 0 : 1;        /* space to save the RA */
 100
 101         /* space to save used callee saved registers */
 102
 103         savedregs_num += (rd->savintregcnt - rd->maxsavintreguse);
 104         savedregs_num += (rd->savfltregcnt - rd->maxsavfltreguse);
 105
 106         parentargs_base = rd->maxmemuse + savedregs_num;
 107
 108 #if defined(USE_THREADS)           /* space to save argument of monitor_enter */
 109
 110         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 111                 parentargs_base++;
 112
 113 #endif
 114
 115         /* create method header */
 116
 117         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
 118         (void) dseg_adds4(cd, parentargs_base * 8);             /* FrameSize      */
 119
 120 #if defined(USE_THREADS)
 121
 122         /* IsSync contains the offset relative to the stack pointer for the
 123            argument of monitor_exit used in the exception handler. Since the
 124            offset could be zero and give a wrong meaning of the flag it is
 125            offset by one.
 126         */
 127
 128         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 129                 (void) dseg_adds4(cd, (rd->maxmemuse + 1) * 8);     /* IsSync         */
 130         else
 131
 132 #endif
 133
 134         (void) dseg_adds4(cd, 0);                               /* IsSync         */
 135
 136         (void) dseg_adds4(cd, m->isleafmethod);                 /* IsLeaf         */
 137         (void) dseg_adds4(cd, rd->savintregcnt - rd->maxsavintreguse);/* IntSave  */
 138         (void) dseg_adds4(cd, rd->savfltregcnt - rd->maxsavfltreguse);/* FltSave  */
 139
 140         dseg_addlinenumbertablesize(cd);
 141
 142         (void) dseg_adds4(cd, cd->exceptiontablelength);        /* ExTableSize    */
 143
 144         /* create exception table */
 145
 146         for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
 147                 dseg_addtarget(cd, ex->start);
 148                 dseg_addtarget(cd, ex->end);
 149                 dseg_addtarget(cd, ex->handler);
 150                 (void) dseg_addaddress(cd, ex->catchtype.cls);
 151         }
 152
 153         /* initialize mcode variables */
 154
 155         mcodeptr = (s4 *) cd->mcodebase;
 156         cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize);
 157         MCODECHECK(128 + m->paramcount);
 158
 159         /* create stack frame (if necessary) */
 160
 161         if (parentargs_base) {
 162                 M_LDA(REG_SP, REG_SP, -parentargs_base * 8);
 163         }
 164
 165         /* save return address and used callee saved registers */
 166
 167         p = parentargs_base;
 168         if (!m->isleafmethod) {
 169                 p--; M_AST(REG_RA, REG_SP, p * 8);
 170         }
 171         for (i = rd->savintregcnt - 1; i >= rd->maxsavintreguse; i--) {
 172                 p--; M_LST(rd->savintregs[i], REG_SP, p * 8);
 173         }
 174         for (i = rd->savfltregcnt - 1; i >= rd->maxsavfltreguse; i--) {
 175                 p--; M_DST(rd->savfltregs[i], REG_SP, p * 8);
 176         }
 177
 178         /* take arguments out of register or stack frame */
 179
 180         md = m->parseddesc;
 181
 182         for (p = 0, l = 0; p < md->paramcount; p++) {
 183                 t = md->paramtypes[p].type;
 184                 var = &(rd->locals[l][t]);
 185                 l++;
 186                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 187                         l++;
 188                 if (var->type < 0)
 189                         continue;
 190                 s1 = md->params[p].regoff;
 191                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 192                         if (!md->params[p].inmemory) {           /* register arguments    */
 193                                 s2 = rd->argintregs[s1];
 194                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 195                                         M_INTMOVE(s2, var->regoff);
 196
 197                                 } else {                             /* reg arg -> spilled    */
 198                                         M_LST(s2, REG_SP, var->regoff * 8);
 199                                 }
 200
 201                         } else {                                 /* stack arguments       */
 202                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 203                                         M_LLD(var->regoff, REG_SP, (parentargs_base + s1) * 8);
 204
 205                                 } else {                             /* stack arg -> spilled  */
 206                                         var->regoff = parentargs_base + s1;
 207                                 }
 208                         }
 209
 210                 } else {                                     /* floating args         */
 211                         if (!md->params[p].inmemory) {           /* register arguments    */
 212                                 s2 = rd->argfltregs[s1];
 213                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 214                                         M_FLTMOVE(s2, var->regoff);
 215
 216                                 } else {                                         /* reg arg -> spilled    */
 217                                         M_DST(s2, REG_SP, var->regoff * 8);
 218                                 }
 219
 220                         } else {                                 /* stack arguments       */
 221                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 222                                         M_DLD(var->regoff, REG_SP, (parentargs_base + s1) * 8);
 223
 224                                 } else {                             /* stack-arg -> spilled  */
 225                                         var->regoff = parentargs_base + s1;
 226                                 }
 227                         }
 228                 }
 229         } /* end for */
 230
 231         /* call monitorenter function */
 232
 233 #if defined(USE_THREADS)
 234         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 235                 /* stack offset for monitor argument */
 236
 237                 s1 = rd->maxmemuse;
 238
 239                 if (runverbose) {
 240                         M_LDA(REG_SP, REG_SP, -(INT_ARG_CNT + FLT_ARG_CNT) * 8);
 241
 242                         for (p = 0; p < INT_ARG_CNT; p++)
 243                                 M_LST(rd->argintregs[p], REG_SP, p * 8);
 244
 245                         for (p = 0; p < FLT_ARG_CNT; p++)
 246                                 M_DST(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
 247
 248                         s1 += INT_ARG_CNT + FLT_ARG_CNT;
 249                 }
 250
 251                 /* decide which monitor enter function to call */
 252
 253                 if (m->flags & ACC_STATIC) {
 254                         p = dseg_addaddress(cd, m->class);
 255                         M_ALD(REG_ITMP1, REG_PV, p);
 256                         M_AST(REG_ITMP1, REG_SP, s1 * 8);
 257                         M_INTMOVE(REG_ITMP1, rd->argintregs[0]);
 258                         p = dseg_addaddress(cd, BUILTIN_staticmonitorenter);
 259                         M_ALD(REG_PV, REG_PV, p);
 260                         M_JSR(REG_RA, REG_PV);
 261                         d = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 262                         M_LDA(REG_PV, REG_RA, d);
 263
 264                 } else {
 265                         M_BEQZ(rd->argintregs[0], 0);
 266                         codegen_addxnullrefs(cd, mcodeptr);
 267                         M_AST(rd->argintregs[0], REG_SP, s1 * 8);
 268                         p = dseg_addaddress(cd, BUILTIN_monitorenter);
 269                         M_ALD(REG_PV, REG_PV, p);
 270                         M_JSR(REG_RA, REG_PV);
 271                         d = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 272                         M_LDA(REG_PV, REG_RA, d);
 273                 }
 274
 275                 if (runverbose) {
 276                         for (p = 0; p < INT_ARG_CNT; p++)
 277                                 M_LLD(rd->argintregs[p], REG_SP, p * 8);
 278
 279                         for (p = 0; p < FLT_ARG_CNT; p++)
 280                                 M_DLD(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
 281
 282                         M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT) * 8);
 283                 }
 284         }
 285 #endif
 286
 287         /* call trace function */
 288
 289         if (runverbose) {
 290                 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
 291                 M_AST(REG_RA, REG_SP, 1 * 8);
 292
 293                 /* save integer argument registers */
 294
 295                 for (p = 0; p < md->paramcount && p < INT_ARG_CNT; p++)
 296                         M_LST(rd->argintregs[p], REG_SP, (2 + p) * 8);
 297
 298                 /* save and copy float arguments into integer registers */
 299
 300                 for (p = 0; p < md->paramcount && p < FLT_ARG_CNT; p++) {
 301                         t = md->paramtypes[p].type;
 302
 303                         if (IS_FLT_DBL_TYPE(t)) {
 304                                 if (IS_2_WORD_TYPE(t)) {
 305                                         M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 306
 307                                 } else {
 308                                         M_FST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 309                                 }
 310
 311                                 M_LLD(rd->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 312
 313                         } else {
 314                                 M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 315                         }
 316                 }
 317
 318                 p = dseg_addaddress(cd, m);
 319                 M_ALD(REG_ITMP1, REG_PV, p);
 320                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
 321                 p = dseg_addaddress(cd, (void *) builtin_trace_args);
 322                 M_ALD(REG_PV, REG_PV, p);
 323                 M_JSR(REG_RA, REG_PV);
 324                 d = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 325                 M_LDA(REG_PV, REG_RA, d);
 326                 M_ALD(REG_RA, REG_SP, 1 * 8);
 327
 328                 /* restore integer argument registers */
 329
 330                 for (p = 0; p < md->paramcount && p < INT_ARG_CNT; p++)
 331                         M_LLD(rd->argintregs[p], REG_SP, (2 + p) * 8);
 332
 333                 /* restore float argument registers */
 334
 335                 for (p = 0; p < md->paramcount && p < FLT_ARG_CNT; p++) {
 336                         t = md->paramtypes[p].type;
 337
 338                         if (IS_FLT_DBL_TYPE(t)) {
 339                                 if (IS_2_WORD_TYPE(t)) {
 340                                         M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 341
 342                                 } else {
 343                                         M_FLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 344                                 }
 345
 346                         } else {
 347                                 M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 348                         }
 349                 }
 350
 351                 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
 352         }
 353
 354         }
 355
 356         /* end of header generation */
 357
 358         /* walk through all basic blocks */
 359
 360         for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
 361
 362                 bptr->mpc = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 363
 364                 if (bptr->flags >= BBREACHED) {
 365
 366                 /* branch resolving */
 367
 368                 {
 369                 branchref *brefs;
 370                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 371                         gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
 372                                           brefs->branchpos, bptr->mpc);
 373                         }
 374                 }
 375
 376                 /* copy interface registers to their destination */
 377
 378                 src = bptr->instack;
 379                 len = bptr->indepth;
 380                 MCODECHECK(64+len);
 381 #ifdef LSRA
 382                 if (opt_lsra) {
 383                 while (src != NULL) {
 384                         len--;
 385                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 386                                         /*                              d = reg_of_var(m, src, REG_ITMP1); */
 387                                         if (!(src->flags & INMEMORY))
 388                                                 d= src->regoff;
 389                                         else
 390                                                 d=REG_ITMP1;
 391                                         M_INTMOVE(REG_ITMP1, d);
 392                                         store_reg_to_var_int(src, d);
 393                                 }
 394                                 src = src->prev;
 395                         }
 396                 } else {
 397 #endif
 398                         while (src != NULL) {
 399                                 len--;
 400                                 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 401                                 d = reg_of_var(rd, src, REG_ITMP1);
 402                                 M_INTMOVE(REG_ITMP1, d);
 403                                 store_reg_to_var_int(src, d);
 404                                 }
 405                         else {
 406                                 d = reg_of_var(rd, src, REG_IFTMP);
 407                                 if ((src->varkind != STACKVAR)) {
 408                                         s2 = src->type;
 409                                         if (IS_FLT_DBL_TYPE(s2)) {
 410                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 411                                                         s1 = rd->interfaces[len][s2].regoff;
 412                                                         M_FLTMOVE(s1,d);
 413                                                         }
 414                                                 else {
 415                                                         M_DLD(d, REG_SP, 8 * rd->interfaces[len][s2].regoff);
 416                                                         }
 417                                                 store_reg_to_var_flt(src, d);
 418                                                 }
 419                                         else {
 420                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 421                                                         s1 = rd->interfaces[len][s2].regoff;
 422                                                         M_INTMOVE(s1,d);
 423                                                         }
 424                                                 else {
 425                                                         M_LLD(d, REG_SP, 8 * rd->interfaces[len][s2].regoff);
 426                                                         }
 427                                                 store_reg_to_var_int(src, d);
 428                                                 }
 429                                         }
 430                                 }
 431                         src = src->prev;
 432                         }
 433 #ifdef LSRA
 434                 }
 435 #endif
 436
 437                 /* walk through all instructions */
 438
 439                 src = bptr->instack;
 440                 len = bptr->icount;
 441
 442                 for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) {
 443                         if (iptr->line != currentline) {
 444                                 dseg_addlinenumber(cd, iptr->line, mcodeptr);
 445                                 currentline = iptr->line;
 446                         }
 447
 448                 MCODECHECK(64);       /* an instruction usually needs < 64 words      */
 449                 switch (iptr->opc) {
 450
 451                 case ICMD_INLINE_START:
 452                 case ICMD_INLINE_END:
 453                         break;
 454
 455                 case ICMD_NOP:        /* ...  ==> ...                                 */
 456                         break;
 457
 458                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
 459
 460                         var_to_reg_int(s1, src, REG_ITMP1);
 461                         M_BEQZ(s1, 0);
 462                         codegen_addxnullrefs(cd, mcodeptr);
 463                         break;
 464
 465                 /* constant operations ************************************************/
 466
 467                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 468                                       /* op1 = 0, val.i = constant                    */
 469
 470                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 471                         ICONST(d, iptr->val.i);
 472                         store_reg_to_var_int(iptr->dst, d);
 473                         break;
 474
 475                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 476                                       /* op1 = 0, val.l = constant                    */
 477
 478                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 479                         LCONST(d, iptr->val.l);
 480                         store_reg_to_var_int(iptr->dst, d);
 481                         break;
 482
 483                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 484                                       /* op1 = 0, val.f = constant                    */
 485
 486                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 487                         a = dseg_addfloat(cd, iptr->val.f);
 488                         M_FLD(d, REG_PV, a);
 489                         store_reg_to_var_flt(iptr->dst, d);
 490                         break;
 491
 492                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 493                                       /* op1 = 0, val.d = constant                    */
 494
 495                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 496                         a = dseg_adddouble(cd, iptr->val.d);
 497                         M_DLD(d, REG_PV, a);
 498                         store_reg_to_var_flt(iptr->dst, d);
 499                         break;
 500
 501                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 502                                       /* op1 = 0, val.a = constant                    */
 503
 504                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 505                         if (iptr->val.a) {
 506                                 a = dseg_addaddress(cd, iptr->val.a);
 507                                 M_ALD(d, REG_PV, a);
 508                         } else {
 509                                 M_INTMOVE(REG_ZERO, d);
 510                         }
 511                         store_reg_to_var_int(iptr->dst, d);
 512                         break;
 513
 514
 515                 /* load/store operations **********************************************/
 516
 517                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 518                 case ICMD_LLOAD:      /* op1 = local variable                         */
 519                 case ICMD_ALOAD:
 520
 521                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 522                         if ((iptr->dst->varkind == LOCALVAR) &&
 523                             (iptr->dst->varnum == iptr->op1))
 524                                 break;
 525                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 526                         if (var->flags & INMEMORY)
 527                                 M_LLD(d, REG_SP, 8 * var->regoff);
 528                         else
 529                                 {M_INTMOVE(var->regoff,d);}
 530                         store_reg_to_var_int(iptr->dst, d);
 531                         break;
 532
 533                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 534                 case ICMD_DLOAD:      /* op1 = local variable                         */
 535
 536                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 537                         if ((iptr->dst->varkind == LOCALVAR) &&
 538                             (iptr->dst->varnum == iptr->op1))
 539                                 break;
 540                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 541                         if (var->flags & INMEMORY)
 542                                 M_DLD(d, REG_SP, 8 * var->regoff);
 543                         else
 544                                 {M_FLTMOVE(var->regoff,d);}
 545                         store_reg_to_var_flt(iptr->dst, d);
 546                         break;
 547
 548
 549                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 550                 case ICMD_LSTORE:     /* op1 = local variable                         */
 551                 case ICMD_ASTORE:
 552
 553                         if ((src->varkind == LOCALVAR) &&
 554                             (src->varnum == iptr->op1))
 555                                 break;
 556                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 557                         if (var->flags & INMEMORY) {
 558                                 var_to_reg_int(s1, src, REG_ITMP1);
 559                                 M_LST(s1, REG_SP, 8 * var->regoff);
 560                                 }
 561                         else {
 562                                 var_to_reg_int(s1, src, var->regoff);
 563                                 M_INTMOVE(s1, var->regoff);
 564                                 }
 565                         break;
 566
 567                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 568                 case ICMD_DSTORE:     /* op1 = local variable                         */
 569
 570                         if ((src->varkind == LOCALVAR) &&
 571                             (src->varnum == iptr->op1))
 572                                 break;
 573                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 574                         if (var->flags & INMEMORY) {
 575                                 var_to_reg_flt(s1, src, REG_FTMP1);
 576                                 M_DST(s1, REG_SP, 8 * var->regoff);
 577                                 }
 578                         else {
 579                                 var_to_reg_flt(s1, src, var->regoff);
 580                                 M_FLTMOVE(s1, var->regoff);
 581                                 }
 582                         break;
 583
 584
 585                 /* pop/dup/swap operations ********************************************/
 586
 587                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 588
 589                 case ICMD_POP:        /* ..., value  ==> ...                          */
 590                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 591                         break;
 592
 593                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 594                         M_COPY(src, iptr->dst);
 595                         break;
 596
 597                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 598
 599                         M_COPY(src,       iptr->dst);
 600                         M_COPY(src->prev, iptr->dst->prev);
 601                         M_COPY(iptr->dst, iptr->dst->prev->prev);
 602                         break;
 603
 604                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 605
 606                         M_COPY(src,             iptr->dst);
 607                         M_COPY(src->prev,       iptr->dst->prev);
 608                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 609                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 610                         break;
 611
 612                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 613
 614                         M_COPY(src,       iptr->dst);
 615                         M_COPY(src->prev, iptr->dst->prev);
 616                         break;
 617
 618                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 619
 620                         M_COPY(src,             iptr->dst);
 621                         M_COPY(src->prev,       iptr->dst->prev);
 622                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 623                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 624                         M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
 625                         break;
 626
 627                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 628
 629                         M_COPY(src,                   iptr->dst);
 630                         M_COPY(src->prev,             iptr->dst->prev);
 631                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 632                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 633                         M_COPY(iptr->dst,             iptr->dst->prev->prev->prev->prev);
 634                         M_COPY(iptr->dst->prev,       iptr->dst->prev->prev->prev->prev->prev);
 635                         break;
 636
 637                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 638
 639                         M_COPY(src,       iptr->dst->prev);
 640                         M_COPY(src->prev, iptr->dst);
 641                         break;
 642
 643
 644                 /* integer operations *************************************************/
 645
 646                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 647
 648                         var_to_reg_int(s1, src, REG_ITMP1);
 649                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 650                         M_ISUB(REG_ZERO, s1, d);
 651                         store_reg_to_var_int(iptr->dst, d);
 652                         break;
 653
 654                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 655
 656                         var_to_reg_int(s1, src, REG_ITMP1);
 657                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 658                         M_LSUB(REG_ZERO, s1, d);
 659                         store_reg_to_var_int(iptr->dst, d);
 660                         break;
 661
 662                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 663
 664                         var_to_reg_int(s1, src, REG_ITMP1);
 665                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 666                         M_INTMOVE(s1, d);
 667                         store_reg_to_var_int(iptr->dst, d);
 668                         break;
 669
 670                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 671
 672                         var_to_reg_int(s1, src, REG_ITMP1);
 673                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 674                         M_IADD(s1, REG_ZERO, d );
 675                         store_reg_to_var_int(iptr->dst, d);
 676                         break;
 677
 678                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 679
 680                         var_to_reg_int(s1, src, REG_ITMP1);
 681                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 682                         if (has_ext_instr_set) {
 683                                 M_BSEXT(s1, d);
 684                                 }
 685                         else {
 686                                 M_SLL_IMM(s1, 56, d);
 687                                 M_SRA_IMM( d, 56, d);
 688                                 }
 689                         store_reg_to_var_int(iptr->dst, d);
 690                         break;
 691
 692                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 693
 694                         var_to_reg_int(s1, src, REG_ITMP1);
 695                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 696             M_CZEXT(s1, d);
 697                         store_reg_to_var_int(iptr->dst, d);
 698                         break;
 699
 700                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 701
 702                         var_to_reg_int(s1, src, REG_ITMP1);
 703                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 704                         if (has_ext_instr_set) {
 705                                 M_SSEXT(s1, d);
 706                                 }
 707                         else {
 708                                 M_SLL_IMM(s1, 48, d);
 709                                 M_SRA_IMM( d, 48, d);
 710                                 }
 711                         store_reg_to_var_int(iptr->dst, d);
 712                         break;
 713
 714
 715                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 716
 717                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 718                         var_to_reg_int(s2, src, REG_ITMP2);
 719                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 720                         M_IADD(s1, s2, d);
 721                         store_reg_to_var_int(iptr->dst, d);
 722                         break;
 723
 724                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 725                                       /* val.i = constant                             */
 726
 727                         var_to_reg_int(s1, src, REG_ITMP1);
 728                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 729                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 730                                 M_IADD_IMM(s1, iptr->val.i, d);
 731                                 }
 732                         else {
 733                                 ICONST(REG_ITMP2, iptr->val.i);
 734                                 M_IADD(s1, REG_ITMP2, d);
 735                                 }
 736                         store_reg_to_var_int(iptr->dst, d);
 737                         break;
 738
 739                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 740
 741                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 742                         var_to_reg_int(s2, src, REG_ITMP2);
 743                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 744                         M_LADD(s1, s2, d);
 745                         store_reg_to_var_int(iptr->dst, d);
 746                         break;
 747
 748                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 749                                       /* val.l = constant                             */
 750
 751                         var_to_reg_int(s1, src, REG_ITMP1);
 752                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 753                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 754                                 M_LADD_IMM(s1, iptr->val.l, d);
 755                                 }
 756                         else {
 757                                 LCONST(REG_ITMP2, iptr->val.l);
 758                                 M_LADD(s1, REG_ITMP2, d);
 759                                 }
 760                         store_reg_to_var_int(iptr->dst, d);
 761                         break;
 762
 763                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 764
 765                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 766                         var_to_reg_int(s2, src, REG_ITMP2);
 767                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 768                         M_ISUB(s1, s2, d);
 769                         store_reg_to_var_int(iptr->dst, d);
 770                         break;
 771
 772                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 773                                       /* val.i = constant                             */
 774
 775                         var_to_reg_int(s1, src, REG_ITMP1);
 776                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 777                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 778                                 M_ISUB_IMM(s1, iptr->val.i, d);
 779                                 }
 780                         else {
 781                                 ICONST(REG_ITMP2, iptr->val.i);
 782                                 M_ISUB(s1, REG_ITMP2, d);
 783                                 }
 784                         store_reg_to_var_int(iptr->dst, d);
 785                         break;
 786
 787                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 788
 789                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 790                         var_to_reg_int(s2, src, REG_ITMP2);
 791                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 792                         M_LSUB(s1, s2, d);
 793                         store_reg_to_var_int(iptr->dst, d);
 794                         break;
 795
 796                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 797                                       /* val.l = constant                             */
 798
 799                         var_to_reg_int(s1, src, REG_ITMP1);
 800                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 801                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 802                                 M_LSUB_IMM(s1, iptr->val.l, d);
 803                                 }
 804                         else {
 805                                 LCONST(REG_ITMP2, iptr->val.l);
 806                                 M_LSUB(s1, REG_ITMP2, d);
 807                                 }
 808                         store_reg_to_var_int(iptr->dst, d);
 809                         break;
 810
 811                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 812
 813                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 814                         var_to_reg_int(s2, src, REG_ITMP2);
 815                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 816                         M_IMUL(s1, s2, d);
 817                         store_reg_to_var_int(iptr->dst, d);
 818                         break;
 819
 820                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 821                                       /* val.i = constant                             */
 822
 823                         var_to_reg_int(s1, src, REG_ITMP1);
 824                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 825                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 826                                 M_IMUL_IMM(s1, iptr->val.i, d);
 827                                 }
 828                         else {
 829                                 ICONST(REG_ITMP2, iptr->val.i);
 830                                 M_IMUL(s1, REG_ITMP2, d);
 831                                 }
 832                         store_reg_to_var_int(iptr->dst, d);
 833                         break;
 834
 835                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 836
 837                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 838                         var_to_reg_int(s2, src, REG_ITMP2);
 839                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 840                         M_LMUL (s1, s2, d);
 841                         store_reg_to_var_int(iptr->dst, d);
 842                         break;
 843
 844                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
 845                                       /* val.l = constant                             */
 846
 847                         var_to_reg_int(s1, src, REG_ITMP1);
 848                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 849                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 850                                 M_LMUL_IMM(s1, iptr->val.l, d);
 851                                 }
 852                         else {
 853                                 LCONST(REG_ITMP2, iptr->val.l);
 854                                 M_LMUL(s1, REG_ITMP2, d);
 855                                 }
 856                         store_reg_to_var_int(iptr->dst, d);
 857                         break;
 858
 859                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
 860                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
 861
 862                         var_to_reg_int(s1, src, REG_ITMP1);
 863                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 864                         if (iptr->val.i <= 15) {
 865                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
 866                                 M_CMOVGE(s1, s1, REG_ITMP2);
 867                                 }
 868                         else {
 869                                 M_SRA_IMM(s1, 63, REG_ITMP2);
 870                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
 871                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
 872                                 }
 873                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
 874                         store_reg_to_var_int(iptr->dst, d);
 875                         break;
 876
 877                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 878
 879                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 880                         var_to_reg_int(s2, src, REG_ITMP2);
 881                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 882                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 883                         M_SLL(s1, REG_ITMP3, d);
 884                         M_IADD(d, REG_ZERO, d);
 885                         store_reg_to_var_int(iptr->dst, d);
 886                         break;
 887
 888                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
 889                                       /* val.i = constant                             */
 890
 891                         var_to_reg_int(s1, src, REG_ITMP1);
 892                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 893                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
 894                         M_IADD(d, REG_ZERO, d);
 895                         store_reg_to_var_int(iptr->dst, d);
 896                         break;
 897
 898                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
 899
 900                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 901                         var_to_reg_int(s2, src, REG_ITMP2);
 902                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 903                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 904                         M_SRA(s1, REG_ITMP3, d);
 905                         store_reg_to_var_int(iptr->dst, d);
 906                         break;
 907
 908                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
 909                                       /* val.i = constant                             */
 910
 911                         var_to_reg_int(s1, src, REG_ITMP1);
 912                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 913                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
 914                         store_reg_to_var_int(iptr->dst, d);
 915                         break;
 916
 917                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
 918
 919                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 920                         var_to_reg_int(s2, src, REG_ITMP2);
 921                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 922                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
 923             M_IZEXT(s1, d);
 924                         M_SRL(d, REG_ITMP2, d);
 925                         M_IADD(d, REG_ZERO, d);
 926                         store_reg_to_var_int(iptr->dst, d);
 927                         break;
 928
 929                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
 930                                       /* val.i = constant                             */
 931
 932                         var_to_reg_int(s1, src, REG_ITMP1);
 933                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 934             M_IZEXT(s1, d);
 935                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
 936                         M_IADD(d, REG_ZERO, d);
 937                         store_reg_to_var_int(iptr->dst, d);
 938                         break;
 939
 940                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 941
 942                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 943                         var_to_reg_int(s2, src, REG_ITMP2);
 944                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 945                         M_SLL(s1, s2, d);
 946                         store_reg_to_var_int(iptr->dst, d);
 947                         break;
 948
 949                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
 950                                       /* val.i = constant                             */
 951
 952                         var_to_reg_int(s1, src, REG_ITMP1);
 953                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 954                         M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
 955                         store_reg_to_var_int(iptr->dst, d);
 956                         break;
 957
 958                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
 959
 960                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 961                         var_to_reg_int(s2, src, REG_ITMP2);
 962                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 963                         M_SRA(s1, s2, d);
 964                         store_reg_to_var_int(iptr->dst, d);
 965                         break;
 966
 967                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
 968                                       /* val.i = constant                             */
 969
 970                         var_to_reg_int(s1, src, REG_ITMP1);
 971                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 972                         M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
 973                         store_reg_to_var_int(iptr->dst, d);
 974                         break;
 975
 976                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
 977
 978                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 979                         var_to_reg_int(s2, src, REG_ITMP2);
 980                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 981                         M_SRL(s1, s2, d);
 982                         store_reg_to_var_int(iptr->dst, d);
 983                         break;
 984
 985                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
 986                                       /* val.i = constant                             */
 987
 988                         var_to_reg_int(s1, src, REG_ITMP1);
 989                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 990                         M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
 991                         store_reg_to_var_int(iptr->dst, d);
 992                         break;
 993
 994                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
 995                 case ICMD_LAND:
 996
 997                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 998                         var_to_reg_int(s2, src, REG_ITMP2);
 999                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1000                         M_AND(s1, s2, d);
1001                         store_reg_to_var_int(iptr->dst, d);
1002                         break;
1003
1004                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1005                                       /* val.i = constant                             */
1006
1007                         var_to_reg_int(s1, src, REG_ITMP1);
1008                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1009                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1010                                 M_AND_IMM(s1, iptr->val.i, d);
1011                                 }
1012                         else if (iptr->val.i == 0xffff) {
1013                                 M_CZEXT(s1, d);
1014                                 }
1015                         else if (iptr->val.i == 0xffffff) {
1016                                 M_ZAPNOT_IMM(s1, 0x07, d);
1017                                 }
1018                         else {
1019                                 ICONST(REG_ITMP2, iptr->val.i);
1020                                 M_AND(s1, REG_ITMP2, d);
1021                                 }
1022                         store_reg_to_var_int(iptr->dst, d);
1023                         break;
1024
1025                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1026                                       /* val.i = constant                             */
1027
1028                         var_to_reg_int(s1, src, REG_ITMP1);
1029                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1030                         if (s1 == d) {
1031                                 M_MOV(s1, REG_ITMP1);
1032                                 s1 = REG_ITMP1;
1033                                 }
1034                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1035                                 M_AND_IMM(s1, iptr->val.i, d);
1036                                 M_BGEZ(s1, 3);
1037                                 M_ISUB(REG_ZERO, s1, d);
1038                                 M_AND_IMM(d, iptr->val.i, d);
1039                                 }
1040                         else if (iptr->val.i == 0xffff) {
1041                                 M_CZEXT(s1, d);
1042                                 M_BGEZ(s1, 3);
1043                                 M_ISUB(REG_ZERO, s1, d);
1044                                 M_CZEXT(d, d);
1045                                 }
1046                         else if (iptr->val.i == 0xffffff) {
1047                                 M_ZAPNOT_IMM(s1, 0x07, d);
1048                                 M_BGEZ(s1, 3);
1049                                 M_ISUB(REG_ZERO, s1, d);
1050                                 M_ZAPNOT_IMM(d, 0x07, d);
1051                                 }
1052                         else {
1053                                 ICONST(REG_ITMP2, iptr->val.i);
1054                                 M_AND(s1, REG_ITMP2, d);
1055                                 M_BGEZ(s1, 3);
1056                                 M_ISUB(REG_ZERO, s1, d);
1057                                 M_AND(d, REG_ITMP2, d);
1058                                 }
1059                         M_ISUB(REG_ZERO, d, d);
1060                         store_reg_to_var_int(iptr->dst, d);
1061                         break;
1062
1063                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1064                                       /* val.l = constant                             */
1065
1066                         var_to_reg_int(s1, src, REG_ITMP1);
1067                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1068                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1069                                 M_AND_IMM(s1, iptr->val.l, d);
1070                                 }
1071                         else if (iptr->val.l == 0xffffL) {
1072                                 M_CZEXT(s1, d);
1073                                 }
1074                         else if (iptr->val.l == 0xffffffL) {
1075                                 M_ZAPNOT_IMM(s1, 0x07, d);
1076                                 }
1077                         else if (iptr->val.l == 0xffffffffL) {
1078                                 M_IZEXT(s1, d);
1079                                 }
1080                         else if (iptr->val.l == 0xffffffffffL) {
1081                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1082                                 }
1083                         else if (iptr->val.l == 0xffffffffffffL) {
1084                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1085                                 }
1086                         else if (iptr->val.l == 0xffffffffffffffL) {
1087                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1088                                 }
1089                         else {
1090                                 LCONST(REG_ITMP2, iptr->val.l);
1091                                 M_AND(s1, REG_ITMP2, d);
1092                                 }
1093                         store_reg_to_var_int(iptr->dst, d);
1094                         break;
1095
1096                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1097                                       /* val.l = constant                             */
1098
1099                         var_to_reg_int(s1, src, REG_ITMP1);
1100                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1101                         if (s1 == d) {
1102                                 M_MOV(s1, REG_ITMP1);
1103                                 s1 = REG_ITMP1;
1104                                 }
1105                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1106                                 M_AND_IMM(s1, iptr->val.l, d);
1107                                 M_BGEZ(s1, 3);
1108                                 M_LSUB(REG_ZERO, s1, d);
1109                                 M_AND_IMM(d, iptr->val.l, d);
1110                                 }
1111                         else if (iptr->val.l == 0xffffL) {
1112                                 M_CZEXT(s1, d);
1113                                 M_BGEZ(s1, 3);
1114                                 M_LSUB(REG_ZERO, s1, d);
1115                                 M_CZEXT(d, d);
1116                                 }
1117                         else if (iptr->val.l == 0xffffffL) {
1118                                 M_ZAPNOT_IMM(s1, 0x07, d);
1119                                 M_BGEZ(s1, 3);
1120                                 M_LSUB(REG_ZERO, s1, d);
1121                                 M_ZAPNOT_IMM(d, 0x07, d);
1122                                 }
1123                         else if (iptr->val.l == 0xffffffffL) {
1124                                 M_IZEXT(s1, d);
1125                                 M_BGEZ(s1, 3);
1126                                 M_LSUB(REG_ZERO, s1, d);
1127                                 M_IZEXT(d, d);
1128                                 }
1129                         else if (iptr->val.l == 0xffffffffffL) {
1130                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1131                                 M_BGEZ(s1, 3);
1132                                 M_LSUB(REG_ZERO, s1, d);
1133                                 M_ZAPNOT_IMM(d, 0x1f, d);
1134                                 }
1135                         else if (iptr->val.l == 0xffffffffffffL) {
1136                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1137                                 M_BGEZ(s1, 3);
1138                                 M_LSUB(REG_ZERO, s1, d);
1139                                 M_ZAPNOT_IMM(d, 0x3f, d);
1140                                 }
1141                         else if (iptr->val.l == 0xffffffffffffffL) {
1142                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1143                                 M_BGEZ(s1, 3);
1144                                 M_LSUB(REG_ZERO, s1, d);
1145                                 M_ZAPNOT_IMM(d, 0x7f, d);
1146                                 }
1147                         else {
1148                                 LCONST(REG_ITMP2, iptr->val.l);
1149                                 M_AND(s1, REG_ITMP2, d);
1150                                 M_BGEZ(s1, 3);
1151                                 M_LSUB(REG_ZERO, s1, d);
1152                                 M_AND(d, REG_ITMP2, d);
1153                                 }
1154                         M_LSUB(REG_ZERO, d, d);
1155                         store_reg_to_var_int(iptr->dst, d);
1156                         break;
1157
1158                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1159                 case ICMD_LOR:
1160
1161                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1162                         var_to_reg_int(s2, src, REG_ITMP2);
1163                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1164                         M_OR( s1,s2, d);
1165                         store_reg_to_var_int(iptr->dst, d);
1166                         break;
1167
1168                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1169                                       /* val.i = constant                             */
1170
1171                         var_to_reg_int(s1, src, REG_ITMP1);
1172                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1173                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1174                                 M_OR_IMM(s1, iptr->val.i, d);
1175                                 }
1176                         else {
1177                                 ICONST(REG_ITMP2, iptr->val.i);
1178                                 M_OR(s1, REG_ITMP2, d);
1179                                 }
1180                         store_reg_to_var_int(iptr->dst, d);
1181                         break;
1182
1183                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1184                                       /* val.l = constant                             */
1185
1186                         var_to_reg_int(s1, src, REG_ITMP1);
1187                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1188                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1189                                 M_OR_IMM(s1, iptr->val.l, d);
1190                                 }
1191                         else {
1192                                 LCONST(REG_ITMP2, iptr->val.l);
1193                                 M_OR(s1, REG_ITMP2, d);
1194                                 }
1195                         store_reg_to_var_int(iptr->dst, d);
1196                         break;
1197
1198                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1199                 case ICMD_LXOR:
1200
1201                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1202                         var_to_reg_int(s2, src, REG_ITMP2);
1203                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1204                         M_XOR(s1, s2, d);
1205                         store_reg_to_var_int(iptr->dst, d);
1206                         break;
1207
1208                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1209                                       /* val.i = constant                             */
1210
1211                         var_to_reg_int(s1, src, REG_ITMP1);
1212                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1213                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1214                                 M_XOR_IMM(s1, iptr->val.i, d);
1215                                 }
1216                         else {
1217                                 ICONST(REG_ITMP2, iptr->val.i);
1218                                 M_XOR(s1, REG_ITMP2, d);
1219                                 }
1220                         store_reg_to_var_int(iptr->dst, d);
1221                         break;
1222
1223                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1224                                       /* val.l = constant                             */
1225
1226                         var_to_reg_int(s1, src, REG_ITMP1);
1227                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1228                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1229                                 M_XOR_IMM(s1, iptr->val.l, d);
1230                                 }
1231                         else {
1232                                 LCONST(REG_ITMP2, iptr->val.l);
1233                                 M_XOR(s1, REG_ITMP2, d);
1234                                 }
1235                         store_reg_to_var_int(iptr->dst, d);
1236                         break;
1237
1238
1239                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1240
1241                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1242                         var_to_reg_int(s2, src, REG_ITMP2);
1243                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1244                         M_CMPLT(s1, s2, REG_ITMP3);
1245                         M_CMPLT(s2, s1, REG_ITMP1);
1246                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1247                         store_reg_to_var_int(iptr->dst, d);
1248                         break;
1249
1250
1251                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1252                                       /* op1 = variable, val.i = constant             */
1253
1254                         var = &(rd->locals[iptr->op1][TYPE_INT]);
1255                         if (var->flags & INMEMORY) {
1256                                 s1 = REG_ITMP1;
1257                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1258                                 }
1259                         else
1260                                 s1 = var->regoff;
1261                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1262                                 M_IADD_IMM(s1, iptr->val.i, s1);
1263                                 }
1264                         else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1265                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1266                                 }
1267                         else {
1268                                 M_LDA (s1, s1, iptr->val.i);
1269                                 M_IADD(s1, REG_ZERO, s1);
1270                                 }
1271                         if (var->flags & INMEMORY)
1272                                 M_LST(s1, REG_SP, 8 * var->regoff);
1273                         break;
1274
1275
1276                 /* floating operations ************************************************/
1277
1278                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1279
1280                         var_to_reg_flt(s1, src, REG_FTMP1);
1281                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1282                         M_FMOVN(s1, d);
1283                         store_reg_to_var_flt(iptr->dst, d);
1284                         break;
1285
1286                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1287
1288                         var_to_reg_flt(s1, src, REG_FTMP1);
1289                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1290                         M_FMOVN(s1, d);
1291                         store_reg_to_var_flt(iptr->dst, d);
1292                         break;
1293
1294                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1295
1296                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1297                         var_to_reg_flt(s2, src, REG_FTMP2);
1298                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1299                         if (opt_noieee) {
1300                                 M_FADD(s1, s2, d);
1301                                 }
1302                         else {
1303                                 if (d == s1 || d == s2) {
1304                                         M_FADDS(s1, s2, REG_FTMP3);
1305                                         M_TRAPB;
1306                                         M_FMOV(REG_FTMP3, d);
1307                                         }
1308                                 else {
1309                                         M_FADDS(s1, s2, d);
1310                                         M_TRAPB;
1311                                         }
1312                                 }
1313                         store_reg_to_var_flt(iptr->dst, d);
1314                         break;
1315
1316                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1317
1318                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1319                         var_to_reg_flt(s2, src, REG_FTMP2);
1320                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1321                         if (opt_noieee) {
1322                                 M_DADD(s1, s2, d);
1323                                 }
1324                         else {
1325                                 if (d == s1 || d == s2) {
1326                                         M_DADDS(s1, s2, REG_FTMP3);
1327                                         M_TRAPB;
1328                                         M_FMOV(REG_FTMP3, d);
1329                                         }
1330                                 else {
1331                                         M_DADDS(s1, s2, d);
1332                                         M_TRAPB;
1333                                         }
1334                                 }
1335                         store_reg_to_var_flt(iptr->dst, d);
1336                         break;
1337
1338                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1339
1340                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1341                         var_to_reg_flt(s2, src, REG_FTMP2);
1342                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1343                         if (opt_noieee) {
1344                                 M_FSUB(s1, s2, d);
1345                                 }
1346                         else {
1347                                 if (d == s1 || d == s2) {
1348                                         M_FSUBS(s1, s2, REG_FTMP3);
1349                                         M_TRAPB;
1350                                         M_FMOV(REG_FTMP3, d);
1351                                         }
1352                                 else {
1353                                         M_FSUBS(s1, s2, d);
1354                                         M_TRAPB;
1355                                         }
1356                                 }
1357                         store_reg_to_var_flt(iptr->dst, d);
1358                         break;
1359
1360                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1361
1362                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1363                         var_to_reg_flt(s2, src, REG_FTMP2);
1364                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1365                         if (opt_noieee) {
1366                                 M_DSUB(s1, s2, d);
1367                                 }
1368                         else {
1369                                 if (d == s1 || d == s2) {
1370                                         M_DSUBS(s1, s2, REG_FTMP3);
1371                                         M_TRAPB;
1372                                         M_FMOV(REG_FTMP3, d);
1373                                         }
1374                                 else {
1375                                         M_DSUBS(s1, s2, d);
1376                                         M_TRAPB;
1377                                         }
1378                                 }
1379                         store_reg_to_var_flt(iptr->dst, d);
1380                         break;
1381
1382                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1383
1384                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1385                         var_to_reg_flt(s2, src, REG_FTMP2);
1386                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1387                         if (opt_noieee) {
1388                                 M_FMUL(s1, s2, d);
1389                                 }
1390                         else {
1391                                 if (d == s1 || d == s2) {
1392                                         M_FMULS(s1, s2, REG_FTMP3);
1393                                         M_TRAPB;
1394                                         M_FMOV(REG_FTMP3, d);
1395                                         }
1396                                 else {
1397                                         M_FMULS(s1, s2, d);
1398                                         M_TRAPB;
1399                                         }
1400                                 }
1401                         store_reg_to_var_flt(iptr->dst, d);
1402                         break;
1403
1404                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1405
1406                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1407                         var_to_reg_flt(s2, src, REG_FTMP2);
1408                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1409                         if (opt_noieee) {
1410                                 M_DMUL(s1, s2, d);
1411                                 }
1412                         else {
1413                                 if (d == s1 || d == s2) {
1414                                         M_DMULS(s1, s2, REG_FTMP3);
1415                                         M_TRAPB;
1416                                         M_FMOV(REG_FTMP3, d);
1417                                         }
1418                                 else {
1419                                         M_DMULS(s1, s2, d);
1420                                         M_TRAPB;
1421                                         }
1422                                 }
1423                         store_reg_to_var_flt(iptr->dst, d);
1424                         break;
1425
1426                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1427
1428                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1429                         var_to_reg_flt(s2, src, REG_FTMP2);
1430                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1431                         if (opt_noieee) {
1432                                 M_FDIV(s1, s2, d);
1433                                 }
1434                         else {
1435                                 if (d == s1 || d == s2) {
1436                                         M_FDIVS(s1, s2, REG_FTMP3);
1437                                         M_TRAPB;
1438                                         M_FMOV(REG_FTMP3, d);
1439                                         }
1440                                 else {
1441                                         M_FDIVS(s1, s2, d);
1442                                         M_TRAPB;
1443                                         }
1444                                 }
1445                         store_reg_to_var_flt(iptr->dst, d);
1446                         break;
1447
1448                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1449
1450                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1451                         var_to_reg_flt(s2, src, REG_FTMP2);
1452                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1453                         if (opt_noieee) {
1454                                 M_DDIV(s1, s2, d);
1455                                 }
1456                         else {
1457                                 if (d == s1 || d == s2) {
1458                                         M_DDIVS(s1, s2, REG_FTMP3);
1459                                         M_TRAPB;
1460                                         M_FMOV(REG_FTMP3, d);
1461                                         }
1462                                 else {
1463                                         M_DDIVS(s1, s2, d);
1464                                         M_TRAPB;
1465                                         }
1466                                 }
1467                         store_reg_to_var_flt(iptr->dst, d);
1468                         break;
1469
1470                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1471                 case ICMD_L2F:
1472                         var_to_reg_int(s1, src, REG_ITMP1);
1473                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1474                         a = dseg_adddouble(cd, 0.0);
1475                         M_LST (s1, REG_PV, a);
1476                         M_DLD (d, REG_PV, a);
1477                         M_CVTLF(d, d);
1478                         store_reg_to_var_flt(iptr->dst, d);
1479                         break;
1480
1481                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1482                 case ICMD_L2D:
1483                         var_to_reg_int(s1, src, REG_ITMP1);
1484                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1485                         a = dseg_adddouble(cd, 0.0);
1486                         M_LST (s1, REG_PV, a);
1487                         M_DLD (d, REG_PV, a);
1488                         M_CVTLD(d, d);
1489                         store_reg_to_var_flt(iptr->dst, d);
1490                         break;
1491
1492                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1493                 case ICMD_D2I:
1494                         var_to_reg_flt(s1, src, REG_FTMP1);
1495                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1496                         a = dseg_adddouble(cd, 0.0);
1497                         M_CVTDL_C(s1, REG_FTMP2);
1498                         M_CVTLI(REG_FTMP2, REG_FTMP3);
1499                         M_DST (REG_FTMP3, REG_PV, a);
1500                         M_ILD (d, REG_PV, a);
1501                         store_reg_to_var_int(iptr->dst, d);
1502                         break;
1503
1504                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1505                 case ICMD_D2L:
1506                         var_to_reg_flt(s1, src, REG_FTMP1);
1507                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1508                         a = dseg_adddouble(cd, 0.0);
1509                         M_CVTDL_C(s1, REG_FTMP2);
1510                         M_DST (REG_FTMP2, REG_PV, a);
1511                         M_LLD (d, REG_PV, a);
1512                         store_reg_to_var_int(iptr->dst, d);
1513                         break;
1514
1515                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1516
1517                         var_to_reg_flt(s1, src, REG_FTMP1);
1518                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1519                         M_CVTFDS(s1, d);
1520                         M_TRAPB;
1521                         store_reg_to_var_flt(iptr->dst, d);
1522                         break;
1523
1524                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1525
1526                         var_to_reg_flt(s1, src, REG_FTMP1);
1527                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1528                         if (opt_noieee) {
1529                                 M_CVTDF(s1, d);
1530                                 }
1531                         else {
1532                                 M_CVTDFS(s1, d);
1533                                 M_TRAPB;
1534                                 }
1535                         store_reg_to_var_flt(iptr->dst, d);
1536                         break;
1537
1538                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1539                 case ICMD_DCMPL:
1540                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1541                         var_to_reg_flt(s2, src, REG_FTMP2);
1542                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1543                         if (opt_noieee) {
1544                                 M_LSUB_IMM(REG_ZERO, 1, d);
1545                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1546                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1547                                 M_CLR   (d);
1548                                 M_FCMPLT(s2, s1, REG_FTMP3);
1549                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1550                                 M_LADD_IMM(REG_ZERO, 1, d);
1551                                 }
1552                         else {
1553                                 M_LSUB_IMM(REG_ZERO, 1, d);
1554                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1555                                 M_TRAPB;
1556                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1557                                 M_CLR   (d);
1558                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1559                                 M_TRAPB;
1560                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1561                                 M_LADD_IMM(REG_ZERO, 1, d);
1562                                 }
1563                         store_reg_to_var_int(iptr->dst, d);
1564                         break;
1565
1566                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1567                 case ICMD_DCMPG:
1568                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1569                         var_to_reg_flt(s2, src, REG_FTMP2);
1570                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1571                         if (opt_noieee) {
1572                                 M_LADD_IMM(REG_ZERO, 1, d);
1573                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1574                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1575                                 M_CLR   (d);
1576                                 M_FCMPLT(s1, s2, REG_FTMP3);
1577                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1578                                 M_LSUB_IMM(REG_ZERO, 1, d);
1579                                 }
1580                         else {
1581                                 M_LADD_IMM(REG_ZERO, 1, d);
1582                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1583                                 M_TRAPB;
1584                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1585                                 M_CLR   (d);
1586                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1587                                 M_TRAPB;
1588                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1589                                 M_LSUB_IMM(REG_ZERO, 1, d);
1590                                 }
1591                         store_reg_to_var_int(iptr->dst, d);
1592                         break;
1593
1594
1595                 /* memory operations **************************************************/
1596
1597                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1598
1599                         var_to_reg_int(s1, src, REG_ITMP1);
1600                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1601                         gen_nullptr_check(s1);
1602                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1603                         store_reg_to_var_int(iptr->dst, d);
1604                         break;
1605
1606                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1607
1608                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1609                         var_to_reg_int(s2, src, REG_ITMP2);
1610                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1611                         if (iptr->op1 == 0) {
1612                                 gen_nullptr_check(s1);
1613                                 gen_bound_check;
1614                                 }
1615                         M_SAADDQ(s2, s1, REG_ITMP1);
1616                         M_ALD( d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1617                         store_reg_to_var_int(iptr->dst, d);
1618                         break;
1619
1620                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1621
1622                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1623                         var_to_reg_int(s2, src, REG_ITMP2);
1624                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1625                         if (iptr->op1 == 0) {
1626                                 gen_nullptr_check(s1);
1627                                 gen_bound_check;
1628                                 }
1629                         M_S8ADDQ(s2, s1, REG_ITMP1);
1630                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1631                         store_reg_to_var_int(iptr->dst, d);
1632                         break;
1633
1634                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1635
1636                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1637                         var_to_reg_int(s2, src, REG_ITMP2);
1638                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1639                         if (iptr->op1 == 0) {
1640                                 gen_nullptr_check(s1);
1641                                 gen_bound_check;
1642                                 }
1643
1644                         M_S4ADDQ(s2, s1, REG_ITMP1);
1645                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1646                         store_reg_to_var_int(iptr->dst, d);
1647                         break;
1648
1649                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1650
1651                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1652                         var_to_reg_int(s2, src, REG_ITMP2);
1653                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1654                         if (iptr->op1 == 0) {
1655                                 gen_nullptr_check(s1);
1656                                 gen_bound_check;
1657                                 }
1658                         M_S4ADDQ(s2, s1, REG_ITMP1);
1659                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1660                         store_reg_to_var_flt(iptr->dst, d);
1661                         break;
1662
1663                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1664
1665                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1666                         var_to_reg_int(s2, src, REG_ITMP2);
1667                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1668                         if (iptr->op1 == 0) {
1669                                 gen_nullptr_check(s1);
1670                                 gen_bound_check;
1671                                 }
1672                         M_S8ADDQ(s2, s1, REG_ITMP1);
1673                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1674                         store_reg_to_var_flt(iptr->dst, d);
1675                         break;
1676
1677                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1678
1679                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1680                         var_to_reg_int(s2, src, REG_ITMP2);
1681                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1682                         if (iptr->op1 == 0) {
1683                                 gen_nullptr_check(s1);
1684                                 gen_bound_check;
1685                                 }
1686                         if (has_ext_instr_set) {
1687                                 M_LADD(s2, s1, REG_ITMP1);
1688                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1689                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1690                                 }
1691                         else {
1692                                 M_LADD (s2, s1, REG_ITMP1);
1693                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1694                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1695                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1696                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
1697                                 }
1698                         store_reg_to_var_int(iptr->dst, d);
1699                         break;
1700
1701                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1702
1703                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1704                         var_to_reg_int(s2, src, REG_ITMP2);
1705                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1706                         if (iptr->op1 == 0) {
1707                                 gen_nullptr_check(s1);
1708                                 gen_bound_check;
1709                                 }
1710                         if (has_ext_instr_set) {
1711                                 M_LADD(s2, s1, REG_ITMP1);
1712                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1713                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
1714                                 M_SSEXT(d, d);
1715                                 }
1716                         else {
1717                                 M_LADD(s2, s1, REG_ITMP1);
1718                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1719                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1720                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
1721                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1722                                 M_SRA_IMM(d, 48, d);
1723                                 }
1724                         store_reg_to_var_int(iptr->dst, d);
1725                         break;
1726
1727                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1728
1729                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1730                         var_to_reg_int(s2, src, REG_ITMP2);
1731                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1732                         if (iptr->op1 == 0) {
1733                                 gen_nullptr_check(s1);
1734                                 gen_bound_check;
1735                                 }
1736                         if (has_ext_instr_set) {
1737                                 M_LADD   (s2, s1, REG_ITMP1);
1738                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
1739                                 M_BSEXT  (d, d);
1740                                 }
1741                         else {
1742                                 M_LADD(s2, s1, REG_ITMP1);
1743                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1744                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
1745                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1746                                 M_SRA_IMM(d, 56, d);
1747                                 }
1748                         store_reg_to_var_int(iptr->dst, d);
1749                         break;
1750
1751
1752                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1753
1754                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1755                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1756                         if (iptr->op1 == 0) {
1757                                 gen_nullptr_check(s1);
1758                                 gen_bound_check;
1759                                 }
1760                         var_to_reg_int(s3, src, REG_ITMP3);
1761                         M_SAADDQ(s2, s1, REG_ITMP1);
1762                         M_AST   (s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1763                         break;
1764
1765                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1766
1767                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1768                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1769                         if (iptr->op1 == 0) {
1770                                 gen_nullptr_check(s1);
1771                                 gen_bound_check;
1772                                 }
1773                         var_to_reg_int(s3, src, REG_ITMP3);
1774                         M_S8ADDQ(s2, s1, REG_ITMP1);
1775                         M_LST   (s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1776                         break;
1777
1778                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1779
1780                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1781                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1782                         if (iptr->op1 == 0) {
1783                                 gen_nullptr_check(s1);
1784                                 gen_bound_check;
1785                                 }
1786
1787                         var_to_reg_int(s3, src, REG_ITMP3);
1788                         M_S4ADDQ(s2, s1, REG_ITMP1);
1789                         M_IST   (s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1790                         break;
1791
1792                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1793
1794                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1795                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1796                         if (iptr->op1 == 0) {
1797                                 gen_nullptr_check(s1);
1798                                 gen_bound_check;
1799                                 }
1800                         var_to_reg_flt(s3, src, REG_FTMP3);
1801                         M_S4ADDQ(s2, s1, REG_ITMP1);
1802                         M_FST   (s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1803                         break;
1804
1805                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1806
1807                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1808                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1809                         if (iptr->op1 == 0) {
1810                                 gen_nullptr_check(s1);
1811                                 gen_bound_check;
1812                                 }
1813                         var_to_reg_flt(s3, src, REG_FTMP3);
1814                         M_S8ADDQ(s2, s1, REG_ITMP1);
1815                         M_DST   (s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1816                         break;
1817
1818                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1819
1820                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1821                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1822                         if (iptr->op1 == 0) {
1823                                 gen_nullptr_check(s1);
1824                                 gen_bound_check;
1825                                 }
1826                         var_to_reg_int(s3, src, REG_ITMP3);
1827                         if (has_ext_instr_set) {
1828                                 M_LADD(s2, s1, REG_ITMP1);
1829                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1830                                 M_SST (s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1831                                 }
1832                         else {
1833                                 M_LADD (s2, s1, REG_ITMP1);
1834                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1835                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1836                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1837                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1838                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1839                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
1840                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1841                                 }
1842                         break;
1843
1844                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1845
1846                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1847                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1848                         if (iptr->op1 == 0) {
1849                                 gen_nullptr_check(s1);
1850                                 gen_bound_check;
1851                                 }
1852                         var_to_reg_int(s3, src, REG_ITMP3);
1853                         if (has_ext_instr_set) {
1854                                 M_LADD(s2, s1, REG_ITMP1);
1855                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1856                                 M_SST (s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1857                                 }
1858                         else {
1859                                 M_LADD (s2, s1, REG_ITMP1);
1860                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1861                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1862                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1863                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1864                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1865                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
1866                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1867                                 }
1868                         break;
1869
1870                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1871
1872                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1873                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1874                         if (iptr->op1 == 0) {
1875                                 gen_nullptr_check(s1);
1876                                 gen_bound_check;
1877                                 }
1878                         var_to_reg_int(s3, src, REG_ITMP3);
1879                         if (has_ext_instr_set) {
1880                                 M_LADD(s2, s1, REG_ITMP1);
1881                                 M_BST (s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1882                                 }
1883                         else {
1884                                 M_LADD (s2, s1, REG_ITMP1);
1885                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1886                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1887                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
1888                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1889                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
1890                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1891                                 }
1892                         break;
1893
1894
1895                 case ICMD_IASTORECONST:   /* ..., arrayref, index  ==> ...            */
1896
1897                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1898                         var_to_reg_int(s2, src, REG_ITMP2);
1899                         if (iptr->op1 == 0) {
1900                                 gen_nullptr_check(s1);
1901                                 gen_bound_check;
1902                         }
1903                         M_S4ADDQ(s2, s1, REG_ITMP1);
1904                         M_IST(REG_ZERO, REG_ITMP1, OFFSET(java_intarray, data[0]));
1905                         break;
1906
1907                 case ICMD_LASTORECONST:   /* ..., arrayref, index  ==> ...            */
1908
1909                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1910                         var_to_reg_int(s2, src, REG_ITMP2);
1911                         if (iptr->op1 == 0) {
1912                                 gen_nullptr_check(s1);
1913                                 gen_bound_check;
1914                         }
1915                         M_S8ADDQ(s2, s1, REG_ITMP1);
1916                         M_LST(REG_ZERO, REG_ITMP1, OFFSET(java_longarray, data[0]));
1917                         break;
1918
1919                 case ICMD_AASTORECONST:   /* ..., arrayref, index  ==> ...            */
1920
1921                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1922                         var_to_reg_int(s2, src, REG_ITMP2);
1923                         if (iptr->op1 == 0) {
1924                                 gen_nullptr_check(s1);
1925                                 gen_bound_check;
1926                         }
1927                         M_SAADDQ(s2, s1, REG_ITMP1);
1928                         M_AST(REG_ZERO, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1929                         break;
1930
1931                 case ICMD_BASTORECONST:   /* ..., arrayref, index  ==> ...            */
1932
1933                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1934                         var_to_reg_int(s2, src, REG_ITMP2);
1935                         if (iptr->op1 == 0) {
1936                                 gen_nullptr_check(s1);
1937                                 gen_bound_check;
1938                         }
1939                         if (has_ext_instr_set) {
1940                                 M_LADD(s2, s1, REG_ITMP1);
1941                                 M_BST(REG_ZERO, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1942
1943                         } else {
1944                                 M_LADD(s2, s1, REG_ITMP1);
1945                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1946                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1947                                 M_INSBL(REG_ZERO, REG_ITMP1, REG_ITMP3);
1948                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1949                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1950                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1951                         }
1952                         break;
1953
1954                 case ICMD_CASTORECONST:   /* ..., arrayref, index  ==> ...            */
1955
1956                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1957                         var_to_reg_int(s2, src, REG_ITMP2);
1958                         if (iptr->op1 == 0) {
1959                                 gen_nullptr_check(s1);
1960                                 gen_bound_check;
1961                         }
1962                         if (has_ext_instr_set) {
1963                                 M_LADD(s2, s1, REG_ITMP1);
1964                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1965                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_chararray, data[0]));
1966
1967                         } else {
1968                                 M_LADD(s2, s1, REG_ITMP1);
1969                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1970                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1971                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1972                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
1973                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1974                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1975                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1976                         }
1977                         break;
1978
1979                 case ICMD_SASTORECONST:   /* ..., arrayref, index  ==> ...            */
1980
1981                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1982                         var_to_reg_int(s2, src, REG_ITMP2);
1983                         if (iptr->op1 == 0) {
1984                                 gen_nullptr_check(s1);
1985                                 gen_bound_check;
1986                         }
1987                         if (has_ext_instr_set) {
1988                                 M_LADD(s2, s1, REG_ITMP1);
1989                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1990                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1991
1992                         } else {
1993                                 M_LADD(s2, s1, REG_ITMP1);
1994                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1995                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1996                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1997                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
1998                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1999                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2000                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2001                         }
2002                         break;
2003
2004
2005                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2006                                       /* op1 = type, val.a = field address            */
2007
2008                         if (!iptr->val.a) {
2009                                 codegen_addpatchref(cd, mcodeptr,
2010                                                                         PATCHER_get_putstatic,
2011                                                                         (unresolved_field *) iptr->target);
2012
2013                                 if (showdisassemble)
2014                                         M_NOP;
2015
2016                                 a = 0;
2017
2018                         } else {
2019                                 fieldinfo *fi = iptr->val.a;
2020
2021                                 if (!fi->class->initialized) {
2022                                         codegen_addpatchref(cd, mcodeptr,
2023                                                                                 PATCHER_clinit, fi->class);
2024
2025                                         if (showdisassemble)
2026                                                 M_NOP;
2027                                 }
2028
2029                                 a = (ptrint) &(fi->value);
2030                         }
2031
2032                         a = dseg_addaddress(cd, a);
2033                         M_ALD(REG_ITMP1, REG_PV, a);
2034                         switch (iptr->op1) {
2035                         case TYPE_INT:
2036                                 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2037                                 M_ILD(d, REG_ITMP1, 0);
2038                                 store_reg_to_var_int(iptr->dst, d);
2039                                 break;
2040                         case TYPE_LNG:
2041                                 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2042                                 M_LLD(d, REG_ITMP1, 0);
2043                                 store_reg_to_var_int(iptr->dst, d);
2044                                 break;
2045                         case TYPE_ADR:
2046                                 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2047                                 M_ALD(d, REG_ITMP1, 0);
2048                                 store_reg_to_var_int(iptr->dst, d);
2049                                 break;
2050                         case TYPE_FLT:
2051                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2052                                 M_FLD(d, REG_ITMP1, 0);
2053                                 store_reg_to_var_flt(iptr->dst, d);
2054                                 break;
2055                         case TYPE_DBL:
2056                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2057                                 M_DLD(d, REG_ITMP1, 0);
2058                                 store_reg_to_var_flt(iptr->dst, d);
2059                                 break;
2060                         }
2061                         break;
2062
2063                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2064                                       /* op1 = type, val.a = field address            */
2065
2066                         if (!iptr->val.a) {
2067                                 codegen_addpatchref(cd, mcodeptr,
2068                                                                         PATCHER_get_putstatic,
2069                                                                         (unresolved_field *) iptr->target);
2070
2071                                 if (showdisassemble)
2072                                         M_NOP;
2073
2074                                 a = 0;
2075
2076                         } else {
2077                                 fieldinfo *fi = iptr->val.a;
2078
2079                                 if (!fi->class->initialized) {
2080                                         codegen_addpatchref(cd, mcodeptr,
2081                                                                                 PATCHER_clinit, fi->class);
2082
2083                                         if (showdisassemble)
2084                                                 M_NOP;
2085                                 }
2086
2087                                 a = (ptrint) &(fi->value);
2088                         }
2089
2090                         a = dseg_addaddress(cd, a);
2091                         M_ALD(REG_ITMP1, REG_PV, a);
2092                         switch (iptr->op1) {
2093                         case TYPE_INT:
2094                                 var_to_reg_int(s2, src, REG_ITMP2);
2095                                 M_IST(s2, REG_ITMP1, 0);
2096                                 break;
2097                         case TYPE_LNG:
2098                                 var_to_reg_int(s2, src, REG_ITMP2);
2099                                 M_LST(s2, REG_ITMP1, 0);
2100                                 break;
2101                         case TYPE_ADR:
2102                                 var_to_reg_int(s2, src, REG_ITMP2);
2103                                 M_AST(s2, REG_ITMP1, 0);
2104                                 break;
2105                         case TYPE_FLT:
2106                                 var_to_reg_flt(s2, src, REG_FTMP2);
2107                                 M_FST(s2, REG_ITMP1, 0);
2108                                 break;
2109                         case TYPE_DBL:
2110                                 var_to_reg_flt(s2, src, REG_FTMP2);
2111                                 M_DST(s2, REG_ITMP1, 0);
2112                                 break;
2113                         }
2114                         break;
2115
2116                 case ICMD_PUTSTATICCONST: /* ...  ==> ...                             */
2117                                           /* val = value (in current instruction)     */
2118                                           /* op1 = type, val.a = field address (in    */
2119                                           /* following NOP)                           */
2120
2121                         if (!iptr[1].val.a) {
2122                                 codegen_addpatchref(cd, mcodeptr,
2123                                                                         PATCHER_get_putstatic,
2124                                                                         (unresolved_field *) iptr[1].target);
2125
2126                                 if (showdisassemble)
2127                                         M_NOP;
2128
2129                                 a = 0;
2130
2131                         } else {
2132                                 fieldinfo *fi = iptr[1].val.a;
2133
2134                                 if (!fi->class->initialized) {
2135                                         codegen_addpatchref(cd, mcodeptr,
2136                                                                                 PATCHER_clinit, fi->class);
2137
2138                                         if (showdisassemble)
2139                                                 M_NOP;
2140                                 }
2141
2142                                 a = (ptrint) &(fi->value);
2143                         }
2144
2145                         a = dseg_addaddress(cd, a);
2146                         M_ALD(REG_ITMP1, REG_PV, a);
2147                         switch (iptr->op1) {
2148                         case TYPE_INT:
2149                                 M_IST(REG_ZERO, REG_ITMP1, 0);
2150                                 break;
2151                         case TYPE_LNG:
2152                                 M_LST(REG_ZERO, REG_ITMP1, 0);
2153                                 break;
2154                         case TYPE_ADR:
2155                                 M_AST(REG_ZERO, REG_ITMP1, 0);
2156                                 break;
2157                         case TYPE_FLT:
2158                                 M_FST(REG_ZERO, REG_ITMP1, 0);
2159                                 break;
2160                         case TYPE_DBL:
2161                                 M_DST(REG_ZERO, REG_ITMP1, 0);
2162                                 break;
2163                         }
2164                         break;
2165
2166
2167                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2168                                       /* op1 = type, val.i = field offset             */
2169
2170                         var_to_reg_int(s1, src, REG_ITMP1);
2171                         gen_nullptr_check(s1);
2172
2173                         if (!iptr->val.a) {
2174                                 codegen_addpatchref(cd, mcodeptr,
2175                                                                         PATCHER_get_putfield,
2176                                                                         (unresolved_field *) iptr->target);
2177
2178                                 if (showdisassemble)
2179                                         M_NOP;
2180
2181                                 a = 0;
2182
2183                         } else {
2184                                 a = ((fieldinfo *) (iptr->val.a))->offset;
2185                         }
2186
2187                         switch (iptr->op1) {
2188                         case TYPE_INT:
2189                                 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2190                                 M_ILD(d, s1, a);
2191                                 store_reg_to_var_int(iptr->dst, d);
2192                                 break;
2193                         case TYPE_LNG:
2194                                 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2195                                 M_LLD(d, s1, a);
2196                                 store_reg_to_var_int(iptr->dst, d);
2197                                 break;
2198                         case TYPE_ADR:
2199                                 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2200                                 M_ALD(d, s1, a);
2201                                 store_reg_to_var_int(iptr->dst, d);
2202                                 break;
2203                         case TYPE_FLT:
2204                                 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
2205                                 M_FLD(d, s1, a);
2206                                 store_reg_to_var_flt(iptr->dst, d);
2207                                 break;
2208                         case TYPE_DBL:
2209                                 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
2210                                 M_DLD(d, s1, a);
2211                                 store_reg_to_var_flt(iptr->dst, d);
2212                                 break;
2213                         }
2214                         break;
2215
2216                 case ICMD_PUTFIELD:   /* ..., objectref, value  ==> ...               */
2217                                       /* op1 = type, val.a = field address            */
2218
2219                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2220                         gen_nullptr_check(s1);
2221
2222                         if (!IS_FLT_DBL_TYPE(iptr->op1)) {
2223                                 var_to_reg_int(s2, src, REG_ITMP2);
2224                         } else {
2225                                 var_to_reg_flt(s2, src, REG_FTMP2);
2226                         }
2227
2228                         if (!iptr->val.a) {
2229                                 codegen_addpatchref(cd, mcodeptr,
2230                                                                         PATCHER_get_putfield,
2231                                                                         (unresolved_field *) iptr->target);
2232
2233                                 if (showdisassemble)
2234                                         M_NOP;
2235
2236                                 a = 0;
2237
2238                         } else {
2239                                 a = ((fieldinfo *) (iptr->val.a))->offset;
2240                         }
2241
2242                         switch (iptr->op1) {
2243                         case TYPE_INT:
2244                                 M_IST(s2, s1, a);
2245                                 break;
2246                         case TYPE_LNG:
2247                                 M_LST(s2, s1, a);
2248                                 break;
2249                         case TYPE_ADR:
2250                                 M_AST(s2, s1, a);
2251                                 break;
2252                         case TYPE_FLT:
2253                                 M_FST(s2, s1, a);
2254                                 break;
2255                         case TYPE_DBL:
2256                                 M_DST(s2, s1, a);
2257                                 break;
2258                         }
2259                         break;
2260
2261                 case ICMD_PUTFIELDCONST:  /* ..., objectref  ==> ...                  */
2262                                           /* val = value (in current instruction)     */
2263                                           /* op1 = type, val.a = field address (in    */
2264                                           /* following NOP)                           */
2265
2266                         var_to_reg_int(s1, src, REG_ITMP1);
2267                         gen_nullptr_check(s1);
2268
2269                         if (!iptr[1].val.a) {
2270                                 codegen_addpatchref(cd, mcodeptr,
2271                                                                         PATCHER_get_putfield,
2272                                                                         (unresolved_field *) iptr[1].target);
2273
2274                                 if (showdisassemble)
2275                                         M_NOP;
2276
2277                                 a = 0;
2278
2279                         } else {
2280                                 a = ((fieldinfo *) (iptr[1].val.a))->offset;
2281                         }
2282
2283                         switch (iptr[1].op1) {
2284                         case TYPE_INT:
2285                                 M_IST(REG_ZERO, s1, a);
2286                                 break;
2287                         case TYPE_LNG:
2288                                 M_LST(REG_ZERO, s1, a);
2289                                 break;
2290                         case TYPE_ADR:
2291                                 M_AST(REG_ZERO, s1, a);
2292                                 break;
2293                         case TYPE_FLT:
2294                                 M_FST(REG_ZERO, s1, a);
2295                                 break;
2296                         case TYPE_DBL:
2297                                 M_DST(REG_ZERO, s1, a);
2298                                 break;
2299                         }
2300                         break;
2301
2302
2303                 /* branch operations **************************************************/
2304
2305                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2306
2307                         var_to_reg_int(s1, src, REG_ITMP1);
2308                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2309                         a = dseg_addaddress(cd, asm_handle_exception);
2310                         M_ALD(REG_ITMP2, REG_PV, a);
2311                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2312                         M_NOP;              /* nop ensures that XPC is less than the end */
2313                                             /* of basic block                            */
2314                         ALIGNCODENOP;
2315                         break;
2316
2317                 case ICMD_GOTO:         /* ... ==> ...                                */
2318                                         /* op1 = target JavaVM pc                     */
2319                         M_BR(0);
2320                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2321                         ALIGNCODENOP;
2322                         break;
2323
2324                 case ICMD_JSR:          /* ... ==> ...                                */
2325                                         /* op1 = target JavaVM pc                     */
2326
2327                         M_BSR(REG_ITMP1, 0);
2328                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2329                         break;
2330
2331                 case ICMD_RET:          /* ... ==> ...                                */
2332                                         /* op1 = local variable                       */
2333
2334                         var = &(rd->locals[iptr->op1][TYPE_ADR]);
2335                         if (var->flags & INMEMORY) {
2336                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2337                                 M_RET(REG_ZERO, REG_ITMP1);
2338                                 }
2339                         else
2340                                 M_RET(REG_ZERO, var->regoff);
2341                         ALIGNCODENOP;
2342                         break;
2343
2344                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2345                                         /* op1 = target JavaVM pc                     */
2346
2347                         var_to_reg_int(s1, src, REG_ITMP1);
2348                         M_BEQZ(s1, 0);
2349                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2350                         break;
2351
2352                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2353                                         /* op1 = target JavaVM pc                     */
2354
2355                         var_to_reg_int(s1, src, REG_ITMP1);
2356                         M_BNEZ(s1, 0);
2357                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2358                         break;
2359
2360                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2361                                         /* op1 = target JavaVM pc, val.i = constant   */
2362
2363                         var_to_reg_int(s1, src, REG_ITMP1);
2364                         if (iptr->val.i == 0) {
2365                                 M_BEQZ(s1, 0);
2366                                 }
2367                         else {
2368                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2369                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2370                                         }
2371                                 else {
2372                                         ICONST(REG_ITMP2, iptr->val.i);
2373                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2374                                         }
2375                                 M_BNEZ(REG_ITMP1, 0);
2376                                 }
2377                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2378                         break;
2379
2380                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2381                                         /* op1 = target JavaVM pc, val.i = constant   */
2382
2383                         var_to_reg_int(s1, src, REG_ITMP1);
2384                         if (iptr->val.i == 0) {
2385                                 M_BLTZ(s1, 0);
2386                                 }
2387                         else {
2388                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2389                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2390                                         }
2391                                 else {
2392                                         ICONST(REG_ITMP2, iptr->val.i);
2393                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2394                                         }
2395                                 M_BNEZ(REG_ITMP1, 0);
2396                                 }
2397                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2398                         break;
2399
2400                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2401                                         /* op1 = target JavaVM pc, val.i = constant   */
2402
2403                         var_to_reg_int(s1, src, REG_ITMP1);
2404                         if (iptr->val.i == 0) {
2405                                 M_BLEZ(s1, 0);
2406                                 }
2407                         else {
2408                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2409                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2410                                         }
2411                                 else {
2412                                         ICONST(REG_ITMP2, iptr->val.i);
2413                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2414                                         }
2415                                 M_BNEZ(REG_ITMP1, 0);
2416                                 }
2417                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2418                         break;
2419
2420                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2421                                         /* op1 = target JavaVM pc, val.i = constant   */
2422
2423                         var_to_reg_int(s1, src, REG_ITMP1);
2424                         if (iptr->val.i == 0) {
2425                                 M_BNEZ(s1, 0);
2426                                 }
2427                         else {
2428                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2429                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2430                                         }
2431                                 else {
2432                                         ICONST(REG_ITMP2, iptr->val.i);
2433                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2434                                         }
2435                                 M_BEQZ(REG_ITMP1, 0);
2436                                 }
2437                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2438                         break;
2439
2440                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2441                                         /* op1 = target JavaVM pc, val.i = constant   */
2442
2443                         var_to_reg_int(s1, src, REG_ITMP1);
2444                         if (iptr->val.i == 0) {
2445                                 M_BGTZ(s1, 0);
2446                                 }
2447                         else {
2448                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2449                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2450                                         }
2451                                 else {
2452                                         ICONST(REG_ITMP2, iptr->val.i);
2453                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2454                                         }
2455                                 M_BEQZ(REG_ITMP1, 0);
2456                                 }
2457                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2458                         break;
2459
2460                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2461                                         /* op1 = target JavaVM pc, val.i = constant   */
2462
2463                         var_to_reg_int(s1, src, REG_ITMP1);
2464                         if (iptr->val.i == 0) {
2465                                 M_BGEZ(s1, 0);
2466                                 }
2467                         else {
2468                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2469                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2470                                         }
2471                                 else {
2472                                         ICONST(REG_ITMP2, iptr->val.i);
2473                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2474                                         }
2475                                 M_BEQZ(REG_ITMP1, 0);
2476                                 }
2477                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2478                         break;
2479
2480                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2481                                         /* op1 = target JavaVM pc, val.l = constant   */
2482
2483                         var_to_reg_int(s1, src, REG_ITMP1);
2484                         if (iptr->val.l == 0) {
2485                                 M_BEQZ(s1, 0);
2486                                 }
2487                         else {
2488                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2489                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2490                                         }
2491                                 else {
2492                                         LCONST(REG_ITMP2, iptr->val.l);
2493                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2494                                         }
2495                                 M_BNEZ(REG_ITMP1, 0);
2496                                 }
2497                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2498                         break;
2499
2500                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2501                                         /* op1 = target JavaVM pc, val.l = constant   */
2502
2503                         var_to_reg_int(s1, src, REG_ITMP1);
2504                         if (iptr->val.l == 0) {
2505                                 M_BLTZ(s1, 0);
2506                                 }
2507                         else {
2508                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2509                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2510                                         }
2511                                 else {
2512                                         LCONST(REG_ITMP2, iptr->val.l);
2513                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2514                                         }
2515                                 M_BNEZ(REG_ITMP1, 0);
2516                                 }
2517                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2518                         break;
2519
2520                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2521                                         /* op1 = target JavaVM pc, val.l = constant   */
2522
2523                         var_to_reg_int(s1, src, REG_ITMP1);
2524                         if (iptr->val.l == 0) {
2525                                 M_BLEZ(s1, 0);
2526                                 }
2527                         else {
2528                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2529                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2530                                         }
2531                                 else {
2532                                         LCONST(REG_ITMP2, iptr->val.l);
2533                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2534                                         }
2535                                 M_BNEZ(REG_ITMP1, 0);
2536                                 }
2537                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2538                         break;
2539
2540                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2541                                         /* op1 = target JavaVM pc, val.l = constant   */
2542
2543                         var_to_reg_int(s1, src, REG_ITMP1);
2544                         if (iptr->val.l == 0) {
2545                                 M_BNEZ(s1, 0);
2546                                 }
2547                         else {
2548                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2549                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2550                                         }
2551                                 else {
2552                                         LCONST(REG_ITMP2, iptr->val.l);
2553                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2554                                         }
2555                                 M_BEQZ(REG_ITMP1, 0);
2556                                 }
2557                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2558                         break;
2559
2560                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2561                                         /* op1 = target JavaVM pc, val.l = constant   */
2562
2563                         var_to_reg_int(s1, src, REG_ITMP1);
2564                         if (iptr->val.l == 0) {
2565                                 M_BGTZ(s1, 0);
2566                                 }
2567                         else {
2568                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2569                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2570                                         }
2571                                 else {
2572                                         LCONST(REG_ITMP2, iptr->val.l);
2573                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2574                                         }
2575                                 M_BEQZ(REG_ITMP1, 0);
2576                                 }
2577                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2578                         break;
2579
2580                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2581                                         /* op1 = target JavaVM pc, val.l = constant   */
2582
2583                         var_to_reg_int(s1, src, REG_ITMP1);
2584                         if (iptr->val.l == 0) {
2585                                 M_BGEZ(s1, 0);
2586                                 }
2587                         else {
2588                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2589                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2590                                         }
2591                                 else {
2592                                         LCONST(REG_ITMP2, iptr->val.l);
2593                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2594                                         }
2595                                 M_BEQZ(REG_ITMP1, 0);
2596                                 }
2597                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2598                         break;
2599
2600                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2601                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2602                 case ICMD_IF_ACMPEQ:
2603
2604                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2605                         var_to_reg_int(s2, src, REG_ITMP2);
2606                         M_CMPEQ(s1, s2, REG_ITMP1);
2607                         M_BNEZ(REG_ITMP1, 0);
2608                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2609                         break;
2610
2611                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2612                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2613                 case ICMD_IF_ACMPNE:
2614
2615                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2616                         var_to_reg_int(s2, src, REG_ITMP2);
2617                         M_CMPEQ(s1, s2, REG_ITMP1);
2618                         M_BEQZ(REG_ITMP1, 0);
2619                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2620                         break;
2621
2622                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2623                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2624
2625                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2626                         var_to_reg_int(s2, src, REG_ITMP2);
2627                         M_CMPLT(s1, s2, REG_ITMP1);
2628                         M_BNEZ(REG_ITMP1, 0);
2629                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2630                         break;
2631
2632                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2633                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2634
2635                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2636                         var_to_reg_int(s2, src, REG_ITMP2);
2637                         M_CMPLE(s1, s2, REG_ITMP1);
2638                         M_BEQZ(REG_ITMP1, 0);
2639                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2640                         break;
2641
2642                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2643                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2644
2645                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2646                         var_to_reg_int(s2, src, REG_ITMP2);
2647                         M_CMPLE(s1, s2, REG_ITMP1);
2648                         M_BNEZ(REG_ITMP1, 0);
2649                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2650                         break;
2651
2652                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2653                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2654
2655                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2656                         var_to_reg_int(s2, src, REG_ITMP2);
2657                         M_CMPLT(s1, s2, REG_ITMP1);
2658                         M_BEQZ(REG_ITMP1, 0);
2659                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2660                         break;
2661
2662                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2663
2664                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2665                         break;
2666
2667                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2668                                         /* val.i = constant                           */
2669
2670                         var_to_reg_int(s1, src, REG_ITMP1);
2671                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2672                         s3 = iptr->val.i;
2673                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2674                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2675                                         M_CMPEQ(s1, REG_ZERO, d);
2676                                         store_reg_to_var_int(iptr->dst, d);
2677                                         break;
2678                                         }
2679                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2680                                         M_CMPEQ(s1, REG_ZERO, d);
2681                                         M_XOR_IMM(d, 1, d);
2682                                         store_reg_to_var_int(iptr->dst, d);
2683                                         break;
2684                                         }
2685                                 if (s1 == d) {
2686                                         M_MOV(s1, REG_ITMP1);
2687                                         s1 = REG_ITMP1;
2688                                         }
2689                                 ICONST(d, iptr[1].val.i);
2690                                 }
2691                         if ((s3 >= 0) && (s3 <= 255)) {
2692                                 M_CMOVEQ_IMM(s1, s3, d);
2693                                 }
2694                         else {
2695                                 ICONST(REG_ITMP2, s3);
2696                                 M_CMOVEQ(s1, REG_ITMP2, d);
2697                                 }
2698                         store_reg_to_var_int(iptr->dst, d);
2699                         break;
2700
2701                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2702                                         /* val.i = constant                           */
2703
2704                         var_to_reg_int(s1, src, REG_ITMP1);
2705                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2706                         s3 = iptr->val.i;
2707                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2708                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2709                                         M_CMPEQ(s1, REG_ZERO, d);
2710                                         store_reg_to_var_int(iptr->dst, d);
2711                                         break;
2712                                         }
2713                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2714                                         M_CMPEQ(s1, REG_ZERO, d);
2715                                         M_XOR_IMM(d, 1, d);
2716                                         store_reg_to_var_int(iptr->dst, d);
2717                                         break;
2718                                         }
2719                                 if (s1 == d) {
2720                                         M_MOV(s1, REG_ITMP1);
2721                                         s1 = REG_ITMP1;
2722                                         }
2723                                 ICONST(d, iptr[1].val.i);
2724                                 }
2725                         if ((s3 >= 0) && (s3 <= 255)) {
2726                                 M_CMOVNE_IMM(s1, s3, d);
2727                                 }
2728                         else {
2729                                 ICONST(REG_ITMP2, s3);
2730                                 M_CMOVNE(s1, REG_ITMP2, d);
2731                                 }
2732                         store_reg_to_var_int(iptr->dst, d);
2733                         break;
2734
2735                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2736                                         /* val.i = constant                           */
2737
2738                         var_to_reg_int(s1, src, REG_ITMP1);
2739                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2740                         s3 = iptr->val.i;
2741                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2742                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2743                                         M_CMPLT(s1, REG_ZERO, d);
2744                                         store_reg_to_var_int(iptr->dst, d);
2745                                         break;
2746                                         }
2747                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2748                                         M_CMPLE(REG_ZERO, s1, d);
2749                                         store_reg_to_var_int(iptr->dst, d);
2750                                         break;
2751                                         }
2752                                 if (s1 == d) {
2753                                         M_MOV(s1, REG_ITMP1);
2754                                         s1 = REG_ITMP1;
2755                                         }
2756                                 ICONST(d, iptr[1].val.i);
2757                                 }
2758                         if ((s3 >= 0) && (s3 <= 255)) {
2759                                 M_CMOVLT_IMM(s1, s3, d);
2760                                 }
2761                         else {
2762                                 ICONST(REG_ITMP2, s3);
2763                                 M_CMOVLT(s1, REG_ITMP2, d);
2764                                 }
2765                         store_reg_to_var_int(iptr->dst, d);
2766                         break;
2767
2768                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2769                                         /* val.i = constant                           */
2770
2771                         var_to_reg_int(s1, src, REG_ITMP1);
2772                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2773                         s3 = iptr->val.i;
2774                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2775                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2776                                         M_CMPLE(REG_ZERO, s1, d);
2777                                         store_reg_to_var_int(iptr->dst, d);
2778                                         break;
2779                                         }
2780                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2781                                         M_CMPLT(s1, REG_ZERO, d);
2782                                         store_reg_to_var_int(iptr->dst, d);
2783                                         break;
2784                                         }
2785                                 if (s1 == d) {
2786                                         M_MOV(s1, REG_ITMP1);
2787                                         s1 = REG_ITMP1;
2788                                         }
2789                                 ICONST(d, iptr[1].val.i);
2790                                 }
2791                         if ((s3 >= 0) && (s3 <= 255)) {
2792                                 M_CMOVGE_IMM(s1, s3, d);
2793                                 }
2794                         else {
2795                                 ICONST(REG_ITMP2, s3);
2796                                 M_CMOVGE(s1, REG_ITMP2, d);
2797                                 }
2798                         store_reg_to_var_int(iptr->dst, d);
2799                         break;
2800
2801                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2802                                         /* val.i = constant                           */
2803
2804                         var_to_reg_int(s1, src, REG_ITMP1);
2805                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2806                         s3 = iptr->val.i;
2807                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2808                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2809                                         M_CMPLT(REG_ZERO, s1, d);
2810                                         store_reg_to_var_int(iptr->dst, d);
2811                                         break;
2812                                         }
2813                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2814                                         M_CMPLE(s1, REG_ZERO, d);
2815                                         store_reg_to_var_int(iptr->dst, d);
2816                                         break;
2817                                         }
2818                                 if (s1 == d) {
2819                                         M_MOV(s1, REG_ITMP1);
2820                                         s1 = REG_ITMP1;
2821                                         }
2822                                 ICONST(d, iptr[1].val.i);
2823                                 }
2824                         if ((s3 >= 0) && (s3 <= 255)) {
2825                                 M_CMOVGT_IMM(s1, s3, d);
2826                                 }
2827                         else {
2828                                 ICONST(REG_ITMP2, s3);
2829                                 M_CMOVGT(s1, REG_ITMP2, d);
2830                                 }
2831                         store_reg_to_var_int(iptr->dst, d);
2832                         break;
2833
2834                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2835                                         /* val.i = constant                           */
2836
2837                         var_to_reg_int(s1, src, REG_ITMP1);
2838                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2839                         s3 = iptr->val.i;
2840                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2841                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2842                                         M_CMPLE(s1, REG_ZERO, d);
2843                                         store_reg_to_var_int(iptr->dst, d);
2844                                         break;
2845                                         }
2846                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2847                                         M_CMPLT(REG_ZERO, s1, d);
2848                                         store_reg_to_var_int(iptr->dst, d);
2849                                         break;
2850                                         }
2851                                 if (s1 == d) {
2852                                         M_MOV(s1, REG_ITMP1);
2853                                         s1 = REG_ITMP1;
2854                                         }
2855                                 ICONST(d, iptr[1].val.i);
2856                                 }
2857                         if ((s3 >= 0) && (s3 <= 255)) {
2858                                 M_CMOVLE_IMM(s1, s3, d);
2859                                 }
2860                         else {
2861                                 ICONST(REG_ITMP2, s3);
2862                                 M_CMOVLE(s1, REG_ITMP2, d);
2863                                 }
2864                         store_reg_to_var_int(iptr->dst, d);
2865                         break;
2866
2867
2868                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2869                 case ICMD_LRETURN:
2870                 case ICMD_ARETURN:
2871
2872                         var_to_reg_int(s1, src, REG_RESULT);
2873                         M_INTMOVE(s1, REG_RESULT);
2874
2875                         goto nowperformreturn;
2876
2877                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2878                 case ICMD_DRETURN:
2879
2880                         var_to_reg_flt(s1, src, REG_FRESULT);
2881                         M_FLTMOVE(s1, REG_FRESULT);
2882
2883                         goto nowperformreturn;
2884
2885                 case ICMD_RETURN:       /* ...  ==> ...                               */
2886
2887 nowperformreturn:
2888                         {
2889                         s4 i, p;
2890
2891                         p = parentargs_base;
2892
2893                         /* call trace function */
2894
2895                         if (runverbose) {
2896                                 M_LDA(REG_SP, REG_SP, -3 * 8);
2897                                 M_AST(REG_RA, REG_SP, 0 * 8);
2898                                 M_LST(REG_RESULT, REG_SP, 1 * 8);
2899                                 M_DST(REG_FRESULT, REG_SP, 2 * 8);
2900                                 a = dseg_addaddress(cd, m);
2901                                 M_ALD(rd->argintregs[0], REG_PV, a);
2902                                 M_MOV(REG_RESULT, rd->argintregs[1]);
2903                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[2]);
2904                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[3]);
2905                                 a = dseg_addaddress(cd, (void *) builtin_displaymethodstop);
2906                                 M_ALD(REG_PV, REG_PV, a);
2907                                 M_JSR(REG_RA, REG_PV);
2908                                 s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2909                                 if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
2910                                 else {
2911                                         s4 ml = -s1, mh = 0;
2912                                         while (ml < -32768) { ml += 65536; mh--; }
2913                                         M_LDA(REG_PV, REG_RA, ml);
2914                                         M_LDAH(REG_PV, REG_PV, mh);
2915                                 }
2916                                 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
2917                                 M_LLD(REG_RESULT, REG_SP, 1 * 8);
2918                                 M_ALD(REG_RA, REG_SP, 0 * 8);
2919                                 M_LDA(REG_SP, REG_SP, 3 * 8);
2920                         }
2921
2922 #if defined(USE_THREADS)
2923                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2924                                 s4 disp;
2925
2926                                 M_ALD(rd->argintregs[0], REG_SP, rd->maxmemuse * 8);
2927
2928                                 switch (iptr->opc) {
2929                                 case ICMD_IRETURN:
2930                                 case ICMD_LRETURN:
2931                                 case ICMD_ARETURN:
2932                                         M_LST(REG_RESULT, REG_SP, rd->maxmemuse * 8);
2933                                         break;
2934                                 case ICMD_FRETURN:
2935                                 case ICMD_DRETURN:
2936                                         M_DST(REG_FRESULT, REG_SP, rd->maxmemuse * 8);
2937                                         break;
2938                                 }
2939
2940                                 a = dseg_addaddress(cd, BUILTIN_monitorexit);
2941                                 M_ALD(REG_PV, REG_PV, a);
2942                                 M_JSR(REG_RA, REG_PV);
2943                                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
2944                                 M_LDA(REG_PV, REG_RA, disp);
2945
2946                                 switch (iptr->opc) {
2947                                 case ICMD_IRETURN:
2948                                 case ICMD_LRETURN:
2949                                 case ICMD_ARETURN:
2950                                         M_LLD(REG_RESULT, REG_SP, rd->maxmemuse * 8);
2951                                         break;
2952                                 case ICMD_FRETURN:
2953                                 case ICMD_DRETURN:
2954                                         M_DLD(REG_FRESULT, REG_SP, rd->maxmemuse * 8);
2955                                         break;
2956                                 }
2957                         }
2958 #endif
2959
2960                         /* restore return address                                         */
2961
2962                         if (!m->isleafmethod) {
2963                                 p--; M_LLD(REG_RA, REG_SP, p * 8);
2964                         }
2965
2966                         /* restore saved registers                                        */
2967
2968                         for (i = rd->savintregcnt - 1; i >= rd->maxsavintreguse; i--) {
2969                                 p--; M_LLD(rd->savintregs[i], REG_SP, p * 8);
2970                         }
2971                         for (i = rd->savfltregcnt - 1; i >= rd->maxsavfltreguse; i--) {
2972                                 p--; M_DLD(rd->savfltregs[i], REG_SP, p * 8);
2973                         }
2974
2975                         /* deallocate stack                                               */
2976
2977                         if (parentargs_base) {
2978                                 M_LDA(REG_SP, REG_SP, parentargs_base * 8);
2979                         }
2980
2981                         M_RET(REG_ZERO, REG_RA);
2982                         ALIGNCODENOP;
2983                         }
2984                         break;
2985
2986
2987                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2988                         {
2989                         s4 i, l, *s4ptr;
2990                         void **tptr;
2991
2992                         tptr = (void **) iptr->target;
2993
2994                         s4ptr = iptr->val.a;
2995                         l = s4ptr[1];                          /* low     */
2996                         i = s4ptr[2];                          /* high    */
2997
2998                         var_to_reg_int(s1, src, REG_ITMP1);
2999                         if (l == 0)
3000                                 {M_INTMOVE(s1, REG_ITMP1);}
3001                         else if (l <= 32768) {
3002                                 M_LDA(REG_ITMP1, s1, -l);
3003                                 }
3004                         else {
3005                                 ICONST(REG_ITMP2, l);
3006                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3007                                 }
3008                         i = i - l + 1;
3009
3010                         /* range check */
3011
3012                         if (i <= 256)
3013                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3014                         else {
3015                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3016                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3017                                 }
3018                         M_BEQZ(REG_ITMP2, 0);
3019
3020
3021                         /* codegen_addreference(cd, BlockPtrOfPC(s4ptr[0]), mcodeptr); */
3022                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3023
3024                         /* build jump table top down and use address of lowest entry */
3025
3026                         /* s4ptr += 3 + i; */
3027                         tptr += i;
3028
3029                         while (--i >= 0) {
3030                                 /* dseg_addtarget(cd, BlockPtrOfPC(*--s4ptr)); */
3031                                 dseg_addtarget(cd, (basicblock *) tptr[0]);
3032                                 --tptr;
3033                                 }
3034                         }
3035
3036                         /* length of dataseg after last dseg_addtarget is used by load */
3037
3038                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3039                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
3040                         M_JMP(REG_ZERO, REG_ITMP2);
3041                         ALIGNCODENOP;
3042                         break;
3043
3044
3045                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3046                         {
3047                         s4 i, l, val, *s4ptr;
3048                         void **tptr;
3049
3050                         tptr = (void **) iptr->target;
3051
3052                         s4ptr = iptr->val.a;
3053                         l = s4ptr[0];                          /* default  */
3054                         i = s4ptr[1];                          /* count    */
3055
3056                         MCODECHECK((i<<2)+8);
3057                         var_to_reg_int(s1, src, REG_ITMP1);
3058                         while (--i >= 0) {
3059                                 s4ptr += 2;
3060                                 ++tptr;
3061
3062                                 val = s4ptr[0];
3063                                 if ((val >= 0) && (val <= 255)) {
3064                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
3065                                         }
3066                                 else {
3067                                         if ((val >= -32768) && (val <= 32767)) {
3068                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
3069                                                 }
3070                                         else {
3071                                                 a = dseg_adds4(cd, val);
3072                                                 M_ILD(REG_ITMP2, REG_PV, a);
3073                                                 }
3074                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3075                                         }
3076                                 M_BNEZ(REG_ITMP2, 0);
3077                                 /* codegen_addreference(cd, BlockPtrOfPC(s4ptr[1]), mcodeptr); */
3078                                 codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3079                                 }
3080
3081                         M_BR(0);
3082                         /* codegen_addreference(cd, BlockPtrOfPC(l), mcodeptr); */
3083
3084                         tptr = (void **) iptr->target;
3085                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3086
3087                         ALIGNCODENOP;
3088                         break;
3089                         }
3090
3091
3092                 case ICMD_BUILTIN:      /* ..., arg1, arg2, arg3 ==> ...              */
3093                                         /* op1 = arg count val.a = builtintable entry */
3094
3095                         bte = iptr->val.a;
3096                         md = bte->md;
3097                         goto gen_method;
3098
3099                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3100                                         /* op1 = arg count, val.a = method pointer    */
3101
3102                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3103                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
3104                 case ICMD_INVOKEINTERFACE:
3105
3106                         lm = iptr->val.a;
3107
3108                         if (lm)
3109                                 md = lm->parseddesc;
3110                         else {
3111                                 unresolved_method *um = iptr->target;
3112                                 md = um->methodref->parseddesc.md;
3113                         }
3114
3115 gen_method:
3116                         s3 = iptr->op1;
3117
3118                         MCODECHECK((s3 << 1) + 64);
3119
3120                         /* copy arguments to registers or stack location                  */
3121
3122                         for (s3 = s3 - 1; s3 >= 0; s3--, src = src->prev) {
3123                                 if (src->varkind == ARGVAR)
3124                                         continue;
3125                                 if (IS_INT_LNG_TYPE(src->type)) {
3126                                         if (!md->params[s3].inmemory) {
3127                                                 s1 = rd->argintregs[md->params[s3].regoff];
3128                                                 var_to_reg_int(d, src, s1);
3129                                                 M_INTMOVE(d, s1);
3130                                         } else {
3131                                                 var_to_reg_int(d, src, REG_ITMP1);
3132                                                 M_LST(d, REG_SP, md->params[s3].regoff * 8);
3133                                         }
3134
3135                                 } else {
3136                                         if (!md->params[s3].inmemory) {
3137                                                 s1 = rd->argfltregs[md->params[s3].regoff];
3138                                                 var_to_reg_flt(d, src, s1);
3139                                                 M_FLTMOVE(d, s1);
3140                                         } else {
3141                                                 var_to_reg_flt(d, src, REG_FTMP1);
3142                                                 M_DST(d, REG_SP, md->params[s3].regoff * 8);
3143                                         }
3144                                 }
3145                         }
3146
3147                         switch (iptr->opc) {
3148                         case ICMD_BUILTIN:
3149                                 if (iptr->target) {
3150                                         codegen_addpatchref(cd, mcodeptr, bte->fp, iptr->target);
3151
3152                                         if (showdisassemble)
3153                                                 M_NOP;
3154
3155                                         a = 0;
3156
3157                                 } else {
3158                                         a = (ptrint) bte->fp;
3159                                 }
3160
3161                                 a = dseg_addaddress(cd, a);
3162                                 d = md->returntype.type;
3163
3164                                 M_ALD(REG_PV, REG_PV, a);     /* Pointer to built-in-function */
3165                                 break;
3166
3167                         case ICMD_INVOKESPECIAL:
3168                                 gen_nullptr_check(rd->argintregs[0]);
3169                                 M_ILD(REG_ITMP1, rd->argintregs[0], 0); /* hardware nullptr   */
3170                                 /* fall through */
3171
3172                         case ICMD_INVOKESTATIC:
3173                                 if (!lm) {
3174                                         unresolved_method *um = iptr->target;
3175
3176                                         codegen_addpatchref(cd, mcodeptr,
3177                                                                                 PATCHER_invokestatic_special, um);
3178
3179                                         if (showdisassemble)
3180                                                 M_NOP;
3181
3182                                         a = 0;
3183                                         d = um->methodref->parseddesc.md->returntype.type;
3184
3185                                 } else {
3186                                         a = (ptrint) lm->stubroutine;
3187                                         d = lm->parseddesc->returntype.type;
3188                                 }
3189
3190                                 a = dseg_addaddress(cd, a);
3191                                 M_ALD(REG_PV, REG_PV, a);            /* method pointer in r27 */
3192                                 break;
3193
3194                         case ICMD_INVOKEVIRTUAL:
3195                                 gen_nullptr_check(rd->argintregs[0]);
3196
3197                                 if (!lm) {
3198                                         unresolved_method *um = iptr->target;
3199
3200                                         codegen_addpatchref(cd, mcodeptr,
3201                                                                                 PATCHER_invokevirtual, um);
3202
3203                                         if (showdisassemble)
3204                                                 M_NOP;
3205
3206                                         s1 = 0;
3207                                         d = um->methodref->parseddesc.md->returntype.type;
3208
3209                                 } else {
3210                                         s1 = OFFSET(vftbl_t, table[0]) +
3211                                                 sizeof(methodptr) * lm->vftblindex;
3212                                         d = lm->parseddesc->returntype.type;
3213                                 }
3214
3215                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
3216                                           OFFSET(java_objectheader, vftbl));
3217                                 M_ALD(REG_PV, REG_METHODPTR, s1);
3218                                 break;
3219
3220                         case ICMD_INVOKEINTERFACE:
3221                                 gen_nullptr_check(rd->argintregs[0]);
3222
3223                                 if (!lm) {
3224                                         unresolved_method *um = iptr->target;
3225
3226                                         codegen_addpatchref(cd, mcodeptr,
3227                                                                                 PATCHER_invokeinterface, um);
3228
3229                                         if (showdisassemble)
3230                                                 M_NOP;
3231
3232                                         s1 = 0;
3233                                         s2 = 0;
3234                                         d = um->methodref->parseddesc.md->returntype.type;
3235
3236                                 } else {
3237                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
3238                                                 sizeof(methodptr*) * lm->class->index;
3239
3240                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
3241
3242                                         d = lm->parseddesc->returntype.type;
3243                                 }
3244
3245                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
3246                                           OFFSET(java_objectheader, vftbl));
3247                                 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
3248                                 M_ALD(REG_PV, REG_METHODPTR, s2);
3249                                 break;
3250                         }
3251
3252                         M_JSR(REG_RA, REG_PV);
3253
3254                         /* recompute pv */
3255
3256                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3257                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3258                         else {
3259                                 s4 ml = -s1, mh = 0;
3260                                 while (ml < -32768) { ml += 65536; mh--; }
3261                                 M_LDA(REG_PV, REG_RA, ml);
3262                                 M_LDAH(REG_PV, REG_PV, mh);
3263                         }
3264
3265                         /* d contains return type */
3266
3267                         if (d != TYPE_VOID) {
3268                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3269                                         s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
3270                                         M_INTMOVE(REG_RESULT, s1);
3271                                         store_reg_to_var_int(iptr->dst, s1);
3272                                 } else {
3273                                         s1 = reg_of_var(rd, iptr->dst, REG_FRESULT);
3274                                         M_FLTMOVE(REG_FRESULT, s1);
3275                                         store_reg_to_var_flt(iptr->dst, s1);
3276                                 }
3277                         }
3278                         break;
3279
3280
3281                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3282
3283                                       /* op1:   0 == array, 1 == class                */
3284                                       /* val.a: (classinfo*) superclass               */
3285
3286                         /*  superclass is an interface:
3287                          *
3288                          *  OK if ((sub == NULL) ||
3289                          *         (sub->vftbl->interfacetablelength > super->index) &&
3290                          *         (sub->vftbl->interfacetable[-super->index] != NULL));
3291                          *
3292                          *  superclass is a class:
3293                          *
3294                          *  OK if ((sub == NULL) || (0
3295                          *         <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3296                          *         super->vftbl->diffval));
3297                          */
3298
3299                         {
3300                         classinfo *super;
3301                         vftbl_t   *supervftbl;
3302                         s4         superindex;
3303
3304                         super = (classinfo *) iptr->val.a;
3305
3306                         if (!super) {
3307                                 superindex = 0;
3308                                 supervftbl = NULL;
3309
3310                         } else {
3311                                 superindex = super->index;
3312                                 supervftbl = super->vftbl;
3313                         }
3314
3315 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3316                         codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
3317 #endif
3318                         var_to_reg_int(s1, src, REG_ITMP1);
3319
3320                         /* calculate interface checkcast code size */
3321
3322                         s2 = 6;
3323                         if (!super)
3324                                 s2 += showdisassemble ? 1 : 0;
3325
3326                         /* calculate class checkcast code size */
3327
3328                         s3 = 9 /* 8 + (s1 == REG_ITMP1) */;
3329                         if (!super)
3330                                 s3 += showdisassemble ? 1 : 0;
3331
3332                         /* if class is not resolved, check which code to call */
3333
3334                         if (!super) {
3335                                 M_BEQZ(s1, 4 + (showdisassemble ? 1 : 0) + s2 + 1 + s3);
3336
3337                                 codegen_addpatchref(cd, mcodeptr,
3338                                                                         PATCHER_checkcast_instanceof_flags,
3339                                                                         (constant_classref *) iptr->target);
3340
3341                                 if (showdisassemble)
3342                                         M_NOP;
3343
3344                                 a = dseg_adds4(cd, 0); /* super->flags */
3345                                 M_ILD(REG_ITMP2, REG_PV, a);
3346                                 a = dseg_adds4(cd, ACC_INTERFACE);
3347                                 M_ILD(REG_ITMP3, REG_PV, a);
3348                                 M_AND(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3349                                 M_BEQZ(REG_ITMP2, s2 + 1);
3350                         }
3351
3352                         /* interface checkcast code */
3353
3354                         if (!super || (super->flags & ACC_INTERFACE)) {
3355                                 if (super) {
3356                                         M_BEQZ(s1, s2);
3357
3358                                 } else {
3359                                         codegen_addpatchref(cd, mcodeptr,
3360                                                                                 PATCHER_checkcast_instanceof_interface,
3361                                                                                 (constant_classref *) iptr->target);
3362
3363                                         if (showdisassemble)
3364                                                 M_NOP;
3365                                 }
3366
3367                                 M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3368                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
3369                                 M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3370                                 M_BLEZ(REG_ITMP3, 0);
3371                                 codegen_addxcastrefs(cd, mcodeptr);
3372                                 M_ALD(REG_ITMP3, REG_ITMP2,
3373                                           OFFSET(vftbl_t, interfacetable[0]) -
3374                                           superindex * sizeof(methodptr*));
3375                                 M_BEQZ(REG_ITMP3, 0);
3376                                 codegen_addxcastrefs(cd, mcodeptr);
3377
3378                                 if (!super)
3379                                         M_BR(s3);
3380                         }
3381
3382                         /* class checkcast code */
3383
3384                         if (!super || !(super->flags & ACC_INTERFACE)) {
3385                                 if (super) {
3386                                         M_BEQZ(s1, s3);
3387
3388                                 } else {
3389                                         codegen_addpatchref(cd, mcodeptr,
3390                                                                                 PATCHER_checkcast_instanceof_class,
3391                                                                                 (constant_classref *) iptr->target);
3392
3393                                         if (showdisassemble)
3394                                                 M_NOP;
3395                                 }
3396
3397                                 M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3398                                 a = dseg_addaddress(cd, supervftbl);
3399                                 M_ALD(REG_ITMP3, REG_PV, a);
3400 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3401                                 codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3402 #endif
3403                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3404 /*                              if (s1 != REG_ITMP1) { */
3405 /*                                      M_ILD(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, baseval)); */
3406 /*                                      M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval)); */
3407 /*  #if defined(USE_THREADS) && defined(NATIVE_THREADS) */
3408 /*                                      codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase); */
3409 /*  #endif */
3410 /*                                      M_ISUB(REG_ITMP2, REG_ITMP1, REG_ITMP2); */
3411
3412 /*                              } else { */
3413                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, baseval));
3414                                         M_ISUB(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3415                                         M_ALD(REG_ITMP3, REG_PV, a);
3416                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval));
3417 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3418                                         codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3419 #endif
3420 /*                              } */
3421                                 M_CMPULE(REG_ITMP2, REG_ITMP3, REG_ITMP3);
3422                                 M_BEQZ(REG_ITMP3, 0);
3423                                 codegen_addxcastrefs(cd, mcodeptr);
3424                         }
3425                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
3426                         M_INTMOVE(s1, d);
3427                         store_reg_to_var_int(iptr->dst, d);
3428                         }
3429                         break;
3430
3431                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3432
3433                                       /* op1:   0 == array, 1 == class                */
3434                                       /* val.a: (classinfo*) superclass               */
3435
3436                         /*  superclass is an interface:
3437                          *
3438                          *  return (sub != NULL) &&
3439                          *         (sub->vftbl->interfacetablelength > super->index) &&
3440                          *         (sub->vftbl->interfacetable[-super->index] != NULL);
3441                          *
3442                          *  superclass is a class:
3443                          *
3444                          *  return ((sub != NULL) && (0
3445                          *          <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3446                          *          super->vftbl->diffvall));
3447                          */
3448
3449                         {
3450                         classinfo *super;
3451                         vftbl_t   *supervftbl;
3452                         s4         superindex;
3453
3454                         super = (classinfo *) iptr->val.a;
3455
3456                         if (!super) {
3457                                 superindex = 0;
3458                                 supervftbl = NULL;
3459
3460                         } else {
3461                                 superindex = super->index;
3462                                 supervftbl = super->vftbl;
3463                         }
3464
3465 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3466                         codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
3467 #endif
3468                         var_to_reg_int(s1, src, REG_ITMP1);
3469                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
3470                         if (s1 == d) {
3471                                 M_MOV(s1, REG_ITMP1);
3472                                 s1 = REG_ITMP1;
3473                         }
3474
3475                         /* calculate interface instanceof code size */
3476
3477                         s2 = 6;
3478                         if (!super)
3479                                 s2 += (d == REG_ITMP2 ? 1 : 0) + (showdisassemble ? 1 : 0);
3480
3481                         /* calculate class instanceof code size */
3482
3483                         s3 = 7;
3484                         if (!super)
3485                                 s3 += (showdisassemble ? 1 : 0);
3486
3487                         /* if class is not resolved, check which code to call */
3488
3489                         if (!super) {
3490                                 M_CLR(d);
3491                                 M_BEQZ(s1, 4 + (showdisassemble ? 1 : 0) + s2 + 1 + s3);
3492
3493                                 codegen_addpatchref(cd, mcodeptr,
3494                                                                         PATCHER_checkcast_instanceof_flags,
3495                                                                         (constant_classref *) iptr->target);
3496
3497                                 if (showdisassemble)
3498                                         M_NOP;
3499
3500                                 a = dseg_adds4(cd, 0); /* super->flags */
3501                                 M_ILD(REG_ITMP3, REG_PV, a);
3502                                 a = dseg_adds4(cd, ACC_INTERFACE);
3503                                 M_ILD(REG_ITMP2, REG_PV, a);
3504                                 M_AND(REG_ITMP3, REG_ITMP2, REG_ITMP3);
3505                                 M_BEQZ(REG_ITMP3, s2 + 1);
3506                         }
3507
3508                         /* interface instanceof code */
3509
3510                         if (!super || (super->flags & ACC_INTERFACE)) {
3511                                 if (super) {
3512                                         M_CLR(d);
3513                                         M_BEQZ(s1, s2);
3514
3515                                 } else {
3516                                         /* If d == REG_ITMP2, then it's destroyed in check code   */
3517                                         /* above.                                                 */
3518                                         if (d == REG_ITMP2)
3519                                                 M_CLR(d);
3520
3521                                         codegen_addpatchref(cd, mcodeptr,
3522                                                                                 PATCHER_checkcast_instanceof_interface,
3523                                                                                 (constant_classref *) iptr->target);
3524
3525                                         if (showdisassemble)
3526                                                 M_NOP;
3527                                 }
3528
3529                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3530                                 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3531                                 M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3532                                 M_BLEZ(REG_ITMP3, 2);
3533                                 M_ALD(REG_ITMP1, REG_ITMP1,
3534                                           OFFSET(vftbl_t, interfacetable[0]) -
3535                                           superindex * sizeof(methodptr*));
3536                                 M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3537
3538                                 if (!super)
3539                                         M_BR(s3);
3540                         }
3541
3542                         /* class instanceof code */
3543
3544                         if (!super || !(super->flags & ACC_INTERFACE)) {
3545                                 if (super) {
3546                                         M_CLR(d);
3547                                         M_BEQZ(s1, s3);
3548
3549                                 } else {
3550                                         codegen_addpatchref(cd, mcodeptr,
3551                                                                                 PATCHER_checkcast_instanceof_class,
3552                                                                                 (constant_classref *) iptr->target);
3553
3554                                         if (showdisassemble)
3555                                                 M_NOP;
3556                                 }
3557
3558                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3559                                 a = dseg_addaddress(cd, supervftbl);
3560                                 M_ALD(REG_ITMP2, REG_PV, a);
3561 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3562                                 codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3563 #endif
3564                                 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3565                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3566                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3567 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3568                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3569 #endif
3570                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3571                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3572                         }
3573                         store_reg_to_var_int(iptr->dst, d);
3574                         }
3575                         break;
3576
3577
3578                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3579
3580                         var_to_reg_int(s1, src, REG_ITMP1);
3581                         M_BLTZ(s1, 0);
3582                         codegen_addxcheckarefs(cd, mcodeptr);
3583                         break;
3584
3585                 case ICMD_CHECKEXCEPTION:    /* ... ==> ...                           */
3586
3587                         M_BEQZ(REG_RESULT, 0);
3588                         codegen_addxexceptionrefs(cd, mcodeptr);
3589                         break;
3590
3591                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3592                                       /* op1 = dimension, val.a = array descriptor    */
3593
3594                         /* check for negative sizes and copy sizes to stack if necessary  */
3595
3596                         MCODECHECK((iptr->op1 << 1) + 64);
3597
3598                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3599                                 var_to_reg_int(s2, src, REG_ITMP1);
3600                                 M_BLTZ(s2, 0);
3601                                 codegen_addxcheckarefs(cd, mcodeptr);
3602
3603                                 /* copy SAVEDVAR sizes to stack */
3604
3605                                 if (src->varkind != ARGVAR) {
3606                                         M_LST(s2, REG_SP, s1 * 8);
3607                                 }
3608                         }
3609
3610                         /* is patcher function set? */
3611
3612                         if (iptr->target) {
3613                                 codegen_addpatchref(cd, mcodeptr,
3614                                                                         (functionptr) iptr->target, iptr->val.a);
3615
3616                                 if (showdisassemble)
3617                                         M_NOP;
3618
3619                                 a = 0;
3620
3621                         } else {
3622                                 a = (ptrint) iptr->val.a;
3623                         }
3624
3625                         /* a0 = dimension count */
3626
3627                         ICONST(rd->argintregs[0], iptr->op1);
3628
3629                         /* a1 = arraydescriptor */
3630
3631                         a = dseg_addaddress(cd, a);
3632                         M_ALD(rd->argintregs[1], REG_PV, a);
3633
3634                         /* a2 = pointer to dimensions = stack pointer */
3635
3636                         M_INTMOVE(REG_SP, rd->argintregs[2]);
3637
3638                         a = dseg_addaddress(cd, (void *) BUILTIN_multianewarray);
3639                         M_ALD(REG_PV, REG_PV, a);
3640                         M_JSR(REG_RA, REG_PV);
3641                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3642                         if (s1 <= 32768)
3643                                 M_LDA(REG_PV, REG_RA, -s1);
3644                         else {
3645                                 s4 ml = -s1, mh = 0;
3646                                 while (ml < -32768) { ml += 65536; mh--; }
3647                                 M_LDA(REG_PV, REG_RA, ml);
3648                                 M_LDAH(REG_PV, REG_PV, mh);
3649                         }
3650                         s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
3651                         M_INTMOVE(REG_RESULT, s1);
3652                         store_reg_to_var_int(iptr->dst, s1);
3653                         break;
3654
3655                 default:
3656                         throw_cacao_exception_exit(string_java_lang_InternalError,
3657                                                                            "Unknown ICMD %d", iptr->opc);
3658         } /* switch */
3659
3660         } /* for instruction */
3661
3662         /* copy values to interface registers */
3663
3664         src = bptr->outstack;
3665         len = bptr->outdepth;
3666         MCODECHECK(64+len);
3667 #ifdef LSRA
3668         if (!opt_lsra)
3669 #endif
3670         while (src) {
3671                 len--;
3672                 if ((src->varkind != STACKVAR)) {
3673                         s2 = src->type;
3674                         if (IS_FLT_DBL_TYPE(s2)) {
3675                                 var_to_reg_flt(s1, src, REG_FTMP1);
3676                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3677                                         M_FLTMOVE(s1,rd->interfaces[len][s2].regoff);
3678                                         }
3679                                 else {
3680                                         M_DST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3681                                         }
3682                                 }
3683                         else {
3684                                 var_to_reg_int(s1, src, REG_ITMP1);
3685                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3686                                         M_INTMOVE(s1,rd->interfaces[len][s2].regoff);
3687                                         }
3688                                 else {
3689                                         M_LST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3690                                         }
3691                                 }
3692                         }
3693                 src = src->prev;
3694                 }
3695         } /* if (bptr -> flags >= BBREACHED) */
3696         } /* for basic block */
3697
3698         codegen_createlinenumbertable(cd);
3699
3700         {
3701         /* generate bound check stubs */
3702
3703         s4 *xcodeptr = NULL;
3704         branchref *bref;
3705
3706         for (bref = cd->xboundrefs; bref != NULL; bref = bref->next) {
3707                 gen_resolvebranch((u1*) cd->mcodebase + bref->branchpos,
3708                                   bref->branchpos,
3709                                                   (u1*) mcodeptr - cd->mcodebase);
3710
3711                 MCODECHECK(8);
3712
3713                 /* move index register into REG_ITMP1 */
3714                 M_MOV(bref->reg, REG_ITMP1);
3715                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3716
3717                 if (xcodeptr != NULL) {
3718                         M_BR(xcodeptr - mcodeptr - 1);
3719
3720                 } else {
3721                         xcodeptr = mcodeptr;
3722
3723                         a = dseg_addaddress(cd, asm_throw_and_handle_arrayindexoutofbounds_exception);
3724                         M_ALD(REG_PV, REG_PV, a);
3725
3726                         M_JSR(REG_RA, REG_PV);
3727
3728                         /* recompute pv */
3729                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3730                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3731                         else {
3732                                 s4 ml = -s1, mh = 0;
3733                                 while (ml < -32768) { ml += 65536; mh--; }
3734                                 M_LDA(REG_PV, REG_RA, ml);
3735                                 M_LDAH(REG_PV, REG_PV, mh);
3736                         }
3737                 }
3738         }
3739
3740         /* generate negative array size check stubs */
3741
3742         xcodeptr = NULL;
3743
3744         for (bref = cd->xcheckarefs; bref != NULL; bref = bref->next) {
3745                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3746                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3747                                                           bref->branchpos,
3748                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3749                         continue;
3750                 }
3751
3752                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3753                                   bref->branchpos,
3754                                                   (u1 *) mcodeptr - cd->mcodebase);
3755
3756                 MCODECHECK(8);
3757
3758                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3759
3760                 if (xcodeptr != NULL) {
3761                         M_BR(xcodeptr - mcodeptr - 1);
3762
3763                 } else {
3764                         xcodeptr = mcodeptr;
3765
3766                         a = dseg_addaddress(cd, string_java_lang_NegativeArraySizeException);
3767                         M_ALD(REG_ITMP1_XPTR,REG_PV,a);
3768
3769                         a = dseg_addaddress(cd, asm_throw_and_handle_nat_exception);
3770                         M_ALD(REG_PV, REG_PV, a);
3771
3772                         M_JSR(REG_RA, REG_PV);
3773
3774                         /* recompute pv */
3775                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3776                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3777                         else {
3778                                 s4 ml = -s1, mh = 0;
3779                                 while (ml < -32768) { ml += 65536; mh--; }
3780                                 M_LDA(REG_PV, REG_RA, ml);
3781                                 M_LDAH(REG_PV, REG_PV, mh);
3782                         }
3783                 }
3784         }
3785
3786         /* generate cast check stubs */
3787
3788         xcodeptr = NULL;
3789
3790         for (bref = cd->xcastrefs; bref != NULL; bref = bref->next) {
3791                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3792                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3793                                                           bref->branchpos,
3794                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3795                         continue;
3796                 }
3797
3798                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3799                                   bref->branchpos,
3800                                                   (u1 *) mcodeptr - cd->mcodebase);
3801
3802                 MCODECHECK(8);
3803
3804                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3805
3806                 if (xcodeptr != NULL) {
3807                         M_BR(xcodeptr - mcodeptr - 1);
3808
3809                 } else {
3810                         xcodeptr = mcodeptr;
3811
3812                         a = dseg_addaddress(cd, string_java_lang_ClassCastException);
3813                         M_ALD(REG_ITMP1_XPTR,REG_PV,a);
3814
3815                         a = dseg_addaddress(cd, asm_throw_and_handle_nat_exception);
3816                         M_ALD(REG_PV, REG_PV, a);
3817
3818                         M_JSR(REG_RA, REG_PV);
3819
3820                         /* recompute pv */
3821                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3822                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3823                         else {
3824                                 s4 ml = -s1, mh = 0;
3825                                 while (ml < -32768) { ml += 65536; mh--; }
3826                                 M_LDA(REG_PV, REG_RA, ml);
3827                                 M_LDAH(REG_PV, REG_PV, mh);
3828                         }
3829                 }
3830         }
3831
3832         /* generate exception check stubs */
3833
3834         xcodeptr = NULL;
3835
3836         for (bref = cd->xexceptionrefs; bref != NULL; bref = bref->next) {
3837                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3838                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3839                                                           bref->branchpos,
3840                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3841                         continue;
3842                 }
3843
3844                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3845                                   bref->branchpos,
3846                                                   (u1 *) mcodeptr - cd->mcodebase);
3847
3848                 MCODECHECK(8);
3849
3850                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3851
3852                 if (xcodeptr != NULL) {
3853                         M_BR(xcodeptr - mcodeptr - 1);
3854
3855                 } else {
3856                         xcodeptr = mcodeptr;
3857
3858 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3859                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3860                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3861
3862                         a = dseg_addaddress(cd, &builtin_get_exceptionptrptr);
3863                         M_ALD(REG_PV, REG_PV, a);
3864                         M_JSR(REG_RA, REG_PV);
3865
3866                         /* recompute pv */
3867                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3868                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3869                         else {
3870                                 s4 ml = -s1, mh = 0;
3871                                 while (ml < -32768) { ml += 65536; mh--; }
3872                                 M_LDA(REG_PV, REG_RA, ml);
3873                                 M_LDAH(REG_PV, REG_PV, mh);
3874                         }
3875
3876                         M_ALD(REG_ITMP1_XPTR, REG_RESULT, 0);
3877                         M_AST(REG_ZERO, REG_RESULT, 0);
3878
3879                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3880                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3881 #else
3882                         a = dseg_addaddress(cd, &_exceptionptr);
3883                         M_ALD(REG_ITMP3, REG_PV, a);
3884                         M_ALD(REG_ITMP1_XPTR, REG_ITMP3, 0);
3885                         M_AST(REG_ZERO, REG_ITMP3, 0);
3886 #endif
3887
3888                         a = dseg_addaddress(cd, asm_refillin_and_handle_exception);
3889                         M_ALD(REG_PV, REG_PV, a);
3890
3891                         M_JMP(REG_RA, REG_PV);
3892
3893                         /* recompute pv */
3894                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3895                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3896                         else {
3897                                 s4 ml = -s1, mh = 0;
3898                                 while (ml < -32768) { ml += 65536; mh--; }
3899                                 M_LDA(REG_PV, REG_RA, ml);
3900                                 M_LDAH(REG_PV, REG_PV, mh);
3901                         }
3902
3903                 }
3904         }
3905
3906         /* generate null pointer check stubs */
3907
3908         xcodeptr = NULL;
3909
3910         for (bref = cd->xnullrefs; bref != NULL; bref = bref->next) {
3911                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3912                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3913                                                           bref->branchpos,
3914                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3915                         continue;
3916                 }
3917
3918                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3919                                   bref->branchpos,
3920                                                   (u1 *) mcodeptr - cd->mcodebase);
3921
3922                 MCODECHECK(8);
3923
3924                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3925
3926                 if (xcodeptr != NULL) {
3927                         M_BR(xcodeptr - mcodeptr - 1);
3928
3929                 } else {
3930                         xcodeptr = mcodeptr;
3931
3932                         a = dseg_addaddress(cd, string_java_lang_NullPointerException);
3933                         M_ALD(REG_ITMP1_XPTR,REG_PV,a);
3934
3935                         a = dseg_addaddress(cd, asm_throw_and_handle_nat_exception);
3936                         M_ALD(REG_PV, REG_PV, a);
3937
3938                         M_JSR(REG_RA, REG_PV);
3939
3940                         /* recompute pv */
3941                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3942                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3943                         else {
3944                                 s4 ml = -s1, mh = 0;
3945                                 while (ml < -32768) { ml += 65536; mh--; }
3946                                 M_LDA(REG_PV, REG_RA, ml);
3947                                 M_LDAH(REG_PV, REG_PV, mh);
3948                         }
3949                 }
3950         }
3951
3952         /* generate put/getstatic stub call code */
3953
3954         {
3955                 patchref *pref;
3956                 u4        mcode;
3957                 s4       *tmpmcodeptr;
3958
3959                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
3960                         /* check code segment size */
3961
3962                         MCODECHECK(13 + 4 + 1);
3963
3964                         /* Get machine code which is patched back in later. The call is   */
3965                         /* 1 instruction word long.                                       */
3966
3967                         xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
3968                         mcode = *xcodeptr;
3969
3970                         /* patch in the call to call the following code (done at compile  */
3971                         /* time)                                                          */
3972
3973                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
3974                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
3975
3976                         M_BSR(REG_ITMP3, tmpmcodeptr - (xcodeptr + 1));
3977
3978                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
3979
3980                         /* create stack frame */
3981
3982                         M_LSUB_IMM(REG_SP, 5 * 8, REG_SP);
3983
3984                         /* move return address onto stack */
3985
3986                         M_AST(REG_ITMP3, REG_SP, 4 * 8);
3987
3988                         /* move pointer to java_objectheader onto stack */
3989
3990 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3991                         /* create a virtual java_objectheader */
3992
3993                         (void) dseg_addaddress(cd, get_dummyLR());          /* monitorPtr */
3994                         a = dseg_addaddress(cd, NULL);                      /* vftbl      */
3995
3996                         if (a >= -32768) {
3997                                 M_LDA(REG_ITMP3, REG_PV, a);
3998                         } else {
3999                                 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4000                                 M_LDA(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4001                         }
4002                         M_AST(REG_ITMP3, REG_SP, 3 * 8);
4003 #else
4004                         M_AST(REG_ZERO, REG_SP, 3 * 8);
4005 #endif
4006
4007                         /* move machine code onto stack */
4008
4009                         a = dseg_adds4(cd, mcode);
4010                         if (a >= -32768) {
4011                                 M_ILD(REG_ITMP3, REG_PV, a);
4012                         } else {
4013                                 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4014                                 M_ILD(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4015                         }
4016                         M_IST(REG_ITMP3, REG_SP, 2 * 8);
4017
4018                         /* move class/method/field reference onto stack */
4019
4020                         a = dseg_addaddress(cd, pref->ref);
4021                         if (a >= -32768) {
4022                                 M_ALD(REG_ITMP3, REG_PV, a);
4023                         } else {
4024                                 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4025                                 M_ALD(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4026                         }
4027                         M_AST(REG_ITMP3, REG_SP, 1 * 8);
4028
4029                         /* move patcher function pointer onto stack */
4030
4031                         a = dseg_addaddress(cd, pref->patcher);
4032                         if (a >= -32768) {
4033                                 M_ALD(REG_ITMP3, REG_PV, a);
4034                         } else {
4035                                 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4036                                 M_ALD(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4037                         }
4038                         M_AST(REG_ITMP3, REG_SP, 0 * 8);
4039
4040                         a = dseg_addaddress(cd, asm_wrapper_patcher);
4041                         if (a >= -32768) {
4042                                 M_ALD(REG_ITMP3, REG_PV, a);
4043                         } else {
4044                                 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4045                                 M_ALD(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4046                         }
4047                         M_JMP(REG_ZERO, REG_ITMP3);
4048                 }
4049         }
4050         }
4051
4052         codegen_finish(m, cd, (s4) ((u1 *) mcodeptr - cd->mcodebase));
4053 }
4054
4055
4056 /* createcompilerstub **********************************************************
4057
4058    Creates a stub routine which calls the compiler.
4059
4060 *******************************************************************************/
4061
4062 #define COMPSTUBSIZE    3
4063
4064 functionptr createcompilerstub(methodinfo *m)
4065 {
4066         u8 *s = CNEW(u8, COMPSTUBSIZE);     /* memory to hold the stub            */
4067         s4 *mcodeptr = (s4 *) s;            /* code generation pointer            */
4068
4069                                             /* code for the stub                  */
4070         M_ALD(REG_PV, REG_PV, 16);          /* load pointer to the compiler       */
4071         M_JMP(0, REG_PV);                   /* jump to the compiler, return address
4072                                                in reg 0 is used as method pointer */
4073         s[1] = (ptrint) m;                  /* literals to be adressed            */
4074         s[2] = (ptrint) asm_call_jit_compiler; /* jump directly via PV from above */
4075
4076 #if defined(STATISTICS)
4077         if (opt_stat)
4078                 count_cstub_len += COMPSTUBSIZE * 8;
4079 #endif
4080
4081         return (functionptr) s;
4082 }
4083
4084
4085 /* createnativestub ************************************************************
4086
4087    Creates a stub routine which calls a native method.
4088
4089 *******************************************************************************/
4090
4091 functionptr createnativestub(functionptr f, methodinfo *m, codegendata *cd,
4092                                                          registerdata *rd, methoddesc *nmd)
4093 {
4094         s4         *mcodeptr;               /* code generation pointer            */
4095         s4          stackframesize;         /* size of stackframe if needed       */
4096         s4          disp;
4097         methoddesc *md;
4098         s4          nativeparams;
4099         s4          i, j;                   /* count variables                    */
4100         s4          t;
4101         s4          s1, s2, off;
4102
4103         /* initialize variables */
4104
4105         md = m->parseddesc;
4106         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
4107
4108
4109         /* calculate stack frame size */
4110
4111         stackframesize =
4112                 1 +                             /* return address                     */
4113                 6 +                             /* dynamic stack info                 */
4114                 1 +                             /* methodinfo for call trace          */
4115                 (md->paramcount > INT_ARG_CNT ? INT_ARG_CNT : md->paramcount) +
4116                 nmd->memuse;
4117
4118
4119         /* create method header */
4120
4121         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
4122         (void) dseg_adds4(cd, stackframesize * 8);              /* FrameSize      */
4123         (void) dseg_adds4(cd, 0);                               /* IsSync         */
4124         (void) dseg_adds4(cd, 0);                               /* IsLeaf         */
4125         (void) dseg_adds4(cd, 0);                               /* IntSave        */
4126         (void) dseg_adds4(cd, 0);                               /* FltSave        */
4127         (void) dseg_addlinenumbertablesize(cd);
4128         (void) dseg_adds4(cd, 0);                               /* ExTableSize    */
4129
4130
4131         /* initialize mcode variables */
4132
4133         mcodeptr = (s4 *) cd->mcodebase;
4134         cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize);
4135
4136
4137         /* generate stub code */
4138
4139         M_LDA(REG_SP, REG_SP, -stackframesize * 8);
4140         M_AST(REG_RA, REG_SP, (stackframesize - 1) * 8);
4141
4142
4143         /* if function is static, check for initialized */
4144
4145         if ((m->flags & ACC_STATIC) && !m->class->initialized) {
4146                 codegen_addpatchref(cd, mcodeptr, PATCHER_clinit, m->class);
4147
4148                 if (showdisassemble)
4149                         M_NOP;
4150         }
4151
4152         /* call trace function */
4153
4154         if (runverbose) {
4155                 /* save integer argument registers */
4156
4157                 for (i = 0, j = 1; i < md->paramcount && i < INT_ARG_CNT; i++)
4158                         if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
4159                                 M_LST(rd->argintregs[i], REG_SP, j++ * 8);
4160
4161                 /* save and copy float arguments into integer registers */
4162
4163                 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4164                         t = md->paramtypes[i].type;
4165
4166                         if (IS_FLT_DBL_TYPE(t)) {
4167                                 if (IS_2_WORD_TYPE(t)) {
4168                                         M_DST(rd->argfltregs[i], REG_SP, j * 8);
4169                                         M_LLD(rd->argintregs[i], REG_SP, j * 8);
4170                                 } else {
4171                                         M_FST(rd->argfltregs[i], REG_SP, j * 8);
4172                                         M_ILD(rd->argintregs[i], REG_SP, j * 8);
4173                                 }
4174                                 j++;
4175                         }
4176                 }
4177
4178                 off = dseg_addaddress(cd, m);
4179                 M_ALD(REG_ITMP1, REG_PV, off);
4180                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
4181                 off = dseg_addaddress(cd, builtin_trace_args);
4182                 M_ALD(REG_PV, REG_PV, off);
4183                 M_JSR(REG_RA, REG_PV);
4184                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4185                 M_LDA(REG_PV, REG_RA, -disp);
4186
4187                 for (i = 0, j = 1; i < md->paramcount && i < INT_ARG_CNT; i++)
4188                         if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
4189                                 M_LLD(rd->argintregs[i], REG_SP, j++ * 8);
4190
4191                 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4192                         t = md->paramtypes[i].type;
4193
4194                         if (IS_FLT_DBL_TYPE(t)) {
4195                                 if (IS_2_WORD_TYPE(t)) {
4196                                         M_DLD(rd->argfltregs[i], REG_SP, j * 8);
4197                                 } else {
4198                                         M_FLD(rd->argfltregs[i], REG_SP, j * 8);
4199                                 }
4200                                 j++;
4201                         }
4202                 }
4203         }
4204
4205
4206         /* save integer and float argument registers */
4207
4208         for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++)
4209                 if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
4210                         M_LST(rd->argintregs[i], REG_SP, j++ * 8);
4211
4212         for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++)
4213                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type))
4214                         M_DST(rd->argfltregs[i], REG_SP, j++ * 8);
4215
4216         /* create native stack info */
4217
4218         off = dseg_addaddress(cd, builtin_asm_get_stackframeinfo);
4219         M_ALD(REG_PV, REG_PV, off);
4220         M_JSR(REG_RA, REG_PV);
4221         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4222         M_LDA(REG_PV, REG_RA, -disp);
4223
4224         M_LST(REG_RESULT, REG_SP, (stackframesize - 5) * 8); /* save adress of pointer */
4225         M_LLD(REG_ITMP2, REG_RESULT, 0); /* get pointer */
4226         M_LST(REG_ITMP2, REG_SP, (stackframesize - 6) * 8); /* save old value */
4227         M_LDA(REG_ITMP3, REG_SP, (stackframesize - 6) * 8); /* calculate new value */
4228         M_LST(REG_ITMP3, REG_RESULT, 0); /* store new value */
4229         off = dseg_addaddress(cd, m);
4230         M_LLD(REG_ITMP2, REG_PV, off);
4231         M_LST(REG_ITMP2, REG_SP, (stackframesize - 4) * 8);
4232         M_LST(REG_ZERO, REG_SP, (stackframesize - 3) * 8);
4233         M_LST(REG_ZERO, REG_SP, (stackframesize - 2) * 8);
4234
4235         /* restore integer and float argument registers */
4236
4237         for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++)
4238                 if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
4239                         M_LLD(rd->argintregs[i], REG_SP, j++ * 8);
4240
4241         for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++)
4242                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type))
4243                         M_DLD(rd->argfltregs[i], REG_SP, j++ * 8);
4244
4245
4246         /* copy or spill arguments to new locations */
4247
4248         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
4249                 t = md->paramtypes[i].type;
4250
4251                 if (IS_INT_LNG_TYPE(t)) {
4252                         if (!md->params[i].inmemory) {
4253                                 s1 = rd->argintregs[md->params[i].regoff];
4254
4255                                 if (!nmd->params[j].inmemory) {
4256                                         s2 = rd->argintregs[nmd->params[j].regoff];
4257                                         M_INTMOVE(s1, s2);
4258
4259                                 } else {
4260                                         s2 = nmd->params[j].regoff;
4261                                         M_LST(s1, REG_SP, s2 * 8);
4262                                 }
4263
4264                         } else {
4265                                 s1 = md->params[i].regoff + stackframesize;
4266                                 s2 = nmd->params[j].regoff;
4267                                 M_LLD(REG_ITMP1, REG_SP, s1 * 8);
4268                                 M_LST(REG_ITMP1, REG_SP, s2 * 8);
4269                         }
4270
4271                 } else {
4272                         if (!md->params[i].inmemory) {
4273                                 s1 = rd->argfltregs[md->params[i].regoff];
4274
4275                                 if (!nmd->params[j].inmemory) {
4276                                         s2 = rd->argfltregs[nmd->params[j].regoff];
4277                                         M_FLTMOVE(s1, s2);
4278
4279                                 } else {
4280                                         s2 = nmd->params[j].regoff;
4281                                         M_DST(s1, REG_SP, s2 * 8);
4282                                 }
4283
4284                         } else {
4285                                 s1 = md->params[i].regoff + stackframesize;
4286                                 s2 = nmd->params[j].regoff;
4287                                 M_DLD(REG_FTMP1, REG_SP, s1 * 8);
4288                                 M_DST(REG_FTMP1, REG_SP, s2 * 8);
4289                         }
4290                 }
4291         }
4292
4293         /* put class into second argument register */
4294
4295         if (m->flags & ACC_STATIC) {
4296                 off = dseg_addaddress(cd, m->class);
4297                 M_ALD(rd->argintregs[1], REG_PV, off);
4298         }
4299
4300         /* put env into first argument register */
4301
4302         off = dseg_addaddress(cd, &env);
4303         M_ALD(rd->argintregs[0], REG_PV, off);
4304
4305         /* do the native function call */
4306
4307 #if !defined(STATIC_CLASSPATH)
4308         if (f == NULL) {
4309                 codegen_addpatchref(cd, mcodeptr, PATCHER_resolve_native, m);
4310
4311                 if (showdisassemble)
4312                         M_NOP;
4313         }
4314 #endif
4315
4316         off = dseg_addaddress(cd, f);
4317         M_ALD(REG_PV, REG_PV, off);         /* load adress of native method       */
4318         M_JSR(REG_RA, REG_PV);              /* call native method                 */
4319         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4320         M_LDA(REG_PV, REG_RA, -disp);       /* recompute pv from ra               */
4321
4322
4323         /* remove native stack info */
4324
4325         M_LLD(REG_ITMP3, REG_SP, (stackframesize - 5) * 8); /* get address of stacktrace helper pointer */
4326         M_LLD(REG_ITMP1, REG_SP, (stackframesize - 6) * 8); /* get old value */
4327         M_LST(REG_ITMP1, REG_ITMP3, 0); /* set old value */
4328
4329
4330         /* call finished trace */
4331
4332         if (runverbose) {
4333                 M_LST(REG_RESULT, REG_SP, 0 * 8);
4334                 M_DST(REG_FRESULT, REG_SP, 1 * 8);
4335
4336                 off = dseg_addaddress(cd, m);
4337                 M_ALD(rd->argintregs[0], REG_PV, off);
4338
4339                 M_MOV(REG_RESULT, rd->argintregs[1]);
4340                 M_FMOV(REG_FRESULT, rd->argfltregs[2]);
4341                 M_FMOV(REG_FRESULT, rd->argfltregs[3]);
4342
4343                 off = dseg_addaddress(cd, builtin_displaymethodstop);
4344                 M_ALD(REG_PV, REG_PV, off);
4345                 M_JSR(REG_RA, REG_PV);
4346                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4347                 M_LDA(REG_PV, REG_RA, -disp);
4348
4349                 M_LLD(REG_RESULT, REG_SP, 0 * 8);
4350                 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
4351         }
4352
4353
4354         /* check for exception */
4355
4356 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4357         if (IS_FLT_DBL_TYPE(md->returntype.type))
4358                 M_DST(REG_FRESULT, REG_SP, 0 * 8);
4359         else
4360                 M_AST(REG_RESULT, REG_SP, 0 * 8);
4361
4362         off = dseg_addaddress(cd, builtin_get_exceptionptrptr);
4363         M_ALD(REG_PV, REG_PV, off);
4364         M_JSR(REG_RA, REG_PV);
4365         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4366         M_LDA(REG_PV, REG_RA, -disp);
4367         M_MOV(REG_RESULT, REG_ITMP3);
4368
4369         if (IS_FLT_DBL_TYPE(md->returntype.type))
4370                 M_DLD(REG_FRESULT, REG_SP, 0 * 8);
4371         else
4372                 M_ALD(REG_RESULT, REG_SP, 0 * 8);
4373 #else
4374         off = dseg_addaddress(cd, &_exceptionptr);
4375         M_ALD(REG_ITMP3, REG_PV, off);      /* get address of exceptionptr        */
4376 #endif
4377
4378         M_ALD(REG_ITMP1, REG_ITMP3, 0);     /* load exception into reg. itmp1     */
4379         M_BNEZ(REG_ITMP1, 3);               /* if no exception then return        */
4380
4381         M_ALD(REG_RA, REG_SP, (stackframesize - 1) * 8); /* load return address   */
4382
4383         M_LDA(REG_SP, REG_SP, stackframesize * 8);
4384
4385         M_RET(REG_ZERO, REG_RA);            /* return to caller                   */
4386
4387         /* handle exception */
4388
4389         M_AST(REG_ZERO, REG_ITMP3, 0);      /* store NULL into exceptionptr       */
4390
4391         M_ALD(REG_RA, REG_SP, (stackframesize - 1) * 8); /* load return address   */
4392         M_LDA(REG_ITMP2, REG_RA, -4);       /* move fault address into reg. itmp2 */
4393
4394         M_LDA(REG_SP, REG_SP, stackframesize * 8);
4395
4396         off = dseg_addaddress(cd, asm_handle_nat_exception);
4397         M_ALD(REG_ITMP3, REG_PV, off);      /* load asm exception handler address */
4398         M_JMP(REG_ZERO, REG_ITMP3);         /* jump to asm exception handler      */
4399
4400
4401         /* process patcher calls **************************************************/
4402
4403         {
4404                 patchref *pref;
4405                 s4       *xcodeptr;
4406                 u4        mcode;
4407                 s4       *tmpmcodeptr;
4408
4409                 /* there can only be one <clinit> ref entry                           */
4410                 pref = cd->patchrefs;
4411
4412                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4413                         /* Get machine code which is patched back in later. The call is   */
4414                         /* 1 instruction word long.                                       */
4415
4416                         xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
4417                         mcode = (u4) *xcodeptr;
4418
4419                         /* patch in the call to call the following code (done at compile  */
4420                         /* time)                                                          */
4421
4422                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
4423                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
4424
4425                         M_BSR(REG_ITMP3, tmpmcodeptr - (xcodeptr + 1));
4426
4427                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
4428
4429                         /* create stack frame                                             */
4430
4431                         M_LSUB_IMM(REG_SP, 5 * 8, REG_SP);
4432
4433                         /* move return address onto stack */
4434
4435                         M_AST(REG_ITMP3, REG_SP, 4 * 8);
4436
4437                         /* move pointer to java_objectheader onto stack */
4438
4439 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4440                         /* create a virtual java_objectheader */
4441
4442                         (void) dseg_addaddress(cd, get_dummyLR());          /* monitorPtr */
4443                         off = dseg_addaddress(cd, NULL);                    /* vftbl      */
4444
4445                         M_LDA(REG_ITMP3, REG_PV, off);
4446                         M_AST(REG_ITMP3, REG_SP, 3 * 8);
4447 #else
4448                         M_AST(REG_ZERO, REG_SP, 3 * 8);
4449 #endif
4450
4451                         /* move machine code onto stack */
4452
4453                         off = dseg_adds4(cd, mcode);
4454                         M_ILD(REG_ITMP3, REG_PV, off);
4455                         M_IST(REG_ITMP3, REG_SP, 2 * 8);
4456
4457                         /* move class/method/field reference onto stack */
4458
4459                         off = dseg_addaddress(cd, pref->ref);
4460                         M_ALD(REG_ITMP3, REG_PV, off);
4461                         M_AST(REG_ITMP3, REG_SP, 1 * 8);
4462
4463                         /* move patcher function pointer onto stack */
4464
4465                         off = dseg_addaddress(cd, pref->patcher);
4466                         M_ALD(REG_ITMP3, REG_PV, off);
4467                         M_AST(REG_ITMP3, REG_SP, 0 * 8);
4468
4469                         off = dseg_addaddress(cd, asm_wrapper_patcher);
4470                         M_ALD(REG_ITMP3, REG_PV, off);
4471                         M_JMP(REG_ZERO, REG_ITMP3);
4472                 }
4473         }
4474
4475         codegen_finish(m, cd, (s4) ((u1 *) mcodeptr - cd->mcodebase));
4476
4477         return m->entrypoint;
4478 }
4479
4480
4481 /*
4482  * These are local overrides for various environment variables in Emacs.
4483  * Please do not remove this and leave it at the end of the file, where
4484  * Emacs will automagically detect them.
4485  * ---------------------------------------------------------------------
4486  * Local variables:
4487  * mode: c
4488  * indent-tabs-mode: t
4489  * c-basic-offset: 4
4490  * tab-width: 4
4491  * End:
4492  */