src/vm/jit/alpha/codegen.c

   1 /* jit/alpha/codegen.c - machine code generator for alpha
   2
   3    Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
   4    Institut f. Computersprachen, TU Wien
   5    R. Grafl, A. Krall, C. Kruegel, C. Oates, R. Obermaisser, M. Probst,
   6    S. Ring, E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich,
   7    J. Wenninger
   8
   9    This file is part of CACAO.
  10
  11    This program is free software; you can redistribute it and/or
  12    modify it under the terms of the GNU General Public License as
  13    published by the Free Software Foundation; either version 2, or (at
  14    your option) any later version.
  15
  16    This program is distributed in the hope that it will be useful, but
  17    WITHOUT ANY WARRANTY; without even the implied warranty of
  18    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19    General Public License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software
  23    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  24    02111-1307, USA.
  25
  26    Contact: cacao@complang.tuwien.ac.at
  27
  28    Authors: Andreas Krall
  29             Reinhard Grafl
  30
  31    $Id: codegen.c 1066 2004-05-16 17:08:11Z stefan $
  32
  33 */
  34
  35
  36 #include "global.h"
  37 #include <stdio.h>
  38 #include <signal.h>
  39 #include "types.h"
  40 #include "main.h"
  41 #include "codegen.h"
  42 #include "jit/jit.h"
  43 #include "jit/parse.h"
  44 #include "jit/reg.h"
  45 #include "builtin.h"
  46 #include "asmpart.h"
  47 #include "jni.h"
  48 #include "loader.h"
  49 #include "tables.h"
  50 #include "native.h"
  51 #include "main.h"
  52
  53 /* include independent code generation stuff */
  54 #include "codegen.inc"
  55 #include "reg.inc"
  56
  57
  58 /* *****************************************************************************
  59
  60 Datatypes and Register Allocations:
  61 -----------------------------------
  62
  63 On 64-bit-machines (like the Alpha) all operands are stored in the
  64 registers in a 64-bit form, even when the correspondig JavaVM  operands
  65 only need 32 bits. This is done by a canonical representation:
  66
  67 32-bit integers are allways stored as sign-extended 64-bit values (this
  68 approach is directly supported by the Alpha architecture and is very easy
  69 to implement).
  70
  71 32-bit-floats are stored in a 64-bit doubleprecision register by simply
  72 expanding the exponent and mantissa with zeroes. (also supported by the
  73 architecture)
  74
  75
  76 Stackframes:
  77
  78 The calling conventions and the layout of the stack is  explained in detail
  79 in the documention file: calling.doc
  80
  81 *******************************************************************************/
  82
  83
  84 /* register descripton - array ************************************************/
  85
  86 /* #define REG_RES   0         reserved register for OS or code generator     */
  87 /* #define REG_RET   1         return value register                          */
  88 /* #define REG_EXC   2         exception value register (only old jit)        */
  89 /* #define REG_SAV   3         (callee) saved register                        */
  90 /* #define REG_TMP   4         scratch temporary register (caller saved)      */
  91 /* #define REG_ARG   5         argument register (caller saved)               */
  92
  93 /* #define REG_END   -1        last entry in tables */
  94
  95 int nregdescint[] = {
  96         REG_RET, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
  97         REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
  98         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP,
  99         REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES,
 100         REG_END };
 101
 102 /* for use of reserved registers, see comment above */
 103
 104 int nregdescfloat[] = {
 105         REG_RET, REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
 106         REG_SAV, REG_SAV, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
 107         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP,
 108         REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES,
 109         REG_END };
 110
 111 /* for use of reserved registers, see comment above */
 112
 113
 114 /* parameter allocation mode */
 115
 116 int nreg_parammode = PARAMMODE_NUMBERED;
 117
 118    /* parameter-registers will be allocated by assigning the
 119       1. parameter:   int/float-reg 16
 120       2. parameter:   int/float-reg 17
 121       3. parameter:   int/float-reg 18 ....
 122    */
 123
 124
 125 /* stackframe-infos ***********************************************************/
 126
 127 int parentargs_base; /* offset in stackframe for the parameter from the caller*/
 128
 129 /* -> see file 'calling.doc' */
 130
 131
 132 /* additional functions and macros to generate code ***************************/
 133
 134 /* #define BlockPtrOfPC(pc)        block+block_index[pc] */
 135 #define BlockPtrOfPC(pc)  ((basicblock *) iptr->target)
 136
 137
 138 #ifdef STATISTICS
 139 #define COUNT_SPILLS count_spills++
 140 #else
 141 #define COUNT_SPILLS
 142 #endif
 143
 144
 145 /* gen_nullptr_check(objreg) */
 146
 147 #define gen_nullptr_check(objreg) \
 148     if (checknull) { \
 149         M_BEQZ((objreg), 0); \
 150         codegen_addxnullrefs(mcodeptr); \
 151     }
 152
 153
 154 /* MCODECHECK(icnt) */
 155
 156 #define MCODECHECK(icnt) \
 157         if((mcodeptr + (icnt)) > mcodeend) mcodeptr = codegen_increase((u1*) mcodeptr)
 158
 159 /* M_INTMOVE:
 160      generates an integer-move from register a to b.
 161      if a and b are the same int-register, no code will be generated.
 162 */
 163
 164 #define M_INTMOVE(a,b) if (a != b) { M_MOV(a, b); }
 165
 166
 167 /* M_FLTMOVE:
 168     generates a floating-point-move from register a to b.
 169     if a and b are the same float-register, no code will be generated
 170 */
 171
 172 #define M_FLTMOVE(a,b) if (a != b) { M_FMOV(a, b); }
 173
 174
 175 /* var_to_reg_xxx:
 176     this function generates code to fetch data from a pseudo-register
 177     into a real register.
 178     If the pseudo-register has actually been assigned to a real
 179     register, no code will be emitted, since following operations
 180     can use this register directly.
 181
 182     v: pseudoregister to be fetched from
 183     tempregnum: temporary register to be used if v is actually spilled to ram
 184
 185     return: the register number, where the operand can be found after
 186             fetching (this wil be either tempregnum or the register
 187             number allready given to v)
 188 */
 189
 190 #define var_to_reg_int(regnr,v,tempnr) { \
 191         if ((v)->flags & INMEMORY) \
 192                 {COUNT_SPILLS;M_LLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 193         else regnr=(v)->regoff; \
 194 }
 195
 196
 197 #define var_to_reg_flt(regnr,v,tempnr) { \
 198         if ((v)->flags & INMEMORY) \
 199                 {COUNT_SPILLS;M_DLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 200         else regnr=(v)->regoff; \
 201 }
 202
 203
 204 /* reg_of_var:
 205     This function determines a register, to which the result of an operation
 206     should go, when it is ultimatively intended to store the result in
 207     pseudoregister v.
 208     If v is assigned to an actual register, this register will be returned.
 209     Otherwise (when v is spilled) this function returns tempregnum.
 210     If not already done, regoff and flags are set in the stack location.
 211 */
 212
 213 static int reg_of_var(stackptr v, int tempregnum)
 214 {
 215         varinfo      *var;
 216
 217         switch (v->varkind) {
 218                 case TEMPVAR:
 219                         if (!(v->flags & INMEMORY))
 220                                 return(v->regoff);
 221                         break;
 222                 case STACKVAR:
 223                         var = &(interfaces[v->varnum][v->type]);
 224                         v->regoff = var->regoff;
 225                         if (!(var->flags & INMEMORY))
 226                                 return(var->regoff);
 227                         break;
 228                 case LOCALVAR:
 229                         var = &(locals[v->varnum][v->type]);
 230                         v->regoff = var->regoff;
 231                         if (!(var->flags & INMEMORY))
 232                                 return(var->regoff);
 233                         break;
 234                 case ARGVAR:
 235                         v->regoff = v->varnum;
 236                         if (IS_FLT_DBL_TYPE(v->type)) {
 237                                 if (v->varnum < fltreg_argnum) {
 238                                         v->regoff = argfltregs[v->varnum];
 239                                         return(argfltregs[v->varnum]);
 240                                         }
 241                                 }
 242                         else
 243                                 if (v->varnum < intreg_argnum) {
 244                                         v->regoff = argintregs[v->varnum];
 245                                         return(argintregs[v->varnum]);
 246                                         }
 247                         v->regoff -= intreg_argnum;
 248                         break;
 249                 }
 250         v->flags |= INMEMORY;
 251         return tempregnum;
 252 }
 253
 254
 255 /* store_reg_to_var_xxx:
 256     This function generates the code to store the result of an operation
 257     back into a spilled pseudo-variable.
 258     If the pseudo-variable has not been spilled in the first place, this
 259     function will generate nothing.
 260
 261     v ............ Pseudovariable
 262     tempregnum ... Number of the temporary registers as returned by
 263                    reg_of_var.
 264 */
 265
 266 #define store_reg_to_var_int(sptr, tempregnum) {       \
 267         if ((sptr)->flags & INMEMORY) {                    \
 268                 COUNT_SPILLS;                                  \
 269                 M_LST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 270                 }                                              \
 271         }
 272
 273 #define store_reg_to_var_flt(sptr, tempregnum) {       \
 274         if ((sptr)->flags & INMEMORY) {                    \
 275                 COUNT_SPILLS;                                  \
 276                 M_DST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 277                 }                                              \
 278         }
 279
 280
 281 /* NullPointerException handlers and exception handling initialisation        */
 282
 283 typedef struct sigctx_struct {
 284
 285         long          sc_onstack;           /* sigstack state to restore          */
 286         long          sc_mask;              /* signal mask to restore             */
 287         long          sc_pc;                /* pc at time of signal               */
 288         long          sc_ps;                /* psl to retore                      */
 289         long          sc_regs[32];          /* processor regs 0 to 31             */
 290         long          sc_ownedfp;           /* fp has been used                   */
 291         long          sc_fpregs[32];        /* fp regs 0 to 31                    */
 292         unsigned long sc_fpcr;              /* floating point control register    */
 293         unsigned long sc_fp_control;        /* software fpcr                      */
 294                                             /* rest is unused                     */
 295         unsigned long sc_reserved1, sc_reserved2;
 296         unsigned long sc_ssize;
 297         char          *sc_sbase;
 298         unsigned long sc_traparg_a0;
 299         unsigned long sc_traparg_a1;
 300         unsigned long sc_traparg_a2;
 301         unsigned long sc_fp_trap_pc;
 302         unsigned long sc_fp_trigger_sum;
 303         unsigned long sc_fp_trigger_inst;
 304         unsigned long sc_retcode[2];
 305 } sigctx_struct;
 306
 307
 308 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
 309 void thread_restartcriticalsection(ucontext_t *uc)
 310 {
 311         void *critical;
 312         if ((critical = thread_checkcritical((void*) uc->uc_mcontext.sc_pc)) != NULL)
 313                 uc->uc_mcontext.sc_pc = (u8) critical;
 314 }
 315 #endif
 316
 317 /* NullPointerException signal handler for hardware null pointer check */
 318
 319 void catch_NullPointerException(int sig, int code, sigctx_struct *sigctx)
 320 {
 321         sigset_t nsig;
 322         int      instr;
 323         long     faultaddr;
 324         java_objectheader *xptr;
 325
 326         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 327
 328         instr = *((int*)(sigctx->sc_pc));
 329         faultaddr = sigctx->sc_regs[(instr >> 16) & 0x1f];
 330
 331         if (faultaddr == 0) {
 332                 signal(sig, (void*) catch_NullPointerException); /* reinstall handler */
 333                 sigemptyset(&nsig);
 334                 sigaddset(&nsig, sig);
 335                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 336
 337                 xptr = new_exception(string_java_lang_NullPointerException);
 338
 339                 sigctx->sc_regs[REG_ITMP1_XPTR] = (u8) xptr;
 340                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 341                 sigctx->sc_pc = (u8) asm_handle_exception;
 342                 return;
 343
 344         } else {
 345                 faultaddr += (long) ((instr << 16) >> 16);
 346                 fprintf(stderr, "faulting address: 0x%016lx\n", faultaddr);
 347                 panic("Stack overflow");
 348         }
 349 }
 350
 351
 352 #ifdef __osf__
 353
 354 void init_exceptions(void)
 355 {
 356
 357 #else /* Linux */
 358
 359 /* Linux on Digital Alpha needs an initialisation of the ieee floating point
 360         control for IEEE compliant arithmetic (option -mieee of GCC). Under
 361         Digital Unix this is done automatically.
 362 */
 363
 364 #include <asm/fpu.h>
 365
 366 extern unsigned long ieee_get_fp_control();
 367 extern void ieee_set_fp_control(unsigned long fp_control);
 368
 369 void init_exceptions(void)
 370 {
 371 /* initialize floating point control */
 372
 373 ieee_set_fp_control(ieee_get_fp_control()
 374                     & ~IEEE_TRAP_ENABLE_INV
 375                     & ~IEEE_TRAP_ENABLE_DZE
 376 /*                  & ~IEEE_TRAP_ENABLE_UNF   we dont want underflow */
 377                     & ~IEEE_TRAP_ENABLE_OVF);
 378 #endif
 379
 380         /* install signal handlers we need to convert to exceptions */
 381
 382         if (!checknull) {
 383 #if defined(SIGSEGV)
 384                 signal(SIGSEGV, (void*) catch_NullPointerException);
 385 #endif
 386
 387 #if defined(SIGBUS)
 388                 signal(SIGBUS, (void*) catch_NullPointerException);
 389 #endif
 390         }
 391 }
 392
 393
 394 /* function gen_mcode **********************************************************
 395
 396         generates machine code
 397
 398 *******************************************************************************/
 399
 400 void codegen()
 401 {
 402         int  len, s1, s2, s3, d;
 403         s4   a;
 404         s4          *mcodeptr;
 405         stackptr    src;
 406         varinfo     *var;
 407         basicblock  *bptr;
 408         instruction *iptr;
 409         xtable *ex;
 410
 411         if (compileverbose) {
 412                 char logtext[MAXLOGTEXT];
 413                 sprintf(logtext, "Generating code: ");
 414                 utf_sprint_classname(logtext + strlen(logtext), class->name);
 415                 sprintf(logtext + strlen(logtext), ".");
 416                 utf_sprint(logtext + strlen(logtext), method->name);
 417                 utf_sprint_classname(logtext + strlen(logtext), descriptor);
 418                 log_text(logtext);
 419         }
 420
 421         {
 422         int p, pa, t, l, r;
 423
 424         savedregs_num = (isleafmethod) ? 0 : 1;           /* space to save the RA */
 425
 426         /* space to save used callee saved registers */
 427
 428         savedregs_num += (savintregcnt - maxsavintreguse);
 429         savedregs_num += (savfltregcnt - maxsavfltreguse);
 430
 431         parentargs_base = maxmemuse + savedregs_num;
 432
 433 #ifdef USE_THREADS                 /* space to save argument of monitor_enter */
 434
 435         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 436                 parentargs_base++;
 437
 438 #endif
 439
 440         /* create method header */
 441
 442         (void) dseg_addaddress(method);                         /* MethodPointer  */
 443         (void) dseg_adds4(parentargs_base * 8);                 /* FrameSize      */
 444
 445 #ifdef USE_THREADS
 446
 447         /* IsSync contains the offset relative to the stack pointer for the
 448            argument of monitor_exit used in the exception handler. Since the
 449            offset could be zero and give a wrong meaning of the flag it is
 450            offset by one.
 451         */
 452
 453         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 454                 (void) dseg_adds4((maxmemuse + 1) * 8);             /* IsSync         */
 455         else
 456
 457 #endif
 458
 459         (void) dseg_adds4(0);                                   /* IsSync         */
 460
 461         (void) dseg_adds4(isleafmethod);                        /* IsLeaf         */
 462         (void) dseg_adds4(savintregcnt - maxsavintreguse);      /* IntSave        */
 463         (void) dseg_adds4(savfltregcnt - maxsavfltreguse);      /* FltSave        */
 464
 465         dseg_addlinenumbertablesize();
 466
 467
 468         (void) dseg_adds4(exceptiontablelength);                /* ExTableSize    */
 469
 470         /* create exception table */
 471
 472         for (ex = extable; ex != NULL; ex = ex->down) {
 473
 474 #ifdef LOOP_DEBUG
 475                 if (ex->start != NULL)
 476                         printf("adding start - %d - ", ex->start->debug_nr);
 477                 else {
 478                         printf("PANIC - start is NULL");
 479                         exit(-1);
 480                 }
 481 #endif
 482
 483                 dseg_addtarget(ex->start);
 484
 485 #ifdef LOOP_DEBUG
 486                 if (ex->end != NULL)
 487                         printf("adding end - %d - ", ex->end->debug_nr);
 488                 else {
 489                         printf("PANIC - end is NULL");
 490                         exit(-1);
 491                 }
 492 #endif
 493
 494                 dseg_addtarget(ex->end);
 495
 496 #ifdef LOOP_DEBUG
 497                 if (ex->handler != NULL)
 498                         printf("adding handler - %d\n", ex->handler->debug_nr);
 499                 else {
 500                         printf("PANIC - handler is NULL");
 501                         exit(-1);
 502                 }
 503 #endif
 504
 505                 dseg_addtarget(ex->handler);
 506
 507                 (void) dseg_addaddress(ex->catchtype);
 508                 }
 509
 510         /* initialize mcode variables */
 511
 512         mcodeptr = (s4*) mcodebase;
 513         mcodeend = (s4*) (mcodebase + mcodesize);
 514         MCODECHECK(128 + mparamcount);
 515
 516         /* create stack frame (if necessary) */
 517
 518         if (parentargs_base)
 519                 {M_LDA (REG_SP, REG_SP, -parentargs_base * 8);}
 520
 521         /* save return address and used callee saved registers */
 522
 523         p = parentargs_base;
 524         if (!isleafmethod)
 525                 {p--;  M_AST (REG_RA, REG_SP, 8*p);}
 526         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
 527                 {p--; M_LST (savintregs[r], REG_SP, 8 * p);}
 528         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
 529                 {p--; M_DST (savfltregs[r], REG_SP, 8 * p);}
 530
 531         /* save monitorenter argument */
 532
 533 #ifdef USE_THREADS
 534         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 535                 if (method->flags & ACC_STATIC) {
 536                         p = dseg_addaddress (class);
 537                         M_ALD(REG_ITMP1, REG_PV, p);
 538                         M_AST(REG_ITMP1, REG_SP, 8 * maxmemuse);
 539                         }
 540                 else {
 541                         M_AST (argintregs[0], REG_SP, 8 * maxmemuse);
 542                         }
 543                 }
 544 #endif
 545
 546         /* copy argument registers to stack and call trace function with pointer
 547            to arguments on stack.
 548         */
 549
 550         if (runverbose) {
 551                 s4 disp;
 552                 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
 553                 M_AST(REG_RA, REG_SP, 1 * 8);
 554
 555                 /* save integer argument registers */
 556                 for (p = 0; /* p < mparamcount && */ p < INT_ARG_CNT; p++) {
 557                         M_LST(argintregs[p], REG_SP,  (2 + p) * 8);
 558                 }
 559
 560                 /* save and copy float arguments into integer registers */
 561                 for (p = 0; /* p < mparamcount && */ p < FLT_ARG_CNT; p++) {
 562                         t = mparamtypes[p];
 563
 564                         if (IS_FLT_DBL_TYPE(t)) {
 565                                 if (IS_2_WORD_TYPE(t)) {
 566                                         M_DST(argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 567
 568                                 } else {
 569                                         M_FST(argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 570                                 }
 571
 572                                 M_LLD(argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 573
 574                         } else {
 575                                 M_DST(argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 576                         }
 577                 }
 578
 579                 p = dseg_addaddress(method);
 580                 M_ALD(REG_ITMP1, REG_PV, p);
 581                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
 582                 p = dseg_addaddress((void *) builtin_trace_args);
 583                 M_ALD(REG_PV, REG_PV, p);
 584                 M_JSR(REG_RA, REG_PV);
 585                 disp = -(int) ((u1 *) mcodeptr - mcodebase);
 586                 M_LDA(REG_PV, REG_RA, disp);
 587                 M_ALD(REG_RA, REG_SP, 1 * 8);
 588
 589                 for (p = 0; /* p < mparamcount && */ p < INT_ARG_CNT; p++) {
 590                         M_LLD(argintregs[p], REG_SP,  (2 + p) * 8);
 591                 }
 592
 593                 for (p = 0; /* p < mparamcount && */ p < FLT_ARG_CNT; p++) {
 594                         t = mparamtypes[p];
 595
 596                         if (IS_FLT_DBL_TYPE(t)) {
 597                                 if (IS_2_WORD_TYPE(t)) {
 598                                         M_DLD(argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 599
 600                                 } else {
 601                                         M_FLD(argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 602                                 }
 603
 604                         } else {
 605                                 M_DLD(argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 606                         }
 607                 }
 608
 609                 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
 610         }
 611
 612         /* take arguments out of register or stack frame */
 613
 614         for (p = 0, l = 0; p < mparamcount; p++) {
 615                 t = mparamtypes[p];
 616                 var = &(locals[l][t]);
 617                 l++;
 618                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 619                         l++;
 620                 if (var->type < 0)
 621                         continue;
 622                 r = var->regoff;
 623                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 624                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 625                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 626                                         {M_INTMOVE (argintregs[p], r);}
 627                                 else                                 /* reg arg -> spilled    */
 628                                         M_LST (argintregs[p], REG_SP, 8 * r);
 629                                 }
 630                         else {                                   /* stack arguments       */
 631                                 pa = p - INT_ARG_CNT;
 632                                 if (!(var->flags & INMEMORY))        /* stack arg -> register */
 633                                         M_LLD (r, REG_SP, 8 * (parentargs_base + pa));
 634                                 else {                               /* stack arg -> spilled  */
 635                                         M_LLD (REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 636                                         M_LST (REG_ITMP1, REG_SP, 8 * r);
 637                                         }
 638                                 }
 639                         }
 640                 else {                                       /* floating args         */
 641                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 642                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 643                                         {M_FLTMOVE (argfltregs[p], r);}
 644                                 else                                             /* reg arg -> spilled    */
 645                                         M_DST (argfltregs[p], REG_SP, 8 * r);
 646                                 }
 647                         else {                                   /* stack arguments       */
 648                                 pa = p - FLT_ARG_CNT;
 649                                 if (!(var->flags & INMEMORY))        /* stack-arg -> register */
 650                                         M_DLD (r, REG_SP, 8 * (parentargs_base + pa) );
 651                                 else {                               /* stack-arg -> spilled  */
 652                                         M_DLD (REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 653                                         M_DST (REG_FTMP1, REG_SP, 8 * r);
 654                                         }
 655                                 }
 656                         }
 657                 }  /* end for */
 658
 659         /* call monitorenter function */
 660
 661 #ifdef USE_THREADS
 662         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 663                 int disp;
 664                 p = dseg_addaddress ((void*) (builtin_monitorenter));
 665                 M_ALD(REG_PV, REG_PV, p);
 666                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
 667                 M_JSR(REG_RA, REG_PV);
 668                 disp = -(int)((u1*) mcodeptr - mcodebase);
 669                 M_LDA(REG_PV, REG_RA, disp);
 670                 }
 671 #endif
 672         }
 673
 674         /* end of header generation */
 675
 676         /* walk through all basic blocks */
 677         for (bptr = block; bptr != NULL; bptr = bptr->next) {
 678
 679                 bptr->mpc = (int)((u1*) mcodeptr - mcodebase);
 680
 681                 if (bptr->flags >= BBREACHED) {
 682
 683                 /* branch resolving */
 684
 685                 {
 686                 branchref *brefs;
 687                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 688                         gen_resolvebranch((u1*) mcodebase + brefs->branchpos,
 689                                           brefs->branchpos, bptr->mpc);
 690                         }
 691                 }
 692
 693                 /* copy interface registers to their destination */
 694
 695                 src = bptr->instack;
 696                 len = bptr->indepth;
 697                 MCODECHECK(64+len);
 698                 while (src != NULL) {
 699                         len--;
 700                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 701                                 d = reg_of_var(src, REG_ITMP1);
 702                                 M_INTMOVE(REG_ITMP1, d);
 703                                 store_reg_to_var_int(src, d);
 704                                 }
 705                         else {
 706                                 d = reg_of_var(src, REG_IFTMP);
 707                                 if ((src->varkind != STACKVAR)) {
 708                                         s2 = src->type;
 709                                         if (IS_FLT_DBL_TYPE(s2)) {
 710                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 711                                                         s1 = interfaces[len][s2].regoff;
 712                                                         M_FLTMOVE(s1,d);
 713                                                         }
 714                                                 else {
 715                                                         M_DLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 716                                                         }
 717                                                 store_reg_to_var_flt(src, d);
 718                                                 }
 719                                         else {
 720                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 721                                                         s1 = interfaces[len][s2].regoff;
 722                                                         M_INTMOVE(s1,d);
 723                                                         }
 724                                                 else {
 725                                                         M_LLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 726                                                         }
 727                                                 store_reg_to_var_int(src, d);
 728                                                 }
 729                                         }
 730                                 }
 731                         src = src->prev;
 732                         }
 733
 734                 /* walk through all instructions */
 735
 736                 src = bptr->instack;
 737                 len = bptr->icount;
 738                 for (iptr = bptr->iinstr;
 739                     len > 0;
 740                     src = iptr->dst, len--, iptr++) {
 741
 742         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 743         switch (iptr->opc) {
 744
 745                 case ICMD_NOP:        /* ...  ==> ...                                 */
 746                         break;
 747
 748                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 749
 750                         var_to_reg_int(s1, src, REG_ITMP1);
 751                         M_BEQZ(s1, 0);
 752                         codegen_addxnullrefs(mcodeptr);
 753                         break;
 754
 755                 /* constant operations ************************************************/
 756
 757 #define ICONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 758                     else{a=dseg_adds4(c);M_ILD(r,REG_PV,a);}
 759
 760 #define LCONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 761                     else{a=dseg_adds8(c);M_LLD(r,REG_PV,a);}
 762
 763                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 764                                       /* op1 = 0, val.i = constant                    */
 765
 766                         d = reg_of_var(iptr->dst, REG_ITMP1);
 767                         ICONST(d, iptr->val.i);
 768                         store_reg_to_var_int(iptr->dst, d);
 769                         break;
 770
 771                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 772                                       /* op1 = 0, val.l = constant                    */
 773
 774                         d = reg_of_var(iptr->dst, REG_ITMP1);
 775                         LCONST(d, iptr->val.l);
 776                         store_reg_to_var_int(iptr->dst, d);
 777                         break;
 778
 779                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 780                                       /* op1 = 0, val.f = constant                    */
 781
 782                         d = reg_of_var(iptr->dst, REG_FTMP1);
 783                         a = dseg_addfloat(iptr->val.f);
 784                         M_FLD(d, REG_PV, a);
 785                         store_reg_to_var_flt(iptr->dst, d);
 786                         break;
 787
 788                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 789                                       /* op1 = 0, val.d = constant                    */
 790
 791                         d = reg_of_var(iptr->dst, REG_FTMP1);
 792                         a = dseg_adddouble(iptr->val.d);
 793                         M_DLD(d, REG_PV, a);
 794                         store_reg_to_var_flt(iptr->dst, d);
 795                         break;
 796
 797                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 798                                       /* op1 = 0, val.a = constant                    */
 799
 800                         d = reg_of_var(iptr->dst, REG_ITMP1);
 801                         if (iptr->val.a) {
 802                                 a = dseg_addaddress (iptr->val.a);
 803                                 M_ALD(d, REG_PV, a);
 804                                 }
 805                         else {
 806                                 M_INTMOVE(REG_ZERO, d);
 807                                 }
 808                         store_reg_to_var_int(iptr->dst, d);
 809                         break;
 810
 811
 812                 /* load/store operations **********************************************/
 813
 814                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 815                 case ICMD_LLOAD:      /* op1 = local variable                         */
 816                 case ICMD_ALOAD:
 817
 818                         d = reg_of_var(iptr->dst, REG_ITMP1);
 819                         if ((iptr->dst->varkind == LOCALVAR) &&
 820                             (iptr->dst->varnum == iptr->op1))
 821                                 break;
 822                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 823                         if (var->flags & INMEMORY)
 824                                 M_LLD(d, REG_SP, 8 * var->regoff);
 825                         else
 826                                 {M_INTMOVE(var->regoff,d);}
 827                         store_reg_to_var_int(iptr->dst, d);
 828                         break;
 829
 830                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 831                 case ICMD_DLOAD:      /* op1 = local variable                         */
 832
 833                         d = reg_of_var(iptr->dst, REG_FTMP1);
 834                         if ((iptr->dst->varkind == LOCALVAR) &&
 835                             (iptr->dst->varnum == iptr->op1))
 836                                 break;
 837                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 838                         if (var->flags & INMEMORY)
 839                                 M_DLD(d, REG_SP, 8 * var->regoff);
 840                         else
 841                                 {M_FLTMOVE(var->regoff,d);}
 842                         store_reg_to_var_flt(iptr->dst, d);
 843                         break;
 844
 845
 846                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 847                 case ICMD_LSTORE:     /* op1 = local variable                         */
 848                 case ICMD_ASTORE:
 849
 850                         if ((src->varkind == LOCALVAR) &&
 851                             (src->varnum == iptr->op1))
 852                                 break;
 853                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 854                         if (var->flags & INMEMORY) {
 855                                 var_to_reg_int(s1, src, REG_ITMP1);
 856                                 M_LST(s1, REG_SP, 8 * var->regoff);
 857                                 }
 858                         else {
 859                                 var_to_reg_int(s1, src, var->regoff);
 860                                 M_INTMOVE(s1, var->regoff);
 861                                 }
 862                         break;
 863
 864                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 865                 case ICMD_DSTORE:     /* op1 = local variable                         */
 866
 867                         if ((src->varkind == LOCALVAR) &&
 868                             (src->varnum == iptr->op1))
 869                                 break;
 870                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 871                         if (var->flags & INMEMORY) {
 872                                 var_to_reg_flt(s1, src, REG_FTMP1);
 873                                 M_DST(s1, REG_SP, 8 * var->regoff);
 874                                 }
 875                         else {
 876                                 var_to_reg_flt(s1, src, var->regoff);
 877                                 M_FLTMOVE(s1, var->regoff);
 878                                 }
 879                         break;
 880
 881
 882                 /* pop/dup/swap operations ********************************************/
 883
 884                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 885
 886                 case ICMD_POP:        /* ..., value  ==> ...                          */
 887                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 888                         break;
 889
 890 #define M_COPY(from,to) \
 891                         d = reg_of_var(to, REG_IFTMP); \
 892                         if ((from->regoff != to->regoff) || \
 893                             ((from->flags ^ to->flags) & INMEMORY)) { \
 894                                 if (IS_FLT_DBL_TYPE(from->type)) { \
 895                                         var_to_reg_flt(s1, from, d); \
 896                                         M_FLTMOVE(s1,d); \
 897                                         store_reg_to_var_flt(to, d); \
 898                                         }\
 899                                 else { \
 900                                         var_to_reg_int(s1, from, d); \
 901                                         M_INTMOVE(s1,d); \
 902                                         store_reg_to_var_int(to, d); \
 903                                         }\
 904                                 }
 905
 906                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 907                         M_COPY(src, iptr->dst);
 908                         break;
 909
 910                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 911
 912                         M_COPY(src,       iptr->dst->prev->prev);
 913
 914                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 915
 916                         M_COPY(src,       iptr->dst);
 917                         M_COPY(src->prev, iptr->dst->prev);
 918                         break;
 919
 920                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 921
 922                         M_COPY(src->prev,       iptr->dst->prev->prev->prev);
 923
 924                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 925
 926                         M_COPY(src,             iptr->dst);
 927                         M_COPY(src->prev,       iptr->dst->prev);
 928                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 929                         M_COPY(src, iptr->dst->prev->prev->prev);
 930                         break;
 931
 932                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 933
 934                         M_COPY(src,                   iptr->dst);
 935                         M_COPY(src->prev,             iptr->dst->prev);
 936                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 937                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 938                         M_COPY(src,       iptr->dst->prev->prev->prev->prev);
 939                         M_COPY(src->prev, iptr->dst->prev->prev->prev->prev->prev);
 940                         break;
 941
 942                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 943
 944                         M_COPY(src, iptr->dst->prev);
 945                         M_COPY(src->prev, iptr->dst);
 946                         break;
 947
 948
 949                 /* integer operations *************************************************/
 950
 951                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 952
 953                         var_to_reg_int(s1, src, REG_ITMP1);
 954                         d = reg_of_var(iptr->dst, REG_ITMP3);
 955                         M_ISUB(REG_ZERO, s1, d);
 956                         store_reg_to_var_int(iptr->dst, d);
 957                         break;
 958
 959                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 960
 961                         var_to_reg_int(s1, src, REG_ITMP1);
 962                         d = reg_of_var(iptr->dst, REG_ITMP3);
 963                         M_LSUB(REG_ZERO, s1, d);
 964                         store_reg_to_var_int(iptr->dst, d);
 965                         break;
 966
 967                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 968
 969                         var_to_reg_int(s1, src, REG_ITMP1);
 970                         d = reg_of_var(iptr->dst, REG_ITMP3);
 971                         M_INTMOVE(s1, d);
 972                         store_reg_to_var_int(iptr->dst, d);
 973                         break;
 974
 975                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 976
 977                         var_to_reg_int(s1, src, REG_ITMP1);
 978                         d = reg_of_var(iptr->dst, REG_ITMP3);
 979                         M_IADD(s1, REG_ZERO, d );
 980                         store_reg_to_var_int(iptr->dst, d);
 981                         break;
 982
 983                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 984
 985                         var_to_reg_int(s1, src, REG_ITMP1);
 986                         d = reg_of_var(iptr->dst, REG_ITMP3);
 987                         if (has_ext_instr_set) {
 988                                 M_BSEXT(s1, d);
 989                                 }
 990                         else {
 991                                 M_SLL_IMM(s1, 56, d);
 992                                 M_SRA_IMM( d, 56, d);
 993                                 }
 994                         store_reg_to_var_int(iptr->dst, d);
 995                         break;
 996
 997                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 998
 999                         var_to_reg_int(s1, src, REG_ITMP1);
1000                         d = reg_of_var(iptr->dst, REG_ITMP3);
1001             M_CZEXT(s1, d);
1002                         store_reg_to_var_int(iptr->dst, d);
1003                         break;
1004
1005                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
1006
1007                         var_to_reg_int(s1, src, REG_ITMP1);
1008                         d = reg_of_var(iptr->dst, REG_ITMP3);
1009                         if (has_ext_instr_set) {
1010                                 M_SSEXT(s1, d);
1011                                 }
1012                         else {
1013                                 M_SLL_IMM(s1, 48, d);
1014                                 M_SRA_IMM( d, 48, d);
1015                                 }
1016                         store_reg_to_var_int(iptr->dst, d);
1017                         break;
1018
1019
1020                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1021
1022                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1023                         var_to_reg_int(s2, src, REG_ITMP2);
1024                         d = reg_of_var(iptr->dst, REG_ITMP3);
1025                         M_IADD(s1, s2, d);
1026                         store_reg_to_var_int(iptr->dst, d);
1027                         break;
1028
1029                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
1030                                       /* val.i = constant                             */
1031
1032                         var_to_reg_int(s1, src, REG_ITMP1);
1033                         d = reg_of_var(iptr->dst, REG_ITMP3);
1034                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1035                                 M_IADD_IMM(s1, iptr->val.i, d);
1036                                 }
1037                         else {
1038                                 ICONST(REG_ITMP2, iptr->val.i);
1039                                 M_IADD(s1, REG_ITMP2, d);
1040                                 }
1041                         store_reg_to_var_int(iptr->dst, d);
1042                         break;
1043
1044                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1045
1046                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1047                         var_to_reg_int(s2, src, REG_ITMP2);
1048                         d = reg_of_var(iptr->dst, REG_ITMP3);
1049                         M_LADD(s1, s2, d);
1050                         store_reg_to_var_int(iptr->dst, d);
1051                         break;
1052
1053                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
1054                                       /* val.l = constant                             */
1055
1056                         var_to_reg_int(s1, src, REG_ITMP1);
1057                         d = reg_of_var(iptr->dst, REG_ITMP3);
1058                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1059                                 M_LADD_IMM(s1, iptr->val.l, d);
1060                                 }
1061                         else {
1062                                 LCONST(REG_ITMP2, iptr->val.l);
1063                                 M_LADD(s1, REG_ITMP2, d);
1064                                 }
1065                         store_reg_to_var_int(iptr->dst, d);
1066                         break;
1067
1068                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1069
1070                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1071                         var_to_reg_int(s2, src, REG_ITMP2);
1072                         d = reg_of_var(iptr->dst, REG_ITMP3);
1073                         M_ISUB(s1, s2, d);
1074                         store_reg_to_var_int(iptr->dst, d);
1075                         break;
1076
1077                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
1078                                       /* val.i = constant                             */
1079
1080                         var_to_reg_int(s1, src, REG_ITMP1);
1081                         d = reg_of_var(iptr->dst, REG_ITMP3);
1082                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1083                                 M_ISUB_IMM(s1, iptr->val.i, d);
1084                                 }
1085                         else {
1086                                 ICONST(REG_ITMP2, iptr->val.i);
1087                                 M_ISUB(s1, REG_ITMP2, d);
1088                                 }
1089                         store_reg_to_var_int(iptr->dst, d);
1090                         break;
1091
1092                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1093
1094                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1095                         var_to_reg_int(s2, src, REG_ITMP2);
1096                         d = reg_of_var(iptr->dst, REG_ITMP3);
1097                         M_LSUB(s1, s2, d);
1098                         store_reg_to_var_int(iptr->dst, d);
1099                         break;
1100
1101                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
1102                                       /* val.l = constant                             */
1103
1104                         var_to_reg_int(s1, src, REG_ITMP1);
1105                         d = reg_of_var(iptr->dst, REG_ITMP3);
1106                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1107                                 M_LSUB_IMM(s1, iptr->val.l, d);
1108                                 }
1109                         else {
1110                                 LCONST(REG_ITMP2, iptr->val.l);
1111                                 M_LSUB(s1, REG_ITMP2, d);
1112                                 }
1113                         store_reg_to_var_int(iptr->dst, d);
1114                         break;
1115
1116                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1117
1118                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1119                         var_to_reg_int(s2, src, REG_ITMP2);
1120                         d = reg_of_var(iptr->dst, REG_ITMP3);
1121                         M_IMUL(s1, s2, d);
1122                         store_reg_to_var_int(iptr->dst, d);
1123                         break;
1124
1125                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
1126                                       /* val.i = constant                             */
1127
1128                         var_to_reg_int(s1, src, REG_ITMP1);
1129                         d = reg_of_var(iptr->dst, REG_ITMP3);
1130                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1131                                 M_IMUL_IMM(s1, iptr->val.i, d);
1132                                 }
1133                         else {
1134                                 ICONST(REG_ITMP2, iptr->val.i);
1135                                 M_IMUL(s1, REG_ITMP2, d);
1136                                 }
1137                         store_reg_to_var_int(iptr->dst, d);
1138                         break;
1139
1140                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1141
1142                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1143                         var_to_reg_int(s2, src, REG_ITMP2);
1144                         d = reg_of_var(iptr->dst, REG_ITMP3);
1145                         M_LMUL (s1, s2, d);
1146                         store_reg_to_var_int(iptr->dst, d);
1147                         break;
1148
1149                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
1150                                       /* val.l = constant                             */
1151
1152                         var_to_reg_int(s1, src, REG_ITMP1);
1153                         d = reg_of_var(iptr->dst, REG_ITMP3);
1154                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1155                                 M_LMUL_IMM(s1, iptr->val.l, d);
1156                                 }
1157                         else {
1158                                 LCONST(REG_ITMP2, iptr->val.l);
1159                                 M_LMUL(s1, REG_ITMP2, d);
1160                                 }
1161                         store_reg_to_var_int(iptr->dst, d);
1162                         break;
1163
1164                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
1165                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
1166
1167                         var_to_reg_int(s1, src, REG_ITMP1);
1168                         d = reg_of_var(iptr->dst, REG_ITMP3);
1169                         if (iptr->val.i <= 15) {
1170                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
1171                                 M_CMOVGE(s1, s1, REG_ITMP2);
1172                                 }
1173                         else {
1174                                 M_SRA_IMM(s1, 63, REG_ITMP2);
1175                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
1176                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
1177                                 }
1178                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
1179                         store_reg_to_var_int(iptr->dst, d);
1180                         break;
1181
1182                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1183
1184                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1185                         var_to_reg_int(s2, src, REG_ITMP2);
1186                         d = reg_of_var(iptr->dst, REG_ITMP3);
1187                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1188                         M_SLL(s1, REG_ITMP3, d);
1189                         M_IADD(d, REG_ZERO, d);
1190                         store_reg_to_var_int(iptr->dst, d);
1191                         break;
1192
1193                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1194                                       /* val.i = constant                             */
1195
1196                         var_to_reg_int(s1, src, REG_ITMP1);
1197                         d = reg_of_var(iptr->dst, REG_ITMP3);
1198                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
1199                         M_IADD(d, REG_ZERO, d);
1200                         store_reg_to_var_int(iptr->dst, d);
1201                         break;
1202
1203                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1204
1205                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1206                         var_to_reg_int(s2, src, REG_ITMP2);
1207                         d = reg_of_var(iptr->dst, REG_ITMP3);
1208                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1209                         M_SRA(s1, REG_ITMP3, d);
1210                         store_reg_to_var_int(iptr->dst, d);
1211                         break;
1212
1213                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1214                                       /* val.i = constant                             */
1215
1216                         var_to_reg_int(s1, src, REG_ITMP1);
1217                         d = reg_of_var(iptr->dst, REG_ITMP3);
1218                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1219                         store_reg_to_var_int(iptr->dst, d);
1220                         break;
1221
1222                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1223
1224                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1225                         var_to_reg_int(s2, src, REG_ITMP2);
1226                         d = reg_of_var(iptr->dst, REG_ITMP3);
1227                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1228             M_IZEXT(s1, d);
1229                         M_SRL(d, REG_ITMP2, d);
1230                         M_IADD(d, REG_ZERO, d);
1231                         store_reg_to_var_int(iptr->dst, d);
1232                         break;
1233
1234                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1235                                       /* val.i = constant                             */
1236
1237                         var_to_reg_int(s1, src, REG_ITMP1);
1238                         d = reg_of_var(iptr->dst, REG_ITMP3);
1239             M_IZEXT(s1, d);
1240                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
1241                         M_IADD(d, REG_ZERO, d);
1242                         store_reg_to_var_int(iptr->dst, d);
1243                         break;
1244
1245                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1246
1247                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1248                         var_to_reg_int(s2, src, REG_ITMP2);
1249                         d = reg_of_var(iptr->dst, REG_ITMP3);
1250                         M_SLL(s1, s2, d);
1251                         store_reg_to_var_int(iptr->dst, d);
1252                         break;
1253
1254                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1255                                       /* val.i = constant                             */
1256
1257                         var_to_reg_int(s1, src, REG_ITMP1);
1258                         d = reg_of_var(iptr->dst, REG_ITMP3);
1259                         M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
1260                         store_reg_to_var_int(iptr->dst, d);
1261                         break;
1262
1263                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1264
1265                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1266                         var_to_reg_int(s2, src, REG_ITMP2);
1267                         d = reg_of_var(iptr->dst, REG_ITMP3);
1268                         M_SRA(s1, s2, d);
1269                         store_reg_to_var_int(iptr->dst, d);
1270                         break;
1271
1272                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1273                                       /* val.i = constant                             */
1274
1275                         var_to_reg_int(s1, src, REG_ITMP1);
1276                         d = reg_of_var(iptr->dst, REG_ITMP3);
1277                         M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
1278                         store_reg_to_var_int(iptr->dst, d);
1279                         break;
1280
1281                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1282
1283                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1284                         var_to_reg_int(s2, src, REG_ITMP2);
1285                         d = reg_of_var(iptr->dst, REG_ITMP3);
1286                         M_SRL(s1, s2, d);
1287                         store_reg_to_var_int(iptr->dst, d);
1288                         break;
1289
1290                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1291                                       /* val.i = constant                             */
1292
1293                         var_to_reg_int(s1, src, REG_ITMP1);
1294                         d = reg_of_var(iptr->dst, REG_ITMP3);
1295                         M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
1296                         store_reg_to_var_int(iptr->dst, d);
1297                         break;
1298
1299                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1300                 case ICMD_LAND:
1301
1302                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1303                         var_to_reg_int(s2, src, REG_ITMP2);
1304                         d = reg_of_var(iptr->dst, REG_ITMP3);
1305                         M_AND(s1, s2, d);
1306                         store_reg_to_var_int(iptr->dst, d);
1307                         break;
1308
1309                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1310                                       /* val.i = constant                             */
1311
1312                         var_to_reg_int(s1, src, REG_ITMP1);
1313                         d = reg_of_var(iptr->dst, REG_ITMP3);
1314                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1315                                 M_AND_IMM(s1, iptr->val.i, d);
1316                                 }
1317                         else if (iptr->val.i == 0xffff) {
1318                                 M_CZEXT(s1, d);
1319                                 }
1320                         else if (iptr->val.i == 0xffffff) {
1321                                 M_ZAPNOT_IMM(s1, 0x07, d);
1322                                 }
1323                         else {
1324                                 ICONST(REG_ITMP2, iptr->val.i);
1325                                 M_AND(s1, REG_ITMP2, d);
1326                                 }
1327                         store_reg_to_var_int(iptr->dst, d);
1328                         break;
1329
1330                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1331                                       /* val.i = constant                             */
1332
1333                         var_to_reg_int(s1, src, REG_ITMP1);
1334                         d = reg_of_var(iptr->dst, REG_ITMP3);
1335                         if (s1 == d) {
1336                                 M_MOV(s1, REG_ITMP1);
1337                                 s1 = REG_ITMP1;
1338                                 }
1339                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1340                                 M_AND_IMM(s1, iptr->val.i, d);
1341                                 M_BGEZ(s1, 3);
1342                                 M_ISUB(REG_ZERO, s1, d);
1343                                 M_AND_IMM(d, iptr->val.i, d);
1344                                 }
1345                         else if (iptr->val.i == 0xffff) {
1346                                 M_CZEXT(s1, d);
1347                                 M_BGEZ(s1, 3);
1348                                 M_ISUB(REG_ZERO, s1, d);
1349                                 M_CZEXT(d, d);
1350                                 }
1351                         else if (iptr->val.i == 0xffffff) {
1352                                 M_ZAPNOT_IMM(s1, 0x07, d);
1353                                 M_BGEZ(s1, 3);
1354                                 M_ISUB(REG_ZERO, s1, d);
1355                                 M_ZAPNOT_IMM(d, 0x07, d);
1356                                 }
1357                         else {
1358                                 ICONST(REG_ITMP2, iptr->val.i);
1359                                 M_AND(s1, REG_ITMP2, d);
1360                                 M_BGEZ(s1, 3);
1361                                 M_ISUB(REG_ZERO, s1, d);
1362                                 M_AND(d, REG_ITMP2, d);
1363                                 }
1364                         M_ISUB(REG_ZERO, d, d);
1365                         store_reg_to_var_int(iptr->dst, d);
1366                         break;
1367
1368                 case ICMD_IREM0X10001:  /* ..., value  ==> ..., value % 0x100001      */
1369
1370 /*          b = value & 0xffff;
1371                         a = value >> 16;
1372                         a = ((b - a) & 0xffff) + (b < a);
1373 */
1374                         var_to_reg_int(s1, src, REG_ITMP1);
1375                         d = reg_of_var(iptr->dst, REG_ITMP3);
1376                         if (s1 == d) {
1377                                 M_MOV(s1, REG_ITMP3);
1378                                 s1 = REG_ITMP3;
1379                                 }
1380                         M_BLTZ(s1, 7);
1381             M_CZEXT(s1, REG_ITMP2);
1382                         M_SRA_IMM(s1, 16, d);
1383                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1384                         M_ISUB(REG_ITMP2, d, d);
1385             M_CZEXT(d, d);
1386                         M_IADD(d, REG_ITMP1, d);
1387                         M_BR(11 + (s1 == REG_ITMP1));
1388                         M_ISUB(REG_ZERO, s1, REG_ITMP1);
1389             M_CZEXT(REG_ITMP1, REG_ITMP2);
1390                         M_SRA_IMM(REG_ITMP1, 16, d);
1391                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1392                         M_ISUB(REG_ITMP2, d, d);
1393             M_CZEXT(d, d);
1394                         M_IADD(d, REG_ITMP1, d);
1395                         M_ISUB(REG_ZERO, d, d);
1396                         if (s1 == REG_ITMP1) {
1397                                 var_to_reg_int(s1, src, REG_ITMP1);
1398                                 }
1399                         M_SLL_IMM(s1, 33, REG_ITMP2);
1400                         M_CMPEQ(REG_ITMP2, REG_ZERO, REG_ITMP2);
1401                         M_ISUB(d, REG_ITMP2, d);
1402                         store_reg_to_var_int(iptr->dst, d);
1403                         break;
1404
1405                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1406                                       /* val.l = constant                             */
1407
1408                         var_to_reg_int(s1, src, REG_ITMP1);
1409                         d = reg_of_var(iptr->dst, REG_ITMP3);
1410                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1411                                 M_AND_IMM(s1, iptr->val.l, d);
1412                                 }
1413                         else if (iptr->val.l == 0xffffL) {
1414                                 M_CZEXT(s1, d);
1415                                 }
1416                         else if (iptr->val.l == 0xffffffL) {
1417                                 M_ZAPNOT_IMM(s1, 0x07, d);
1418                                 }
1419                         else if (iptr->val.l == 0xffffffffL) {
1420                                 M_IZEXT(s1, d);
1421                                 }
1422                         else if (iptr->val.l == 0xffffffffffL) {
1423                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1424                                 }
1425                         else if (iptr->val.l == 0xffffffffffffL) {
1426                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1427                                 }
1428                         else if (iptr->val.l == 0xffffffffffffffL) {
1429                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1430                                 }
1431                         else {
1432                                 LCONST(REG_ITMP2, iptr->val.l);
1433                                 M_AND(s1, REG_ITMP2, d);
1434                                 }
1435                         store_reg_to_var_int(iptr->dst, d);
1436                         break;
1437
1438                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1439                                       /* val.l = constant                             */
1440
1441                         var_to_reg_int(s1, src, REG_ITMP1);
1442                         d = reg_of_var(iptr->dst, REG_ITMP3);
1443                         if (s1 == d) {
1444                                 M_MOV(s1, REG_ITMP1);
1445                                 s1 = REG_ITMP1;
1446                                 }
1447                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1448                                 M_AND_IMM(s1, iptr->val.l, d);
1449                                 M_BGEZ(s1, 3);
1450                                 M_LSUB(REG_ZERO, s1, d);
1451                                 M_AND_IMM(d, iptr->val.l, d);
1452                                 }
1453                         else if (iptr->val.l == 0xffffL) {
1454                                 M_CZEXT(s1, d);
1455                                 M_BGEZ(s1, 3);
1456                                 M_LSUB(REG_ZERO, s1, d);
1457                                 M_CZEXT(d, d);
1458                                 }
1459                         else if (iptr->val.l == 0xffffffL) {
1460                                 M_ZAPNOT_IMM(s1, 0x07, d);
1461                                 M_BGEZ(s1, 3);
1462                                 M_LSUB(REG_ZERO, s1, d);
1463                                 M_ZAPNOT_IMM(d, 0x07, d);
1464                                 }
1465                         else if (iptr->val.l == 0xffffffffL) {
1466                                 M_IZEXT(s1, d);
1467                                 M_BGEZ(s1, 3);
1468                                 M_LSUB(REG_ZERO, s1, d);
1469                                 M_IZEXT(d, d);
1470                                 }
1471                         else if (iptr->val.l == 0xffffffffffL) {
1472                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1473                                 M_BGEZ(s1, 3);
1474                                 M_LSUB(REG_ZERO, s1, d);
1475                                 M_ZAPNOT_IMM(d, 0x1f, d);
1476                                 }
1477                         else if (iptr->val.l == 0xffffffffffffL) {
1478                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1479                                 M_BGEZ(s1, 3);
1480                                 M_LSUB(REG_ZERO, s1, d);
1481                                 M_ZAPNOT_IMM(d, 0x3f, d);
1482                                 }
1483                         else if (iptr->val.l == 0xffffffffffffffL) {
1484                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1485                                 M_BGEZ(s1, 3);
1486                                 M_LSUB(REG_ZERO, s1, d);
1487                                 M_ZAPNOT_IMM(d, 0x7f, d);
1488                                 }
1489                         else {
1490                                 LCONST(REG_ITMP2, iptr->val.l);
1491                                 M_AND(s1, REG_ITMP2, d);
1492                                 M_BGEZ(s1, 3);
1493                                 M_LSUB(REG_ZERO, s1, d);
1494                                 M_AND(d, REG_ITMP2, d);
1495                                 }
1496                         M_LSUB(REG_ZERO, d, d);
1497                         store_reg_to_var_int(iptr->dst, d);
1498                         break;
1499
1500                 case ICMD_LREM0X10001:/* ..., value  ==> ..., value % 0x10001         */
1501
1502                         var_to_reg_int(s1, src, REG_ITMP1);
1503                         d = reg_of_var(iptr->dst, REG_ITMP3);
1504                         if (s1 == d) {
1505                                 M_MOV(s1, REG_ITMP3);
1506                                 s1 = REG_ITMP3;
1507                                 }
1508                         M_CZEXT(s1, REG_ITMP2);
1509                         M_SRA_IMM(s1, 16, d);
1510                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1511                         M_LSUB(REG_ITMP2, d, d);
1512             M_CZEXT(d, d);
1513                         M_LADD(d, REG_ITMP1, d);
1514                         M_LDA(REG_ITMP2, REG_ZERO, -1);
1515                         M_SRL_IMM(REG_ITMP2, 33, REG_ITMP2);
1516                         if (s1 == REG_ITMP1) {
1517                                 var_to_reg_int(s1, src, REG_ITMP1);
1518                                 }
1519                         M_CMPULT(s1, REG_ITMP2, REG_ITMP2);
1520                         M_BNEZ(REG_ITMP2, 11);
1521                         M_LDA(d, REG_ZERO, -257);
1522                         M_ZAPNOT_IMM(d, 0xcd, d);
1523                         M_LSUB(REG_ZERO, s1, REG_ITMP2);
1524                         M_CMOVGE(s1, s1, REG_ITMP2);
1525                         M_UMULH(REG_ITMP2, d, REG_ITMP2);
1526                         M_SRL_IMM(REG_ITMP2, 16, REG_ITMP2);
1527                         M_LSUB(REG_ZERO, REG_ITMP2, d);
1528                         M_CMOVGE(s1, REG_ITMP2, d);
1529                         M_SLL_IMM(d, 16, REG_ITMP2);
1530                         M_LADD(d, REG_ITMP2, d);
1531                         M_LSUB(s1, d, d);
1532                         store_reg_to_var_int(iptr->dst, d);
1533                         break;
1534
1535                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1536                 case ICMD_LOR:
1537
1538                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1539                         var_to_reg_int(s2, src, REG_ITMP2);
1540                         d = reg_of_var(iptr->dst, REG_ITMP3);
1541                         M_OR( s1,s2, d);
1542                         store_reg_to_var_int(iptr->dst, d);
1543                         break;
1544
1545                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1546                                       /* val.i = constant                             */
1547
1548                         var_to_reg_int(s1, src, REG_ITMP1);
1549                         d = reg_of_var(iptr->dst, REG_ITMP3);
1550                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1551                                 M_OR_IMM(s1, iptr->val.i, d);
1552                                 }
1553                         else {
1554                                 ICONST(REG_ITMP2, iptr->val.i);
1555                                 M_OR(s1, REG_ITMP2, d);
1556                                 }
1557                         store_reg_to_var_int(iptr->dst, d);
1558                         break;
1559
1560                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1561                                       /* val.l = constant                             */
1562
1563                         var_to_reg_int(s1, src, REG_ITMP1);
1564                         d = reg_of_var(iptr->dst, REG_ITMP3);
1565                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1566                                 M_OR_IMM(s1, iptr->val.l, d);
1567                                 }
1568                         else {
1569                                 LCONST(REG_ITMP2, iptr->val.l);
1570                                 M_OR(s1, REG_ITMP2, d);
1571                                 }
1572                         store_reg_to_var_int(iptr->dst, d);
1573                         break;
1574
1575                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1576                 case ICMD_LXOR:
1577
1578                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1579                         var_to_reg_int(s2, src, REG_ITMP2);
1580                         d = reg_of_var(iptr->dst, REG_ITMP3);
1581                         M_XOR(s1, s2, d);
1582                         store_reg_to_var_int(iptr->dst, d);
1583                         break;
1584
1585                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1586                                       /* val.i = constant                             */
1587
1588                         var_to_reg_int(s1, src, REG_ITMP1);
1589                         d = reg_of_var(iptr->dst, REG_ITMP3);
1590                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1591                                 M_XOR_IMM(s1, iptr->val.i, d);
1592                                 }
1593                         else {
1594                                 ICONST(REG_ITMP2, iptr->val.i);
1595                                 M_XOR(s1, REG_ITMP2, d);
1596                                 }
1597                         store_reg_to_var_int(iptr->dst, d);
1598                         break;
1599
1600                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1601                                       /* val.l = constant                             */
1602
1603                         var_to_reg_int(s1, src, REG_ITMP1);
1604                         d = reg_of_var(iptr->dst, REG_ITMP3);
1605                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1606                                 M_XOR_IMM(s1, iptr->val.l, d);
1607                                 }
1608                         else {
1609                                 LCONST(REG_ITMP2, iptr->val.l);
1610                                 M_XOR(s1, REG_ITMP2, d);
1611                                 }
1612                         store_reg_to_var_int(iptr->dst, d);
1613                         break;
1614
1615
1616                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1617
1618                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1619                         var_to_reg_int(s2, src, REG_ITMP2);
1620                         d = reg_of_var(iptr->dst, REG_ITMP3);
1621                         M_CMPLT(s1, s2, REG_ITMP3);
1622                         M_CMPLT(s2, s1, REG_ITMP1);
1623                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1624                         store_reg_to_var_int(iptr->dst, d);
1625                         break;
1626
1627
1628                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1629                                       /* op1 = variable, val.i = constant             */
1630
1631                         var = &(locals[iptr->op1][TYPE_INT]);
1632                         if (var->flags & INMEMORY) {
1633                                 s1 = REG_ITMP1;
1634                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1635                                 }
1636                         else
1637                                 s1 = var->regoff;
1638                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1639                                 M_IADD_IMM(s1, iptr->val.i, s1);
1640                                 }
1641                         else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1642                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1643                                 }
1644                         else {
1645                                 M_LDA (s1, s1, iptr->val.i);
1646                                 M_IADD(s1, REG_ZERO, s1);
1647                                 }
1648                         if (var->flags & INMEMORY)
1649                                 M_LST(s1, REG_SP, 8 * var->regoff);
1650                         break;
1651
1652
1653                 /* floating operations ************************************************/
1654
1655                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1656
1657                         var_to_reg_flt(s1, src, REG_FTMP1);
1658                         d = reg_of_var(iptr->dst, REG_FTMP3);
1659                         M_FMOVN(s1, d);
1660                         store_reg_to_var_flt(iptr->dst, d);
1661                         break;
1662
1663                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1664
1665                         var_to_reg_flt(s1, src, REG_FTMP1);
1666                         d = reg_of_var(iptr->dst, REG_FTMP3);
1667                         M_FMOVN(s1, d);
1668                         store_reg_to_var_flt(iptr->dst, d);
1669                         break;
1670
1671                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1672
1673                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1674                         var_to_reg_flt(s2, src, REG_FTMP2);
1675                         d = reg_of_var(iptr->dst, REG_FTMP3);
1676                         if (opt_noieee) {
1677                                 M_FADD(s1, s2, d);
1678                                 }
1679                         else {
1680                                 if (d == s1 || d == s2) {
1681                                         M_FADDS(s1, s2, REG_FTMP3);
1682                                         M_TRAPB;
1683                                         M_FMOV(REG_FTMP3, d);
1684                                         }
1685                                 else {
1686                                         M_FADDS(s1, s2, d);
1687                                         M_TRAPB;
1688                                         }
1689                                 }
1690                         store_reg_to_var_flt(iptr->dst, d);
1691                         break;
1692
1693                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1694
1695                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1696                         var_to_reg_flt(s2, src, REG_FTMP2);
1697                         d = reg_of_var(iptr->dst, REG_FTMP3);
1698                         if (opt_noieee) {
1699                                 M_DADD(s1, s2, d);
1700                                 }
1701                         else {
1702                                 if (d == s1 || d == s2) {
1703                                         M_DADDS(s1, s2, REG_FTMP3);
1704                                         M_TRAPB;
1705                                         M_FMOV(REG_FTMP3, d);
1706                                         }
1707                                 else {
1708                                         M_DADDS(s1, s2, d);
1709                                         M_TRAPB;
1710                                         }
1711                                 }
1712                         store_reg_to_var_flt(iptr->dst, d);
1713                         break;
1714
1715                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1716
1717                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1718                         var_to_reg_flt(s2, src, REG_FTMP2);
1719                         d = reg_of_var(iptr->dst, REG_FTMP3);
1720                         if (opt_noieee) {
1721                                 M_FSUB(s1, s2, d);
1722                                 }
1723                         else {
1724                                 if (d == s1 || d == s2) {
1725                                         M_FSUBS(s1, s2, REG_FTMP3);
1726                                         M_TRAPB;
1727                                         M_FMOV(REG_FTMP3, d);
1728                                         }
1729                                 else {
1730                                         M_FSUBS(s1, s2, d);
1731                                         M_TRAPB;
1732                                         }
1733                                 }
1734                         store_reg_to_var_flt(iptr->dst, d);
1735                         break;
1736
1737                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1738
1739                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1740                         var_to_reg_flt(s2, src, REG_FTMP2);
1741                         d = reg_of_var(iptr->dst, REG_FTMP3);
1742                         if (opt_noieee) {
1743                                 M_DSUB(s1, s2, d);
1744                                 }
1745                         else {
1746                                 if (d == s1 || d == s2) {
1747                                         M_DSUBS(s1, s2, REG_FTMP3);
1748                                         M_TRAPB;
1749                                         M_FMOV(REG_FTMP3, d);
1750                                         }
1751                                 else {
1752                                         M_DSUBS(s1, s2, d);
1753                                         M_TRAPB;
1754                                         }
1755                                 }
1756                         store_reg_to_var_flt(iptr->dst, d);
1757                         break;
1758
1759                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1760
1761                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1762                         var_to_reg_flt(s2, src, REG_FTMP2);
1763                         d = reg_of_var(iptr->dst, REG_FTMP3);
1764                         if (opt_noieee) {
1765                                 M_FMUL(s1, s2, d);
1766                                 }
1767                         else {
1768                                 if (d == s1 || d == s2) {
1769                                         M_FMULS(s1, s2, REG_FTMP3);
1770                                         M_TRAPB;
1771                                         M_FMOV(REG_FTMP3, d);
1772                                         }
1773                                 else {
1774                                         M_FMULS(s1, s2, d);
1775                                         M_TRAPB;
1776                                         }
1777                                 }
1778                         store_reg_to_var_flt(iptr->dst, d);
1779                         break;
1780
1781                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1782
1783                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1784                         var_to_reg_flt(s2, src, REG_FTMP2);
1785                         d = reg_of_var(iptr->dst, REG_FTMP3);
1786                         if (opt_noieee) {
1787                                 M_DMUL(s1, s2, d);
1788                                 }
1789                         else {
1790                                 if (d == s1 || d == s2) {
1791                                         M_DMULS(s1, s2, REG_FTMP3);
1792                                         M_TRAPB;
1793                                         M_FMOV(REG_FTMP3, d);
1794                                         }
1795                                 else {
1796                                         M_DMULS(s1, s2, d);
1797                                         M_TRAPB;
1798                                         }
1799                                 }
1800                         store_reg_to_var_flt(iptr->dst, d);
1801                         break;
1802
1803                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1804
1805                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1806                         var_to_reg_flt(s2, src, REG_FTMP2);
1807                         d = reg_of_var(iptr->dst, REG_FTMP3);
1808                         if (opt_noieee) {
1809                                 M_FDIV(s1, s2, d);
1810                                 }
1811                         else {
1812                                 if (d == s1 || d == s2) {
1813                                         M_FDIVS(s1, s2, REG_FTMP3);
1814                                         M_TRAPB;
1815                                         M_FMOV(REG_FTMP3, d);
1816                                         }
1817                                 else {
1818                                         M_FDIVS(s1, s2, d);
1819                                         M_TRAPB;
1820                                         }
1821                                 }
1822                         store_reg_to_var_flt(iptr->dst, d);
1823                         break;
1824
1825                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1826
1827                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1828                         var_to_reg_flt(s2, src, REG_FTMP2);
1829                         d = reg_of_var(iptr->dst, REG_FTMP3);
1830                         if (opt_noieee) {
1831                                 M_DDIV(s1, s2, d);
1832                                 }
1833                         else {
1834                                 if (d == s1 || d == s2) {
1835                                         M_DDIVS(s1, s2, REG_FTMP3);
1836                                         M_TRAPB;
1837                                         M_FMOV(REG_FTMP3, d);
1838                                         }
1839                                 else {
1840                                         M_DDIVS(s1, s2, d);
1841                                         M_TRAPB;
1842                                         }
1843                                 }
1844                         store_reg_to_var_flt(iptr->dst, d);
1845                         break;
1846
1847                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1848                 case ICMD_L2F:
1849                         var_to_reg_int(s1, src, REG_ITMP1);
1850                         d = reg_of_var(iptr->dst, REG_FTMP3);
1851                         a = dseg_adddouble(0.0);
1852                         M_LST (s1, REG_PV, a);
1853                         M_DLD (d, REG_PV, a);
1854                         M_CVTLF(d, d);
1855                         store_reg_to_var_flt(iptr->dst, d);
1856                         break;
1857
1858                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1859                 case ICMD_L2D:
1860                         var_to_reg_int(s1, src, REG_ITMP1);
1861                         d = reg_of_var(iptr->dst, REG_FTMP3);
1862                         a = dseg_adddouble(0.0);
1863                         M_LST (s1, REG_PV, a);
1864                         M_DLD (d, REG_PV, a);
1865                         M_CVTLD(d, d);
1866                         store_reg_to_var_flt(iptr->dst, d);
1867                         break;
1868
1869                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1870                 case ICMD_D2I:
1871                         var_to_reg_flt(s1, src, REG_FTMP1);
1872                         d = reg_of_var(iptr->dst, REG_ITMP3);
1873                         a = dseg_adddouble(0.0);
1874                         M_CVTDL_C(s1, REG_FTMP2);
1875                         M_CVTLI(REG_FTMP2, REG_FTMP3);
1876                         M_DST (REG_FTMP3, REG_PV, a);
1877                         M_ILD (d, REG_PV, a);
1878                         store_reg_to_var_int(iptr->dst, d);
1879                         break;
1880
1881                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1882                 case ICMD_D2L:
1883                         var_to_reg_flt(s1, src, REG_FTMP1);
1884                         d = reg_of_var(iptr->dst, REG_ITMP3);
1885                         a = dseg_adddouble(0.0);
1886                         M_CVTDL_C(s1, REG_FTMP2);
1887                         M_DST (REG_FTMP2, REG_PV, a);
1888                         M_LLD (d, REG_PV, a);
1889                         store_reg_to_var_int(iptr->dst, d);
1890                         break;
1891
1892                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1893
1894                         var_to_reg_flt(s1, src, REG_FTMP1);
1895                         d = reg_of_var(iptr->dst, REG_FTMP3);
1896                         M_CVTFDS(s1, d);
1897                         M_TRAPB;
1898                         store_reg_to_var_flt(iptr->dst, d);
1899                         break;
1900
1901                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1902
1903                         var_to_reg_flt(s1, src, REG_FTMP1);
1904                         d = reg_of_var(iptr->dst, REG_FTMP3);
1905                         if (opt_noieee) {
1906                                 M_CVTDF(s1, d);
1907                                 }
1908                         else {
1909                                 M_CVTDFS(s1, d);
1910                                 M_TRAPB;
1911                                 }
1912                         store_reg_to_var_flt(iptr->dst, d);
1913                         break;
1914
1915                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1916                 case ICMD_DCMPL:
1917                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1918                         var_to_reg_flt(s2, src, REG_FTMP2);
1919                         d = reg_of_var(iptr->dst, REG_ITMP3);
1920                         if (opt_noieee) {
1921                                 M_LSUB_IMM(REG_ZERO, 1, d);
1922                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1923                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1924                                 M_CLR   (d);
1925                                 M_FCMPLT(s2, s1, REG_FTMP3);
1926                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1927                                 M_LADD_IMM(REG_ZERO, 1, d);
1928                                 }
1929                         else {
1930                                 M_LSUB_IMM(REG_ZERO, 1, d);
1931                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1932                                 M_TRAPB;
1933                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1934                                 M_CLR   (d);
1935                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1936                                 M_TRAPB;
1937                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1938                                 M_LADD_IMM(REG_ZERO, 1, d);
1939                                 }
1940                         store_reg_to_var_int(iptr->dst, d);
1941                         break;
1942
1943                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1944                 case ICMD_DCMPG:
1945                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1946                         var_to_reg_flt(s2, src, REG_FTMP2);
1947                         d = reg_of_var(iptr->dst, REG_ITMP3);
1948                         if (opt_noieee) {
1949                                 M_LADD_IMM(REG_ZERO, 1, d);
1950                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1951                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1952                                 M_CLR   (d);
1953                                 M_FCMPLT(s1, s2, REG_FTMP3);
1954                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1955                                 M_LSUB_IMM(REG_ZERO, 1, d);
1956                                 }
1957                         else {
1958                                 M_LADD_IMM(REG_ZERO, 1, d);
1959                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1960                                 M_TRAPB;
1961                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1962                                 M_CLR   (d);
1963                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1964                                 M_TRAPB;
1965                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1966                                 M_LSUB_IMM(REG_ZERO, 1, d);
1967                                 }
1968                         store_reg_to_var_int(iptr->dst, d);
1969                         break;
1970
1971
1972                 /* memory operations **************************************************/
1973
1974                         /* #define gen_bound_check \
1975                         if (checkbounds) {\
1976                                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1977                                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
1978                                 M_BEQZ(REG_ITMP3, 0);\
1979                                 codegen_addxboundrefs(mcodeptr);\
1980                                 }
1981                         */
1982
1983 #define gen_bound_check \
1984     if (checkbounds) { \
1985         M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1986         M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
1987         M_BEQZ(REG_ITMP3, 0);\
1988         codegen_addxboundrefs(mcodeptr, s2); \
1989     }
1990
1991                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1992
1993                         var_to_reg_int(s1, src, REG_ITMP1);
1994                         d = reg_of_var(iptr->dst, REG_ITMP3);
1995                         gen_nullptr_check(s1);
1996                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1997                         store_reg_to_var_int(iptr->dst, d);
1998                         break;
1999
2000                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
2001
2002                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2003                         var_to_reg_int(s2, src, REG_ITMP2);
2004                         d = reg_of_var(iptr->dst, REG_ITMP3);
2005                         if (iptr->op1 == 0) {
2006                                 gen_nullptr_check(s1);
2007                                 gen_bound_check;
2008                                 }
2009                         M_SAADDQ(s2, s1, REG_ITMP1);
2010                         M_ALD( d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2011                         store_reg_to_var_int(iptr->dst, d);
2012                         break;
2013
2014                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
2015
2016                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2017                         var_to_reg_int(s2, src, REG_ITMP2);
2018                         d = reg_of_var(iptr->dst, REG_ITMP3);
2019                         if (iptr->op1 == 0) {
2020                                 gen_nullptr_check(s1);
2021                                 gen_bound_check;
2022                                 }
2023                         M_S8ADDQ(s2, s1, REG_ITMP1);
2024                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
2025                         store_reg_to_var_int(iptr->dst, d);
2026                         break;
2027
2028                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
2029
2030                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2031                         var_to_reg_int(s2, src, REG_ITMP2);
2032                         d = reg_of_var(iptr->dst, REG_ITMP3);
2033                         if (iptr->op1 == 0) {
2034                                 gen_nullptr_check(s1);
2035                                 gen_bound_check;
2036                                 }
2037
2038                         M_S4ADDQ(s2, s1, REG_ITMP1);
2039                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
2040                         store_reg_to_var_int(iptr->dst, d);
2041                         break;
2042
2043                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
2044
2045                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2046                         var_to_reg_int(s2, src, REG_ITMP2);
2047                         d = reg_of_var(iptr->dst, REG_FTMP3);
2048                         if (iptr->op1 == 0) {
2049                                 gen_nullptr_check(s1);
2050                                 gen_bound_check;
2051                                 }
2052                         M_S4ADDQ(s2, s1, REG_ITMP1);
2053                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2054                         store_reg_to_var_flt(iptr->dst, d);
2055                         break;
2056
2057                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
2058
2059                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2060                         var_to_reg_int(s2, src, REG_ITMP2);
2061                         d = reg_of_var(iptr->dst, REG_FTMP3);
2062                         if (iptr->op1 == 0) {
2063                                 gen_nullptr_check(s1);
2064                                 gen_bound_check;
2065                                 }
2066                         M_S8ADDQ(s2, s1, REG_ITMP1);
2067                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2068                         store_reg_to_var_flt(iptr->dst, d);
2069                         break;
2070
2071                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
2072
2073                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2074                         var_to_reg_int(s2, src, REG_ITMP2);
2075                         d = reg_of_var(iptr->dst, REG_ITMP3);
2076                         if (iptr->op1 == 0) {
2077                                 gen_nullptr_check(s1);
2078                                 gen_bound_check;
2079                                 }
2080                         if (has_ext_instr_set) {
2081                                 M_LADD(s2, s1, REG_ITMP1);
2082                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2083                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
2084                                 }
2085                         else {
2086                                 M_LADD (s2, s1, REG_ITMP1);
2087                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2088                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2089                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2090                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
2091                                 }
2092                         store_reg_to_var_int(iptr->dst, d);
2093                         break;
2094
2095                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
2096
2097                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2098                         var_to_reg_int(s2, src, REG_ITMP2);
2099                         d = reg_of_var(iptr->dst, REG_ITMP3);
2100                         if (iptr->op1 == 0) {
2101                                 gen_nullptr_check(s1);
2102                                 gen_bound_check;
2103                                 }
2104                         if (has_ext_instr_set) {
2105                                 M_LADD(s2, s1, REG_ITMP1);
2106                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2107                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
2108                                 M_SSEXT(d, d);
2109                                 }
2110                         else {
2111                                 M_LADD(s2, s1, REG_ITMP1);
2112                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2113                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2114                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
2115                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
2116                                 M_SRA_IMM(d, 48, d);
2117                                 }
2118                         store_reg_to_var_int(iptr->dst, d);
2119                         break;
2120
2121                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
2122
2123                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2124                         var_to_reg_int(s2, src, REG_ITMP2);
2125                         d = reg_of_var(iptr->dst, REG_ITMP3);
2126                         if (iptr->op1 == 0) {
2127                                 gen_nullptr_check(s1);
2128                                 gen_bound_check;
2129                                 }
2130                         if (has_ext_instr_set) {
2131                                 M_LADD   (s2, s1, REG_ITMP1);
2132                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
2133                                 M_BSEXT  (d, d);
2134                                 }
2135                         else {
2136                                 M_LADD(s2, s1, REG_ITMP1);
2137                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2138                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
2139                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
2140                                 M_SRA_IMM(d, 56, d);
2141                                 }
2142                         store_reg_to_var_int(iptr->dst, d);
2143                         break;
2144
2145
2146                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
2147
2148                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2149                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2150                         if (iptr->op1 == 0) {
2151                                 gen_nullptr_check(s1);
2152                                 gen_bound_check;
2153                                 }
2154                         var_to_reg_int(s3, src, REG_ITMP3);
2155                         M_SAADDQ(s2, s1, REG_ITMP1);
2156                         M_AST   (s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2157                         break;
2158
2159                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
2160
2161                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2162                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2163                         if (iptr->op1 == 0) {
2164                                 gen_nullptr_check(s1);
2165                                 gen_bound_check;
2166                                 }
2167                         var_to_reg_int(s3, src, REG_ITMP3);
2168                         M_S8ADDQ(s2, s1, REG_ITMP1);
2169                         M_LST   (s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
2170                         break;
2171
2172                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
2173
2174                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2175                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2176                         if (iptr->op1 == 0) {
2177                                 gen_nullptr_check(s1);
2178                                 gen_bound_check;
2179                                 }
2180
2181                         var_to_reg_int(s3, src, REG_ITMP3);
2182                         M_S4ADDQ(s2, s1, REG_ITMP1);
2183                         M_IST   (s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
2184                         break;
2185
2186                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
2187
2188                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2189                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2190                         if (iptr->op1 == 0) {
2191                                 gen_nullptr_check(s1);
2192                                 gen_bound_check;
2193                                 }
2194                         var_to_reg_flt(s3, src, REG_FTMP3);
2195                         M_S4ADDQ(s2, s1, REG_ITMP1);
2196                         M_FST   (s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2197                         break;
2198
2199                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
2200
2201                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2202                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2203                         if (iptr->op1 == 0) {
2204                                 gen_nullptr_check(s1);
2205                                 gen_bound_check;
2206                                 }
2207                         var_to_reg_flt(s3, src, REG_FTMP3);
2208                         M_S8ADDQ(s2, s1, REG_ITMP1);
2209                         M_DST   (s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2210                         break;
2211
2212                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
2213
2214                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2215                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2216                         if (iptr->op1 == 0) {
2217                                 gen_nullptr_check(s1);
2218                                 gen_bound_check;
2219                                 }
2220                         var_to_reg_int(s3, src, REG_ITMP3);
2221                         if (has_ext_instr_set) {
2222                                 M_LADD(s2, s1, REG_ITMP1);
2223                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2224                                 M_SST (s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
2225                                 }
2226                         else {
2227                                 M_LADD (s2, s1, REG_ITMP1);
2228                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2229                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2230                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2231                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
2232                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2233                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2234                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2235                                 }
2236                         break;
2237
2238                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
2239
2240                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2241                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2242                         if (iptr->op1 == 0) {
2243                                 gen_nullptr_check(s1);
2244                                 gen_bound_check;
2245                                 }
2246                         var_to_reg_int(s3, src, REG_ITMP3);
2247                         if (has_ext_instr_set) {
2248                                 M_LADD(s2, s1, REG_ITMP1);
2249                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2250                                 M_SST (s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2251                                 }
2252                         else {
2253                                 M_LADD (s2, s1, REG_ITMP1);
2254                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2255                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2256                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2257                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
2258                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2259                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2260                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2261                                 }
2262                         break;
2263
2264                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
2265
2266                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2267                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2268                         if (iptr->op1 == 0) {
2269                                 gen_nullptr_check(s1);
2270                                 gen_bound_check;
2271                                 }
2272                         var_to_reg_int(s3, src, REG_ITMP3);
2273                         if (has_ext_instr_set) {
2274                                 M_LADD(s2, s1, REG_ITMP1);
2275                                 M_BST (s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2276                                 }
2277                         else {
2278                                 M_LADD (s2, s1, REG_ITMP1);
2279                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2280                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2281                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
2282                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2283                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2284                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2285                                 }
2286                         break;
2287
2288
2289                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2290                                       /* op1 = type, val.a = field address            */
2291
2292                         /* if class isn't yet initialized, do it */
2293                         if (!((fieldinfo *) iptr->val.a)->class->initialized) {
2294                                 /* call helper function which patches this code */
2295                                 a = dseg_addaddress(((fieldinfo *) iptr->val.a)->class);
2296                                 M_ALD(REG_ITMP1, REG_PV, a);
2297                                 a = dseg_addaddress(asm_check_clinit);
2298                                 M_ALD(REG_PV, REG_PV, a);
2299                                 M_JSR(REG_RA, REG_PV);
2300
2301                                 /* recompute pv */
2302                                 s1 = (int) ((u1*) mcodeptr - mcodebase);
2303                                 if (s1 <= 32768) {
2304                                         M_LDA(REG_PV, REG_RA, -s1);
2305                                         M_NOP;
2306
2307                                 } else {
2308                                         s4 ml = -s1, mh = 0;
2309                                         while (ml < -32768) { ml += 65536; mh--; }
2310                                         M_LDA(REG_PV, REG_RA, ml);
2311                                         M_LDAH(REG_PV, REG_PV, mh);
2312                                 }
2313                         }
2314
2315                         a = dseg_addaddress(&(((fieldinfo *)(iptr->val.a))->value));
2316                         M_ALD(REG_ITMP1, REG_PV, a);
2317                         switch (iptr->op1) {
2318                                 case TYPE_INT:
2319                                         var_to_reg_int(s2, src, REG_ITMP2);
2320                                         M_IST(s2, REG_ITMP1, 0);
2321                                         break;
2322                                 case TYPE_LNG:
2323                                         var_to_reg_int(s2, src, REG_ITMP2);
2324                                         M_LST(s2, REG_ITMP1, 0);
2325                                         break;
2326                                 case TYPE_ADR:
2327                                         var_to_reg_int(s2, src, REG_ITMP2);
2328                                         M_AST(s2, REG_ITMP1, 0);
2329                                         break;
2330                                 case TYPE_FLT:
2331                                         var_to_reg_flt(s2, src, REG_FTMP2);
2332                                         M_FST(s2, REG_ITMP1, 0);
2333                                         break;
2334                                 case TYPE_DBL:
2335                                         var_to_reg_flt(s2, src, REG_FTMP2);
2336                                         M_DST(s2, REG_ITMP1, 0);
2337                                         break;
2338                                 default: panic ("internal error");
2339                                 }
2340                         break;
2341
2342                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2343                                       /* op1 = type, val.a = field address            */
2344
2345                         /* if class isn't yet initialized, do it */
2346                         if (!((fieldinfo *) iptr->val.a)->class->initialized) {
2347                                 /* call helper function which patches this code */
2348                                 a = dseg_addaddress(((fieldinfo *) iptr->val.a)->class);
2349                                 M_ALD(REG_ITMP1, REG_PV, a);
2350                                 a = dseg_addaddress(asm_check_clinit);
2351                                 M_ALD(REG_PV, REG_PV, a);
2352                                 M_JSR(REG_RA, REG_PV);
2353
2354                                 /* recompute pv */
2355                                 s1 = (int) ((u1*) mcodeptr - mcodebase);
2356                                 if (s1 <= 32768) {
2357                                         M_LDA(REG_PV, REG_RA, -s1);
2358                                         M_NOP;
2359
2360                                 } else {
2361                                         s4 ml = -s1, mh = 0;
2362                                         while (ml < -32768) { ml += 65536; mh--; }
2363                                         M_LDA(REG_PV, REG_RA, ml);
2364                                         M_LDAH(REG_PV, REG_PV, mh);
2365                                 }
2366                         }
2367
2368                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2369                         M_ALD(REG_ITMP1, REG_PV, a);
2370                         switch (iptr->op1) {
2371                                 case TYPE_INT:
2372                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2373                                         M_ILD(d, REG_ITMP1, 0);
2374                                         store_reg_to_var_int(iptr->dst, d);
2375                                         break;
2376                                 case TYPE_LNG:
2377                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2378                                         M_LLD(d, REG_ITMP1, 0);
2379                                         store_reg_to_var_int(iptr->dst, d);
2380                                         break;
2381                                 case TYPE_ADR:
2382                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2383                                         M_ALD(d, REG_ITMP1, 0);
2384                                         store_reg_to_var_int(iptr->dst, d);
2385                                         break;
2386                                 case TYPE_FLT:
2387                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2388                                         M_FLD(d, REG_ITMP1, 0);
2389                                         store_reg_to_var_flt(iptr->dst, d);
2390                                         break;
2391                                 case TYPE_DBL:
2392                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2393                                         M_DLD(d, REG_ITMP1, 0);
2394                                         store_reg_to_var_flt(iptr->dst, d);
2395                                         break;
2396                                 default: panic ("internal error");
2397                                 }
2398                         break;
2399
2400
2401                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2402                                       /* op1 = type, val.i = field offset             */
2403
2404                         a = ((fieldinfo *)(iptr->val.a))->offset;
2405                         switch (iptr->op1) {
2406                                 case TYPE_INT:
2407                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2408                                         var_to_reg_int(s2, src, REG_ITMP2);
2409                                         gen_nullptr_check(s1);
2410                                         M_IST(s2, s1, a);
2411                                         break;
2412                                 case TYPE_LNG:
2413                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2414                                         var_to_reg_int(s2, src, REG_ITMP2);
2415                                         gen_nullptr_check(s1);
2416                                         M_LST(s2, s1, a);
2417                                         break;
2418                                 case TYPE_ADR:
2419                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2420                                         var_to_reg_int(s2, src, REG_ITMP2);
2421                                         gen_nullptr_check(s1);
2422                                         M_AST(s2, s1, a);
2423                                         break;
2424                                 case TYPE_FLT:
2425                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2426                                         var_to_reg_flt(s2, src, REG_FTMP2);
2427                                         gen_nullptr_check(s1);
2428                                         M_FST(s2, s1, a);
2429                                         break;
2430                                 case TYPE_DBL:
2431                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2432                                         var_to_reg_flt(s2, src, REG_FTMP2);
2433                                         gen_nullptr_check(s1);
2434                                         M_DST(s2, s1, a);
2435                                         break;
2436                                 default: panic ("internal error");
2437                                 }
2438                         break;
2439
2440                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2441                                       /* op1 = type, val.i = field offset             */
2442
2443                         a = ((fieldinfo *)(iptr->val.a))->offset;
2444                         switch (iptr->op1) {
2445                                 case TYPE_INT:
2446                                         var_to_reg_int(s1, src, REG_ITMP1);
2447                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2448                                         gen_nullptr_check(s1);
2449                                         M_ILD(d, s1, a);
2450                                         store_reg_to_var_int(iptr->dst, d);
2451                                         break;
2452                                 case TYPE_LNG:
2453                                         var_to_reg_int(s1, src, REG_ITMP1);
2454                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2455                                         gen_nullptr_check(s1);
2456                                         M_LLD(d, s1, a);
2457                                         store_reg_to_var_int(iptr->dst, d);
2458                                         break;
2459                                 case TYPE_ADR:
2460                                         var_to_reg_int(s1, src, REG_ITMP1);
2461                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2462                                         gen_nullptr_check(s1);
2463                                         M_ALD(d, s1, a);
2464                                         store_reg_to_var_int(iptr->dst, d);
2465                                         break;
2466                                 case TYPE_FLT:
2467                                         var_to_reg_int(s1, src, REG_ITMP1);
2468                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2469                                         gen_nullptr_check(s1);
2470                                         M_FLD(d, s1, a);
2471                                         store_reg_to_var_flt(iptr->dst, d);
2472                                         break;
2473                                 case TYPE_DBL:
2474                                         var_to_reg_int(s1, src, REG_ITMP1);
2475                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2476                                         gen_nullptr_check(s1);
2477                                         M_DLD(d, s1, a);
2478                                         store_reg_to_var_flt(iptr->dst, d);
2479                                         break;
2480                                 default: panic ("internal error");
2481                                 }
2482                         break;
2483
2484
2485                 /* branch operations **************************************************/
2486
2487 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2488
2489                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2490
2491                         var_to_reg_int(s1, src, REG_ITMP1);
2492                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2493                         a = dseg_addaddress(asm_handle_exception);
2494                         M_ALD(REG_ITMP2, REG_PV, a);
2495                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2496                         M_NOP;              /* nop ensures that XPC is less than the end */
2497                                             /* of basic block                            */
2498                         ALIGNCODENOP;
2499                         break;
2500
2501                 case ICMD_GOTO:         /* ... ==> ...                                */
2502                                         /* op1 = target JavaVM pc                     */
2503                         M_BR(0);
2504                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2505                         ALIGNCODENOP;
2506                         break;
2507
2508                 case ICMD_JSR:          /* ... ==> ...                                */
2509                                         /* op1 = target JavaVM pc                     */
2510
2511                         M_BSR(REG_ITMP1, 0);
2512                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2513                         break;
2514
2515                 case ICMD_RET:          /* ... ==> ...                                */
2516                                         /* op1 = local variable                       */
2517
2518                         var = &(locals[iptr->op1][TYPE_ADR]);
2519                         if (var->flags & INMEMORY) {
2520                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2521                                 M_RET(REG_ZERO, REG_ITMP1);
2522                                 }
2523                         else
2524                                 M_RET(REG_ZERO, var->regoff);
2525                         ALIGNCODENOP;
2526                         break;
2527
2528                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2529                                         /* op1 = target JavaVM pc                     */
2530
2531                         var_to_reg_int(s1, src, REG_ITMP1);
2532                         M_BEQZ(s1, 0);
2533                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2534                         break;
2535
2536                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2537                                         /* op1 = target JavaVM pc                     */
2538
2539                         var_to_reg_int(s1, src, REG_ITMP1);
2540                         M_BNEZ(s1, 0);
2541                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2542                         break;
2543
2544                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2545                                         /* op1 = target JavaVM pc, val.i = constant   */
2546
2547                         var_to_reg_int(s1, src, REG_ITMP1);
2548                         if (iptr->val.i == 0) {
2549                                 M_BEQZ(s1, 0);
2550                                 }
2551                         else {
2552                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2553                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2554                                         }
2555                                 else {
2556                                         ICONST(REG_ITMP2, iptr->val.i);
2557                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2558                                         }
2559                                 M_BNEZ(REG_ITMP1, 0);
2560                                 }
2561                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2562                         break;
2563
2564                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2565                                         /* op1 = target JavaVM pc, val.i = constant   */
2566
2567                         var_to_reg_int(s1, src, REG_ITMP1);
2568                         if (iptr->val.i == 0) {
2569                                 M_BLTZ(s1, 0);
2570                                 }
2571                         else {
2572                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2573                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2574                                         }
2575                                 else {
2576                                         ICONST(REG_ITMP2, iptr->val.i);
2577                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2578                                         }
2579                                 M_BNEZ(REG_ITMP1, 0);
2580                                 }
2581                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2582                         break;
2583
2584                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2585                                         /* op1 = target JavaVM pc, val.i = constant   */
2586
2587                         var_to_reg_int(s1, src, REG_ITMP1);
2588                         if (iptr->val.i == 0) {
2589                                 M_BLEZ(s1, 0);
2590                                 }
2591                         else {
2592                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2593                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2594                                         }
2595                                 else {
2596                                         ICONST(REG_ITMP2, iptr->val.i);
2597                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2598                                         }
2599                                 M_BNEZ(REG_ITMP1, 0);
2600                                 }
2601                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2602                         break;
2603
2604                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2605                                         /* op1 = target JavaVM pc, val.i = constant   */
2606
2607                         var_to_reg_int(s1, src, REG_ITMP1);
2608                         if (iptr->val.i == 0) {
2609                                 M_BNEZ(s1, 0);
2610                                 }
2611                         else {
2612                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2613                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2614                                         }
2615                                 else {
2616                                         ICONST(REG_ITMP2, iptr->val.i);
2617                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2618                                         }
2619                                 M_BEQZ(REG_ITMP1, 0);
2620                                 }
2621                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2622                         break;
2623
2624                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2625                                         /* op1 = target JavaVM pc, val.i = constant   */
2626
2627                         var_to_reg_int(s1, src, REG_ITMP1);
2628                         if (iptr->val.i == 0) {
2629                                 M_BGTZ(s1, 0);
2630                                 }
2631                         else {
2632                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2633                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2634                                         }
2635                                 else {
2636                                         ICONST(REG_ITMP2, iptr->val.i);
2637                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2638                                         }
2639                                 M_BEQZ(REG_ITMP1, 0);
2640                                 }
2641                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2642                         break;
2643
2644                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2645                                         /* op1 = target JavaVM pc, val.i = constant   */
2646
2647                         var_to_reg_int(s1, src, REG_ITMP1);
2648                         if (iptr->val.i == 0) {
2649                                 M_BGEZ(s1, 0);
2650                                 }
2651                         else {
2652                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2653                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2654                                         }
2655                                 else {
2656                                         ICONST(REG_ITMP2, iptr->val.i);
2657                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2658                                         }
2659                                 M_BEQZ(REG_ITMP1, 0);
2660                                 }
2661                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2662                         break;
2663
2664                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2665                                         /* op1 = target JavaVM pc, val.l = constant   */
2666
2667                         var_to_reg_int(s1, src, REG_ITMP1);
2668                         if (iptr->val.l == 0) {
2669                                 M_BEQZ(s1, 0);
2670                                 }
2671                         else {
2672                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2673                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2674                                         }
2675                                 else {
2676                                         LCONST(REG_ITMP2, iptr->val.l);
2677                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2678                                         }
2679                                 M_BNEZ(REG_ITMP1, 0);
2680                                 }
2681                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2682                         break;
2683
2684                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2685                                         /* op1 = target JavaVM pc, val.l = constant   */
2686
2687                         var_to_reg_int(s1, src, REG_ITMP1);
2688                         if (iptr->val.l == 0) {
2689                                 M_BLTZ(s1, 0);
2690                                 }
2691                         else {
2692                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2693                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2694                                         }
2695                                 else {
2696                                         LCONST(REG_ITMP2, iptr->val.l);
2697                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2698                                         }
2699                                 M_BNEZ(REG_ITMP1, 0);
2700                                 }
2701                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2702                         break;
2703
2704                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2705                                         /* op1 = target JavaVM pc, val.l = constant   */
2706
2707                         var_to_reg_int(s1, src, REG_ITMP1);
2708                         if (iptr->val.l == 0) {
2709                                 M_BLEZ(s1, 0);
2710                                 }
2711                         else {
2712                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2713                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2714                                         }
2715                                 else {
2716                                         LCONST(REG_ITMP2, iptr->val.l);
2717                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2718                                         }
2719                                 M_BNEZ(REG_ITMP1, 0);
2720                                 }
2721                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2722                         break;
2723
2724                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2725                                         /* op1 = target JavaVM pc, val.l = constant   */
2726
2727                         var_to_reg_int(s1, src, REG_ITMP1);
2728                         if (iptr->val.l == 0) {
2729                                 M_BNEZ(s1, 0);
2730                                 }
2731                         else {
2732                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2733                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2734                                         }
2735                                 else {
2736                                         LCONST(REG_ITMP2, iptr->val.l);
2737                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2738                                         }
2739                                 M_BEQZ(REG_ITMP1, 0);
2740                                 }
2741                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2742                         break;
2743
2744                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2745                                         /* op1 = target JavaVM pc, val.l = constant   */
2746
2747                         var_to_reg_int(s1, src, REG_ITMP1);
2748                         if (iptr->val.l == 0) {
2749                                 M_BGTZ(s1, 0);
2750                                 }
2751                         else {
2752                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2753                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2754                                         }
2755                                 else {
2756                                         LCONST(REG_ITMP2, iptr->val.l);
2757                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2758                                         }
2759                                 M_BEQZ(REG_ITMP1, 0);
2760                                 }
2761                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2762                         break;
2763
2764                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2765                                         /* op1 = target JavaVM pc, val.l = constant   */
2766
2767                         var_to_reg_int(s1, src, REG_ITMP1);
2768                         if (iptr->val.l == 0) {
2769                                 M_BGEZ(s1, 0);
2770                                 }
2771                         else {
2772                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2773                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2774                                         }
2775                                 else {
2776                                         LCONST(REG_ITMP2, iptr->val.l);
2777                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2778                                         }
2779                                 M_BEQZ(REG_ITMP1, 0);
2780                                 }
2781                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2782                         break;
2783
2784                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2785                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2786                 case ICMD_IF_ACMPEQ:
2787
2788                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2789                         var_to_reg_int(s2, src, REG_ITMP2);
2790                         M_CMPEQ(s1, s2, REG_ITMP1);
2791                         M_BNEZ(REG_ITMP1, 0);
2792                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2793                         break;
2794
2795                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2796                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2797                 case ICMD_IF_ACMPNE:
2798
2799                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2800                         var_to_reg_int(s2, src, REG_ITMP2);
2801                         M_CMPEQ(s1, s2, REG_ITMP1);
2802                         M_BEQZ(REG_ITMP1, 0);
2803                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2804                         break;
2805
2806                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2807                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2808
2809                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2810                         var_to_reg_int(s2, src, REG_ITMP2);
2811                         M_CMPLT(s1, s2, REG_ITMP1);
2812                         M_BNEZ(REG_ITMP1, 0);
2813                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2814                         break;
2815
2816                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2817                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2818
2819                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2820                         var_to_reg_int(s2, src, REG_ITMP2);
2821                         M_CMPLE(s1, s2, REG_ITMP1);
2822                         M_BEQZ(REG_ITMP1, 0);
2823                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2824                         break;
2825
2826                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2827                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2828
2829                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2830                         var_to_reg_int(s2, src, REG_ITMP2);
2831                         M_CMPLE(s1, s2, REG_ITMP1);
2832                         M_BNEZ(REG_ITMP1, 0);
2833                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2834                         break;
2835
2836                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2837                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2838
2839                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2840                         var_to_reg_int(s2, src, REG_ITMP2);
2841                         M_CMPLT(s1, s2, REG_ITMP1);
2842                         M_BEQZ(REG_ITMP1, 0);
2843                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2844                         break;
2845
2846                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2847
2848                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2849                         break;
2850
2851                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2852                                         /* val.i = constant                           */
2853
2854                         var_to_reg_int(s1, src, REG_ITMP1);
2855                         d = reg_of_var(iptr->dst, REG_ITMP3);
2856                         s3 = iptr->val.i;
2857                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2858                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2859                                         M_CMPEQ(s1, REG_ZERO, d);
2860                                         store_reg_to_var_int(iptr->dst, d);
2861                                         break;
2862                                         }
2863                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2864                                         M_CMPEQ(s1, REG_ZERO, d);
2865                                         M_XOR_IMM(d, 1, d);
2866                                         store_reg_to_var_int(iptr->dst, d);
2867                                         break;
2868                                         }
2869                                 if (s1 == d) {
2870                                         M_MOV(s1, REG_ITMP1);
2871                                         s1 = REG_ITMP1;
2872                                         }
2873                                 ICONST(d, iptr[1].val.i);
2874                                 }
2875                         if ((s3 >= 0) && (s3 <= 255)) {
2876                                 M_CMOVEQ_IMM(s1, s3, d);
2877                                 }
2878                         else {
2879                                 ICONST(REG_ITMP2, s3);
2880                                 M_CMOVEQ(s1, REG_ITMP2, d);
2881                                 }
2882                         store_reg_to_var_int(iptr->dst, d);
2883                         break;
2884
2885                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2886                                         /* val.i = constant                           */
2887
2888                         var_to_reg_int(s1, src, REG_ITMP1);
2889                         d = reg_of_var(iptr->dst, REG_ITMP3);
2890                         s3 = iptr->val.i;
2891                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2892                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2893                                         M_CMPEQ(s1, REG_ZERO, d);
2894                                         store_reg_to_var_int(iptr->dst, d);
2895                                         break;
2896                                         }
2897                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2898                                         M_CMPEQ(s1, REG_ZERO, d);
2899                                         M_XOR_IMM(d, 1, d);
2900                                         store_reg_to_var_int(iptr->dst, d);
2901                                         break;
2902                                         }
2903                                 if (s1 == d) {
2904                                         M_MOV(s1, REG_ITMP1);
2905                                         s1 = REG_ITMP1;
2906                                         }
2907                                 ICONST(d, iptr[1].val.i);
2908                                 }
2909                         if ((s3 >= 0) && (s3 <= 255)) {
2910                                 M_CMOVNE_IMM(s1, s3, d);
2911                                 }
2912                         else {
2913                                 ICONST(REG_ITMP2, s3);
2914                                 M_CMOVNE(s1, REG_ITMP2, d);
2915                                 }
2916                         store_reg_to_var_int(iptr->dst, d);
2917                         break;
2918
2919                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2920                                         /* val.i = constant                           */
2921
2922                         var_to_reg_int(s1, src, REG_ITMP1);
2923                         d = reg_of_var(iptr->dst, REG_ITMP3);
2924                         s3 = iptr->val.i;
2925                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2926                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2927                                         M_CMPLT(s1, REG_ZERO, d);
2928                                         store_reg_to_var_int(iptr->dst, d);
2929                                         break;
2930                                         }
2931                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2932                                         M_CMPLE(REG_ZERO, s1, d);
2933                                         store_reg_to_var_int(iptr->dst, d);
2934                                         break;
2935                                         }
2936                                 if (s1 == d) {
2937                                         M_MOV(s1, REG_ITMP1);
2938                                         s1 = REG_ITMP1;
2939                                         }
2940                                 ICONST(d, iptr[1].val.i);
2941                                 }
2942                         if ((s3 >= 0) && (s3 <= 255)) {
2943                                 M_CMOVLT_IMM(s1, s3, d);
2944                                 }
2945                         else {
2946                                 ICONST(REG_ITMP2, s3);
2947                                 M_CMOVLT(s1, REG_ITMP2, d);
2948                                 }
2949                         store_reg_to_var_int(iptr->dst, d);
2950                         break;
2951
2952                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2953                                         /* val.i = constant                           */
2954
2955                         var_to_reg_int(s1, src, REG_ITMP1);
2956                         d = reg_of_var(iptr->dst, REG_ITMP3);
2957                         s3 = iptr->val.i;
2958                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2959                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2960                                         M_CMPLE(REG_ZERO, s1, d);
2961                                         store_reg_to_var_int(iptr->dst, d);
2962                                         break;
2963                                         }
2964                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2965                                         M_CMPLT(s1, REG_ZERO, d);
2966                                         store_reg_to_var_int(iptr->dst, d);
2967                                         break;
2968                                         }
2969                                 if (s1 == d) {
2970                                         M_MOV(s1, REG_ITMP1);
2971                                         s1 = REG_ITMP1;
2972                                         }
2973                                 ICONST(d, iptr[1].val.i);
2974                                 }
2975                         if ((s3 >= 0) && (s3 <= 255)) {
2976                                 M_CMOVGE_IMM(s1, s3, d);
2977                                 }
2978                         else {
2979                                 ICONST(REG_ITMP2, s3);
2980                                 M_CMOVGE(s1, REG_ITMP2, d);
2981                                 }
2982                         store_reg_to_var_int(iptr->dst, d);
2983                         break;
2984
2985                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2986                                         /* val.i = constant                           */
2987
2988                         var_to_reg_int(s1, src, REG_ITMP1);
2989                         d = reg_of_var(iptr->dst, REG_ITMP3);
2990                         s3 = iptr->val.i;
2991                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2992                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2993                                         M_CMPLT(REG_ZERO, s1, d);
2994                                         store_reg_to_var_int(iptr->dst, d);
2995                                         break;
2996                                         }
2997                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2998                                         M_CMPLE(s1, REG_ZERO, d);
2999                                         store_reg_to_var_int(iptr->dst, d);
3000                                         break;
3001                                         }
3002                                 if (s1 == d) {
3003                                         M_MOV(s1, REG_ITMP1);
3004                                         s1 = REG_ITMP1;
3005                                         }
3006                                 ICONST(d, iptr[1].val.i);
3007                                 }
3008                         if ((s3 >= 0) && (s3 <= 255)) {
3009                                 M_CMOVGT_IMM(s1, s3, d);
3010                                 }
3011                         else {
3012                                 ICONST(REG_ITMP2, s3);
3013                                 M_CMOVGT(s1, REG_ITMP2, d);
3014                                 }
3015                         store_reg_to_var_int(iptr->dst, d);
3016                         break;
3017
3018                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
3019                                         /* val.i = constant                           */
3020
3021                         var_to_reg_int(s1, src, REG_ITMP1);
3022                         d = reg_of_var(iptr->dst, REG_ITMP3);
3023                         s3 = iptr->val.i;
3024                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
3025                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
3026                                         M_CMPLE(s1, REG_ZERO, d);
3027                                         store_reg_to_var_int(iptr->dst, d);
3028                                         break;
3029                                         }
3030                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
3031                                         M_CMPLT(REG_ZERO, s1, d);
3032                                         store_reg_to_var_int(iptr->dst, d);
3033                                         break;
3034                                         }
3035                                 if (s1 == d) {
3036                                         M_MOV(s1, REG_ITMP1);
3037                                         s1 = REG_ITMP1;
3038                                         }
3039                                 ICONST(d, iptr[1].val.i);
3040                                 }
3041                         if ((s3 >= 0) && (s3 <= 255)) {
3042                                 M_CMOVLE_IMM(s1, s3, d);
3043                                 }
3044                         else {
3045                                 ICONST(REG_ITMP2, s3);
3046                                 M_CMOVLE(s1, REG_ITMP2, d);
3047                                 }
3048                         store_reg_to_var_int(iptr->dst, d);
3049                         break;
3050
3051
3052                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
3053                 case ICMD_LRETURN:
3054                 case ICMD_ARETURN:
3055
3056                         var_to_reg_int(s1, src, REG_RESULT);
3057                         M_INTMOVE(s1, REG_RESULT);
3058
3059 #ifdef USE_THREADS
3060                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
3061                                 int disp;
3062                                 a = dseg_addaddress((void *) (builtin_monitorexit));
3063                                 M_ALD(REG_PV, REG_PV, a);
3064                                 M_ALD(argintregs[0], REG_SP, maxmemuse * 8);
3065                                 M_LST(REG_RESULT, REG_SP, maxmemuse * 8);
3066                                 M_JSR(REG_RA, REG_PV);
3067                                 disp = -(int) ((u1 *) mcodeptr - mcodebase);
3068                                 M_LDA(REG_PV, REG_RA, disp);
3069                                 M_LLD(REG_RESULT, REG_SP, maxmemuse * 8);
3070                         }
3071 #endif
3072
3073                         goto nowperformreturn;
3074
3075                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
3076                 case ICMD_DRETURN:
3077
3078                         var_to_reg_flt(s1, src, REG_FRESULT);
3079                         M_FLTMOVE(s1, REG_FRESULT);
3080
3081 #ifdef USE_THREADS
3082                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
3083                                 int disp;
3084                                 a = dseg_addaddress((void *) (builtin_monitorexit));
3085                                 M_ALD(REG_PV, REG_PV, a);
3086                                 M_ALD(argintregs[0], REG_SP, maxmemuse * 8);
3087                                 M_DST(REG_FRESULT, REG_SP, maxmemuse * 8);
3088                                 M_JSR(REG_RA, REG_PV);
3089                                 disp = -(int) ((u1 *) mcodeptr - mcodebase);
3090                                 M_LDA(REG_PV, REG_RA, disp);
3091                                 M_DLD(REG_FRESULT, REG_SP, maxmemuse * 8);
3092                         }
3093 #endif
3094
3095                         goto nowperformreturn;
3096
3097                 case ICMD_RETURN:      /* ...  ==> ...                                */
3098
3099 #ifdef USE_THREADS
3100                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
3101                                 int disp;
3102                                 a = dseg_addaddress((void *) (builtin_monitorexit));
3103                                 M_ALD(REG_PV, REG_PV, a);
3104                                 M_ALD(argintregs[0], REG_SP, maxmemuse * 8);
3105                                 M_JSR(REG_RA, REG_PV);
3106                                 disp = -(int) ((u1 *) mcodeptr - mcodebase);
3107                                 M_LDA(REG_PV, REG_RA, disp);
3108                         }
3109 #endif
3110
3111 nowperformreturn:
3112                         {
3113                         int r, p;
3114
3115                         p = parentargs_base;
3116
3117                         /* restore return address                                         */
3118
3119                         if (!isleafmethod)
3120                                 {p--;  M_LLD (REG_RA, REG_SP, 8 * p);}
3121
3122                         /* restore saved registers                                        */
3123
3124                         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
3125                                         {p--; M_LLD(savintregs[r], REG_SP, 8 * p);}
3126                         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
3127                                         {p--; M_DLD(savfltregs[r], REG_SP, 8 * p);}
3128
3129                         /* deallocate stack                                               */
3130
3131                         if (parentargs_base)
3132                                 {M_LDA(REG_SP, REG_SP, parentargs_base*8);}
3133
3134                         /* call trace function */
3135
3136                         if (runverbose) {
3137                                 M_LDA(REG_SP, REG_SP, -3 * 8);
3138                                 M_AST(REG_RA, REG_SP, 0 * 8);
3139                                 M_LST(REG_RESULT, REG_SP, 1 * 8);
3140                                 M_DST(REG_FRESULT, REG_SP, 2 * 8);
3141                                 a = dseg_addaddress(method);
3142                                 M_ALD(argintregs[0], REG_PV, a);
3143                                 M_MOV(REG_RESULT, argintregs[1]);
3144                                 M_FLTMOVE(REG_FRESULT, argfltregs[2]);
3145                                 M_FLTMOVE(REG_FRESULT, argfltregs[3]);
3146                                 a = dseg_addaddress((void *) builtin_displaymethodstop);
3147                                 M_ALD(REG_PV, REG_PV, a);
3148                                 M_JSR(REG_RA, REG_PV);
3149                                 s1 = (int) ((u1 *) mcodeptr - mcodebase);
3150                                 if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3151                                 else {
3152                                         s4 ml = -s1, mh = 0;
3153                                         while (ml < -32768) { ml += 65536; mh--; }
3154                                         M_LDA(REG_PV, REG_RA, ml);
3155                                         M_LDAH(REG_PV, REG_PV, mh);
3156                                 }
3157                                 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
3158                                 M_LLD(REG_RESULT, REG_SP, 1 * 8);
3159                                 M_ALD(REG_RA, REG_SP, 0 * 8);
3160                                 M_LDA(REG_SP, REG_SP, 3 * 8);
3161                         }
3162
3163                         M_RET(REG_ZERO, REG_RA);
3164                         ALIGNCODENOP;
3165                         }
3166                         break;
3167
3168
3169                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
3170                         {
3171                         s4 i, l, *s4ptr;
3172                         void **tptr;
3173
3174                         tptr = (void **) iptr->target;
3175
3176                         s4ptr = iptr->val.a;
3177                         l = s4ptr[1];                          /* low     */
3178                         i = s4ptr[2];                          /* high    */
3179
3180                         var_to_reg_int(s1, src, REG_ITMP1);
3181                         if (l == 0)
3182                                 {M_INTMOVE(s1, REG_ITMP1);}
3183                         else if (l <= 32768) {
3184                                 M_LDA(REG_ITMP1, s1, -l);
3185                                 }
3186                         else {
3187                                 ICONST(REG_ITMP2, l);
3188                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3189                                 }
3190                         i = i - l + 1;
3191
3192                         /* range check */
3193
3194                         if (i <= 256)
3195                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3196                         else {
3197                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3198                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3199                                 }
3200                         M_BEQZ(REG_ITMP2, 0);
3201
3202
3203                         /* codegen_addreference(BlockPtrOfPC(s4ptr[0]), mcodeptr); */
3204                         codegen_addreference((basicblock *) tptr[0], mcodeptr);
3205
3206                         /* build jump table top down and use address of lowest entry */
3207
3208                         /* s4ptr += 3 + i; */
3209                         tptr += i;
3210
3211                         while (--i >= 0) {
3212                                 /* dseg_addtarget(BlockPtrOfPC(*--s4ptr)); */
3213                                 dseg_addtarget((basicblock *) tptr[0]);
3214                                 --tptr;
3215                                 }
3216                         }
3217
3218                         /* length of dataseg after last dseg_addtarget is used by load */
3219
3220                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3221                         M_ALD(REG_ITMP2, REG_ITMP2, -dseglen);
3222                         M_JMP(REG_ZERO, REG_ITMP2);
3223                         ALIGNCODENOP;
3224                         break;
3225
3226
3227                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3228                         {
3229                         s4 i, l, val, *s4ptr;
3230                         void **tptr;
3231
3232                         tptr = (void **) iptr->target;
3233
3234                         s4ptr = iptr->val.a;
3235                         l = s4ptr[0];                          /* default  */
3236                         i = s4ptr[1];                          /* count    */
3237
3238                         MCODECHECK((i<<2)+8);
3239                         var_to_reg_int(s1, src, REG_ITMP1);
3240                         while (--i >= 0) {
3241                                 s4ptr += 2;
3242                                 ++tptr;
3243
3244                                 val = s4ptr[0];
3245                                 if ((val >= 0) && (val <= 255)) {
3246                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
3247                                         }
3248                                 else {
3249                                         if ((val >= -32768) && (val <= 32767)) {
3250                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
3251                                                 }
3252                                         else {
3253                                                 a = dseg_adds4 (val);
3254                                                 M_ILD(REG_ITMP2, REG_PV, a);
3255                                                 }
3256                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3257                                         }
3258                                 M_BNEZ(REG_ITMP2, 0);
3259                                 /* codegen_addreference(BlockPtrOfPC(s4ptr[1]), mcodeptr); */
3260                                 codegen_addreference((basicblock *) tptr[0], mcodeptr);
3261                                 }
3262
3263                         M_BR(0);
3264                         /* codegen_addreference(BlockPtrOfPC(l), mcodeptr); */
3265
3266                         tptr = (void **) iptr->target;
3267                         codegen_addreference((basicblock *) tptr[0], mcodeptr);
3268
3269                         ALIGNCODENOP;
3270                         break;
3271                         }
3272
3273
3274                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
3275                                         /* op1 = return type, val.a = function pointer*/
3276                         s3 = 3;
3277                         goto gen_method;
3278
3279                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
3280                                         /* op1 = return type, val.a = function pointer*/
3281                         s3 = 2;
3282                         goto gen_method;
3283
3284                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
3285                                         /* op1 = return type, val.a = function pointer*/
3286                         s3 = 1;
3287                         goto gen_method;
3288
3289                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3290                                         /* op1 = arg count, val.a = method pointer    */
3291
3292                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3293                                         /* op1 = arg count, val.a = method pointer    */
3294
3295                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3296                                         /* op1 = arg count, val.a = method pointer    */
3297
3298                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
3299                                         /* op1 = arg count, val.a = method pointer    */
3300
3301                         s3 = iptr->op1;
3302
3303 gen_method: {
3304                         methodinfo   *m;
3305                         classinfo    *ci;
3306
3307                         MCODECHECK((s3 << 1) + 64);
3308
3309                         /* copy arguments to registers or stack location                  */
3310
3311                         for (; --s3 >= 0; src = src->prev) {
3312                                 if (src->varkind == ARGVAR)
3313                                         continue;
3314                                 if (IS_INT_LNG_TYPE(src->type)) {
3315                                         if (s3 < INT_ARG_CNT) {
3316                                                 s1 = argintregs[s3];
3317                                                 var_to_reg_int(d, src, s1);
3318                                                 M_INTMOVE(d, s1);
3319                                                 }
3320                                         else  {
3321                                                 var_to_reg_int(d, src, REG_ITMP1);
3322                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
3323                                                 }
3324                                         }
3325                                 else
3326                                         if (s3 < FLT_ARG_CNT) {
3327                                                 s1 = argfltregs[s3];
3328                                                 var_to_reg_flt(d, src, s1);
3329                                                 M_FLTMOVE(d, s1);
3330                                                 }
3331                                         else {
3332                                                 var_to_reg_flt(d, src, REG_FTMP1);
3333                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
3334                                                 }
3335                                 } /* end of for */
3336
3337                         m = iptr->val.a;
3338                         switch (iptr->opc) {
3339                                 case ICMD_BUILTIN3:
3340                                 case ICMD_BUILTIN2:
3341                                 case ICMD_BUILTIN1:
3342                                         a = dseg_addaddress ((void*) (m));
3343
3344                                         M_ALD(REG_PV, REG_PV, a); /* Pointer to built-in-function */
3345                                         d = iptr->op1;
3346                                         goto makeactualcall;
3347
3348                                 case ICMD_INVOKESTATIC:
3349                                 case ICMD_INVOKESPECIAL:
3350                                         a = dseg_addaddress (m->stubroutine);
3351
3352                                         M_ALD(REG_PV, REG_PV, a );       /* method pointer in r27 */
3353
3354                                         d = m->returntype;
3355                                         goto makeactualcall;
3356
3357                                 case ICMD_INVOKEVIRTUAL:
3358
3359                                         gen_nullptr_check(argintregs[0]);
3360                                         M_ALD(REG_METHODPTR, argintregs[0],
3361                                                                  OFFSET(java_objectheader, vftbl));
3362                                         M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl, table[0]) +
3363                                                                 sizeof(methodptr) * m->vftblindex);
3364
3365                                         d = m->returntype;
3366                                         goto makeactualcall;
3367
3368                                 case ICMD_INVOKEINTERFACE:
3369                                         ci = m->class;
3370
3371                                         gen_nullptr_check(argintregs[0]);
3372                                         M_ALD(REG_METHODPTR, argintregs[0],
3373                                                                  OFFSET(java_objectheader, vftbl));
3374                                         M_ALD(REG_METHODPTR, REG_METHODPTR,
3375                                               OFFSET(vftbl, interfacetable[0]) -
3376                                               sizeof(methodptr*) * ci->index);
3377                                         M_ALD(REG_PV, REG_METHODPTR,
3378                                                             sizeof(methodptr) * (m - ci->methods));
3379
3380                                         d = m->returntype;
3381                                         goto makeactualcall;
3382
3383                                 default:
3384                                         d = 0;
3385                                         error ("Unkown ICMD-Command: %d", iptr->opc);
3386                                 }
3387
3388 makeactualcall:
3389
3390                         M_JSR (REG_RA, REG_PV);
3391
3392                         /* recompute pv */
3393
3394                         s1 = (int)((u1*) mcodeptr - mcodebase);
3395                         if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
3396                         else {
3397                                 s4 ml=-s1, mh=0;
3398                                 while (ml<-32768) { ml+=65536; mh--; }
3399                                 M_LDA (REG_PV, REG_RA, ml );
3400                                 M_LDAH (REG_PV, REG_PV, mh );
3401                                 }
3402
3403                         /* d contains return type */
3404
3405                         if (d != TYPE_VOID) {
3406                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3407                                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3408                                         M_INTMOVE(REG_RESULT, s1);
3409                                         store_reg_to_var_int(iptr->dst, s1);
3410                                         }
3411                                 else {
3412                                         s1 = reg_of_var(iptr->dst, REG_FRESULT);
3413                                         M_FLTMOVE(REG_FRESULT, s1);
3414                                         store_reg_to_var_flt(iptr->dst, s1);
3415                                         }
3416                                 }
3417                         }
3418                         break;
3419
3420
3421                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3422
3423                                       /* op1:   0 == array, 1 == class                */
3424                                       /* val.a: (classinfo*) superclass               */
3425
3426 /*          superclass is an interface:
3427  *
3428  *          return (sub != NULL) &&
3429  *                 (sub->vftbl->interfacetablelength > super->index) &&
3430  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
3431  *
3432  *          superclass is a class:
3433  *
3434  *          return ((sub != NULL) && (0
3435  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3436  *                  super->vftbl->diffvall));
3437  */
3438
3439                         {
3440                         classinfo *super = (classinfo*) iptr->val.a;
3441
3442 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3443                         codegen_threadcritrestart((u1*) mcodeptr - mcodebase);
3444 #endif
3445                         var_to_reg_int(s1, src, REG_ITMP1);
3446                         d = reg_of_var(iptr->dst, REG_ITMP3);
3447                         if (s1 == d) {
3448                                 M_MOV(s1, REG_ITMP1);
3449                                 s1 = REG_ITMP1;
3450                                 }
3451                         M_CLR(d);
3452                         if (iptr->op1) {                               /* class/interface */
3453                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3454                                         M_BEQZ(s1, 6);
3455                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3456                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3457                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3458                                         M_BLEZ(REG_ITMP2, 2);
3459                                         M_ALD(REG_ITMP1, REG_ITMP1,
3460                                               OFFSET(vftbl, interfacetable[0]) -
3461                                               super->index * sizeof(methodptr*));
3462                                         M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3463                                         }
3464                                 else {                                     /* class           */
3465 /*
3466                                         s2 = super->vftbl->diffval;
3467                                         M_BEQZ(s1, 4 + (s2 > 255));
3468                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3469                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3470                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3471                                         if (s2 <= 255)
3472                                                 M_CMPULE_IMM(REG_ITMP1, s2, d);
3473                                         else {
3474                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3475                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3476                                                 }
3477 */
3478                                         M_BEQZ(s1, 7);
3479                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3480                                         a = dseg_addaddress ((void*) super->vftbl);
3481                                         M_ALD(REG_ITMP2, REG_PV, a);
3482 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3483                                         codegen_threadcritstart((u1*) mcodeptr - mcodebase);
3484 #endif
3485                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3486                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3487                                         M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3488 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3489                                         codegen_threadcritstop((u1*) mcodeptr - mcodebase);
3490 #endif
3491                                         M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3492                                         M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3493                                         }
3494                                 }
3495                         else
3496                                 panic ("internal error: no inlined array instanceof");
3497                         }
3498                         store_reg_to_var_int(iptr->dst, d);
3499                         break;
3500
3501                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3502
3503                                       /* op1:   0 == array, 1 == class                */
3504                                       /* val.a: (classinfo*) superclass               */
3505
3506 /*          superclass is an interface:
3507  *
3508  *          OK if ((sub == NULL) ||
3509  *                 (sub->vftbl->interfacetablelength > super->index) &&
3510  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3511  *
3512  *          superclass is a class:
3513  *
3514  *          OK if ((sub == NULL) || (0
3515  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3516  *                 super->vftbl->diffvall));
3517  */
3518
3519                         {
3520                         classinfo *super = (classinfo*) iptr->val.a;
3521
3522 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3523                         codegen_threadcritrestart((u1*) mcodeptr - mcodebase);
3524 #endif
3525                         d = reg_of_var(iptr->dst, REG_ITMP3);
3526                         var_to_reg_int(s1, src, d);
3527                         if (iptr->op1) {                               /* class/interface */
3528                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3529                                         M_BEQZ(s1, 6);
3530                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3531                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3532                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3533                                         M_BLEZ(REG_ITMP2, 0);
3534                                         codegen_addxcastrefs(mcodeptr);
3535                                         M_ALD(REG_ITMP2, REG_ITMP1,
3536                                               OFFSET(vftbl, interfacetable[0]) -
3537                                               super->index * sizeof(methodptr*));
3538                                         M_BEQZ(REG_ITMP2, 0);
3539                                         codegen_addxcastrefs(mcodeptr);
3540                                         }
3541                                 else {                                     /* class           */
3542 /*
3543                                         s2 = super->vftbl->diffval;
3544                                         M_BEQZ(s1, 4 + (s2 != 0) + (s2 > 255));
3545                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3546                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3547                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3548                                         if (s2 == 0) {
3549                                                 M_BNEZ(REG_ITMP1, 0);
3550                                                 }
3551                                         else if (s2 <= 255) {
3552                                                 M_CMPULE_IMM(REG_ITMP1, s2, REG_ITMP2);
3553                                                 M_BEQZ(REG_ITMP2, 0);
3554                                                 }
3555                                         else {
3556                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3557                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3558                                                 M_BEQZ(REG_ITMP2, 0);
3559                                                 }
3560 */
3561                                         M_BEQZ(s1, 8 + (d == REG_ITMP3));
3562                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3563                                         a = dseg_addaddress ((void*) super->vftbl);
3564                                         M_ALD(REG_ITMP2, REG_PV, a);
3565 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3566                                         codegen_threadcritstart((u1*) mcodeptr - mcodebase);
3567 #endif
3568                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3569                                         if (d != REG_ITMP3) {
3570                                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3571                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3572 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3573                                                 codegen_threadcritstop((u1*) mcodeptr - mcodebase);
3574 #endif
3575                                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3576                                                 }
3577                                         else {
3578                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, baseval));
3579                                                 M_ISUB(REG_ITMP1, REG_ITMP2, REG_ITMP1);
3580                                                 M_ALD(REG_ITMP2, REG_PV, a);
3581                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3582 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3583                                                 codegen_threadcritstop((u1*) mcodeptr - mcodebase);
3584 #endif
3585                                                 }
3586                                         M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3587                                         M_BEQZ(REG_ITMP2, 0);
3588                                         codegen_addxcastrefs(mcodeptr);
3589                                         }
3590                                 }
3591                         else
3592                                 panic ("internal error: no inlined array checkcast");
3593                         }
3594                         M_INTMOVE(s1, d);
3595                         store_reg_to_var_int(iptr->dst, d);
3596                         break;
3597
3598                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3599
3600                         var_to_reg_int(s1, src, REG_ITMP1);
3601                         M_BLTZ(s1, 0);
3602                         codegen_addxcheckarefs(mcodeptr);
3603                         break;
3604
3605                 case ICMD_CHECKOOM:    /* ... ==> ...                                 */
3606
3607                         M_BEQZ(REG_RESULT, 0);
3608                         codegen_addxoomrefs(mcodeptr);
3609                         break;
3610
3611                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3612                                       /* op1 = dimension, val.a = array descriptor    */
3613
3614                         /* check for negative sizes and copy sizes to stack if necessary  */
3615
3616                         MCODECHECK((iptr->op1 << 1) + 64);
3617
3618                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3619                                 var_to_reg_int(s2, src, REG_ITMP1);
3620                                 M_BLTZ(s2, 0);
3621                                 codegen_addxcheckarefs(mcodeptr);
3622
3623                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3624
3625                                 if (src->varkind != ARGVAR) {
3626                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3627                                         }
3628                                 }
3629
3630                         /* a0 = dimension count */
3631
3632                         ICONST(argintregs[0], iptr->op1);
3633
3634                         /* a1 = arraydescriptor */
3635
3636                         a = dseg_addaddress(iptr->val.a);
3637                         M_ALD(argintregs[1], REG_PV, a);
3638
3639                         /* a2 = pointer to dimensions = stack pointer */
3640
3641                         M_INTMOVE(REG_SP, argintregs[2]);
3642
3643                         a = dseg_addaddress((void*) (builtin_nmultianewarray));
3644                         M_ALD(REG_PV, REG_PV, a);
3645                         M_JSR(REG_RA, REG_PV);
3646                         s1 = (int)((u1*) mcodeptr - mcodebase);
3647                         if (s1 <= 32768)
3648                                 M_LDA (REG_PV, REG_RA, -s1);
3649                         else {
3650                                 s4 ml = -s1, mh = 0;
3651                                 while (ml < -32768) {ml += 65536; mh--;}
3652                                 M_LDA(REG_PV, REG_RA, ml);
3653                                 M_LDAH(REG_PV, REG_PV, mh);
3654                             }
3655                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3656                         M_INTMOVE(REG_RESULT, s1);
3657                         store_reg_to_var_int(iptr->dst, s1);
3658                         break;
3659
3660
3661                 default: error ("Unknown pseudo command: %d", iptr->opc);
3662
3663
3664
3665         } /* switch */
3666
3667         } /* for instruction */
3668
3669         /* copy values to interface registers */
3670
3671         src = bptr->outstack;
3672         len = bptr->outdepth;
3673         MCODECHECK(64+len);
3674         while (src) {
3675                 len--;
3676                 if ((src->varkind != STACKVAR)) {
3677                         s2 = src->type;
3678                         if (IS_FLT_DBL_TYPE(s2)) {
3679                                 var_to_reg_flt(s1, src, REG_FTMP1);
3680                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3681                                         M_FLTMOVE(s1,interfaces[len][s2].regoff);
3682                                         }
3683                                 else {
3684                                         M_DST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3685                                         }
3686                                 }
3687                         else {
3688                                 var_to_reg_int(s1, src, REG_ITMP1);
3689                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3690                                         M_INTMOVE(s1,interfaces[len][s2].regoff);
3691                                         }
3692                                 else {
3693                                         M_LST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3694                                         }
3695                                 }
3696                         }
3697                 src = src->prev;
3698                 }
3699         } /* if (bptr -> flags >= BBREACHED) */
3700         } /* for basic block */
3701
3702         /* bptr -> mpc = (int)((u1*) mcodeptr - mcodebase); */
3703
3704         {
3705         /* generate bound check stubs */
3706
3707         s4 *xcodeptr = NULL;
3708
3709         for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) {
3710                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3711                         gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3712                                 xboundrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - (4 + 4));
3713                         continue;
3714                 }
3715
3716
3717                 gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3718                                   xboundrefs->branchpos, (u1*) mcodeptr - mcodebase);
3719
3720                 MCODECHECK(8);
3721
3722                 M_MOV(xboundrefs->reg, REG_ITMP1);
3723                 M_LDA(REG_ITMP2_XPC, REG_PV, xboundrefs->branchpos - 4);
3724
3725                 if (xcodeptr != NULL) {
3726                         M_BR(xcodeptr - mcodeptr - 1);
3727
3728                 } else {
3729                         xcodeptr = mcodeptr;
3730
3731                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3732                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3733
3734                         a = dseg_addaddress(string_java_lang_ArrayIndexOutOfBoundsException);
3735                         M_ALD(argintregs[0], REG_PV, a);
3736                         M_MOV(REG_ITMP1, argintregs[1]);
3737
3738                         a = dseg_addaddress(new_exception_int);
3739                         M_ALD(REG_PV, REG_PV, a);
3740                         M_JSR(REG_RA, REG_PV);
3741
3742                         /* recompute pv */
3743                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3744                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3745                         else {
3746                                 s4 ml = -s1, mh = 0;
3747                                 while (ml < -32768) { ml += 65536; mh--; }
3748                                 M_LDA(REG_PV, REG_RA, ml);
3749                                 M_LDAH(REG_PV, REG_PV, mh);
3750                         }
3751
3752                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3753
3754                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3755                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3756
3757                         a = dseg_addaddress(asm_handle_exception);
3758                         M_ALD(REG_ITMP3, REG_PV, a);
3759
3760                         M_JMP(REG_ZERO, REG_ITMP3);
3761                 }
3762         }
3763
3764         /* generate negative array size check stubs */
3765
3766         xcodeptr = NULL;
3767
3768         for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) {
3769                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3770                         gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3771                                 xcheckarefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3772                         continue;
3773                 }
3774
3775                 gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3776                                   xcheckarefs->branchpos, (u1*) mcodeptr - mcodebase);
3777
3778                 MCODECHECK(8);
3779
3780                 M_LDA(REG_ITMP2_XPC, REG_PV, xcheckarefs->branchpos - 4);
3781
3782                 if (xcodeptr != NULL) {
3783                         M_BR(xcodeptr - mcodeptr - 1);
3784
3785                 } else {
3786                         xcodeptr = mcodeptr;
3787
3788                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3789                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3790
3791                         a = dseg_addaddress(string_java_lang_NegativeArraySizeException);
3792                         M_ALD(argintregs[0], REG_PV, a);
3793
3794                         a = dseg_addaddress(new_exception);
3795                         M_ALD(REG_PV, REG_PV, a);
3796                         M_JSR(REG_RA, REG_PV);
3797
3798                         /* recompute pv */
3799                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3800                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3801                         else {
3802                                 s4 ml = -s1, mh = 0;
3803                                 while (ml < -32768) { ml += 65536; mh--; }
3804                                 M_LDA(REG_PV, REG_RA, ml);
3805                                 M_LDAH(REG_PV, REG_PV, mh);
3806                         }
3807
3808                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3809
3810                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3811                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3812
3813                         a = dseg_addaddress(asm_handle_exception);
3814                         M_ALD(REG_ITMP3, REG_PV, a);
3815
3816                         M_JMP(REG_ZERO, REG_ITMP3);
3817                 }
3818         }
3819
3820         /* generate cast check stubs */
3821
3822         xcodeptr = NULL;
3823
3824         for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) {
3825                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3826                         gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3827                                 xcastrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3828                         continue;
3829                 }
3830
3831                 gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3832                                   xcastrefs->branchpos, (u1*) mcodeptr - mcodebase);
3833
3834                 MCODECHECK(8);
3835
3836                 M_LDA(REG_ITMP2_XPC, REG_PV, xcastrefs->branchpos - 4);
3837
3838                 if (xcodeptr != NULL) {
3839                         M_BR(xcodeptr - mcodeptr - 1);
3840
3841                 } else {
3842                         xcodeptr = mcodeptr;
3843
3844                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3845                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3846
3847                         a = dseg_addaddress(string_java_lang_ClassCastException);
3848                         M_ALD(argintregs[0], REG_PV, a);
3849
3850                         a = dseg_addaddress(new_exception);
3851                         M_ALD(REG_PV, REG_PV, a);
3852                         M_JSR(REG_RA, REG_PV);
3853
3854                         /* recompute pv */
3855                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3856                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3857                         else {
3858                                 s4 ml = -s1, mh = 0;
3859                                 while (ml < -32768) { ml += 65536; mh--; }
3860                                 M_LDA(REG_PV, REG_RA, ml);
3861                                 M_LDAH(REG_PV, REG_PV, mh);
3862                         }
3863
3864                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3865
3866                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3867                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3868
3869                         a = dseg_addaddress(asm_handle_exception);
3870                         M_ALD(REG_ITMP3, REG_PV, a);
3871
3872                         M_JMP(REG_ZERO, REG_ITMP3);
3873                 }
3874         }
3875
3876         /* generate oom check stubs */
3877
3878         xcodeptr = NULL;
3879
3880         for (; xoomrefs != NULL; xoomrefs = xoomrefs->next) {
3881                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3882                         gen_resolvebranch((u1*) mcodebase + xoomrefs->branchpos,
3883                                                           xoomrefs->branchpos,
3884                                                           (u1*) xcodeptr - (u1*) mcodebase - 4);
3885                         continue;
3886                 }
3887
3888                 gen_resolvebranch((u1*) mcodebase + xoomrefs->branchpos,
3889                                   xoomrefs->branchpos, (u1*) mcodeptr - mcodebase);
3890
3891                 MCODECHECK(8);
3892
3893                 M_LDA(REG_ITMP2_XPC, REG_PV, xoomrefs->branchpos - 4);
3894
3895                 if (xcodeptr != NULL) {
3896                         M_BR(xcodeptr - mcodeptr - 1);
3897
3898                 } else {
3899                         xcodeptr = mcodeptr;
3900
3901 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3902                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3903                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3904
3905                         a = dseg_addaddress(&builtin_get_exceptionptrptr);
3906                         M_ALD(REG_PV, REG_PV, a);
3907                         M_JSR(REG_RA, REG_PV);
3908
3909                         /* recompute pv */
3910                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3911                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3912                         else {
3913                                 s4 ml = -s1, mh = 0;
3914                                 while (ml < -32768) { ml += 65536; mh--; }
3915                                 M_LDA(REG_PV, REG_RA, ml);
3916                                 M_LDAH(REG_PV, REG_PV, mh);
3917                         }
3918
3919                         M_ALD(REG_ITMP1_XPTR, REG_RESULT, 0);
3920                         M_AST(REG_ZERO, REG_RESULT, 0);
3921
3922                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3923                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3924 #else
3925                         a = dseg_addaddress(&_exceptionptr);
3926                         M_ALD(REG_ITMP3, REG_PV, a);
3927                         M_ALD(REG_ITMP1_XPTR, REG_ITMP3, 0);
3928                         M_AST(REG_ZERO, REG_ITMP3, 0);
3929 #endif
3930
3931                         a = dseg_addaddress(asm_handle_exception);
3932                         M_ALD(REG_ITMP3, REG_PV, a);
3933
3934                         M_JMP(REG_ZERO, REG_ITMP3);
3935                 }
3936         }
3937
3938         /* generate null pointer check stubs */
3939
3940         xcodeptr = NULL;
3941
3942         for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) {
3943                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3944                         gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3945                                 xnullrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3946                         continue;
3947                 }
3948
3949                 gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3950                                   xnullrefs->branchpos, (u1*) mcodeptr - mcodebase);
3951
3952                 MCODECHECK(8);
3953
3954                 M_LDA(REG_ITMP2_XPC, REG_PV, xnullrefs->branchpos - 4);
3955
3956                 if (xcodeptr != NULL) {
3957                         M_BR(xcodeptr - mcodeptr - 1);
3958
3959                 } else {
3960                         xcodeptr = mcodeptr;
3961
3962                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3963                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3964
3965                         a = dseg_addaddress(string_java_lang_NullPointerException);
3966                         M_ALD(argintregs[0], REG_PV, a);
3967
3968                         a = dseg_addaddress(new_exception);
3969                         M_ALD(REG_PV, REG_PV, a);
3970                         M_JSR(REG_RA, REG_PV);
3971
3972                         /* recompute pv */
3973                         s1 = (s4) ((u1 *) mcodeptr - mcodebase);
3974                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3975                         else {
3976                                 s4 ml = -s1, mh = 0;
3977                                 while (ml < -32768) { ml += 65536; mh--; }
3978                                 M_LDA(REG_PV, REG_RA, ml);
3979                                 M_LDAH(REG_PV, REG_PV, mh);
3980                         }
3981
3982                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3983
3984                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3985                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3986
3987                         a = dseg_addaddress(asm_handle_exception);
3988                         M_ALD(REG_ITMP3, REG_PV, a);
3989
3990                         M_JMP(REG_ZERO, REG_ITMP3);
3991                 }
3992         }
3993         }
3994
3995         codegen_finish((int)((u1*) mcodeptr - mcodebase));
3996
3997         if (compileverbose) {
3998                 char logtext[MAXLOGTEXT];
3999                 sprintf(logtext, "Generating code done: ");
4000                 utf_sprint_classname(logtext + strlen(logtext), class->name);
4001                 sprintf(logtext + strlen(logtext), ".");
4002                 utf_sprint(logtext + strlen(logtext), method->name);
4003                 utf_sprint_classname(logtext + strlen(logtext), descriptor);
4004                 log_text(logtext);
4005         }
4006 }
4007
4008
4009 /* function createcompilerstub *************************************************
4010
4011         creates a stub routine which calls the compiler
4012
4013 *******************************************************************************/
4014
4015 #define COMPSTUBSIZE    3
4016
4017 u1 *createcompilerstub(methodinfo *m)
4018 {
4019         u8 *s = CNEW(u8, COMPSTUBSIZE);     /* memory to hold the stub            */
4020         s4 *mcodeptr = (s4 *) s;            /* code generation pointer            */
4021
4022                                             /* code for the stub                  */
4023         M_ALD(REG_PV, REG_PV, 16);          /* load pointer to the compiler       */
4024         M_JMP(0, REG_PV);                   /* jump to the compiler, return address
4025                                                in reg 0 is used as method pointer */
4026         s[1] = (u8) m;                      /* literals to be adressed            */
4027         s[2] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
4028
4029 #ifdef STATISTICS
4030         count_cstub_len += COMPSTUBSIZE * 8;
4031 #endif
4032
4033         return (u1 *) s;
4034 }
4035
4036
4037 /* function removecompilerstub *************************************************
4038
4039      deletes a compilerstub from memory  (simply by freeing it)
4040
4041 *******************************************************************************/
4042
4043 void removecompilerstub(u1 *stub)
4044 {
4045         CFREE(stub, COMPSTUBSIZE * 8);
4046 }
4047
4048
4049 /* function: createnativestub **************************************************
4050
4051         creates a stub routine which calls a native method
4052
4053 *******************************************************************************/
4054
4055 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4056 #define NATIVESTUBSTACK          2
4057 #define NATIVESTUBTHREADEXTRA    5
4058 #else
4059 #define NATIVESTUBSTACK          1
4060 #define NATIVESTUBTHREADEXTRA    0
4061 #endif
4062
4063 #define NATIVESTUBSIZE           (44 + NATIVESTUBTHREADEXTRA)
4064 #define NATIVESTATICSIZE         5
4065 #define NATIVEVERBOSESIZE        (39 + 13)
4066 #define NATIVESTUBOFFSET         9
4067
4068 u1 *createnativestub(functionptr f, methodinfo *m)
4069 {
4070         u8 *s;                              /* memory pointer to hold the stub    */
4071         u8 *cs;
4072         s4 *mcodeptr;                       /* code generation pointer            */
4073         s4 stackframesize = 0;              /* size of stackframe if needed       */
4074         s4 disp;
4075         s4 stubsize;
4076
4077         reg_init();
4078         descriptor2types(m);                /* set paramcount and paramtypes      */
4079
4080         stubsize = NATIVESTUBSIZE;          /* calculate nativestub size          */
4081         if ((m->flags & ACC_STATIC) && !m->class->initialized)
4082                 stubsize += NATIVESTATICSIZE;
4083
4084         if (runverbose)
4085                 stubsize += NATIVEVERBOSESIZE;
4086
4087         s = CNEW(u8, stubsize);             /* memory to hold the stub            */
4088         cs = s + NATIVESTUBOFFSET;
4089         mcodeptr = (s4 *) (cs);             /* code generation pointer            */
4090
4091         *(cs-1) = (u8) f;                   /* address of native method           */
4092 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4093         *(cs-2) = (u8) &builtin_get_exceptionptrptr;
4094 #else
4095         *(cs-2) = (u8) (&_exceptionptr);    /* address of exceptionptr            */
4096 #endif
4097         *(cs-3) = (u8) asm_handle_nat_exception; /* addr of asm exception handler */
4098         *(cs-4) = (u8) (&env);              /* addr of jni_environement           */
4099         *(cs-5) = (u8) builtin_trace_args;
4100         *(cs-6) = (u8) m;
4101         *(cs-7) = (u8) builtin_displaymethodstop;
4102         *(cs-8) = (u8) m->class;
4103         *(cs-9) = (u8) asm_check_clinit;
4104
4105         M_LDA(REG_SP, REG_SP, -NATIVESTUBSTACK * 8);      /* build up stackframe  */
4106         M_AST(REG_RA, REG_SP, 0 * 8);       /* store return address               */
4107
4108         /* if function is static, check for initialized */
4109
4110         if (m->flags & ACC_STATIC) {
4111         /* if class isn't yet initialized, do it */
4112                 if (!m->class->initialized) {
4113                         /* call helper function which patches this code */
4114                         M_ALD(REG_ITMP1, REG_PV, -8 * 8);     /* class                    */
4115                         M_ALD(REG_PV, REG_PV, -9 * 8);        /* asm_check_clinit         */
4116                         M_JSR(REG_RA, REG_PV);
4117                         disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4118                         M_LDA(REG_PV, REG_RA, disp);
4119                         M_NOP;                  /* this is essential for code patching    */
4120                 }
4121         }
4122
4123         /* max. 39 instructions */
4124         if (runverbose) {
4125                 s4 p;
4126                 s4 t;
4127                 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
4128                 M_AST(REG_RA, REG_SP, 1 * 8);
4129
4130                 /* save integer argument registers */
4131                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
4132                         M_LST(argintregs[p], REG_SP,  (2 + p) * 8);
4133                 }
4134
4135                 /* save and copy float arguments into integer registers */
4136                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
4137                         t = m->paramtypes[p];
4138
4139                         if (IS_FLT_DBL_TYPE(t)) {
4140                                 if (IS_2_WORD_TYPE(t)) {
4141                                         M_DST(argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4142                                         M_LLD(argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4143
4144                                 } else {
4145                                         M_FST(argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4146                                         M_ILD(argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4147                                 }
4148
4149                         } else {
4150                                 M_DST(argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4151                         }
4152                 }
4153
4154                 M_ALD(REG_ITMP1, REG_PV, -6 * 8);
4155                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
4156                 M_ALD(REG_PV, REG_PV, -5 * 8);
4157                 M_JSR(REG_RA, REG_PV);
4158                 disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4159                 M_LDA(REG_PV, REG_RA, disp);
4160
4161                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
4162                         M_LLD(argintregs[p], REG_SP, (2 + p) * 8);
4163                 }
4164
4165                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
4166                         t = m->paramtypes[p];
4167
4168                         if (IS_FLT_DBL_TYPE(t)) {
4169                                 if (IS_2_WORD_TYPE(t)) {
4170                                         M_DLD(argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4171
4172                                 } else {
4173                                         M_FLD(argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4174                                 }
4175
4176                         } else {
4177                                 M_DLD(argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
4178                         }
4179                 }
4180
4181                 M_ALD(REG_RA, REG_SP, 1 * 8);
4182                 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
4183         }
4184
4185         /* save argument registers on stack -- if we have to */
4186         if ((m->flags & ACC_STATIC && m->paramcount > (INT_ARG_CNT - 2)) || m->paramcount > (INT_ARG_CNT - 1)) {
4187                 s4 i;
4188                 s4 paramshiftcnt = (m->flags & ACC_STATIC) ? 2 : 1;
4189                 s4 stackparamcnt = (m->paramcount > INT_ARG_CNT) ? m->paramcount - INT_ARG_CNT : 0;
4190
4191                 stackframesize = stackparamcnt + paramshiftcnt;
4192
4193                 M_LDA(REG_SP, REG_SP, -stackframesize * 8);
4194
4195                 /* copy stack arguments into new stack frame -- if any */
4196                 for (i = 0; i < stackparamcnt; i++) {
4197                         M_LLD(REG_ITMP1, REG_SP, (stackparamcnt + 1 + i) * 8);
4198                         M_LST(REG_ITMP1, REG_SP, (paramshiftcnt + i) * 8);
4199                 }
4200
4201                 if (m->flags & ACC_STATIC) {
4202                         if (IS_FLT_DBL_TYPE(m->paramtypes[5])) {
4203                                 M_DST(argfltregs[5], REG_SP, 1 * 8);
4204                         } else {
4205                                 M_LST(argintregs[5], REG_SP, 1 * 8);
4206                         }
4207
4208                         if (IS_FLT_DBL_TYPE(m->paramtypes[4])) {
4209                                 M_DST(argfltregs[4], REG_SP, 0 * 8);
4210                         } else {
4211                                 M_LST(argintregs[4], REG_SP, 0 * 8);
4212                         }
4213
4214                 } else {
4215                         if (IS_FLT_DBL_TYPE(m->paramtypes[5])) {
4216                                 M_DST(argfltregs[5], REG_SP, 0 * 8);
4217                         } else {
4218                                 M_LST(argintregs[5], REG_SP, 0 * 8);
4219                         }
4220                 }
4221         }
4222
4223         if (m->flags & ACC_STATIC) {
4224                 M_MOV(argintregs[3], argintregs[5]);
4225                 M_MOV(argintregs[2], argintregs[4]);
4226                 M_MOV(argintregs[1], argintregs[3]);
4227                 M_MOV(argintregs[0], argintregs[2]);
4228                 M_FMOV(argfltregs[3], argfltregs[5]);
4229                 M_FMOV(argfltregs[2], argfltregs[4]);
4230                 M_FMOV(argfltregs[1], argfltregs[3]);
4231                 M_FMOV(argfltregs[0], argfltregs[2]);
4232
4233                 /* put class into second argument register */
4234                 M_ALD(argintregs[1], REG_PV, -8 * 8);
4235
4236         } else {
4237                 M_MOV(argintregs[4], argintregs[5]);
4238                 M_MOV(argintregs[3], argintregs[4]);
4239                 M_MOV(argintregs[2], argintregs[3]);
4240                 M_MOV(argintregs[1], argintregs[2]);
4241                 M_MOV(argintregs[0], argintregs[1]);
4242                 M_FMOV(argfltregs[4], argfltregs[5]);
4243                 M_FMOV(argfltregs[3], argfltregs[4]);
4244                 M_FMOV(argfltregs[2], argfltregs[3]);
4245                 M_FMOV(argfltregs[1], argfltregs[2]);
4246                 M_FMOV(argfltregs[0], argfltregs[1]);
4247         }
4248
4249         /* put env into first argument register */
4250         M_ALD(argintregs[0], REG_PV, -4 * 8);
4251
4252         M_ALD(REG_PV, REG_PV, -1 * 8);      /* load adress of native method       */
4253         M_JSR(REG_RA, REG_PV);              /* call native method                 */
4254         disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4255         M_LDA(REG_PV, REG_RA, disp);        /* recompute pv from ra               */
4256
4257         /* remove stackframe if there is one */
4258         if (stackframesize) {
4259                 M_LDA(REG_SP, REG_SP, stackframesize * 8);
4260         }
4261
4262         /* 13 instructions */
4263         if (runverbose) {
4264                 M_LDA(REG_SP, REG_SP, -2 * 8);
4265                 M_ALD(argintregs[0], REG_PV, -6 * 8); /* load method adress           */
4266                 M_LST(REG_RESULT, REG_SP, 0 * 8);
4267                 M_DST(REG_FRESULT, REG_SP, 1 * 8);
4268                 M_MOV(REG_RESULT, argintregs[1]);
4269                 M_FMOV(REG_FRESULT, argfltregs[2]);
4270                 M_FMOV(REG_FRESULT, argfltregs[3]);
4271                 M_ALD(REG_PV, REG_PV, -7 * 8);  /* builtin_displaymethodstop          */
4272                 M_JSR(REG_RA, REG_PV);
4273                 disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4274                 M_LDA(REG_PV, REG_RA, disp);
4275                 M_LLD(REG_RESULT, REG_SP, 0 * 8);
4276                 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
4277                 M_LDA(REG_SP, REG_SP, 2 * 8);
4278         }
4279
4280 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4281         if (IS_FLT_DBL_TYPE(m->returntype))
4282                 M_DST(REG_FRESULT, REG_SP, 1 * 8);
4283         else
4284                 M_AST(REG_RESULT, REG_SP, 1 * 8);
4285         M_ALD(REG_PV, REG_PV, -2 * 8);      /* builtin_get_exceptionptrptr        */
4286         M_JSR(REG_RA, REG_PV);
4287         disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4288         M_LDA(REG_PV, REG_RA, disp);
4289         M_MOV(REG_RESULT, REG_ITMP3);
4290         if (IS_FLT_DBL_TYPE(m->returntype))
4291                 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
4292         else
4293                 M_ALD(REG_RESULT, REG_SP, 1 * 8);
4294 #else
4295         M_ALD(REG_ITMP3, REG_PV, -2 * 8);   /* get address of exceptionptr        */
4296 #endif
4297         M_ALD(REG_ITMP1, REG_ITMP3, 0);     /* load exception into reg. itmp1     */
4298         M_BNEZ(REG_ITMP1, 3);               /* if no exception then return        */
4299
4300         M_ALD(REG_RA, REG_SP, 0 * 8);       /* load return address                */
4301         M_LDA(REG_SP, REG_SP, NATIVESTUBSTACK * 8); /* remove stackframe          */
4302         M_RET(REG_ZERO, REG_RA);            /* return to caller                   */
4303
4304         M_AST(REG_ZERO, REG_ITMP3, 0);      /* store NULL into exceptionptr       */
4305
4306         M_ALD(REG_RA, REG_SP, 0 * 8);       /* load return address                */
4307         M_LDA(REG_SP, REG_SP, NATIVESTUBSTACK * 8); /* remove stackframe          */
4308         M_LDA(REG_ITMP2, REG_RA, -4);       /* move fault address into reg. itmp2 */
4309         M_ALD(REG_ITMP3, REG_PV, -3 * 8);   /* load asm exception handler address */
4310         M_JMP(REG_ZERO, REG_ITMP3);         /* jump to asm exception handler      */
4311
4312 #if 0
4313         dolog_plain("stubsize: %d (for %d params)\n", (int) (mcodeptr - (s4*) s), m->paramcount);
4314 #endif
4315
4316 #ifdef STATISTICS
4317         count_nstub_len += NATIVESTUBSIZE * 8;
4318 #endif
4319
4320         return (u1 *) (s + NATIVESTUBOFFSET);
4321 }
4322
4323
4324 /* function: removenativestub **************************************************
4325
4326     removes a previously created native-stub from memory
4327
4328 *******************************************************************************/
4329
4330 void removenativestub(u1 *stub)
4331 {
4332         CFREE((u8 *) stub - NATIVESTUBOFFSET, NATIVESTUBSIZE * 8);
4333 }
4334
4335
4336 /*
4337  * These are local overrides for various environment variables in Emacs.
4338  * Please do not remove this and leave it at the end of the file, where
4339  * Emacs will automagically detect them.
4340  * ---------------------------------------------------------------------
4341  * Local variables:
4342  * mode: c
4343  * indent-tabs-mode: t
4344  * c-basic-offset: 4
4345  * tab-width: 4
4346  * End:
4347  */