src/vm/jit/alpha/codegen.c

   1 /* src/vm/jit/alpha/codegen.c - machine code generator for Alpha
   2
   3    Copyright (C) 1996-2005 R. Grafl, A. Krall, C. Kruegel, C. Oates,
   4    R. Obermaisser, M. Platter, M. Probst, S. Ring, E. Steiner,
   5    C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich, J. Wenninger,
   6    Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  23    02111-1307, USA.
  24
  25    Contact: cacao@complang.tuwien.ac.at
  26
  27    Authors: Andreas Krall
  28             Reinhard Grafl
  29
  30    Changes: Joseph Wenninger
  31             Christian Thalinger
  32
  33    $Id: codegen.c 2614 2005-06-08 20:54:05Z twisti $
  34
  35 */
  36
  37
  38 #include <stdio.h>
  39 #include <signal.h>
  40
  41 #include "config.h"
  42
  43 #include "md.h"
  44 #include "md-abi.h"
  45 #include "md-abi.inc"
  46
  47 #include "vm/jit/alpha/arch.h"
  48 #include "vm/jit/alpha/codegen.h"
  49 #include "vm/jit/alpha/types.h"
  50 #include "vm/jit/alpha/asmoffsets.h"
  51
  52 #include "cacao/cacao.h"
  53 #include "native/native.h"
  54 #include "vm/builtin.h"
  55 #include "vm/global.h"
  56 #include "vm/loader.h"
  57 #include "vm/stringlocal.h"
  58 #include "vm/tables.h"
  59 #include "vm/jit/asmpart.h"
  60 #include "vm/jit/codegen.inc"
  61 #include "vm/jit/jit.h"
  62
  63 #if defined(LSRA)
  64 # include "vm/jit/lsra.h"
  65 # include "vm/jit/lsra.inc"
  66 #endif
  67
  68 #include "vm/jit/parse.h"
  69 #include "vm/jit/patcher.h"
  70 #include "vm/jit/reg.h"
  71 #include "vm/jit/reg.inc"
  72
  73
  74 /* NullPointerException handlers and exception handling initialisation        */
  75
  76 typedef struct sigctx_struct {
  77         long          sc_onstack;           /* sigstack state to restore          */
  78         long          sc_mask;              /* signal mask to restore             */
  79         long          sc_pc;                /* pc at time of signal               */
  80         long          sc_ps;                /* psl to retore                      */
  81         long          sc_regs[32];          /* processor regs 0 to 31             */
  82         long          sc_ownedfp;           /* fp has been used                   */
  83         long          sc_fpregs[32];        /* fp regs 0 to 31                    */
  84         unsigned long sc_fpcr;              /* floating point control register    */
  85         unsigned long sc_fp_control;        /* software fpcr                      */
  86                                             /* rest is unused                     */
  87         unsigned long sc_reserved1, sc_reserved2;
  88         unsigned long sc_ssize;
  89         char          *sc_sbase;
  90         unsigned long sc_traparg_a0;
  91         unsigned long sc_traparg_a1;
  92         unsigned long sc_traparg_a2;
  93         unsigned long sc_fp_trap_pc;
  94         unsigned long sc_fp_trigger_sum;
  95         unsigned long sc_fp_trigger_inst;
  96         unsigned long sc_retcode[2];
  97 } sigctx_struct;
  98
  99
 100 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
 101 void thread_restartcriticalsection(ucontext_t *uc)
 102 {
 103         void *critical;
 104         if ((critical = thread_checkcritical((void*) uc->uc_mcontext.sc_pc)) != NULL)
 105                 uc->uc_mcontext.sc_pc = (u8) critical;
 106 }
 107 #endif
 108
 109
 110 /* NullPointerException signal handler for hardware null pointer check */
 111
 112 void catch_NullPointerException(int sig, siginfo_t *siginfo, void *_p)
 113 {
 114         struct sigaction act;
 115         sigset_t         nsig;
 116         int              instr;
 117         long             faultaddr;
 118
 119         ucontext_t *_uc = (ucontext_t *) _p;
 120         mcontext_t *sigctx = &_uc->uc_mcontext;
 121
 122         instr = *((s4 *) (sigctx->sc_pc));
 123         faultaddr = sigctx->sc_regs[(instr >> 16) & 0x1f];
 124
 125         if (faultaddr == 0) {
 126                 /* Reset signal handler - necessary for SysV, does no harm for BSD */
 127                 act.sa_sigaction = catch_NullPointerException;
 128                 act.sa_flags = SA_SIGINFO;
 129                 sigaction(sig, &act, NULL);
 130
 131                 sigemptyset(&nsig);
 132                 sigaddset(&nsig, sig);
 133                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 134
 135                 sigctx->sc_regs[REG_ITMP1_XPTR] = (u8) string_java_lang_NullPointerException;
 136                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 137                 sigctx->sc_pc = (u8) asm_throw_and_handle_exception;
 138                 return;
 139
 140         } else {
 141                 faultaddr += (long) ((instr << 16) >> 16);
 142
 143                 throw_cacao_exception_exit(string_java_lang_InternalError,
 144                                                                    "faulting address: 0x%016lx\n", faultaddr);
 145         }
 146 }
 147
 148
 149 #ifdef __osf__
 150
 151 void init_exceptions(void)
 152 {
 153
 154 #else /* Linux */
 155
 156 /* Linux on Digital Alpha needs an initialisation of the ieee floating point
 157         control for IEEE compliant arithmetic (option -mieee of GCC). Under
 158         Digital Unix this is done automatically.
 159 */
 160
 161 #include <asm/fpu.h>
 162
 163 extern unsigned long ieee_get_fp_control();
 164 extern void ieee_set_fp_control(unsigned long fp_control);
 165
 166 void init_exceptions(void)
 167 {
 168         struct sigaction act;
 169
 170         /* initialize floating point control */
 171
 172         ieee_set_fp_control(ieee_get_fp_control()
 173                                                 & ~IEEE_TRAP_ENABLE_INV
 174                                                 & ~IEEE_TRAP_ENABLE_DZE
 175 /*                                              & ~IEEE_TRAP_ENABLE_UNF   we dont want underflow */
 176                                                 & ~IEEE_TRAP_ENABLE_OVF);
 177 #endif
 178
 179         /* install signal handlers we need to convert to exceptions */
 180
 181         if (!checknull) {
 182                 act.sa_sigaction = catch_NullPointerException;
 183                 act.sa_flags = SA_SIGINFO;
 184
 185 #if defined(SIGSEGV)
 186                 sigaction(SIGSEGV, &act, NULL);
 187 #endif
 188
 189 #if defined(SIGBUS)
 190                 sigaction(SIGBUS, &act, NULL);
 191 #endif
 192         }
 193 }
 194
 195
 196 /* codegen *********************************************************************
 197
 198    Generates machine code.
 199
 200 *******************************************************************************/
 201
 202 void codegen(methodinfo *m, codegendata *cd, registerdata *rd)
 203 {
 204         s4                  len, s1, s2, s3, d;
 205         ptrint              a;
 206         s4                  parentargs_base;
 207         s4                 *mcodeptr;
 208         stackptr            src;
 209         varinfo            *var;
 210         basicblock         *bptr;
 211         instruction        *iptr;
 212         exceptiontable     *ex;
 213         u2                  currentline;
 214         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE*  */
 215         builtintable_entry *bte;
 216         methoddesc         *md;
 217
 218         {
 219         s4 i, p, t, l;
 220         s4 savedregs_num;
 221
 222         savedregs_num = (m->isleafmethod) ? 0 : 1;        /* space to save the RA */
 223
 224         /* space to save used callee saved registers */
 225
 226         savedregs_num += (rd->savintregcnt - rd->maxsavintreguse);
 227         savedregs_num += (rd->savfltregcnt - rd->maxsavfltreguse);
 228
 229         parentargs_base = rd->maxmemuse + savedregs_num;
 230
 231 #if defined(USE_THREADS)           /* space to save argument of monitor_enter */
 232
 233         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 234                 parentargs_base++;
 235
 236 #endif
 237
 238         /* create method header */
 239
 240         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
 241         (void) dseg_adds4(cd, parentargs_base * 8);             /* FrameSize      */
 242
 243 #if defined(USE_THREADS)
 244
 245         /* IsSync contains the offset relative to the stack pointer for the
 246            argument of monitor_exit used in the exception handler. Since the
 247            offset could be zero and give a wrong meaning of the flag it is
 248            offset by one.
 249         */
 250
 251         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 252                 (void) dseg_adds4(cd, (rd->maxmemuse + 1) * 8);     /* IsSync         */
 253         else
 254
 255 #endif
 256
 257         (void) dseg_adds4(cd, 0);                               /* IsSync         */
 258
 259         (void) dseg_adds4(cd, m->isleafmethod);                 /* IsLeaf         */
 260         (void) dseg_adds4(cd, rd->savintregcnt - rd->maxsavintreguse);/* IntSave  */
 261         (void) dseg_adds4(cd, rd->savfltregcnt - rd->maxsavfltreguse);/* FltSave  */
 262
 263         dseg_addlinenumbertablesize(cd);
 264
 265         (void) dseg_adds4(cd, cd->exceptiontablelength);        /* ExTableSize    */
 266
 267         /* create exception table */
 268
 269         for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
 270                 dseg_addtarget(cd, ex->start);
 271                 dseg_addtarget(cd, ex->end);
 272                 dseg_addtarget(cd, ex->handler);
 273                 (void) dseg_addaddress(cd, ex->catchtype.cls);
 274         }
 275
 276         /* initialize mcode variables */
 277
 278         mcodeptr = (s4 *) cd->mcodebase;
 279         cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize);
 280         MCODECHECK(128 + m->paramcount);
 281
 282         /* create stack frame (if necessary) */
 283
 284         if (parentargs_base) {
 285                 M_LDA(REG_SP, REG_SP, -parentargs_base * 8);
 286         }
 287
 288         /* save return address and used callee saved registers */
 289
 290         p = parentargs_base;
 291         if (!m->isleafmethod) {
 292                 p--; M_AST(REG_RA, REG_SP, p * 8);
 293         }
 294         for (i = rd->savintregcnt - 1; i >= rd->maxsavintreguse; i--) {
 295                 p--; M_LST(rd->savintregs[i], REG_SP, p * 8);
 296         }
 297         for (i = rd->savfltregcnt - 1; i >= rd->maxsavfltreguse; i--) {
 298                 p--; M_DST(rd->savfltregs[i], REG_SP, p * 8);
 299         }
 300
 301         /* take arguments out of register or stack frame */
 302
 303         md = m->parseddesc;
 304
 305         for (p = 0, l = 0; p < md->paramcount; p++) {
 306                 t = md->paramtypes[p].type;
 307                 var = &(rd->locals[l][t]);
 308                 l++;
 309                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 310                         l++;
 311                 if (var->type < 0)
 312                         continue;
 313                 s1 = md->params[p].regoff;
 314                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 315                         if (!md->params[p].inmemory) {           /* register arguments    */
 316                                 s2 = rd->argintregs[s1];
 317                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 318                                         M_INTMOVE(s2, var->regoff);
 319
 320                                 } else {                             /* reg arg -> spilled    */
 321                                         M_LST(s2, REG_SP, var->regoff * 8);
 322                                 }
 323
 324                         } else {                                 /* stack arguments       */
 325                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 326                                         M_LLD(var->regoff, REG_SP, (parentargs_base + s1) * 8);
 327
 328                                 } else {                             /* stack arg -> spilled  */
 329                                         var->regoff = parentargs_base + s1;
 330                                 }
 331                         }
 332
 333                 } else {                                     /* floating args         */
 334                         if (!md->params[p].inmemory) {           /* register arguments    */
 335                                 s2 = rd->argfltregs[s1];
 336                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 337                                         M_FLTMOVE(s2, var->regoff);
 338
 339                                 } else {                                         /* reg arg -> spilled    */
 340                                         M_DST(s2, REG_SP, var->regoff * 8);
 341                                 }
 342
 343                         } else {                                 /* stack arguments       */
 344                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 345                                         M_DLD(var->regoff, REG_SP, (parentargs_base + s1) * 8);
 346
 347                                 } else {                             /* stack-arg -> spilled  */
 348                                         var->regoff = parentargs_base + s1;
 349                                 }
 350                         }
 351                 }
 352         } /* end for */
 353
 354         /* call monitorenter function */
 355
 356 #if defined(USE_THREADS)
 357         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 358                 /* stack offset for monitor argument */
 359
 360                 s1 = rd->maxmemuse;
 361
 362                 if (runverbose) {
 363                         M_LDA(REG_SP, REG_SP, -(INT_ARG_CNT + FLT_ARG_CNT) * 8);
 364
 365                         for (p = 0; p < INT_ARG_CNT; p++)
 366                                 M_LST(rd->argintregs[p], REG_SP, p * 8);
 367
 368                         for (p = 0; p < FLT_ARG_CNT; p++)
 369                                 M_DST(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
 370
 371                         s1 += INT_ARG_CNT + FLT_ARG_CNT;
 372                 }
 373
 374                 /* decide which monitor enter function to call */
 375
 376                 if (m->flags & ACC_STATIC) {
 377                         p = dseg_addaddress(cd, m->class);
 378                         M_ALD(REG_ITMP1, REG_PV, p);
 379                         M_AST(REG_ITMP1, REG_SP, s1 * 8);
 380                         M_INTMOVE(REG_ITMP1, rd->argintregs[0]);
 381                         p = dseg_addaddress(cd, BUILTIN_staticmonitorenter);
 382                         M_ALD(REG_PV, REG_PV, p);
 383                         M_JSR(REG_RA, REG_PV);
 384                         d = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 385                         M_LDA(REG_PV, REG_RA, d);
 386
 387                 } else {
 388                         M_BEQZ(rd->argintregs[0], 0);
 389                         codegen_addxnullrefs(cd, mcodeptr);
 390                         M_AST(rd->argintregs[0], REG_SP, s1 * 8);
 391                         p = dseg_addaddress(cd, BUILTIN_monitorenter);
 392                         M_ALD(REG_PV, REG_PV, p);
 393                         M_JSR(REG_RA, REG_PV);
 394                         d = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 395                         M_LDA(REG_PV, REG_RA, d);
 396                 }
 397
 398                 if (runverbose) {
 399                         for (p = 0; p < INT_ARG_CNT; p++)
 400                                 M_LLD(rd->argintregs[p], REG_SP, p * 8);
 401
 402                         for (p = 0; p < FLT_ARG_CNT; p++)
 403                                 M_DLD(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
 404
 405                         M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT) * 8);
 406                 }
 407         }
 408 #endif
 409
 410         /* call trace function */
 411
 412         if (runverbose) {
 413                 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
 414                 M_AST(REG_RA, REG_SP, 1 * 8);
 415
 416                 /* save integer argument registers */
 417
 418                 for (p = 0; p < md->paramcount && p < INT_ARG_CNT; p++)
 419                         M_LST(rd->argintregs[p], REG_SP, (2 + p) * 8);
 420
 421                 /* save and copy float arguments into integer registers */
 422
 423                 for (p = 0; p < md->paramcount && p < FLT_ARG_CNT; p++) {
 424                         t = md->paramtypes[p].type;
 425
 426                         if (IS_FLT_DBL_TYPE(t)) {
 427                                 if (IS_2_WORD_TYPE(t)) {
 428                                         M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 429
 430                                 } else {
 431                                         M_FST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 432                                 }
 433
 434                                 M_LLD(rd->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 435
 436                         } else {
 437                                 M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 438                         }
 439                 }
 440
 441                 p = dseg_addaddress(cd, m);
 442                 M_ALD(REG_ITMP1, REG_PV, p);
 443                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
 444                 p = dseg_addaddress(cd, (void *) builtin_trace_args);
 445                 M_ALD(REG_PV, REG_PV, p);
 446                 M_JSR(REG_RA, REG_PV);
 447                 d = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 448                 M_LDA(REG_PV, REG_RA, d);
 449                 M_ALD(REG_RA, REG_SP, 1 * 8);
 450
 451                 /* restore integer argument registers */
 452
 453                 for (p = 0; p < md->paramcount && p < INT_ARG_CNT; p++)
 454                         M_LLD(rd->argintregs[p], REG_SP, (2 + p) * 8);
 455
 456                 /* restore float argument registers */
 457
 458                 for (p = 0; p < md->paramcount && p < FLT_ARG_CNT; p++) {
 459                         t = md->paramtypes[p].type;
 460
 461                         if (IS_FLT_DBL_TYPE(t)) {
 462                                 if (IS_2_WORD_TYPE(t)) {
 463                                         M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 464
 465                                 } else {
 466                                         M_FLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 467                                 }
 468
 469                         } else {
 470                                 M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 471                         }
 472                 }
 473
 474                 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
 475         }
 476
 477         }
 478
 479         /* end of header generation */
 480
 481         /* walk through all basic blocks */
 482
 483         for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
 484
 485                 bptr->mpc = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 486
 487                 if (bptr->flags >= BBREACHED) {
 488
 489                 /* branch resolving */
 490
 491                 {
 492                 branchref *brefs;
 493                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 494                         gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
 495                                           brefs->branchpos, bptr->mpc);
 496                         }
 497                 }
 498
 499                 /* copy interface registers to their destination */
 500
 501                 src = bptr->instack;
 502                 len = bptr->indepth;
 503                 MCODECHECK(64+len);
 504 #ifdef LSRA
 505                 if (opt_lsra) {
 506                 while (src != NULL) {
 507                         len--;
 508                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 509                                         /*                              d = reg_of_var(m, src, REG_ITMP1); */
 510                                         if (!(src->flags & INMEMORY))
 511                                                 d= src->regoff;
 512                                         else
 513                                                 d=REG_ITMP1;
 514                                         M_INTMOVE(REG_ITMP1, d);
 515                                         store_reg_to_var_int(src, d);
 516                                 }
 517                                 src = src->prev;
 518                         }
 519                 } else {
 520 #endif
 521                         while (src != NULL) {
 522                                 len--;
 523                                 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 524                                 d = reg_of_var(rd, src, REG_ITMP1);
 525                                 M_INTMOVE(REG_ITMP1, d);
 526                                 store_reg_to_var_int(src, d);
 527                                 }
 528                         else {
 529                                 d = reg_of_var(rd, src, REG_IFTMP);
 530                                 if ((src->varkind != STACKVAR)) {
 531                                         s2 = src->type;
 532                                         if (IS_FLT_DBL_TYPE(s2)) {
 533                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 534                                                         s1 = rd->interfaces[len][s2].regoff;
 535                                                         M_FLTMOVE(s1,d);
 536                                                         }
 537                                                 else {
 538                                                         M_DLD(d, REG_SP, 8 * rd->interfaces[len][s2].regoff);
 539                                                         }
 540                                                 store_reg_to_var_flt(src, d);
 541                                                 }
 542                                         else {
 543                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 544                                                         s1 = rd->interfaces[len][s2].regoff;
 545                                                         M_INTMOVE(s1,d);
 546                                                         }
 547                                                 else {
 548                                                         M_LLD(d, REG_SP, 8 * rd->interfaces[len][s2].regoff);
 549                                                         }
 550                                                 store_reg_to_var_int(src, d);
 551                                                 }
 552                                         }
 553                                 }
 554                         src = src->prev;
 555                         }
 556 #ifdef LSRA
 557                 }
 558 #endif
 559
 560                 /* walk through all instructions */
 561
 562                 src = bptr->instack;
 563                 len = bptr->icount;
 564
 565                 for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) {
 566                         if (iptr->line != currentline) {
 567                                 dseg_addlinenumber(cd, iptr->line, mcodeptr);
 568                                 currentline = iptr->line;
 569                         }
 570
 571                 MCODECHECK(64);       /* an instruction usually needs < 64 words      */
 572                 switch (iptr->opc) {
 573
 574                 case ICMD_INLINE_START:
 575                 case ICMD_INLINE_END:
 576                         break;
 577
 578                 case ICMD_NOP:        /* ...  ==> ...                                 */
 579                         break;
 580
 581                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
 582
 583                         var_to_reg_int(s1, src, REG_ITMP1);
 584                         M_BEQZ(s1, 0);
 585                         codegen_addxnullrefs(cd, mcodeptr);
 586                         break;
 587
 588                 /* constant operations ************************************************/
 589
 590                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 591                                       /* op1 = 0, val.i = constant                    */
 592
 593                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 594                         ICONST(d, iptr->val.i);
 595                         store_reg_to_var_int(iptr->dst, d);
 596                         break;
 597
 598                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 599                                       /* op1 = 0, val.l = constant                    */
 600
 601                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 602                         LCONST(d, iptr->val.l);
 603                         store_reg_to_var_int(iptr->dst, d);
 604                         break;
 605
 606                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 607                                       /* op1 = 0, val.f = constant                    */
 608
 609                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 610                         a = dseg_addfloat(cd, iptr->val.f);
 611                         M_FLD(d, REG_PV, a);
 612                         store_reg_to_var_flt(iptr->dst, d);
 613                         break;
 614
 615                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 616                                       /* op1 = 0, val.d = constant                    */
 617
 618                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 619                         a = dseg_adddouble(cd, iptr->val.d);
 620                         M_DLD(d, REG_PV, a);
 621                         store_reg_to_var_flt(iptr->dst, d);
 622                         break;
 623
 624                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 625                                       /* op1 = 0, val.a = constant                    */
 626
 627                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 628                         if (iptr->val.a) {
 629                                 a = dseg_addaddress(cd, iptr->val.a);
 630                                 M_ALD(d, REG_PV, a);
 631                         } else {
 632                                 M_INTMOVE(REG_ZERO, d);
 633                         }
 634                         store_reg_to_var_int(iptr->dst, d);
 635                         break;
 636
 637
 638                 /* load/store operations **********************************************/
 639
 640                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 641                 case ICMD_LLOAD:      /* op1 = local variable                         */
 642                 case ICMD_ALOAD:
 643
 644                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 645                         if ((iptr->dst->varkind == LOCALVAR) &&
 646                             (iptr->dst->varnum == iptr->op1))
 647                                 break;
 648                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 649                         if (var->flags & INMEMORY)
 650                                 M_LLD(d, REG_SP, 8 * var->regoff);
 651                         else
 652                                 {M_INTMOVE(var->regoff,d);}
 653                         store_reg_to_var_int(iptr->dst, d);
 654                         break;
 655
 656                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 657                 case ICMD_DLOAD:      /* op1 = local variable                         */
 658
 659                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 660                         if ((iptr->dst->varkind == LOCALVAR) &&
 661                             (iptr->dst->varnum == iptr->op1))
 662                                 break;
 663                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 664                         if (var->flags & INMEMORY)
 665                                 M_DLD(d, REG_SP, 8 * var->regoff);
 666                         else
 667                                 {M_FLTMOVE(var->regoff,d);}
 668                         store_reg_to_var_flt(iptr->dst, d);
 669                         break;
 670
 671
 672                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 673                 case ICMD_LSTORE:     /* op1 = local variable                         */
 674                 case ICMD_ASTORE:
 675
 676                         if ((src->varkind == LOCALVAR) &&
 677                             (src->varnum == iptr->op1))
 678                                 break;
 679                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 680                         if (var->flags & INMEMORY) {
 681                                 var_to_reg_int(s1, src, REG_ITMP1);
 682                                 M_LST(s1, REG_SP, 8 * var->regoff);
 683                                 }
 684                         else {
 685                                 var_to_reg_int(s1, src, var->regoff);
 686                                 M_INTMOVE(s1, var->regoff);
 687                                 }
 688                         break;
 689
 690                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 691                 case ICMD_DSTORE:     /* op1 = local variable                         */
 692
 693                         if ((src->varkind == LOCALVAR) &&
 694                             (src->varnum == iptr->op1))
 695                                 break;
 696                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 697                         if (var->flags & INMEMORY) {
 698                                 var_to_reg_flt(s1, src, REG_FTMP1);
 699                                 M_DST(s1, REG_SP, 8 * var->regoff);
 700                                 }
 701                         else {
 702                                 var_to_reg_flt(s1, src, var->regoff);
 703                                 M_FLTMOVE(s1, var->regoff);
 704                                 }
 705                         break;
 706
 707
 708                 /* pop/dup/swap operations ********************************************/
 709
 710                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 711
 712                 case ICMD_POP:        /* ..., value  ==> ...                          */
 713                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 714                         break;
 715
 716                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 717                         M_COPY(src, iptr->dst);
 718                         break;
 719
 720                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 721
 722                         M_COPY(src,       iptr->dst);
 723                         M_COPY(src->prev, iptr->dst->prev);
 724                         M_COPY(iptr->dst, iptr->dst->prev->prev);
 725                         break;
 726
 727                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 728
 729                         M_COPY(src,             iptr->dst);
 730                         M_COPY(src->prev,       iptr->dst->prev);
 731                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 732                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 733                         break;
 734
 735                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 736
 737                         M_COPY(src,       iptr->dst);
 738                         M_COPY(src->prev, iptr->dst->prev);
 739                         break;
 740
 741                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 742
 743                         M_COPY(src,             iptr->dst);
 744                         M_COPY(src->prev,       iptr->dst->prev);
 745                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 746                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 747                         M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
 748                         break;
 749
 750                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 751
 752                         M_COPY(src,                   iptr->dst);
 753                         M_COPY(src->prev,             iptr->dst->prev);
 754                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 755                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 756                         M_COPY(iptr->dst,             iptr->dst->prev->prev->prev->prev);
 757                         M_COPY(iptr->dst->prev,       iptr->dst->prev->prev->prev->prev->prev);
 758                         break;
 759
 760                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 761
 762                         M_COPY(src,       iptr->dst->prev);
 763                         M_COPY(src->prev, iptr->dst);
 764                         break;
 765
 766
 767                 /* integer operations *************************************************/
 768
 769                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 770
 771                         var_to_reg_int(s1, src, REG_ITMP1);
 772                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 773                         M_ISUB(REG_ZERO, s1, d);
 774                         store_reg_to_var_int(iptr->dst, d);
 775                         break;
 776
 777                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 778
 779                         var_to_reg_int(s1, src, REG_ITMP1);
 780                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 781                         M_LSUB(REG_ZERO, s1, d);
 782                         store_reg_to_var_int(iptr->dst, d);
 783                         break;
 784
 785                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 786
 787                         var_to_reg_int(s1, src, REG_ITMP1);
 788                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 789                         M_INTMOVE(s1, d);
 790                         store_reg_to_var_int(iptr->dst, d);
 791                         break;
 792
 793                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 794
 795                         var_to_reg_int(s1, src, REG_ITMP1);
 796                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 797                         M_IADD(s1, REG_ZERO, d );
 798                         store_reg_to_var_int(iptr->dst, d);
 799                         break;
 800
 801                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 802
 803                         var_to_reg_int(s1, src, REG_ITMP1);
 804                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 805                         if (has_ext_instr_set) {
 806                                 M_BSEXT(s1, d);
 807                                 }
 808                         else {
 809                                 M_SLL_IMM(s1, 56, d);
 810                                 M_SRA_IMM( d, 56, d);
 811                                 }
 812                         store_reg_to_var_int(iptr->dst, d);
 813                         break;
 814
 815                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 816
 817                         var_to_reg_int(s1, src, REG_ITMP1);
 818                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 819             M_CZEXT(s1, d);
 820                         store_reg_to_var_int(iptr->dst, d);
 821                         break;
 822
 823                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 824
 825                         var_to_reg_int(s1, src, REG_ITMP1);
 826                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 827                         if (has_ext_instr_set) {
 828                                 M_SSEXT(s1, d);
 829                                 }
 830                         else {
 831                                 M_SLL_IMM(s1, 48, d);
 832                                 M_SRA_IMM( d, 48, d);
 833                                 }
 834                         store_reg_to_var_int(iptr->dst, d);
 835                         break;
 836
 837
 838                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 839
 840                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 841                         var_to_reg_int(s2, src, REG_ITMP2);
 842                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 843                         M_IADD(s1, s2, d);
 844                         store_reg_to_var_int(iptr->dst, d);
 845                         break;
 846
 847                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 848                                       /* val.i = constant                             */
 849
 850                         var_to_reg_int(s1, src, REG_ITMP1);
 851                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 852                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 853                                 M_IADD_IMM(s1, iptr->val.i, d);
 854                                 }
 855                         else {
 856                                 ICONST(REG_ITMP2, iptr->val.i);
 857                                 M_IADD(s1, REG_ITMP2, d);
 858                                 }
 859                         store_reg_to_var_int(iptr->dst, d);
 860                         break;
 861
 862                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 863
 864                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 865                         var_to_reg_int(s2, src, REG_ITMP2);
 866                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 867                         M_LADD(s1, s2, d);
 868                         store_reg_to_var_int(iptr->dst, d);
 869                         break;
 870
 871                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 872                                       /* val.l = constant                             */
 873
 874                         var_to_reg_int(s1, src, REG_ITMP1);
 875                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 876                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 877                                 M_LADD_IMM(s1, iptr->val.l, d);
 878                                 }
 879                         else {
 880                                 LCONST(REG_ITMP2, iptr->val.l);
 881                                 M_LADD(s1, REG_ITMP2, d);
 882                                 }
 883                         store_reg_to_var_int(iptr->dst, d);
 884                         break;
 885
 886                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 887
 888                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 889                         var_to_reg_int(s2, src, REG_ITMP2);
 890                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 891                         M_ISUB(s1, s2, d);
 892                         store_reg_to_var_int(iptr->dst, d);
 893                         break;
 894
 895                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 896                                       /* val.i = constant                             */
 897
 898                         var_to_reg_int(s1, src, REG_ITMP1);
 899                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 900                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 901                                 M_ISUB_IMM(s1, iptr->val.i, d);
 902                                 }
 903                         else {
 904                                 ICONST(REG_ITMP2, iptr->val.i);
 905                                 M_ISUB(s1, REG_ITMP2, d);
 906                                 }
 907                         store_reg_to_var_int(iptr->dst, d);
 908                         break;
 909
 910                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 911
 912                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 913                         var_to_reg_int(s2, src, REG_ITMP2);
 914                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 915                         M_LSUB(s1, s2, d);
 916                         store_reg_to_var_int(iptr->dst, d);
 917                         break;
 918
 919                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 920                                       /* val.l = constant                             */
 921
 922                         var_to_reg_int(s1, src, REG_ITMP1);
 923                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 924                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 925                                 M_LSUB_IMM(s1, iptr->val.l, d);
 926                                 }
 927                         else {
 928                                 LCONST(REG_ITMP2, iptr->val.l);
 929                                 M_LSUB(s1, REG_ITMP2, d);
 930                                 }
 931                         store_reg_to_var_int(iptr->dst, d);
 932                         break;
 933
 934                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 935
 936                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 937                         var_to_reg_int(s2, src, REG_ITMP2);
 938                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 939                         M_IMUL(s1, s2, d);
 940                         store_reg_to_var_int(iptr->dst, d);
 941                         break;
 942
 943                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 944                                       /* val.i = constant                             */
 945
 946                         var_to_reg_int(s1, src, REG_ITMP1);
 947                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 948                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 949                                 M_IMUL_IMM(s1, iptr->val.i, d);
 950                                 }
 951                         else {
 952                                 ICONST(REG_ITMP2, iptr->val.i);
 953                                 M_IMUL(s1, REG_ITMP2, d);
 954                                 }
 955                         store_reg_to_var_int(iptr->dst, d);
 956                         break;
 957
 958                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 959
 960                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 961                         var_to_reg_int(s2, src, REG_ITMP2);
 962                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 963                         M_LMUL (s1, s2, d);
 964                         store_reg_to_var_int(iptr->dst, d);
 965                         break;
 966
 967                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
 968                                       /* val.l = constant                             */
 969
 970                         var_to_reg_int(s1, src, REG_ITMP1);
 971                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 972                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 973                                 M_LMUL_IMM(s1, iptr->val.l, d);
 974                                 }
 975                         else {
 976                                 LCONST(REG_ITMP2, iptr->val.l);
 977                                 M_LMUL(s1, REG_ITMP2, d);
 978                                 }
 979                         store_reg_to_var_int(iptr->dst, d);
 980                         break;
 981
 982                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
 983                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
 984
 985                         var_to_reg_int(s1, src, REG_ITMP1);
 986                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 987                         if (iptr->val.i <= 15) {
 988                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
 989                                 M_CMOVGE(s1, s1, REG_ITMP2);
 990                                 }
 991                         else {
 992                                 M_SRA_IMM(s1, 63, REG_ITMP2);
 993                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
 994                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
 995                                 }
 996                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
 997                         store_reg_to_var_int(iptr->dst, d);
 998                         break;
 999
1000                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1001
1002                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1003                         var_to_reg_int(s2, src, REG_ITMP2);
1004                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1005                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1006                         M_SLL(s1, REG_ITMP3, d);
1007                         M_IADD(d, REG_ZERO, d);
1008                         store_reg_to_var_int(iptr->dst, d);
1009                         break;
1010
1011                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1012                                       /* val.i = constant                             */
1013
1014                         var_to_reg_int(s1, src, REG_ITMP1);
1015                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1016                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
1017                         M_IADD(d, REG_ZERO, d);
1018                         store_reg_to_var_int(iptr->dst, d);
1019                         break;
1020
1021                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1022
1023                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1024                         var_to_reg_int(s2, src, REG_ITMP2);
1025                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1026                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1027                         M_SRA(s1, REG_ITMP3, d);
1028                         store_reg_to_var_int(iptr->dst, d);
1029                         break;
1030
1031                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1032                                       /* val.i = constant                             */
1033
1034                         var_to_reg_int(s1, src, REG_ITMP1);
1035                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1036                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1037                         store_reg_to_var_int(iptr->dst, d);
1038                         break;
1039
1040                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1041
1042                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1043                         var_to_reg_int(s2, src, REG_ITMP2);
1044                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1045                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1046             M_IZEXT(s1, d);
1047                         M_SRL(d, REG_ITMP2, d);
1048                         M_IADD(d, REG_ZERO, d);
1049                         store_reg_to_var_int(iptr->dst, d);
1050                         break;
1051
1052                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1053                                       /* val.i = constant                             */
1054
1055                         var_to_reg_int(s1, src, REG_ITMP1);
1056                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1057             M_IZEXT(s1, d);
1058                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
1059                         M_IADD(d, REG_ZERO, d);
1060                         store_reg_to_var_int(iptr->dst, d);
1061                         break;
1062
1063                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1064
1065                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1066                         var_to_reg_int(s2, src, REG_ITMP2);
1067                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1068                         M_SLL(s1, s2, d);
1069                         store_reg_to_var_int(iptr->dst, d);
1070                         break;
1071
1072                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1073                                       /* val.i = constant                             */
1074
1075                         var_to_reg_int(s1, src, REG_ITMP1);
1076                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1077                         M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
1078                         store_reg_to_var_int(iptr->dst, d);
1079                         break;
1080
1081                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1082
1083                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1084                         var_to_reg_int(s2, src, REG_ITMP2);
1085                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1086                         M_SRA(s1, s2, d);
1087                         store_reg_to_var_int(iptr->dst, d);
1088                         break;
1089
1090                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1091                                       /* val.i = constant                             */
1092
1093                         var_to_reg_int(s1, src, REG_ITMP1);
1094                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1095                         M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
1096                         store_reg_to_var_int(iptr->dst, d);
1097                         break;
1098
1099                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1100
1101                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1102                         var_to_reg_int(s2, src, REG_ITMP2);
1103                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1104                         M_SRL(s1, s2, d);
1105                         store_reg_to_var_int(iptr->dst, d);
1106                         break;
1107
1108                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1109                                       /* val.i = constant                             */
1110
1111                         var_to_reg_int(s1, src, REG_ITMP1);
1112                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1113                         M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
1114                         store_reg_to_var_int(iptr->dst, d);
1115                         break;
1116
1117                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1118                 case ICMD_LAND:
1119
1120                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1121                         var_to_reg_int(s2, src, REG_ITMP2);
1122                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1123                         M_AND(s1, s2, d);
1124                         store_reg_to_var_int(iptr->dst, d);
1125                         break;
1126
1127                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1128                                       /* val.i = constant                             */
1129
1130                         var_to_reg_int(s1, src, REG_ITMP1);
1131                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1132                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1133                                 M_AND_IMM(s1, iptr->val.i, d);
1134                                 }
1135                         else if (iptr->val.i == 0xffff) {
1136                                 M_CZEXT(s1, d);
1137                                 }
1138                         else if (iptr->val.i == 0xffffff) {
1139                                 M_ZAPNOT_IMM(s1, 0x07, d);
1140                                 }
1141                         else {
1142                                 ICONST(REG_ITMP2, iptr->val.i);
1143                                 M_AND(s1, REG_ITMP2, d);
1144                                 }
1145                         store_reg_to_var_int(iptr->dst, d);
1146                         break;
1147
1148                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1149                                       /* val.i = constant                             */
1150
1151                         var_to_reg_int(s1, src, REG_ITMP1);
1152                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1153                         if (s1 == d) {
1154                                 M_MOV(s1, REG_ITMP1);
1155                                 s1 = REG_ITMP1;
1156                                 }
1157                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1158                                 M_AND_IMM(s1, iptr->val.i, d);
1159                                 M_BGEZ(s1, 3);
1160                                 M_ISUB(REG_ZERO, s1, d);
1161                                 M_AND_IMM(d, iptr->val.i, d);
1162                                 }
1163                         else if (iptr->val.i == 0xffff) {
1164                                 M_CZEXT(s1, d);
1165                                 M_BGEZ(s1, 3);
1166                                 M_ISUB(REG_ZERO, s1, d);
1167                                 M_CZEXT(d, d);
1168                                 }
1169                         else if (iptr->val.i == 0xffffff) {
1170                                 M_ZAPNOT_IMM(s1, 0x07, d);
1171                                 M_BGEZ(s1, 3);
1172                                 M_ISUB(REG_ZERO, s1, d);
1173                                 M_ZAPNOT_IMM(d, 0x07, d);
1174                                 }
1175                         else {
1176                                 ICONST(REG_ITMP2, iptr->val.i);
1177                                 M_AND(s1, REG_ITMP2, d);
1178                                 M_BGEZ(s1, 3);
1179                                 M_ISUB(REG_ZERO, s1, d);
1180                                 M_AND(d, REG_ITMP2, d);
1181                                 }
1182                         M_ISUB(REG_ZERO, d, d);
1183                         store_reg_to_var_int(iptr->dst, d);
1184                         break;
1185
1186                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1187                                       /* val.l = constant                             */
1188
1189                         var_to_reg_int(s1, src, REG_ITMP1);
1190                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1191                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1192                                 M_AND_IMM(s1, iptr->val.l, d);
1193                                 }
1194                         else if (iptr->val.l == 0xffffL) {
1195                                 M_CZEXT(s1, d);
1196                                 }
1197                         else if (iptr->val.l == 0xffffffL) {
1198                                 M_ZAPNOT_IMM(s1, 0x07, d);
1199                                 }
1200                         else if (iptr->val.l == 0xffffffffL) {
1201                                 M_IZEXT(s1, d);
1202                                 }
1203                         else if (iptr->val.l == 0xffffffffffL) {
1204                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1205                                 }
1206                         else if (iptr->val.l == 0xffffffffffffL) {
1207                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1208                                 }
1209                         else if (iptr->val.l == 0xffffffffffffffL) {
1210                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1211                                 }
1212                         else {
1213                                 LCONST(REG_ITMP2, iptr->val.l);
1214                                 M_AND(s1, REG_ITMP2, d);
1215                                 }
1216                         store_reg_to_var_int(iptr->dst, d);
1217                         break;
1218
1219                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1220                                       /* val.l = constant                             */
1221
1222                         var_to_reg_int(s1, src, REG_ITMP1);
1223                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1224                         if (s1 == d) {
1225                                 M_MOV(s1, REG_ITMP1);
1226                                 s1 = REG_ITMP1;
1227                                 }
1228                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1229                                 M_AND_IMM(s1, iptr->val.l, d);
1230                                 M_BGEZ(s1, 3);
1231                                 M_LSUB(REG_ZERO, s1, d);
1232                                 M_AND_IMM(d, iptr->val.l, d);
1233                                 }
1234                         else if (iptr->val.l == 0xffffL) {
1235                                 M_CZEXT(s1, d);
1236                                 M_BGEZ(s1, 3);
1237                                 M_LSUB(REG_ZERO, s1, d);
1238                                 M_CZEXT(d, d);
1239                                 }
1240                         else if (iptr->val.l == 0xffffffL) {
1241                                 M_ZAPNOT_IMM(s1, 0x07, d);
1242                                 M_BGEZ(s1, 3);
1243                                 M_LSUB(REG_ZERO, s1, d);
1244                                 M_ZAPNOT_IMM(d, 0x07, d);
1245                                 }
1246                         else if (iptr->val.l == 0xffffffffL) {
1247                                 M_IZEXT(s1, d);
1248                                 M_BGEZ(s1, 3);
1249                                 M_LSUB(REG_ZERO, s1, d);
1250                                 M_IZEXT(d, d);
1251                                 }
1252                         else if (iptr->val.l == 0xffffffffffL) {
1253                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1254                                 M_BGEZ(s1, 3);
1255                                 M_LSUB(REG_ZERO, s1, d);
1256                                 M_ZAPNOT_IMM(d, 0x1f, d);
1257                                 }
1258                         else if (iptr->val.l == 0xffffffffffffL) {
1259                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1260                                 M_BGEZ(s1, 3);
1261                                 M_LSUB(REG_ZERO, s1, d);
1262                                 M_ZAPNOT_IMM(d, 0x3f, d);
1263                                 }
1264                         else if (iptr->val.l == 0xffffffffffffffL) {
1265                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1266                                 M_BGEZ(s1, 3);
1267                                 M_LSUB(REG_ZERO, s1, d);
1268                                 M_ZAPNOT_IMM(d, 0x7f, d);
1269                                 }
1270                         else {
1271                                 LCONST(REG_ITMP2, iptr->val.l);
1272                                 M_AND(s1, REG_ITMP2, d);
1273                                 M_BGEZ(s1, 3);
1274                                 M_LSUB(REG_ZERO, s1, d);
1275                                 M_AND(d, REG_ITMP2, d);
1276                                 }
1277                         M_LSUB(REG_ZERO, d, d);
1278                         store_reg_to_var_int(iptr->dst, d);
1279                         break;
1280
1281                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1282                 case ICMD_LOR:
1283
1284                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1285                         var_to_reg_int(s2, src, REG_ITMP2);
1286                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1287                         M_OR( s1,s2, d);
1288                         store_reg_to_var_int(iptr->dst, d);
1289                         break;
1290
1291                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1292                                       /* val.i = constant                             */
1293
1294                         var_to_reg_int(s1, src, REG_ITMP1);
1295                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1296                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1297                                 M_OR_IMM(s1, iptr->val.i, d);
1298                                 }
1299                         else {
1300                                 ICONST(REG_ITMP2, iptr->val.i);
1301                                 M_OR(s1, REG_ITMP2, d);
1302                                 }
1303                         store_reg_to_var_int(iptr->dst, d);
1304                         break;
1305
1306                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1307                                       /* val.l = constant                             */
1308
1309                         var_to_reg_int(s1, src, REG_ITMP1);
1310                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1311                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1312                                 M_OR_IMM(s1, iptr->val.l, d);
1313                                 }
1314                         else {
1315                                 LCONST(REG_ITMP2, iptr->val.l);
1316                                 M_OR(s1, REG_ITMP2, d);
1317                                 }
1318                         store_reg_to_var_int(iptr->dst, d);
1319                         break;
1320
1321                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1322                 case ICMD_LXOR:
1323
1324                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1325                         var_to_reg_int(s2, src, REG_ITMP2);
1326                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1327                         M_XOR(s1, s2, d);
1328                         store_reg_to_var_int(iptr->dst, d);
1329                         break;
1330
1331                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1332                                       /* val.i = constant                             */
1333
1334                         var_to_reg_int(s1, src, REG_ITMP1);
1335                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1336                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1337                                 M_XOR_IMM(s1, iptr->val.i, d);
1338                                 }
1339                         else {
1340                                 ICONST(REG_ITMP2, iptr->val.i);
1341                                 M_XOR(s1, REG_ITMP2, d);
1342                                 }
1343                         store_reg_to_var_int(iptr->dst, d);
1344                         break;
1345
1346                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1347                                       /* val.l = constant                             */
1348
1349                         var_to_reg_int(s1, src, REG_ITMP1);
1350                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1351                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1352                                 M_XOR_IMM(s1, iptr->val.l, d);
1353                                 }
1354                         else {
1355                                 LCONST(REG_ITMP2, iptr->val.l);
1356                                 M_XOR(s1, REG_ITMP2, d);
1357                                 }
1358                         store_reg_to_var_int(iptr->dst, d);
1359                         break;
1360
1361
1362                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1363
1364                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1365                         var_to_reg_int(s2, src, REG_ITMP2);
1366                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1367                         M_CMPLT(s1, s2, REG_ITMP3);
1368                         M_CMPLT(s2, s1, REG_ITMP1);
1369                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1370                         store_reg_to_var_int(iptr->dst, d);
1371                         break;
1372
1373
1374                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1375                                       /* op1 = variable, val.i = constant             */
1376
1377                         var = &(rd->locals[iptr->op1][TYPE_INT]);
1378                         if (var->flags & INMEMORY) {
1379                                 s1 = REG_ITMP1;
1380                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1381                                 }
1382                         else
1383                                 s1 = var->regoff;
1384                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1385                                 M_IADD_IMM(s1, iptr->val.i, s1);
1386                                 }
1387                         else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1388                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1389                                 }
1390                         else {
1391                                 M_LDA (s1, s1, iptr->val.i);
1392                                 M_IADD(s1, REG_ZERO, s1);
1393                                 }
1394                         if (var->flags & INMEMORY)
1395                                 M_LST(s1, REG_SP, 8 * var->regoff);
1396                         break;
1397
1398
1399                 /* floating operations ************************************************/
1400
1401                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1402
1403                         var_to_reg_flt(s1, src, REG_FTMP1);
1404                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1405                         M_FMOVN(s1, d);
1406                         store_reg_to_var_flt(iptr->dst, d);
1407                         break;
1408
1409                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1410
1411                         var_to_reg_flt(s1, src, REG_FTMP1);
1412                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1413                         M_FMOVN(s1, d);
1414                         store_reg_to_var_flt(iptr->dst, d);
1415                         break;
1416
1417                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1418
1419                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1420                         var_to_reg_flt(s2, src, REG_FTMP2);
1421                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1422                         if (opt_noieee) {
1423                                 M_FADD(s1, s2, d);
1424                                 }
1425                         else {
1426                                 if (d == s1 || d == s2) {
1427                                         M_FADDS(s1, s2, REG_FTMP3);
1428                                         M_TRAPB;
1429                                         M_FMOV(REG_FTMP3, d);
1430                                         }
1431                                 else {
1432                                         M_FADDS(s1, s2, d);
1433                                         M_TRAPB;
1434                                         }
1435                                 }
1436                         store_reg_to_var_flt(iptr->dst, d);
1437                         break;
1438
1439                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1440
1441                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1442                         var_to_reg_flt(s2, src, REG_FTMP2);
1443                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1444                         if (opt_noieee) {
1445                                 M_DADD(s1, s2, d);
1446                                 }
1447                         else {
1448                                 if (d == s1 || d == s2) {
1449                                         M_DADDS(s1, s2, REG_FTMP3);
1450                                         M_TRAPB;
1451                                         M_FMOV(REG_FTMP3, d);
1452                                         }
1453                                 else {
1454                                         M_DADDS(s1, s2, d);
1455                                         M_TRAPB;
1456                                         }
1457                                 }
1458                         store_reg_to_var_flt(iptr->dst, d);
1459                         break;
1460
1461                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1462
1463                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1464                         var_to_reg_flt(s2, src, REG_FTMP2);
1465                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1466                         if (opt_noieee) {
1467                                 M_FSUB(s1, s2, d);
1468                                 }
1469                         else {
1470                                 if (d == s1 || d == s2) {
1471                                         M_FSUBS(s1, s2, REG_FTMP3);
1472                                         M_TRAPB;
1473                                         M_FMOV(REG_FTMP3, d);
1474                                         }
1475                                 else {
1476                                         M_FSUBS(s1, s2, d);
1477                                         M_TRAPB;
1478                                         }
1479                                 }
1480                         store_reg_to_var_flt(iptr->dst, d);
1481                         break;
1482
1483                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1484
1485                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1486                         var_to_reg_flt(s2, src, REG_FTMP2);
1487                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1488                         if (opt_noieee) {
1489                                 M_DSUB(s1, s2, d);
1490                                 }
1491                         else {
1492                                 if (d == s1 || d == s2) {
1493                                         M_DSUBS(s1, s2, REG_FTMP3);
1494                                         M_TRAPB;
1495                                         M_FMOV(REG_FTMP3, d);
1496                                         }
1497                                 else {
1498                                         M_DSUBS(s1, s2, d);
1499                                         M_TRAPB;
1500                                         }
1501                                 }
1502                         store_reg_to_var_flt(iptr->dst, d);
1503                         break;
1504
1505                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1506
1507                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1508                         var_to_reg_flt(s2, src, REG_FTMP2);
1509                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1510                         if (opt_noieee) {
1511                                 M_FMUL(s1, s2, d);
1512                                 }
1513                         else {
1514                                 if (d == s1 || d == s2) {
1515                                         M_FMULS(s1, s2, REG_FTMP3);
1516                                         M_TRAPB;
1517                                         M_FMOV(REG_FTMP3, d);
1518                                         }
1519                                 else {
1520                                         M_FMULS(s1, s2, d);
1521                                         M_TRAPB;
1522                                         }
1523                                 }
1524                         store_reg_to_var_flt(iptr->dst, d);
1525                         break;
1526
1527                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1528
1529                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1530                         var_to_reg_flt(s2, src, REG_FTMP2);
1531                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1532                         if (opt_noieee) {
1533                                 M_DMUL(s1, s2, d);
1534                                 }
1535                         else {
1536                                 if (d == s1 || d == s2) {
1537                                         M_DMULS(s1, s2, REG_FTMP3);
1538                                         M_TRAPB;
1539                                         M_FMOV(REG_FTMP3, d);
1540                                         }
1541                                 else {
1542                                         M_DMULS(s1, s2, d);
1543                                         M_TRAPB;
1544                                         }
1545                                 }
1546                         store_reg_to_var_flt(iptr->dst, d);
1547                         break;
1548
1549                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1550
1551                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1552                         var_to_reg_flt(s2, src, REG_FTMP2);
1553                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1554                         if (opt_noieee) {
1555                                 M_FDIV(s1, s2, d);
1556                                 }
1557                         else {
1558                                 if (d == s1 || d == s2) {
1559                                         M_FDIVS(s1, s2, REG_FTMP3);
1560                                         M_TRAPB;
1561                                         M_FMOV(REG_FTMP3, d);
1562                                         }
1563                                 else {
1564                                         M_FDIVS(s1, s2, d);
1565                                         M_TRAPB;
1566                                         }
1567                                 }
1568                         store_reg_to_var_flt(iptr->dst, d);
1569                         break;
1570
1571                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1572
1573                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1574                         var_to_reg_flt(s2, src, REG_FTMP2);
1575                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1576                         if (opt_noieee) {
1577                                 M_DDIV(s1, s2, d);
1578                                 }
1579                         else {
1580                                 if (d == s1 || d == s2) {
1581                                         M_DDIVS(s1, s2, REG_FTMP3);
1582                                         M_TRAPB;
1583                                         M_FMOV(REG_FTMP3, d);
1584                                         }
1585                                 else {
1586                                         M_DDIVS(s1, s2, d);
1587                                         M_TRAPB;
1588                                         }
1589                                 }
1590                         store_reg_to_var_flt(iptr->dst, d);
1591                         break;
1592
1593                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1594                 case ICMD_L2F:
1595                         var_to_reg_int(s1, src, REG_ITMP1);
1596                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1597                         a = dseg_adddouble(cd, 0.0);
1598                         M_LST (s1, REG_PV, a);
1599                         M_DLD (d, REG_PV, a);
1600                         M_CVTLF(d, d);
1601                         store_reg_to_var_flt(iptr->dst, d);
1602                         break;
1603
1604                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1605                 case ICMD_L2D:
1606                         var_to_reg_int(s1, src, REG_ITMP1);
1607                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1608                         a = dseg_adddouble(cd, 0.0);
1609                         M_LST (s1, REG_PV, a);
1610                         M_DLD (d, REG_PV, a);
1611                         M_CVTLD(d, d);
1612                         store_reg_to_var_flt(iptr->dst, d);
1613                         break;
1614
1615                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1616                 case ICMD_D2I:
1617                         var_to_reg_flt(s1, src, REG_FTMP1);
1618                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1619                         a = dseg_adddouble(cd, 0.0);
1620                         M_CVTDL_C(s1, REG_FTMP2);
1621                         M_CVTLI(REG_FTMP2, REG_FTMP3);
1622                         M_DST (REG_FTMP3, REG_PV, a);
1623                         M_ILD (d, REG_PV, a);
1624                         store_reg_to_var_int(iptr->dst, d);
1625                         break;
1626
1627                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1628                 case ICMD_D2L:
1629                         var_to_reg_flt(s1, src, REG_FTMP1);
1630                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1631                         a = dseg_adddouble(cd, 0.0);
1632                         M_CVTDL_C(s1, REG_FTMP2);
1633                         M_DST (REG_FTMP2, REG_PV, a);
1634                         M_LLD (d, REG_PV, a);
1635                         store_reg_to_var_int(iptr->dst, d);
1636                         break;
1637
1638                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1639
1640                         var_to_reg_flt(s1, src, REG_FTMP1);
1641                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1642                         M_CVTFDS(s1, d);
1643                         M_TRAPB;
1644                         store_reg_to_var_flt(iptr->dst, d);
1645                         break;
1646
1647                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1648
1649                         var_to_reg_flt(s1, src, REG_FTMP1);
1650                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1651                         if (opt_noieee) {
1652                                 M_CVTDF(s1, d);
1653                                 }
1654                         else {
1655                                 M_CVTDFS(s1, d);
1656                                 M_TRAPB;
1657                                 }
1658                         store_reg_to_var_flt(iptr->dst, d);
1659                         break;
1660
1661                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1662                 case ICMD_DCMPL:
1663                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1664                         var_to_reg_flt(s2, src, REG_FTMP2);
1665                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1666                         if (opt_noieee) {
1667                                 M_LSUB_IMM(REG_ZERO, 1, d);
1668                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1669                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1670                                 M_CLR   (d);
1671                                 M_FCMPLT(s2, s1, REG_FTMP3);
1672                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1673                                 M_LADD_IMM(REG_ZERO, 1, d);
1674                                 }
1675                         else {
1676                                 M_LSUB_IMM(REG_ZERO, 1, d);
1677                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1678                                 M_TRAPB;
1679                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1680                                 M_CLR   (d);
1681                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1682                                 M_TRAPB;
1683                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1684                                 M_LADD_IMM(REG_ZERO, 1, d);
1685                                 }
1686                         store_reg_to_var_int(iptr->dst, d);
1687                         break;
1688
1689                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1690                 case ICMD_DCMPG:
1691                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1692                         var_to_reg_flt(s2, src, REG_FTMP2);
1693                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1694                         if (opt_noieee) {
1695                                 M_LADD_IMM(REG_ZERO, 1, d);
1696                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1697                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1698                                 M_CLR   (d);
1699                                 M_FCMPLT(s1, s2, REG_FTMP3);
1700                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1701                                 M_LSUB_IMM(REG_ZERO, 1, d);
1702                                 }
1703                         else {
1704                                 M_LADD_IMM(REG_ZERO, 1, d);
1705                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1706                                 M_TRAPB;
1707                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1708                                 M_CLR   (d);
1709                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1710                                 M_TRAPB;
1711                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1712                                 M_LSUB_IMM(REG_ZERO, 1, d);
1713                                 }
1714                         store_reg_to_var_int(iptr->dst, d);
1715                         break;
1716
1717
1718                 /* memory operations **************************************************/
1719
1720                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1721
1722                         var_to_reg_int(s1, src, REG_ITMP1);
1723                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1724                         gen_nullptr_check(s1);
1725                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1726                         store_reg_to_var_int(iptr->dst, d);
1727                         break;
1728
1729                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1730
1731                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1732                         var_to_reg_int(s2, src, REG_ITMP2);
1733                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1734                         if (iptr->op1 == 0) {
1735                                 gen_nullptr_check(s1);
1736                                 gen_bound_check;
1737                                 }
1738                         M_SAADDQ(s2, s1, REG_ITMP1);
1739                         M_ALD( d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1740                         store_reg_to_var_int(iptr->dst, d);
1741                         break;
1742
1743                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1744
1745                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1746                         var_to_reg_int(s2, src, REG_ITMP2);
1747                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1748                         if (iptr->op1 == 0) {
1749                                 gen_nullptr_check(s1);
1750                                 gen_bound_check;
1751                                 }
1752                         M_S8ADDQ(s2, s1, REG_ITMP1);
1753                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1754                         store_reg_to_var_int(iptr->dst, d);
1755                         break;
1756
1757                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1758
1759                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1760                         var_to_reg_int(s2, src, REG_ITMP2);
1761                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1762                         if (iptr->op1 == 0) {
1763                                 gen_nullptr_check(s1);
1764                                 gen_bound_check;
1765                                 }
1766
1767                         M_S4ADDQ(s2, s1, REG_ITMP1);
1768                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1769                         store_reg_to_var_int(iptr->dst, d);
1770                         break;
1771
1772                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1773
1774                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1775                         var_to_reg_int(s2, src, REG_ITMP2);
1776                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1777                         if (iptr->op1 == 0) {
1778                                 gen_nullptr_check(s1);
1779                                 gen_bound_check;
1780                                 }
1781                         M_S4ADDQ(s2, s1, REG_ITMP1);
1782                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1783                         store_reg_to_var_flt(iptr->dst, d);
1784                         break;
1785
1786                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1787
1788                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1789                         var_to_reg_int(s2, src, REG_ITMP2);
1790                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1791                         if (iptr->op1 == 0) {
1792                                 gen_nullptr_check(s1);
1793                                 gen_bound_check;
1794                                 }
1795                         M_S8ADDQ(s2, s1, REG_ITMP1);
1796                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1797                         store_reg_to_var_flt(iptr->dst, d);
1798                         break;
1799
1800                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1801
1802                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1803                         var_to_reg_int(s2, src, REG_ITMP2);
1804                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1805                         if (iptr->op1 == 0) {
1806                                 gen_nullptr_check(s1);
1807                                 gen_bound_check;
1808                                 }
1809                         if (has_ext_instr_set) {
1810                                 M_LADD(s2, s1, REG_ITMP1);
1811                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1812                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1813                                 }
1814                         else {
1815                                 M_LADD (s2, s1, REG_ITMP1);
1816                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1817                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1818                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1819                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
1820                                 }
1821                         store_reg_to_var_int(iptr->dst, d);
1822                         break;
1823
1824                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1825
1826                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1827                         var_to_reg_int(s2, src, REG_ITMP2);
1828                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1829                         if (iptr->op1 == 0) {
1830                                 gen_nullptr_check(s1);
1831                                 gen_bound_check;
1832                                 }
1833                         if (has_ext_instr_set) {
1834                                 M_LADD(s2, s1, REG_ITMP1);
1835                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1836                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
1837                                 M_SSEXT(d, d);
1838                                 }
1839                         else {
1840                                 M_LADD(s2, s1, REG_ITMP1);
1841                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1842                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1843                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
1844                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1845                                 M_SRA_IMM(d, 48, d);
1846                                 }
1847                         store_reg_to_var_int(iptr->dst, d);
1848                         break;
1849
1850                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1851
1852                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1853                         var_to_reg_int(s2, src, REG_ITMP2);
1854                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1855                         if (iptr->op1 == 0) {
1856                                 gen_nullptr_check(s1);
1857                                 gen_bound_check;
1858                                 }
1859                         if (has_ext_instr_set) {
1860                                 M_LADD   (s2, s1, REG_ITMP1);
1861                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
1862                                 M_BSEXT  (d, d);
1863                                 }
1864                         else {
1865                                 M_LADD(s2, s1, REG_ITMP1);
1866                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1867                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
1868                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1869                                 M_SRA_IMM(d, 56, d);
1870                                 }
1871                         store_reg_to_var_int(iptr->dst, d);
1872                         break;
1873
1874
1875                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1876
1877                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1878                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1879                         if (iptr->op1 == 0) {
1880                                 gen_nullptr_check(s1);
1881                                 gen_bound_check;
1882                                 }
1883                         var_to_reg_int(s3, src, REG_ITMP3);
1884                         M_SAADDQ(s2, s1, REG_ITMP1);
1885                         M_AST   (s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1886                         break;
1887
1888                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1889
1890                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1891                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1892                         if (iptr->op1 == 0) {
1893                                 gen_nullptr_check(s1);
1894                                 gen_bound_check;
1895                                 }
1896                         var_to_reg_int(s3, src, REG_ITMP3);
1897                         M_S8ADDQ(s2, s1, REG_ITMP1);
1898                         M_LST   (s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1899                         break;
1900
1901                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1902
1903                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1904                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1905                         if (iptr->op1 == 0) {
1906                                 gen_nullptr_check(s1);
1907                                 gen_bound_check;
1908                                 }
1909
1910                         var_to_reg_int(s3, src, REG_ITMP3);
1911                         M_S4ADDQ(s2, s1, REG_ITMP1);
1912                         M_IST   (s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1913                         break;
1914
1915                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1916
1917                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1918                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1919                         if (iptr->op1 == 0) {
1920                                 gen_nullptr_check(s1);
1921                                 gen_bound_check;
1922                                 }
1923                         var_to_reg_flt(s3, src, REG_FTMP3);
1924                         M_S4ADDQ(s2, s1, REG_ITMP1);
1925                         M_FST   (s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1926                         break;
1927
1928                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1929
1930                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1931                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1932                         if (iptr->op1 == 0) {
1933                                 gen_nullptr_check(s1);
1934                                 gen_bound_check;
1935                                 }
1936                         var_to_reg_flt(s3, src, REG_FTMP3);
1937                         M_S8ADDQ(s2, s1, REG_ITMP1);
1938                         M_DST   (s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1939                         break;
1940
1941                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1942
1943                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1944                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1945                         if (iptr->op1 == 0) {
1946                                 gen_nullptr_check(s1);
1947                                 gen_bound_check;
1948                                 }
1949                         var_to_reg_int(s3, src, REG_ITMP3);
1950                         if (has_ext_instr_set) {
1951                                 M_LADD(s2, s1, REG_ITMP1);
1952                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1953                                 M_SST (s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1954                                 }
1955                         else {
1956                                 M_LADD (s2, s1, REG_ITMP1);
1957                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1958                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1959                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1960                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1961                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1962                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
1963                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1964                                 }
1965                         break;
1966
1967                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1968
1969                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1970                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1971                         if (iptr->op1 == 0) {
1972                                 gen_nullptr_check(s1);
1973                                 gen_bound_check;
1974                                 }
1975                         var_to_reg_int(s3, src, REG_ITMP3);
1976                         if (has_ext_instr_set) {
1977                                 M_LADD(s2, s1, REG_ITMP1);
1978                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1979                                 M_SST (s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1980                                 }
1981                         else {
1982                                 M_LADD (s2, s1, REG_ITMP1);
1983                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1984                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1985                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1986                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1987                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1988                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
1989                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1990                                 }
1991                         break;
1992
1993                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1994
1995                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1996                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1997                         if (iptr->op1 == 0) {
1998                                 gen_nullptr_check(s1);
1999                                 gen_bound_check;
2000                                 }
2001                         var_to_reg_int(s3, src, REG_ITMP3);
2002                         if (has_ext_instr_set) {
2003                                 M_LADD(s2, s1, REG_ITMP1);
2004                                 M_BST (s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2005                                 }
2006                         else {
2007                                 M_LADD (s2, s1, REG_ITMP1);
2008                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2009                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2010                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
2011                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2012                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2013                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2014                                 }
2015                         break;
2016
2017
2018                 case ICMD_IASTORECONST:   /* ..., arrayref, index  ==> ...            */
2019
2020                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2021                         var_to_reg_int(s2, src, REG_ITMP2);
2022                         if (iptr->op1 == 0) {
2023                                 gen_nullptr_check(s1);
2024                                 gen_bound_check;
2025                         }
2026                         M_S4ADDQ(s2, s1, REG_ITMP1);
2027                         M_IST(REG_ZERO, REG_ITMP1, OFFSET(java_intarray, data[0]));
2028                         break;
2029
2030                 case ICMD_LASTORECONST:   /* ..., arrayref, index  ==> ...            */
2031
2032                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2033                         var_to_reg_int(s2, src, REG_ITMP2);
2034                         if (iptr->op1 == 0) {
2035                                 gen_nullptr_check(s1);
2036                                 gen_bound_check;
2037                         }
2038                         M_S8ADDQ(s2, s1, REG_ITMP1);
2039                         M_LST(REG_ZERO, REG_ITMP1, OFFSET(java_longarray, data[0]));
2040                         break;
2041
2042                 case ICMD_AASTORECONST:   /* ..., arrayref, index  ==> ...            */
2043
2044                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2045                         var_to_reg_int(s2, src, REG_ITMP2);
2046                         if (iptr->op1 == 0) {
2047                                 gen_nullptr_check(s1);
2048                                 gen_bound_check;
2049                         }
2050                         M_SAADDQ(s2, s1, REG_ITMP1);
2051                         M_AST(REG_ZERO, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2052                         break;
2053
2054                 case ICMD_BASTORECONST:   /* ..., arrayref, index  ==> ...            */
2055
2056                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2057                         var_to_reg_int(s2, src, REG_ITMP2);
2058                         if (iptr->op1 == 0) {
2059                                 gen_nullptr_check(s1);
2060                                 gen_bound_check;
2061                         }
2062                         if (has_ext_instr_set) {
2063                                 M_LADD(s2, s1, REG_ITMP1);
2064                                 M_BST(REG_ZERO, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2065
2066                         } else {
2067                                 M_LADD(s2, s1, REG_ITMP1);
2068                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2069                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2070                                 M_INSBL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2071                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2072                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2073                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2074                         }
2075                         break;
2076
2077                 case ICMD_CASTORECONST:   /* ..., arrayref, index  ==> ...            */
2078
2079                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2080                         var_to_reg_int(s2, src, REG_ITMP2);
2081                         if (iptr->op1 == 0) {
2082                                 gen_nullptr_check(s1);
2083                                 gen_bound_check;
2084                         }
2085                         if (has_ext_instr_set) {
2086                                 M_LADD(s2, s1, REG_ITMP1);
2087                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2088                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_chararray, data[0]));
2089
2090                         } else {
2091                                 M_LADD(s2, s1, REG_ITMP1);
2092                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2093                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2094                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2095                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2096                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2097                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2098                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2099                         }
2100                         break;
2101
2102                 case ICMD_SASTORECONST:   /* ..., arrayref, index  ==> ...            */
2103
2104                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2105                         var_to_reg_int(s2, src, REG_ITMP2);
2106                         if (iptr->op1 == 0) {
2107                                 gen_nullptr_check(s1);
2108                                 gen_bound_check;
2109                         }
2110                         if (has_ext_instr_set) {
2111                                 M_LADD(s2, s1, REG_ITMP1);
2112                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2113                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2114
2115                         } else {
2116                                 M_LADD(s2, s1, REG_ITMP1);
2117                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2118                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2119                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2120                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2121                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2122                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2123                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2124                         }
2125                         break;
2126
2127
2128                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2129                                       /* op1 = type, val.a = field address            */
2130
2131                         if (!iptr->val.a) {
2132                                 codegen_addpatchref(cd, mcodeptr,
2133                                                                         PATCHER_get_putstatic,
2134                                                                         (unresolved_field *) iptr->target);
2135
2136                                 if (showdisassemble)
2137                                         M_NOP;
2138
2139                                 a = 0;
2140
2141                         } else {
2142                                 fieldinfo *fi = iptr->val.a;
2143
2144                                 if (!fi->class->initialized) {
2145                                         codegen_addpatchref(cd, mcodeptr,
2146                                                                                 PATCHER_clinit, fi->class);
2147
2148                                         if (showdisassemble)
2149                                                 M_NOP;
2150                                 }
2151
2152                                 a = (ptrint) &(fi->value);
2153                         }
2154
2155                         a = dseg_addaddress(cd, a);
2156                         M_ALD(REG_ITMP1, REG_PV, a);
2157                         switch (iptr->op1) {
2158                         case TYPE_INT:
2159                                 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2160                                 M_ILD(d, REG_ITMP1, 0);
2161                                 store_reg_to_var_int(iptr->dst, d);
2162                                 break;
2163                         case TYPE_LNG:
2164                                 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2165                                 M_LLD(d, REG_ITMP1, 0);
2166                                 store_reg_to_var_int(iptr->dst, d);
2167                                 break;
2168                         case TYPE_ADR:
2169                                 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2170                                 M_ALD(d, REG_ITMP1, 0);
2171                                 store_reg_to_var_int(iptr->dst, d);
2172                                 break;
2173                         case TYPE_FLT:
2174                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2175                                 M_FLD(d, REG_ITMP1, 0);
2176                                 store_reg_to_var_flt(iptr->dst, d);
2177                                 break;
2178                         case TYPE_DBL:
2179                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2180                                 M_DLD(d, REG_ITMP1, 0);
2181                                 store_reg_to_var_flt(iptr->dst, d);
2182                                 break;
2183                         }
2184                         break;
2185
2186                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2187                                       /* op1 = type, val.a = field address            */
2188
2189                         if (!iptr->val.a) {
2190                                 codegen_addpatchref(cd, mcodeptr,
2191                                                                         PATCHER_get_putstatic,
2192                                                                         (unresolved_field *) iptr->target);
2193
2194                                 if (showdisassemble)
2195                                         M_NOP;
2196
2197                                 a = 0;
2198
2199                         } else {
2200                                 fieldinfo *fi = iptr->val.a;
2201
2202                                 if (!fi->class->initialized) {
2203                                         codegen_addpatchref(cd, mcodeptr,
2204                                                                                 PATCHER_clinit, fi->class);
2205
2206                                         if (showdisassemble)
2207                                                 M_NOP;
2208                                 }
2209
2210                                 a = (ptrint) &(fi->value);
2211                         }
2212
2213                         a = dseg_addaddress(cd, a);
2214                         M_ALD(REG_ITMP1, REG_PV, a);
2215                         switch (iptr->op1) {
2216                         case TYPE_INT:
2217                                 var_to_reg_int(s2, src, REG_ITMP2);
2218                                 M_IST(s2, REG_ITMP1, 0);
2219                                 break;
2220                         case TYPE_LNG:
2221                                 var_to_reg_int(s2, src, REG_ITMP2);
2222                                 M_LST(s2, REG_ITMP1, 0);
2223                                 break;
2224                         case TYPE_ADR:
2225                                 var_to_reg_int(s2, src, REG_ITMP2);
2226                                 M_AST(s2, REG_ITMP1, 0);
2227                                 break;
2228                         case TYPE_FLT:
2229                                 var_to_reg_flt(s2, src, REG_FTMP2);
2230                                 M_FST(s2, REG_ITMP1, 0);
2231                                 break;
2232                         case TYPE_DBL:
2233                                 var_to_reg_flt(s2, src, REG_FTMP2);
2234                                 M_DST(s2, REG_ITMP1, 0);
2235                                 break;
2236                         }
2237                         break;
2238
2239                 case ICMD_PUTSTATICCONST: /* ...  ==> ...                             */
2240                                           /* val = value (in current instruction)     */
2241                                           /* op1 = type, val.a = field address (in    */
2242                                           /* following NOP)                           */
2243
2244                         if (!iptr[1].val.a) {
2245                                 codegen_addpatchref(cd, mcodeptr,
2246                                                                         PATCHER_get_putstatic,
2247                                                                         (unresolved_field *) iptr[1].target);
2248
2249                                 if (showdisassemble)
2250                                         M_NOP;
2251
2252                                 a = 0;
2253
2254                         } else {
2255                                 fieldinfo *fi = iptr[1].val.a;
2256
2257                                 if (!fi->class->initialized) {
2258                                         codegen_addpatchref(cd, mcodeptr,
2259                                                                                 PATCHER_clinit, fi->class);
2260
2261                                         if (showdisassemble)
2262                                                 M_NOP;
2263                                 }
2264
2265                                 a = (ptrint) &(fi->value);
2266                         }
2267
2268                         a = dseg_addaddress(cd, a);
2269                         M_ALD(REG_ITMP1, REG_PV, a);
2270                         switch (iptr->op1) {
2271                         case TYPE_INT:
2272                                 M_IST(REG_ZERO, REG_ITMP1, 0);
2273                                 break;
2274                         case TYPE_LNG:
2275                                 M_LST(REG_ZERO, REG_ITMP1, 0);
2276                                 break;
2277                         case TYPE_ADR:
2278                                 M_AST(REG_ZERO, REG_ITMP1, 0);
2279                                 break;
2280                         case TYPE_FLT:
2281                                 M_FST(REG_ZERO, REG_ITMP1, 0);
2282                                 break;
2283                         case TYPE_DBL:
2284                                 M_DST(REG_ZERO, REG_ITMP1, 0);
2285                                 break;
2286                         }
2287                         break;
2288
2289
2290                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2291                                       /* op1 = type, val.i = field offset             */
2292
2293                         var_to_reg_int(s1, src, REG_ITMP1);
2294                         gen_nullptr_check(s1);
2295
2296                         if (!iptr->val.a) {
2297                                 codegen_addpatchref(cd, mcodeptr,
2298                                                                         PATCHER_get_putfield,
2299                                                                         (unresolved_field *) iptr->target);
2300
2301                                 if (showdisassemble)
2302                                         M_NOP;
2303
2304                                 a = 0;
2305
2306                         } else {
2307                                 a = ((fieldinfo *) (iptr->val.a))->offset;
2308                         }
2309
2310                         switch (iptr->op1) {
2311                         case TYPE_INT:
2312                                 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2313                                 M_ILD(d, s1, a);
2314                                 store_reg_to_var_int(iptr->dst, d);
2315                                 break;
2316                         case TYPE_LNG:
2317                                 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2318                                 M_LLD(d, s1, a);
2319                                 store_reg_to_var_int(iptr->dst, d);
2320                                 break;
2321                         case TYPE_ADR:
2322                                 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2323                                 M_ALD(d, s1, a);
2324                                 store_reg_to_var_int(iptr->dst, d);
2325                                 break;
2326                         case TYPE_FLT:
2327                                 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
2328                                 M_FLD(d, s1, a);
2329                                 store_reg_to_var_flt(iptr->dst, d);
2330                                 break;
2331                         case TYPE_DBL:
2332                                 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
2333                                 M_DLD(d, s1, a);
2334                                 store_reg_to_var_flt(iptr->dst, d);
2335                                 break;
2336                         }
2337                         break;
2338
2339                 case ICMD_PUTFIELD:   /* ..., objectref, value  ==> ...               */
2340                                       /* op1 = type, val.a = field address            */
2341
2342                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2343                         gen_nullptr_check(s1);
2344
2345                         if (!IS_FLT_DBL_TYPE(iptr->op1)) {
2346                                 var_to_reg_int(s2, src, REG_ITMP2);
2347                         } else {
2348                                 var_to_reg_flt(s2, src, REG_FTMP2);
2349                         }
2350
2351                         if (!iptr->val.a) {
2352                                 codegen_addpatchref(cd, mcodeptr,
2353                                                                         PATCHER_get_putfield,
2354                                                                         (unresolved_field *) iptr->target);
2355
2356                                 if (showdisassemble)
2357                                         M_NOP;
2358
2359                                 a = 0;
2360
2361                         } else {
2362                                 a = ((fieldinfo *) (iptr->val.a))->offset;
2363                         }
2364
2365                         switch (iptr->op1) {
2366                         case TYPE_INT:
2367                                 M_IST(s2, s1, a);
2368                                 break;
2369                         case TYPE_LNG:
2370                                 M_LST(s2, s1, a);
2371                                 break;
2372                         case TYPE_ADR:
2373                                 M_AST(s2, s1, a);
2374                                 break;
2375                         case TYPE_FLT:
2376                                 M_FST(s2, s1, a);
2377                                 break;
2378                         case TYPE_DBL:
2379                                 M_DST(s2, s1, a);
2380                                 break;
2381                         }
2382                         break;
2383
2384                 case ICMD_PUTFIELDCONST:  /* ..., objectref  ==> ...                  */
2385                                           /* val = value (in current instruction)     */
2386                                           /* op1 = type, val.a = field address (in    */
2387                                           /* following NOP)                           */
2388
2389                         var_to_reg_int(s1, src, REG_ITMP1);
2390                         gen_nullptr_check(s1);
2391
2392                         if (!iptr[1].val.a) {
2393                                 codegen_addpatchref(cd, mcodeptr,
2394                                                                         PATCHER_get_putfield,
2395                                                                         (unresolved_field *) iptr[1].target);
2396
2397                                 if (showdisassemble)
2398                                         M_NOP;
2399
2400                                 a = 0;
2401
2402                         } else {
2403                                 a = ((fieldinfo *) (iptr[1].val.a))->offset;
2404                         }
2405
2406                         switch (iptr[1].op1) {
2407                         case TYPE_INT:
2408                                 M_IST(REG_ZERO, s1, a);
2409                                 break;
2410                         case TYPE_LNG:
2411                                 M_LST(REG_ZERO, s1, a);
2412                                 break;
2413                         case TYPE_ADR:
2414                                 M_AST(REG_ZERO, s1, a);
2415                                 break;
2416                         case TYPE_FLT:
2417                                 M_FST(REG_ZERO, s1, a);
2418                                 break;
2419                         case TYPE_DBL:
2420                                 M_DST(REG_ZERO, s1, a);
2421                                 break;
2422                         }
2423                         break;
2424
2425
2426                 /* branch operations **************************************************/
2427
2428                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2429
2430                         var_to_reg_int(s1, src, REG_ITMP1);
2431                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2432                         a = dseg_addaddress(cd, asm_handle_exception);
2433                         M_ALD(REG_ITMP2, REG_PV, a);
2434                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2435                         M_NOP;              /* nop ensures that XPC is less than the end */
2436                                             /* of basic block                            */
2437                         ALIGNCODENOP;
2438                         break;
2439
2440                 case ICMD_GOTO:         /* ... ==> ...                                */
2441                                         /* op1 = target JavaVM pc                     */
2442                         M_BR(0);
2443                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2444                         ALIGNCODENOP;
2445                         break;
2446
2447                 case ICMD_JSR:          /* ... ==> ...                                */
2448                                         /* op1 = target JavaVM pc                     */
2449
2450                         M_BSR(REG_ITMP1, 0);
2451                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2452                         break;
2453
2454                 case ICMD_RET:          /* ... ==> ...                                */
2455                                         /* op1 = local variable                       */
2456
2457                         var = &(rd->locals[iptr->op1][TYPE_ADR]);
2458                         if (var->flags & INMEMORY) {
2459                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2460                                 M_RET(REG_ZERO, REG_ITMP1);
2461                                 }
2462                         else
2463                                 M_RET(REG_ZERO, var->regoff);
2464                         ALIGNCODENOP;
2465                         break;
2466
2467                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2468                                         /* op1 = target JavaVM pc                     */
2469
2470                         var_to_reg_int(s1, src, REG_ITMP1);
2471                         M_BEQZ(s1, 0);
2472                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2473                         break;
2474
2475                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2476                                         /* op1 = target JavaVM pc                     */
2477
2478                         var_to_reg_int(s1, src, REG_ITMP1);
2479                         M_BNEZ(s1, 0);
2480                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2481                         break;
2482
2483                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2484                                         /* op1 = target JavaVM pc, val.i = constant   */
2485
2486                         var_to_reg_int(s1, src, REG_ITMP1);
2487                         if (iptr->val.i == 0) {
2488                                 M_BEQZ(s1, 0);
2489                                 }
2490                         else {
2491                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2492                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2493                                         }
2494                                 else {
2495                                         ICONST(REG_ITMP2, iptr->val.i);
2496                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2497                                         }
2498                                 M_BNEZ(REG_ITMP1, 0);
2499                                 }
2500                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2501                         break;
2502
2503                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2504                                         /* op1 = target JavaVM pc, val.i = constant   */
2505
2506                         var_to_reg_int(s1, src, REG_ITMP1);
2507                         if (iptr->val.i == 0) {
2508                                 M_BLTZ(s1, 0);
2509                                 }
2510                         else {
2511                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2512                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2513                                         }
2514                                 else {
2515                                         ICONST(REG_ITMP2, iptr->val.i);
2516                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2517                                         }
2518                                 M_BNEZ(REG_ITMP1, 0);
2519                                 }
2520                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2521                         break;
2522
2523                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2524                                         /* op1 = target JavaVM pc, val.i = constant   */
2525
2526                         var_to_reg_int(s1, src, REG_ITMP1);
2527                         if (iptr->val.i == 0) {
2528                                 M_BLEZ(s1, 0);
2529                                 }
2530                         else {
2531                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2532                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2533                                         }
2534                                 else {
2535                                         ICONST(REG_ITMP2, iptr->val.i);
2536                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2537                                         }
2538                                 M_BNEZ(REG_ITMP1, 0);
2539                                 }
2540                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2541                         break;
2542
2543                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2544                                         /* op1 = target JavaVM pc, val.i = constant   */
2545
2546                         var_to_reg_int(s1, src, REG_ITMP1);
2547                         if (iptr->val.i == 0) {
2548                                 M_BNEZ(s1, 0);
2549                                 }
2550                         else {
2551                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2552                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2553                                         }
2554                                 else {
2555                                         ICONST(REG_ITMP2, iptr->val.i);
2556                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2557                                         }
2558                                 M_BEQZ(REG_ITMP1, 0);
2559                                 }
2560                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2561                         break;
2562
2563                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2564                                         /* op1 = target JavaVM pc, val.i = constant   */
2565
2566                         var_to_reg_int(s1, src, REG_ITMP1);
2567                         if (iptr->val.i == 0) {
2568                                 M_BGTZ(s1, 0);
2569                                 }
2570                         else {
2571                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2572                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2573                                         }
2574                                 else {
2575                                         ICONST(REG_ITMP2, iptr->val.i);
2576                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2577                                         }
2578                                 M_BEQZ(REG_ITMP1, 0);
2579                                 }
2580                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2581                         break;
2582
2583                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2584                                         /* op1 = target JavaVM pc, val.i = constant   */
2585
2586                         var_to_reg_int(s1, src, REG_ITMP1);
2587                         if (iptr->val.i == 0) {
2588                                 M_BGEZ(s1, 0);
2589                                 }
2590                         else {
2591                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2592                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2593                                         }
2594                                 else {
2595                                         ICONST(REG_ITMP2, iptr->val.i);
2596                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2597                                         }
2598                                 M_BEQZ(REG_ITMP1, 0);
2599                                 }
2600                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2601                         break;
2602
2603                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2604                                         /* op1 = target JavaVM pc, val.l = constant   */
2605
2606                         var_to_reg_int(s1, src, REG_ITMP1);
2607                         if (iptr->val.l == 0) {
2608                                 M_BEQZ(s1, 0);
2609                                 }
2610                         else {
2611                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2612                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2613                                         }
2614                                 else {
2615                                         LCONST(REG_ITMP2, iptr->val.l);
2616                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2617                                         }
2618                                 M_BNEZ(REG_ITMP1, 0);
2619                                 }
2620                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2621                         break;
2622
2623                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2624                                         /* op1 = target JavaVM pc, val.l = constant   */
2625
2626                         var_to_reg_int(s1, src, REG_ITMP1);
2627                         if (iptr->val.l == 0) {
2628                                 M_BLTZ(s1, 0);
2629                                 }
2630                         else {
2631                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2632                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2633                                         }
2634                                 else {
2635                                         LCONST(REG_ITMP2, iptr->val.l);
2636                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2637                                         }
2638                                 M_BNEZ(REG_ITMP1, 0);
2639                                 }
2640                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2641                         break;
2642
2643                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2644                                         /* op1 = target JavaVM pc, val.l = constant   */
2645
2646                         var_to_reg_int(s1, src, REG_ITMP1);
2647                         if (iptr->val.l == 0) {
2648                                 M_BLEZ(s1, 0);
2649                                 }
2650                         else {
2651                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2652                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2653                                         }
2654                                 else {
2655                                         LCONST(REG_ITMP2, iptr->val.l);
2656                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2657                                         }
2658                                 M_BNEZ(REG_ITMP1, 0);
2659                                 }
2660                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2661                         break;
2662
2663                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2664                                         /* op1 = target JavaVM pc, val.l = constant   */
2665
2666                         var_to_reg_int(s1, src, REG_ITMP1);
2667                         if (iptr->val.l == 0) {
2668                                 M_BNEZ(s1, 0);
2669                                 }
2670                         else {
2671                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2672                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2673                                         }
2674                                 else {
2675                                         LCONST(REG_ITMP2, iptr->val.l);
2676                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2677                                         }
2678                                 M_BEQZ(REG_ITMP1, 0);
2679                                 }
2680                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2681                         break;
2682
2683                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2684                                         /* op1 = target JavaVM pc, val.l = constant   */
2685
2686                         var_to_reg_int(s1, src, REG_ITMP1);
2687                         if (iptr->val.l == 0) {
2688                                 M_BGTZ(s1, 0);
2689                                 }
2690                         else {
2691                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2692                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2693                                         }
2694                                 else {
2695                                         LCONST(REG_ITMP2, iptr->val.l);
2696                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2697                                         }
2698                                 M_BEQZ(REG_ITMP1, 0);
2699                                 }
2700                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2701                         break;
2702
2703                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2704                                         /* op1 = target JavaVM pc, val.l = constant   */
2705
2706                         var_to_reg_int(s1, src, REG_ITMP1);
2707                         if (iptr->val.l == 0) {
2708                                 M_BGEZ(s1, 0);
2709                                 }
2710                         else {
2711                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2712                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2713                                         }
2714                                 else {
2715                                         LCONST(REG_ITMP2, iptr->val.l);
2716                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2717                                         }
2718                                 M_BEQZ(REG_ITMP1, 0);
2719                                 }
2720                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2721                         break;
2722
2723                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2724                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2725                 case ICMD_IF_ACMPEQ:
2726
2727                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2728                         var_to_reg_int(s2, src, REG_ITMP2);
2729                         M_CMPEQ(s1, s2, REG_ITMP1);
2730                         M_BNEZ(REG_ITMP1, 0);
2731                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2732                         break;
2733
2734                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2735                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2736                 case ICMD_IF_ACMPNE:
2737
2738                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2739                         var_to_reg_int(s2, src, REG_ITMP2);
2740                         M_CMPEQ(s1, s2, REG_ITMP1);
2741                         M_BEQZ(REG_ITMP1, 0);
2742                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2743                         break;
2744
2745                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2746                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2747
2748                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2749                         var_to_reg_int(s2, src, REG_ITMP2);
2750                         M_CMPLT(s1, s2, REG_ITMP1);
2751                         M_BNEZ(REG_ITMP1, 0);
2752                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2753                         break;
2754
2755                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2756                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2757
2758                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2759                         var_to_reg_int(s2, src, REG_ITMP2);
2760                         M_CMPLE(s1, s2, REG_ITMP1);
2761                         M_BEQZ(REG_ITMP1, 0);
2762                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2763                         break;
2764
2765                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2766                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2767
2768                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2769                         var_to_reg_int(s2, src, REG_ITMP2);
2770                         M_CMPLE(s1, s2, REG_ITMP1);
2771                         M_BNEZ(REG_ITMP1, 0);
2772                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2773                         break;
2774
2775                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2776                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2777
2778                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2779                         var_to_reg_int(s2, src, REG_ITMP2);
2780                         M_CMPLT(s1, s2, REG_ITMP1);
2781                         M_BEQZ(REG_ITMP1, 0);
2782                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2783                         break;
2784
2785                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2786
2787                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2788                         break;
2789
2790                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2791                                         /* val.i = constant                           */
2792
2793                         var_to_reg_int(s1, src, REG_ITMP1);
2794                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2795                         s3 = iptr->val.i;
2796                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2797                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2798                                         M_CMPEQ(s1, REG_ZERO, d);
2799                                         store_reg_to_var_int(iptr->dst, d);
2800                                         break;
2801                                         }
2802                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2803                                         M_CMPEQ(s1, REG_ZERO, d);
2804                                         M_XOR_IMM(d, 1, d);
2805                                         store_reg_to_var_int(iptr->dst, d);
2806                                         break;
2807                                         }
2808                                 if (s1 == d) {
2809                                         M_MOV(s1, REG_ITMP1);
2810                                         s1 = REG_ITMP1;
2811                                         }
2812                                 ICONST(d, iptr[1].val.i);
2813                                 }
2814                         if ((s3 >= 0) && (s3 <= 255)) {
2815                                 M_CMOVEQ_IMM(s1, s3, d);
2816                                 }
2817                         else {
2818                                 ICONST(REG_ITMP2, s3);
2819                                 M_CMOVEQ(s1, REG_ITMP2, d);
2820                                 }
2821                         store_reg_to_var_int(iptr->dst, d);
2822                         break;
2823
2824                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2825                                         /* val.i = constant                           */
2826
2827                         var_to_reg_int(s1, src, REG_ITMP1);
2828                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2829                         s3 = iptr->val.i;
2830                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2831                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2832                                         M_CMPEQ(s1, REG_ZERO, d);
2833                                         store_reg_to_var_int(iptr->dst, d);
2834                                         break;
2835                                         }
2836                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2837                                         M_CMPEQ(s1, REG_ZERO, d);
2838                                         M_XOR_IMM(d, 1, d);
2839                                         store_reg_to_var_int(iptr->dst, d);
2840                                         break;
2841                                         }
2842                                 if (s1 == d) {
2843                                         M_MOV(s1, REG_ITMP1);
2844                                         s1 = REG_ITMP1;
2845                                         }
2846                                 ICONST(d, iptr[1].val.i);
2847                                 }
2848                         if ((s3 >= 0) && (s3 <= 255)) {
2849                                 M_CMOVNE_IMM(s1, s3, d);
2850                                 }
2851                         else {
2852                                 ICONST(REG_ITMP2, s3);
2853                                 M_CMOVNE(s1, REG_ITMP2, d);
2854                                 }
2855                         store_reg_to_var_int(iptr->dst, d);
2856                         break;
2857
2858                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2859                                         /* val.i = constant                           */
2860
2861                         var_to_reg_int(s1, src, REG_ITMP1);
2862                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2863                         s3 = iptr->val.i;
2864                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2865                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2866                                         M_CMPLT(s1, REG_ZERO, d);
2867                                         store_reg_to_var_int(iptr->dst, d);
2868                                         break;
2869                                         }
2870                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2871                                         M_CMPLE(REG_ZERO, s1, d);
2872                                         store_reg_to_var_int(iptr->dst, d);
2873                                         break;
2874                                         }
2875                                 if (s1 == d) {
2876                                         M_MOV(s1, REG_ITMP1);
2877                                         s1 = REG_ITMP1;
2878                                         }
2879                                 ICONST(d, iptr[1].val.i);
2880                                 }
2881                         if ((s3 >= 0) && (s3 <= 255)) {
2882                                 M_CMOVLT_IMM(s1, s3, d);
2883                                 }
2884                         else {
2885                                 ICONST(REG_ITMP2, s3);
2886                                 M_CMOVLT(s1, REG_ITMP2, d);
2887                                 }
2888                         store_reg_to_var_int(iptr->dst, d);
2889                         break;
2890
2891                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2892                                         /* val.i = constant                           */
2893
2894                         var_to_reg_int(s1, src, REG_ITMP1);
2895                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2896                         s3 = iptr->val.i;
2897                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2898                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2899                                         M_CMPLE(REG_ZERO, s1, d);
2900                                         store_reg_to_var_int(iptr->dst, d);
2901                                         break;
2902                                         }
2903                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2904                                         M_CMPLT(s1, REG_ZERO, d);
2905                                         store_reg_to_var_int(iptr->dst, d);
2906                                         break;
2907                                         }
2908                                 if (s1 == d) {
2909                                         M_MOV(s1, REG_ITMP1);
2910                                         s1 = REG_ITMP1;
2911                                         }
2912                                 ICONST(d, iptr[1].val.i);
2913                                 }
2914                         if ((s3 >= 0) && (s3 <= 255)) {
2915                                 M_CMOVGE_IMM(s1, s3, d);
2916                                 }
2917                         else {
2918                                 ICONST(REG_ITMP2, s3);
2919                                 M_CMOVGE(s1, REG_ITMP2, d);
2920                                 }
2921                         store_reg_to_var_int(iptr->dst, d);
2922                         break;
2923
2924                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2925                                         /* val.i = constant                           */
2926
2927                         var_to_reg_int(s1, src, REG_ITMP1);
2928                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2929                         s3 = iptr->val.i;
2930                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2931                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2932                                         M_CMPLT(REG_ZERO, s1, d);
2933                                         store_reg_to_var_int(iptr->dst, d);
2934                                         break;
2935                                         }
2936                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2937                                         M_CMPLE(s1, REG_ZERO, d);
2938                                         store_reg_to_var_int(iptr->dst, d);
2939                                         break;
2940                                         }
2941                                 if (s1 == d) {
2942                                         M_MOV(s1, REG_ITMP1);
2943                                         s1 = REG_ITMP1;
2944                                         }
2945                                 ICONST(d, iptr[1].val.i);
2946                                 }
2947                         if ((s3 >= 0) && (s3 <= 255)) {
2948                                 M_CMOVGT_IMM(s1, s3, d);
2949                                 }
2950                         else {
2951                                 ICONST(REG_ITMP2, s3);
2952                                 M_CMOVGT(s1, REG_ITMP2, d);
2953                                 }
2954                         store_reg_to_var_int(iptr->dst, d);
2955                         break;
2956
2957                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2958                                         /* val.i = constant                           */
2959
2960                         var_to_reg_int(s1, src, REG_ITMP1);
2961                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2962                         s3 = iptr->val.i;
2963                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2964                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2965                                         M_CMPLE(s1, REG_ZERO, d);
2966                                         store_reg_to_var_int(iptr->dst, d);
2967                                         break;
2968                                         }
2969                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2970                                         M_CMPLT(REG_ZERO, s1, d);
2971                                         store_reg_to_var_int(iptr->dst, d);
2972                                         break;
2973                                         }
2974                                 if (s1 == d) {
2975                                         M_MOV(s1, REG_ITMP1);
2976                                         s1 = REG_ITMP1;
2977                                         }
2978                                 ICONST(d, iptr[1].val.i);
2979                                 }
2980                         if ((s3 >= 0) && (s3 <= 255)) {
2981                                 M_CMOVLE_IMM(s1, s3, d);
2982                                 }
2983                         else {
2984                                 ICONST(REG_ITMP2, s3);
2985                                 M_CMOVLE(s1, REG_ITMP2, d);
2986                                 }
2987                         store_reg_to_var_int(iptr->dst, d);
2988                         break;
2989
2990
2991                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2992                 case ICMD_LRETURN:
2993                 case ICMD_ARETURN:
2994
2995                         var_to_reg_int(s1, src, REG_RESULT);
2996                         M_INTMOVE(s1, REG_RESULT);
2997
2998                         goto nowperformreturn;
2999
3000                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
3001                 case ICMD_DRETURN:
3002
3003                         var_to_reg_flt(s1, src, REG_FRESULT);
3004                         M_FLTMOVE(s1, REG_FRESULT);
3005
3006                         goto nowperformreturn;
3007
3008                 case ICMD_RETURN:       /* ...  ==> ...                               */
3009
3010 nowperformreturn:
3011                         {
3012                         s4 i, p;
3013
3014                         p = parentargs_base;
3015
3016                         /* call trace function */
3017
3018                         if (runverbose) {
3019                                 M_LDA(REG_SP, REG_SP, -3 * 8);
3020                                 M_AST(REG_RA, REG_SP, 0 * 8);
3021                                 M_LST(REG_RESULT, REG_SP, 1 * 8);
3022                                 M_DST(REG_FRESULT, REG_SP, 2 * 8);
3023                                 a = dseg_addaddress(cd, m);
3024                                 M_ALD(rd->argintregs[0], REG_PV, a);
3025                                 M_MOV(REG_RESULT, rd->argintregs[1]);
3026                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[2]);
3027                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[3]);
3028                                 a = dseg_addaddress(cd, (void *) builtin_displaymethodstop);
3029                                 M_ALD(REG_PV, REG_PV, a);
3030                                 M_JSR(REG_RA, REG_PV);
3031                                 s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3032                                 if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3033                                 else {
3034                                         s4 ml = -s1, mh = 0;
3035                                         while (ml < -32768) { ml += 65536; mh--; }
3036                                         M_LDA(REG_PV, REG_RA, ml);
3037                                         M_LDAH(REG_PV, REG_PV, mh);
3038                                 }
3039                                 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
3040                                 M_LLD(REG_RESULT, REG_SP, 1 * 8);
3041                                 M_ALD(REG_RA, REG_SP, 0 * 8);
3042                                 M_LDA(REG_SP, REG_SP, 3 * 8);
3043                         }
3044
3045 #if defined(USE_THREADS)
3046                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
3047                                 s4 disp;
3048
3049                                 M_ALD(rd->argintregs[0], REG_SP, rd->maxmemuse * 8);
3050
3051                                 switch (iptr->opc) {
3052                                 case ICMD_IRETURN:
3053                                 case ICMD_LRETURN:
3054                                 case ICMD_ARETURN:
3055                                         M_LST(REG_RESULT, REG_SP, rd->maxmemuse * 8);
3056                                         break;
3057                                 case ICMD_FRETURN:
3058                                 case ICMD_DRETURN:
3059                                         M_DST(REG_FRESULT, REG_SP, rd->maxmemuse * 8);
3060                                         break;
3061                                 }
3062
3063                                 a = dseg_addaddress(cd, BUILTIN_monitorexit);
3064                                 M_ALD(REG_PV, REG_PV, a);
3065                                 M_JSR(REG_RA, REG_PV);
3066                                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
3067                                 M_LDA(REG_PV, REG_RA, disp);
3068
3069                                 switch (iptr->opc) {
3070                                 case ICMD_IRETURN:
3071                                 case ICMD_LRETURN:
3072                                 case ICMD_ARETURN:
3073                                         M_LLD(REG_RESULT, REG_SP, rd->maxmemuse * 8);
3074                                         break;
3075                                 case ICMD_FRETURN:
3076                                 case ICMD_DRETURN:
3077                                         M_DLD(REG_FRESULT, REG_SP, rd->maxmemuse * 8);
3078                                         break;
3079                                 }
3080                         }
3081 #endif
3082
3083                         /* restore return address                                         */
3084
3085                         if (!m->isleafmethod) {
3086                                 p--; M_LLD(REG_RA, REG_SP, p * 8);
3087                         }
3088
3089                         /* restore saved registers                                        */
3090
3091                         for (i = rd->savintregcnt - 1; i >= rd->maxsavintreguse; i--) {
3092                                 p--; M_LLD(rd->savintregs[i], REG_SP, p * 8);
3093                         }
3094                         for (i = rd->savfltregcnt - 1; i >= rd->maxsavfltreguse; i--) {
3095                                 p--; M_DLD(rd->savfltregs[i], REG_SP, p * 8);
3096                         }
3097
3098                         /* deallocate stack                                               */
3099
3100                         if (parentargs_base) {
3101                                 M_LDA(REG_SP, REG_SP, parentargs_base * 8);
3102                         }
3103
3104                         M_RET(REG_ZERO, REG_RA);
3105                         ALIGNCODENOP;
3106                         }
3107                         break;
3108
3109
3110                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
3111                         {
3112                         s4 i, l, *s4ptr;
3113                         void **tptr;
3114
3115                         tptr = (void **) iptr->target;
3116
3117                         s4ptr = iptr->val.a;
3118                         l = s4ptr[1];                          /* low     */
3119                         i = s4ptr[2];                          /* high    */
3120
3121                         var_to_reg_int(s1, src, REG_ITMP1);
3122                         if (l == 0)
3123                                 {M_INTMOVE(s1, REG_ITMP1);}
3124                         else if (l <= 32768) {
3125                                 M_LDA(REG_ITMP1, s1, -l);
3126                                 }
3127                         else {
3128                                 ICONST(REG_ITMP2, l);
3129                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3130                                 }
3131                         i = i - l + 1;
3132
3133                         /* range check */
3134
3135                         if (i <= 256)
3136                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3137                         else {
3138                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3139                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3140                                 }
3141                         M_BEQZ(REG_ITMP2, 0);
3142
3143
3144                         /* codegen_addreference(cd, BlockPtrOfPC(s4ptr[0]), mcodeptr); */
3145                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3146
3147                         /* build jump table top down and use address of lowest entry */
3148
3149                         /* s4ptr += 3 + i; */
3150                         tptr += i;
3151
3152                         while (--i >= 0) {
3153                                 /* dseg_addtarget(cd, BlockPtrOfPC(*--s4ptr)); */
3154                                 dseg_addtarget(cd, (basicblock *) tptr[0]);
3155                                 --tptr;
3156                                 }
3157                         }
3158
3159                         /* length of dataseg after last dseg_addtarget is used by load */
3160
3161                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3162                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
3163                         M_JMP(REG_ZERO, REG_ITMP2);
3164                         ALIGNCODENOP;
3165                         break;
3166
3167
3168                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3169                         {
3170                         s4 i, l, val, *s4ptr;
3171                         void **tptr;
3172
3173                         tptr = (void **) iptr->target;
3174
3175                         s4ptr = iptr->val.a;
3176                         l = s4ptr[0];                          /* default  */
3177                         i = s4ptr[1];                          /* count    */
3178
3179                         MCODECHECK((i<<2)+8);
3180                         var_to_reg_int(s1, src, REG_ITMP1);
3181                         while (--i >= 0) {
3182                                 s4ptr += 2;
3183                                 ++tptr;
3184
3185                                 val = s4ptr[0];
3186                                 if ((val >= 0) && (val <= 255)) {
3187                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
3188                                         }
3189                                 else {
3190                                         if ((val >= -32768) && (val <= 32767)) {
3191                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
3192                                                 }
3193                                         else {
3194                                                 a = dseg_adds4(cd, val);
3195                                                 M_ILD(REG_ITMP2, REG_PV, a);
3196                                                 }
3197                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3198                                         }
3199                                 M_BNEZ(REG_ITMP2, 0);
3200                                 /* codegen_addreference(cd, BlockPtrOfPC(s4ptr[1]), mcodeptr); */
3201                                 codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3202                                 }
3203
3204                         M_BR(0);
3205                         /* codegen_addreference(cd, BlockPtrOfPC(l), mcodeptr); */
3206
3207                         tptr = (void **) iptr->target;
3208                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3209
3210                         ALIGNCODENOP;
3211                         break;
3212                         }
3213
3214
3215                 case ICMD_BUILTIN:      /* ..., arg1, arg2, arg3 ==> ...              */
3216                                         /* op1 = arg count val.a = builtintable entry */
3217
3218                         bte = iptr->val.a;
3219                         md = bte->md;
3220                         goto gen_method;
3221
3222                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3223                                         /* op1 = arg count, val.a = method pointer    */
3224
3225                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3226                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
3227                 case ICMD_INVOKEINTERFACE:
3228
3229                         lm = iptr->val.a;
3230
3231                         if (lm)
3232                                 md = lm->parseddesc;
3233                         else {
3234                                 unresolved_method *um = iptr->target;
3235                                 md = um->methodref->parseddesc.md;
3236                         }
3237
3238 gen_method:
3239                         s3 = iptr->op1;
3240
3241                         MCODECHECK((s3 << 1) + 64);
3242
3243                         /* copy arguments to registers or stack location                  */
3244
3245                         for (s3 = s3 - 1; s3 >= 0; s3--, src = src->prev) {
3246                                 if (src->varkind == ARGVAR)
3247                                         continue;
3248                                 if (IS_INT_LNG_TYPE(src->type)) {
3249                                         if (!md->params[s3].inmemory) {
3250                                                 s1 = rd->argintregs[md->params[s3].regoff];
3251                                                 var_to_reg_int(d, src, s1);
3252                                                 M_INTMOVE(d, s1);
3253                                         } else {
3254                                                 var_to_reg_int(d, src, REG_ITMP1);
3255                                                 M_LST(d, REG_SP, md->params[s3].regoff * 8);
3256                                         }
3257
3258                                 } else {
3259                                         if (!md->params[s3].inmemory) {
3260                                                 s1 = rd->argfltregs[md->params[s3].regoff];
3261                                                 var_to_reg_flt(d, src, s1);
3262                                                 M_FLTMOVE(d, s1);
3263                                         } else {
3264                                                 var_to_reg_flt(d, src, REG_FTMP1);
3265                                                 M_DST(d, REG_SP, md->params[s3].regoff * 8);
3266                                         }
3267                                 }
3268                         }
3269
3270                         switch (iptr->opc) {
3271                         case ICMD_BUILTIN:
3272                                 if (iptr->target) {
3273                                         codegen_addpatchref(cd, mcodeptr, bte->fp, iptr->target);
3274
3275                                         if (showdisassemble)
3276                                                 M_NOP;
3277
3278                                         a = 0;
3279
3280                                 } else {
3281                                         a = (ptrint) bte->fp;
3282                                 }
3283
3284                                 a = dseg_addaddress(cd, a);
3285                                 d = md->returntype.type;
3286
3287                                 M_ALD(REG_PV, REG_PV, a);     /* Pointer to built-in-function */
3288                                 break;
3289
3290                         case ICMD_INVOKESPECIAL:
3291                                 gen_nullptr_check(rd->argintregs[0]);
3292                                 M_ILD(REG_ITMP1, rd->argintregs[0], 0); /* hardware nullptr   */
3293                                 /* fall through */
3294
3295                         case ICMD_INVOKESTATIC:
3296                                 if (!lm) {
3297                                         unresolved_method *um = iptr->target;
3298
3299                                         codegen_addpatchref(cd, mcodeptr,
3300                                                                                 PATCHER_invokestatic_special, um);
3301
3302                                         if (showdisassemble)
3303                                                 M_NOP;
3304
3305                                         a = 0;
3306                                         d = um->methodref->parseddesc.md->returntype.type;
3307
3308                                 } else {
3309                                         a = (ptrint) lm->stubroutine;
3310                                         d = lm->parseddesc->returntype.type;
3311                                 }
3312
3313                                 a = dseg_addaddress(cd, a);
3314                                 M_ALD(REG_PV, REG_PV, a);            /* method pointer in r27 */
3315                                 break;
3316
3317                         case ICMD_INVOKEVIRTUAL:
3318                                 gen_nullptr_check(rd->argintregs[0]);
3319
3320                                 if (!lm) {
3321                                         unresolved_method *um = iptr->target;
3322
3323                                         codegen_addpatchref(cd, mcodeptr,
3324                                                                                 PATCHER_invokevirtual, um);
3325
3326                                         if (showdisassemble)
3327                                                 M_NOP;
3328
3329                                         s1 = 0;
3330                                         d = um->methodref->parseddesc.md->returntype.type;
3331
3332                                 } else {
3333                                         s1 = OFFSET(vftbl_t, table[0]) +
3334                                                 sizeof(methodptr) * lm->vftblindex;
3335                                         d = lm->parseddesc->returntype.type;
3336                                 }
3337
3338                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
3339                                           OFFSET(java_objectheader, vftbl));
3340                                 M_ALD(REG_PV, REG_METHODPTR, s1);
3341                                 break;
3342
3343                         case ICMD_INVOKEINTERFACE:
3344                                 gen_nullptr_check(rd->argintregs[0]);
3345
3346                                 if (!lm) {
3347                                         unresolved_method *um = iptr->target;
3348
3349                                         codegen_addpatchref(cd, mcodeptr,
3350                                                                                 PATCHER_invokeinterface, um);
3351
3352                                         if (showdisassemble)
3353                                                 M_NOP;
3354
3355                                         s1 = 0;
3356                                         s2 = 0;
3357                                         d = um->methodref->parseddesc.md->returntype.type;
3358
3359                                 } else {
3360                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
3361                                                 sizeof(methodptr*) * lm->class->index;
3362
3363                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
3364
3365                                         d = lm->parseddesc->returntype.type;
3366                                 }
3367
3368                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
3369                                           OFFSET(java_objectheader, vftbl));
3370                                 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
3371                                 M_ALD(REG_PV, REG_METHODPTR, s2);
3372                                 break;
3373                         }
3374
3375                         M_JSR(REG_RA, REG_PV);
3376
3377                         /* recompute pv */
3378
3379                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3380                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3381                         else {
3382                                 s4 ml = -s1, mh = 0;
3383                                 while (ml < -32768) { ml += 65536; mh--; }
3384                                 M_LDA(REG_PV, REG_RA, ml);
3385                                 M_LDAH(REG_PV, REG_PV, mh);
3386                         }
3387
3388                         /* d contains return type */
3389
3390                         if (d != TYPE_VOID) {
3391                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3392                                         s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
3393                                         M_INTMOVE(REG_RESULT, s1);
3394                                         store_reg_to_var_int(iptr->dst, s1);
3395                                 } else {
3396                                         s1 = reg_of_var(rd, iptr->dst, REG_FRESULT);
3397                                         M_FLTMOVE(REG_FRESULT, s1);
3398                                         store_reg_to_var_flt(iptr->dst, s1);
3399                                 }
3400                         }
3401                         break;
3402
3403
3404                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3405
3406                                       /* op1:   0 == array, 1 == class                */
3407                                       /* val.a: (classinfo*) superclass               */
3408
3409                         /*  superclass is an interface:
3410                          *
3411                          *  OK if ((sub == NULL) ||
3412                          *         (sub->vftbl->interfacetablelength > super->index) &&
3413                          *         (sub->vftbl->interfacetable[-super->index] != NULL));
3414                          *
3415                          *  superclass is a class:
3416                          *
3417                          *  OK if ((sub == NULL) || (0
3418                          *         <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3419                          *         super->vftbl->diffval));
3420                          */
3421
3422                         {
3423                         classinfo *super;
3424                         vftbl_t   *supervftbl;
3425                         s4         superindex;
3426
3427                         super = (classinfo *) iptr->val.a;
3428
3429                         if (!super) {
3430                                 superindex = 0;
3431                                 supervftbl = NULL;
3432
3433                         } else {
3434                                 superindex = super->index;
3435                                 supervftbl = super->vftbl;
3436                         }
3437
3438 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3439                         codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
3440 #endif
3441                         var_to_reg_int(s1, src, REG_ITMP1);
3442
3443                         /* calculate interface checkcast code size */
3444
3445                         s2 = 6;
3446                         if (!super)
3447                                 s2 += showdisassemble ? 1 : 0;
3448
3449                         /* calculate class checkcast code size */
3450
3451                         s3 = 9 /* 8 + (s1 == REG_ITMP1) */;
3452                         if (!super)
3453                                 s3 += showdisassemble ? 1 : 0;
3454
3455                         /* if class is not resolved, check which code to call */
3456
3457                         if (!super) {
3458                                 M_BEQZ(s1, 4 + (showdisassemble ? 1 : 0) + s2 + 1 + s3);
3459
3460                                 codegen_addpatchref(cd, mcodeptr,
3461                                                                         PATCHER_checkcast_instanceof_flags,
3462                                                                         (constant_classref *) iptr->target);
3463
3464                                 if (showdisassemble)
3465                                         M_NOP;
3466
3467                                 a = dseg_adds4(cd, 0); /* super->flags */
3468                                 M_ILD(REG_ITMP2, REG_PV, a);
3469                                 a = dseg_adds4(cd, ACC_INTERFACE);
3470                                 M_ILD(REG_ITMP3, REG_PV, a);
3471                                 M_AND(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3472                                 M_BEQZ(REG_ITMP2, s2 + 1);
3473                         }
3474
3475                         /* interface checkcast code */
3476
3477                         if (!super || (super->flags & ACC_INTERFACE)) {
3478                                 if (super) {
3479                                         M_BEQZ(s1, s2);
3480
3481                                 } else {
3482                                         codegen_addpatchref(cd, mcodeptr,
3483                                                                                 PATCHER_checkcast_instanceof_interface,
3484                                                                                 (constant_classref *) iptr->target);
3485
3486                                         if (showdisassemble)
3487                                                 M_NOP;
3488                                 }
3489
3490                                 M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3491                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
3492                                 M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3493                                 M_BLEZ(REG_ITMP3, 0);
3494                                 codegen_addxcastrefs(cd, mcodeptr);
3495                                 M_ALD(REG_ITMP3, REG_ITMP2,
3496                                           OFFSET(vftbl_t, interfacetable[0]) -
3497                                           superindex * sizeof(methodptr*));
3498                                 M_BEQZ(REG_ITMP3, 0);
3499                                 codegen_addxcastrefs(cd, mcodeptr);
3500
3501                                 if (!super)
3502                                         M_BR(s3);
3503                         }
3504
3505                         /* class checkcast code */
3506
3507                         if (!super || !(super->flags & ACC_INTERFACE)) {
3508                                 if (super) {
3509                                         M_BEQZ(s1, s3);
3510
3511                                 } else {
3512                                         codegen_addpatchref(cd, mcodeptr,
3513                                                                                 PATCHER_checkcast_instanceof_class,
3514                                                                                 (constant_classref *) iptr->target);
3515
3516                                         if (showdisassemble)
3517                                                 M_NOP;
3518                                 }
3519
3520                                 M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3521                                 a = dseg_addaddress(cd, supervftbl);
3522                                 M_ALD(REG_ITMP3, REG_PV, a);
3523 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3524                                 codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3525 #endif
3526                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3527 /*                              if (s1 != REG_ITMP1) { */
3528 /*                                      M_ILD(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, baseval)); */
3529 /*                                      M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval)); */
3530 /*  #if defined(USE_THREADS) && defined(NATIVE_THREADS) */
3531 /*                                      codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase); */
3532 /*  #endif */
3533 /*                                      M_ISUB(REG_ITMP2, REG_ITMP1, REG_ITMP2); */
3534
3535 /*                              } else { */
3536                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, baseval));
3537                                         M_ISUB(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3538                                         M_ALD(REG_ITMP3, REG_PV, a);
3539                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval));
3540 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3541                                         codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3542 #endif
3543 /*                              } */
3544                                 M_CMPULE(REG_ITMP2, REG_ITMP3, REG_ITMP3);
3545                                 M_BEQZ(REG_ITMP3, 0);
3546                                 codegen_addxcastrefs(cd, mcodeptr);
3547                         }
3548                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
3549                         M_INTMOVE(s1, d);
3550                         store_reg_to_var_int(iptr->dst, d);
3551                         }
3552                         break;
3553
3554                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3555
3556                                       /* op1:   0 == array, 1 == class                */
3557                                       /* val.a: (classinfo*) superclass               */
3558
3559                         /*  superclass is an interface:
3560                          *
3561                          *  return (sub != NULL) &&
3562                          *         (sub->vftbl->interfacetablelength > super->index) &&
3563                          *         (sub->vftbl->interfacetable[-super->index] != NULL);
3564                          *
3565                          *  superclass is a class:
3566                          *
3567                          *  return ((sub != NULL) && (0
3568                          *          <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3569                          *          super->vftbl->diffvall));
3570                          */
3571
3572                         {
3573                         classinfo *super;
3574                         vftbl_t   *supervftbl;
3575                         s4         superindex;
3576
3577                         super = (classinfo *) iptr->val.a;
3578
3579                         if (!super) {
3580                                 superindex = 0;
3581                                 supervftbl = NULL;
3582
3583                         } else {
3584                                 superindex = super->index;
3585                                 supervftbl = super->vftbl;
3586                         }
3587
3588 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3589                         codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
3590 #endif
3591                         var_to_reg_int(s1, src, REG_ITMP1);
3592                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
3593                         if (s1 == d) {
3594                                 M_MOV(s1, REG_ITMP1);
3595                                 s1 = REG_ITMP1;
3596                         }
3597
3598                         /* calculate interface instanceof code size */
3599
3600                         s2 = 6;
3601                         if (!super)
3602                                 s2 += (d == REG_ITMP2 ? 1 : 0) + (showdisassemble ? 1 : 0);
3603
3604                         /* calculate class instanceof code size */
3605
3606                         s3 = 7;
3607                         if (!super)
3608                                 s3 += (showdisassemble ? 1 : 0);
3609
3610                         /* if class is not resolved, check which code to call */
3611
3612                         if (!super) {
3613                                 M_CLR(d);
3614                                 M_BEQZ(s1, 4 + (showdisassemble ? 1 : 0) + s2 + 1 + s3);
3615
3616                                 codegen_addpatchref(cd, mcodeptr,
3617                                                                         PATCHER_checkcast_instanceof_flags,
3618                                                                         (constant_classref *) iptr->target);
3619
3620                                 if (showdisassemble)
3621                                         M_NOP;
3622
3623                                 a = dseg_adds4(cd, 0); /* super->flags */
3624                                 M_ILD(REG_ITMP3, REG_PV, a);
3625                                 a = dseg_adds4(cd, ACC_INTERFACE);
3626                                 M_ILD(REG_ITMP2, REG_PV, a);
3627                                 M_AND(REG_ITMP3, REG_ITMP2, REG_ITMP3);
3628                                 M_BEQZ(REG_ITMP3, s2 + 1);
3629                         }
3630
3631                         /* interface instanceof code */
3632
3633                         if (!super || (super->flags & ACC_INTERFACE)) {
3634                                 if (super) {
3635                                         M_CLR(d);
3636                                         M_BEQZ(s1, s2);
3637
3638                                 } else {
3639                                         /* If d == REG_ITMP2, then it's destroyed in check code   */
3640                                         /* above.                                                 */
3641                                         if (d == REG_ITMP2)
3642                                                 M_CLR(d);
3643
3644                                         codegen_addpatchref(cd, mcodeptr,
3645                                                                                 PATCHER_checkcast_instanceof_interface,
3646                                                                                 (constant_classref *) iptr->target);
3647
3648                                         if (showdisassemble)
3649                                                 M_NOP;
3650                                 }
3651
3652                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3653                                 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3654                                 M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3655                                 M_BLEZ(REG_ITMP3, 2);
3656                                 M_ALD(REG_ITMP1, REG_ITMP1,
3657                                           OFFSET(vftbl_t, interfacetable[0]) -
3658                                           superindex * sizeof(methodptr*));
3659                                 M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3660
3661                                 if (!super)
3662                                         M_BR(s3);
3663                         }
3664
3665                         /* class instanceof code */
3666
3667                         if (!super || !(super->flags & ACC_INTERFACE)) {
3668                                 if (super) {
3669                                         M_CLR(d);
3670                                         M_BEQZ(s1, s3);
3671
3672                                 } else {
3673                                         codegen_addpatchref(cd, mcodeptr,
3674                                                                                 PATCHER_checkcast_instanceof_class,
3675                                                                                 (constant_classref *) iptr->target);
3676
3677                                         if (showdisassemble)
3678                                                 M_NOP;
3679                                 }
3680
3681                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3682                                 a = dseg_addaddress(cd, supervftbl);
3683                                 M_ALD(REG_ITMP2, REG_PV, a);
3684 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3685                                 codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3686 #endif
3687                                 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3688                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3689                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3690 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3691                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3692 #endif
3693                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3694                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3695                         }
3696                         store_reg_to_var_int(iptr->dst, d);
3697                         }
3698                         break;
3699
3700
3701                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3702
3703                         var_to_reg_int(s1, src, REG_ITMP1);
3704                         M_BLTZ(s1, 0);
3705                         codegen_addxcheckarefs(cd, mcodeptr);
3706                         break;
3707
3708                 case ICMD_CHECKEXCEPTION:    /* ... ==> ...                           */
3709
3710                         M_BEQZ(REG_RESULT, 0);
3711                         codegen_addxexceptionrefs(cd, mcodeptr);
3712                         break;
3713
3714                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3715                                       /* op1 = dimension, val.a = array descriptor    */
3716
3717                         /* check for negative sizes and copy sizes to stack if necessary  */
3718
3719                         MCODECHECK((iptr->op1 << 1) + 64);
3720
3721                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3722                                 var_to_reg_int(s2, src, REG_ITMP1);
3723                                 M_BLTZ(s2, 0);
3724                                 codegen_addxcheckarefs(cd, mcodeptr);
3725
3726                                 /* copy SAVEDVAR sizes to stack */
3727
3728                                 if (src->varkind != ARGVAR) {
3729                                         M_LST(s2, REG_SP, s1 * 8);
3730                                 }
3731                         }
3732
3733                         /* is patcher function set? */
3734
3735                         if (iptr->target) {
3736                                 codegen_addpatchref(cd, mcodeptr,
3737                                                                         (functionptr) iptr->target, iptr->val.a);
3738
3739                                 if (showdisassemble)
3740                                         M_NOP;
3741
3742                                 a = 0;
3743
3744                         } else {
3745                                 a = (ptrint) iptr->val.a;
3746                         }
3747
3748                         /* a0 = dimension count */
3749
3750                         ICONST(rd->argintregs[0], iptr->op1);
3751
3752                         /* a1 = arraydescriptor */
3753
3754                         a = dseg_addaddress(cd, a);
3755                         M_ALD(rd->argintregs[1], REG_PV, a);
3756
3757                         /* a2 = pointer to dimensions = stack pointer */
3758
3759                         M_INTMOVE(REG_SP, rd->argintregs[2]);
3760
3761                         a = dseg_addaddress(cd, (void *) BUILTIN_multianewarray);
3762                         M_ALD(REG_PV, REG_PV, a);
3763                         M_JSR(REG_RA, REG_PV);
3764                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3765                         if (s1 <= 32768)
3766                                 M_LDA(REG_PV, REG_RA, -s1);
3767                         else {
3768                                 s4 ml = -s1, mh = 0;
3769                                 while (ml < -32768) { ml += 65536; mh--; }
3770                                 M_LDA(REG_PV, REG_RA, ml);
3771                                 M_LDAH(REG_PV, REG_PV, mh);
3772                         }
3773                         s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
3774                         M_INTMOVE(REG_RESULT, s1);
3775                         store_reg_to_var_int(iptr->dst, s1);
3776                         break;
3777
3778                 default:
3779                         throw_cacao_exception_exit(string_java_lang_InternalError,
3780                                                                            "Unknown ICMD %d", iptr->opc);
3781         } /* switch */
3782
3783         } /* for instruction */
3784
3785         /* copy values to interface registers */
3786
3787         src = bptr->outstack;
3788         len = bptr->outdepth;
3789         MCODECHECK(64+len);
3790 #ifdef LSRA
3791         if (!opt_lsra)
3792 #endif
3793         while (src) {
3794                 len--;
3795                 if ((src->varkind != STACKVAR)) {
3796                         s2 = src->type;
3797                         if (IS_FLT_DBL_TYPE(s2)) {
3798                                 var_to_reg_flt(s1, src, REG_FTMP1);
3799                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3800                                         M_FLTMOVE(s1,rd->interfaces[len][s2].regoff);
3801                                         }
3802                                 else {
3803                                         M_DST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3804                                         }
3805                                 }
3806                         else {
3807                                 var_to_reg_int(s1, src, REG_ITMP1);
3808                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3809                                         M_INTMOVE(s1,rd->interfaces[len][s2].regoff);
3810                                         }
3811                                 else {
3812                                         M_LST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3813                                         }
3814                                 }
3815                         }
3816                 src = src->prev;
3817                 }
3818         } /* if (bptr -> flags >= BBREACHED) */
3819         } /* for basic block */
3820
3821         codegen_createlinenumbertable(cd);
3822
3823         {
3824         /* generate bound check stubs */
3825
3826         s4 *xcodeptr = NULL;
3827         branchref *bref;
3828
3829         for (bref = cd->xboundrefs; bref != NULL; bref = bref->next) {
3830                 gen_resolvebranch((u1*) cd->mcodebase + bref->branchpos,
3831                                   bref->branchpos,
3832                                                   (u1*) mcodeptr - cd->mcodebase);
3833
3834                 MCODECHECK(8);
3835
3836                 /* move index register into REG_ITMP1 */
3837                 M_MOV(bref->reg, REG_ITMP1);
3838                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3839
3840                 if (xcodeptr != NULL) {
3841                         M_BR(xcodeptr - mcodeptr - 1);
3842
3843                 } else {
3844                         xcodeptr = mcodeptr;
3845
3846                         a = dseg_addaddress(cd, asm_throw_and_handle_arrayindexoutofbounds_exception);
3847                         M_ALD(REG_PV, REG_PV, a);
3848
3849                         M_JSR(REG_RA, REG_PV);
3850
3851                         /* recompute pv */
3852                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3853                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3854                         else {
3855                                 s4 ml = -s1, mh = 0;
3856                                 while (ml < -32768) { ml += 65536; mh--; }
3857                                 M_LDA(REG_PV, REG_RA, ml);
3858                                 M_LDAH(REG_PV, REG_PV, mh);
3859                         }
3860                 }
3861         }
3862
3863         /* generate negative array size check stubs */
3864
3865         xcodeptr = NULL;
3866
3867         for (bref = cd->xcheckarefs; bref != NULL; bref = bref->next) {
3868                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3869                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3870                                                           bref->branchpos,
3871                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3872                         continue;
3873                 }
3874
3875                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3876                                   bref->branchpos,
3877                                                   (u1 *) mcodeptr - cd->mcodebase);
3878
3879                 MCODECHECK(8);
3880
3881                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3882
3883                 if (xcodeptr != NULL) {
3884                         M_BR(xcodeptr - mcodeptr - 1);
3885
3886                 } else {
3887                         xcodeptr = mcodeptr;
3888
3889                         a = dseg_addaddress(cd, string_java_lang_NegativeArraySizeException);
3890                         M_ALD(REG_ITMP1_XPTR,REG_PV,a);
3891
3892                         a = dseg_addaddress(cd, asm_throw_and_handle_nat_exception);
3893                         M_ALD(REG_PV, REG_PV, a);
3894
3895                         M_JSR(REG_RA, REG_PV);
3896
3897                         /* recompute pv */
3898                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3899                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3900                         else {
3901                                 s4 ml = -s1, mh = 0;
3902                                 while (ml < -32768) { ml += 65536; mh--; }
3903                                 M_LDA(REG_PV, REG_RA, ml);
3904                                 M_LDAH(REG_PV, REG_PV, mh);
3905                         }
3906                 }
3907         }
3908
3909         /* generate cast check stubs */
3910
3911         xcodeptr = NULL;
3912
3913         for (bref = cd->xcastrefs; bref != NULL; bref = bref->next) {
3914                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3915                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3916                                                           bref->branchpos,
3917                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3918                         continue;
3919                 }
3920
3921                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3922                                   bref->branchpos,
3923                                                   (u1 *) mcodeptr - cd->mcodebase);
3924
3925                 MCODECHECK(8);
3926
3927                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3928
3929                 if (xcodeptr != NULL) {
3930                         M_BR(xcodeptr - mcodeptr - 1);
3931
3932                 } else {
3933                         xcodeptr = mcodeptr;
3934
3935                         a = dseg_addaddress(cd, string_java_lang_ClassCastException);
3936                         M_ALD(REG_ITMP1_XPTR,REG_PV,a);
3937
3938                         a = dseg_addaddress(cd, asm_throw_and_handle_nat_exception);
3939                         M_ALD(REG_PV, REG_PV, a);
3940
3941                         M_JSR(REG_RA, REG_PV);
3942
3943                         /* recompute pv */
3944                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3945                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3946                         else {
3947                                 s4 ml = -s1, mh = 0;
3948                                 while (ml < -32768) { ml += 65536; mh--; }
3949                                 M_LDA(REG_PV, REG_RA, ml);
3950                                 M_LDAH(REG_PV, REG_PV, mh);
3951                         }
3952                 }
3953         }
3954
3955         /* generate exception check stubs */
3956
3957         xcodeptr = NULL;
3958
3959         for (bref = cd->xexceptionrefs; bref != NULL; bref = bref->next) {
3960                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3961                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3962                                                           bref->branchpos,
3963                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3964                         continue;
3965                 }
3966
3967                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3968                                   bref->branchpos,
3969                                                   (u1 *) mcodeptr - cd->mcodebase);
3970
3971                 MCODECHECK(8);
3972
3973                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3974
3975                 if (xcodeptr != NULL) {
3976                         M_BR(xcodeptr - mcodeptr - 1);
3977
3978                 } else {
3979                         xcodeptr = mcodeptr;
3980
3981 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3982                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3983                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3984
3985                         a = dseg_addaddress(cd, &builtin_get_exceptionptrptr);
3986                         M_ALD(REG_PV, REG_PV, a);
3987                         M_JSR(REG_RA, REG_PV);
3988
3989                         /* recompute pv */
3990                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3991                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3992                         else {
3993                                 s4 ml = -s1, mh = 0;
3994                                 while (ml < -32768) { ml += 65536; mh--; }
3995                                 M_LDA(REG_PV, REG_RA, ml);
3996                                 M_LDAH(REG_PV, REG_PV, mh);
3997                         }
3998
3999                         M_ALD(REG_ITMP1_XPTR, REG_RESULT, 0);
4000                         M_AST(REG_ZERO, REG_RESULT, 0);
4001
4002                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
4003                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
4004 #else
4005                         a = dseg_addaddress(cd, &_exceptionptr);
4006                         M_ALD(REG_ITMP3, REG_PV, a);
4007                         M_ALD(REG_ITMP1_XPTR, REG_ITMP3, 0);
4008                         M_AST(REG_ZERO, REG_ITMP3, 0);
4009 #endif
4010
4011                         a = dseg_addaddress(cd, asm_refillin_and_handle_exception);
4012                         M_ALD(REG_PV, REG_PV, a);
4013
4014                         M_JMP(REG_RA, REG_PV);
4015
4016                         /* recompute pv */
4017                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4018                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
4019                         else {
4020                                 s4 ml = -s1, mh = 0;
4021                                 while (ml < -32768) { ml += 65536; mh--; }
4022                                 M_LDA(REG_PV, REG_RA, ml);
4023                                 M_LDAH(REG_PV, REG_PV, mh);
4024                         }
4025
4026                 }
4027         }
4028
4029         /* generate null pointer check stubs */
4030
4031         xcodeptr = NULL;
4032
4033         for (bref = cd->xnullrefs; bref != NULL; bref = bref->next) {
4034                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
4035                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
4036                                                           bref->branchpos,
4037                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
4038                         continue;
4039                 }
4040
4041                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
4042                                   bref->branchpos,
4043                                                   (u1 *) mcodeptr - cd->mcodebase);
4044
4045                 MCODECHECK(8);
4046
4047                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
4048
4049                 if (xcodeptr != NULL) {
4050                         M_BR(xcodeptr - mcodeptr - 1);
4051
4052                 } else {
4053                         xcodeptr = mcodeptr;
4054
4055                         a = dseg_addaddress(cd, string_java_lang_NullPointerException);
4056                         M_ALD(REG_ITMP1_XPTR,REG_PV,a);
4057
4058                         a = dseg_addaddress(cd, asm_throw_and_handle_nat_exception);
4059                         M_ALD(REG_PV, REG_PV, a);
4060
4061                         M_JSR(REG_RA, REG_PV);
4062
4063                         /* recompute pv */
4064                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4065                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
4066                         else {
4067                                 s4 ml = -s1, mh = 0;
4068                                 while (ml < -32768) { ml += 65536; mh--; }
4069                                 M_LDA(REG_PV, REG_RA, ml);
4070                                 M_LDAH(REG_PV, REG_PV, mh);
4071                         }
4072                 }
4073         }
4074
4075         /* generate put/getstatic stub call code */
4076
4077         {
4078                 patchref *pref;
4079                 u4        mcode;
4080                 s4       *tmpmcodeptr;
4081
4082                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4083                         /* check code segment size */
4084
4085                         MCODECHECK(13 + 4 + 1);
4086
4087                         /* Get machine code which is patched back in later. The call is   */
4088                         /* 1 instruction word long.                                       */
4089
4090                         xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
4091                         mcode = *xcodeptr;
4092
4093                         /* patch in the call to call the following code (done at compile  */
4094                         /* time)                                                          */
4095
4096                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
4097                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
4098
4099                         M_BSR(REG_ITMP3, tmpmcodeptr - (xcodeptr + 1));
4100
4101                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
4102
4103                         /* create stack frame */
4104
4105                         M_LSUB_IMM(REG_SP, 5 * 8, REG_SP);
4106
4107                         /* move return address onto stack */
4108
4109                         M_AST(REG_ITMP3, REG_SP, 4 * 8);
4110
4111                         /* move pointer to java_objectheader onto stack */
4112
4113 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4114                         /* create a virtual java_objectheader */
4115
4116                         (void) dseg_addaddress(cd, get_dummyLR());          /* monitorPtr */
4117                         a = dseg_addaddress(cd, NULL);                      /* vftbl      */
4118
4119                         if (a >= -32768) {
4120                                 M_LDA(REG_ITMP3, REG_PV, a);
4121                         } else {
4122                                 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4123                                 M_LDA(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4124                         }
4125                         M_AST(REG_ITMP3, REG_SP, 3 * 8);
4126 #else
4127                         M_AST(REG_ZERO, REG_SP, 3 * 8);
4128 #endif
4129
4130                         /* move machine code onto stack */
4131
4132                         a = dseg_adds4(cd, mcode);
4133                         if (a >= -32768) {
4134                                 M_ILD(REG_ITMP3, REG_PV, a);
4135                         } else {
4136                                 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4137                                 M_ILD(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4138                         }
4139                         M_IST(REG_ITMP3, REG_SP, 2 * 8);
4140
4141                         /* move class/method/field reference onto stack */
4142
4143                         a = dseg_addaddress(cd, pref->ref);
4144                         if (a >= -32768) {
4145                                 M_ALD(REG_ITMP3, REG_PV, a);
4146                         } else {
4147                                 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4148                                 M_ALD(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4149                         }
4150                         M_AST(REG_ITMP3, REG_SP, 1 * 8);
4151
4152                         /* move patcher function pointer onto stack */
4153
4154                         a = dseg_addaddress(cd, pref->patcher);
4155                         if (a >= -32768) {
4156                                 M_ALD(REG_ITMP3, REG_PV, a);
4157                         } else {
4158                                 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4159                                 M_ALD(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4160                         }
4161                         M_AST(REG_ITMP3, REG_SP, 0 * 8);
4162
4163                         a = dseg_addaddress(cd, asm_wrapper_patcher);
4164                         if (a >= -32768) {
4165                                 M_ALD(REG_ITMP3, REG_PV, a);
4166                         } else {
4167                                 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4168                                 M_ALD(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4169                         }
4170                         M_JMP(REG_ZERO, REG_ITMP3);
4171                 }
4172         }
4173         }
4174
4175         codegen_finish(m, cd, (s4) ((u1 *) mcodeptr - cd->mcodebase));
4176 }
4177
4178
4179 /* createcompilerstub **********************************************************
4180
4181    Creates a stub routine which calls the compiler.
4182
4183 *******************************************************************************/
4184
4185 #define COMPSTUBSIZE    3
4186
4187 u1 *createcompilerstub(methodinfo *m)
4188 {
4189         u8 *s = CNEW(u8, COMPSTUBSIZE);     /* memory to hold the stub            */
4190         s4 *mcodeptr = (s4 *) s;            /* code generation pointer            */
4191
4192                                             /* code for the stub                  */
4193         M_ALD(REG_PV, REG_PV, 16);          /* load pointer to the compiler       */
4194         M_JMP(0, REG_PV);                   /* jump to the compiler, return address
4195                                                in reg 0 is used as method pointer */
4196         s[1] = (u8) m;                      /* literals to be adressed            */
4197         s[2] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
4198
4199 #if defined(STATISTICS)
4200         if (opt_stat)
4201                 count_cstub_len += COMPSTUBSIZE * 8;
4202 #endif
4203
4204         return (u1 *) s;
4205 }
4206
4207
4208 /* removecompilerstub **********************************************************
4209
4210    Deletes a compilerstub from memory (simply by freeing it).
4211
4212 *******************************************************************************/
4213
4214 void removecompilerstub(u1 *stub)
4215 {
4216         CFREE(stub, COMPSTUBSIZE * 8);
4217 }
4218
4219
4220 /* createnativestub ************************************************************
4221
4222    Creates a stub routine which calls a native method.
4223
4224 *******************************************************************************/
4225
4226
4227 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4228
4229 #define NATIVESTUB_STACK          8/*ra,native result, oldThreadspecificHeadValue, addressOfThreadspecificHead, method, 0,0,ra*/
4230 #define NATIVESTUB_THREAD_EXTRA    (6 + 20) /*20 for additional frame creation*/
4231 #define NATIVESTUB_STACKTRACE_OFFSET   1
4232
4233 #else
4234
4235 #define NATIVESTUB_STACK          7/*ra,oldThreadspecificHeadValue, addressOfThreadspecificHead, method, 0,0,ra*/
4236 #define NATIVESTUB_THREAD_EXTRA    (1 + 20) /*20 for additional frame creation*/
4237 #define NATIVESTUB_STACKTRACE_OFFSET   0
4238
4239 #endif
4240
4241 #define NATIVESTUB_SIZE            (44 + NATIVESTUB_THREAD_EXTRA - 1)
4242 #define NATIVESTUB_STATIC_SIZE     5
4243 #define NATIVESTUB_VERBOSE_SIZE    (39 + 13)
4244 #define NATIVESTUB_OFFSET          14
4245
4246
4247 u1 *createnativestub(functionptr f, methodinfo *m)
4248 {
4249         u8                 *s;              /* memory pointer to hold the stub    */
4250         u8                 *cs;
4251         s4                 *mcodeptr;       /* code generation pointer            */
4252         s4                  dumpsize;
4253         s4                  stackframesize; /* size of stackframe if needed       */
4254         s4                  disp;
4255         s4                  stubsize;
4256         codegendata        *cd;
4257         registerdata       *rd;
4258         t_inlining_globals *id;
4259         methoddesc         *md;
4260         methoddesc         *nmd;
4261         s4                  nativeparams;
4262         s4                  i, j;           /* count variables                    */
4263         s4                  t;
4264         s4                  s1, s2;
4265
4266         /* initialize variables */
4267
4268         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
4269
4270         /* mark start of dump memory area */
4271
4272         dumpsize = dump_size();
4273
4274         /* setup registers before using it */
4275
4276         cd = DNEW(codegendata);
4277         rd = DNEW(registerdata);
4278         id = DNEW(t_inlining_globals);
4279
4280         inlining_setup(m, id);
4281         reg_setup(m, rd, id);
4282
4283
4284         /* create new method descriptor with additional native parameters */
4285
4286         md = m->parseddesc;
4287
4288         nmd = (methoddesc *) DMNEW(u1, sizeof(methoddesc) - sizeof(typedesc) +
4289                                                            md->paramcount * sizeof(typedesc) +
4290                                                            nativeparams * sizeof(typedesc));
4291
4292         nmd->paramcount = md->paramcount + nativeparams;
4293
4294         nmd->params = DMNEW(paramdesc, nmd->paramcount);
4295
4296         nmd->paramtypes[0].type = TYPE_ADR; /* add environment pointer            */
4297
4298         if (m->flags & ACC_STATIC)
4299                 nmd->paramtypes[1].type = TYPE_ADR; /* add class pointer              */
4300
4301         MCOPY(nmd->paramtypes + nativeparams, md->paramtypes, typedesc,
4302                   md->paramcount);
4303
4304         md_param_alloc(nmd);
4305
4306
4307         /* calculate native stub size */
4308
4309         stubsize = NATIVESTUB_SIZE;         /* calculate nativestub size          */
4310
4311         if ((m->flags & ACC_STATIC) && !m->class->initialized)
4312                 stubsize += NATIVESTUB_STATIC_SIZE;
4313
4314         if (runverbose)
4315                 stubsize += NATIVESTUB_VERBOSE_SIZE;
4316
4317         s = CNEW(u8, stubsize);             /* memory to hold the stub            */
4318         cs = s + NATIVESTUB_OFFSET;
4319         mcodeptr = (s4 *) cs;               /* code generation pointer            */
4320
4321         /* set some required varibles which are normally set by codegen_setup     */
4322
4323         cd->mcodebase = (u1 *) mcodeptr;
4324         cd->patchrefs = NULL;
4325
4326         *(cs-1)  = (u8) f;                  /* address of native method           */
4327 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4328         *(cs-2)  = (u8) &builtin_get_exceptionptrptr;
4329 #else
4330         *(cs-2)  = (u8) (&_exceptionptr);   /* address of exceptionptr            */
4331 #endif
4332         *(cs-3)  = (u8) asm_handle_nat_exception; /* addr of asm exception handler*/
4333         *(cs-4)  = (u8) (&env);             /* addr of jni_environement           */
4334         *(cs-5)  = (u8) builtin_trace_args;
4335         *(cs-6)  = (u8) m;
4336         *(cs-7)  = (u8) builtin_displaymethodstop;
4337         *(cs-8)  = (u8) m->class;
4338         *(cs-9)  = (u8) asm_wrapper_patcher;
4339         *(cs-10) = (u8) &builtin_asm_get_stackframeinfo;
4340         *(cs-11) = (u8) NULL;               /* filled with machine code           */
4341         *(cs-12) = (u8) PATCHER_clinit;
4342 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4343         *(cs-13) = (ptrint) get_dummyLR();  /* monitorPtr                         */
4344 #else
4345         *(cs-13) = (ptrint) NULL;           /* monitorPtr                         */
4346 #endif
4347         *(cs-14) = (ptrint) NULL;           /* vftbl                              */
4348
4349
4350         /* generate stub code */
4351
4352         M_LDA(REG_SP, REG_SP, -NATIVESTUB_STACK * 8);     /* build up stackframe  */
4353         M_AST(REG_RA, REG_SP, 0 * 8);       /* store return address               */
4354
4355         M_AST(REG_RA, REG_SP, (NATIVESTUB_STACKTRACE_OFFSET + 6) * 8);       /* store return address  in stackinfo helper*/
4356
4357         /* if function is static, check for initialized */
4358
4359         if ((m->flags & ACC_STATIC) && !m->class->initialized) {
4360                 codegen_addpatchref(cd, mcodeptr, NULL, NULL);
4361
4362                 if (showdisassemble)
4363                         M_NOP;
4364         }
4365
4366         /* max. 39 +9 instructions */
4367
4368         if (runverbose) {
4369                 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
4370                 M_AST(REG_RA, REG_SP, 1 * 8);
4371
4372                 /* save integer argument registers */
4373
4374                 for (i = 0; i < md->paramcount && i < INT_ARG_CNT; i++)
4375                         if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
4376                                 M_LST(rd->argintregs[i], REG_SP, (2 + i) * 8);
4377
4378                 /* save and copy float arguments into integer registers */
4379
4380                 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4381                         t = md->paramtypes[i].type;
4382
4383                         if (IS_FLT_DBL_TYPE(t)) {
4384                                 if (IS_2_WORD_TYPE(t)) {
4385                                         M_DST(rd->argfltregs[i], REG_SP, (2 + INT_ARG_CNT + i) * 8);
4386                                         M_LLD(rd->argintregs[i], REG_SP, (2 + INT_ARG_CNT + i) * 8);
4387
4388                                 } else {
4389                                         M_FST(rd->argfltregs[i], REG_SP, (2 + INT_ARG_CNT + i) * 8);
4390                                         M_ILD(rd->argintregs[i], REG_SP, (2 + INT_ARG_CNT + i) * 8);
4391                                 }
4392                         }
4393                 }
4394
4395                 M_ALD(REG_ITMP1, REG_PV, -6 * 8);
4396                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
4397                 M_ALD(REG_PV, REG_PV, -5 * 8);
4398                 M_JSR(REG_RA, REG_PV);
4399                 disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4400                 M_LDA(REG_PV, REG_RA, disp);
4401
4402                 for (i = 0; i < md->paramcount && i < INT_ARG_CNT; i++)
4403                         if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
4404                                 M_LLD(rd->argintregs[i], REG_SP, (2 + i) * 8);
4405
4406                 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4407                         t = md->paramtypes[i].type;
4408
4409                         if (IS_FLT_DBL_TYPE(t)) {
4410                                 if (IS_2_WORD_TYPE(t)) {
4411                                         M_DLD(rd->argfltregs[i], REG_SP, (2 + INT_ARG_CNT + i) * 8);
4412                                 } else {
4413                                         M_FLD(rd->argfltregs[i], REG_SP, (2 + INT_ARG_CNT + i) * 8);
4414                                 }
4415                         }
4416                 }
4417
4418                 M_ALD(REG_RA, REG_SP, 1 * 8);
4419                 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
4420         }
4421
4422
4423         /* prepare XXX */
4424
4425         M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT) * 8));
4426
4427         /* save integer and float argument registers */
4428
4429         for (i = 0; i < md->paramcount && i < INT_ARG_CNT; i++)
4430                 if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
4431                         M_LST(rd->argintregs[i], REG_SP, i * 8);
4432
4433         for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++)
4434                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type))
4435                         M_DST(rd->argfltregs[i], REG_SP, (INT_ARG_CNT + i) * 8);
4436
4437 /*stack info */
4438         M_ALD(REG_PV, REG_PV, -10 * 8);  /* builtin_asm_get_stackframeinfo        */
4439         M_JSR(REG_RA, REG_PV);
4440         disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4441         M_LDA(REG_PV, REG_RA, disp);
4442
4443         M_LST(REG_RESULT, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + NATIVESTUB_STACKTRACE_OFFSET + 2) * 8); /* save adress of pointer */
4444         M_LLD(REG_ITMP3, REG_RESULT, 0); /* get pointer */
4445         M_LST(REG_ITMP3, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + NATIVESTUB_STACKTRACE_OFFSET + 1) * 8); /* save old value */
4446         M_LDA(REG_ITMP3, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + NATIVESTUB_STACKTRACE_OFFSET + 1) * 8); /* calculate new value */
4447         M_LLD(REG_ITMP2, REG_ITMP3, 8);
4448         M_LST(REG_ITMP3, REG_ITMP2, 0); /* store new value */
4449         M_LLD(REG_ITMP2, REG_PV, -6 * 8);
4450         M_LST(REG_ITMP2, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + NATIVESTUB_STACKTRACE_OFFSET + 3) * 8);
4451         M_LST(REG_ZERO, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + NATIVESTUB_STACKTRACE_OFFSET + 4) * 8);
4452         M_LST(REG_ZERO, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + NATIVESTUB_STACKTRACE_OFFSET + 5) * 8);
4453 /*stack info -end */
4454
4455         /* restore integer and float argument registers */
4456
4457         for (i = 0; i < md->paramcount && i < INT_ARG_CNT; i++)
4458                 if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
4459                         M_LLD(rd->argintregs[i], REG_SP, i * 8);
4460
4461         for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++)
4462                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type))
4463                         M_DLD(rd->argfltregs[i], REG_SP, (INT_ARG_CNT + i) * 8);
4464
4465         M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT) * 8);
4466
4467
4468         /* calculate stack frame size */
4469
4470         stackframesize = nmd->memuse;
4471
4472         if (stackframesize)
4473                 M_LDA(REG_SP, REG_SP, -stackframesize * 8);
4474
4475         /* copy or spill arguments to new locations */
4476
4477         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
4478                 t = md->paramtypes[i].type;
4479
4480                 if (IS_INT_LNG_TYPE(t)) {
4481                         if (!md->params[i].inmemory) {
4482                                 s1 = rd->argintregs[md->params[i].regoff];
4483
4484                                 if (!nmd->params[j].inmemory) {
4485                                         s2 = rd->argintregs[nmd->params[j].regoff];
4486                                         M_INTMOVE(s1, s2);
4487
4488                                 } else {
4489                                         s2 = nmd->params[j].regoff;
4490                                         M_LST(s1, REG_SP, s2 * 8);
4491                                 }
4492
4493                         } else {
4494                                 s1 = md->params[i].regoff + stackframesize;
4495                                 s2 = nmd->params[j].regoff;
4496                                 M_LLD(REG_ITMP1, REG_SP, s1 * 8);
4497                                 M_LST(REG_ITMP1, REG_SP, s2 * 8);
4498                         }
4499
4500                 } else {
4501                         if (!md->params[i].inmemory) {
4502                                 s1 = rd->argfltregs[md->params[i].regoff];
4503
4504                                 if (!nmd->params[j].inmemory) {
4505                                         s2 = rd->argfltregs[nmd->params[j].regoff];
4506                                         M_FLTMOVE(s1, s2);
4507
4508                                 } else {
4509                                         s2 = nmd->params[j].regoff;
4510                                         M_DST(s1, REG_SP, s2 * 8);
4511                                 }
4512
4513                         } else {
4514                                 s1 = md->params[i].regoff + stackframesize;
4515                                 s2 = nmd->params[j].regoff;
4516                                 M_DLD(REG_FTMP1, REG_SP, s1 * 8);
4517                                 M_DST(REG_FTMP1, REG_SP, s2 * 8);
4518                         }
4519                 }
4520         }
4521
4522         /* put class into second argument register */
4523
4524         if (m->flags & ACC_STATIC)
4525                 M_ALD(rd->argintregs[1], REG_PV, -8 * 8);
4526
4527         /* put env into first argument register */
4528
4529         M_ALD(rd->argintregs[0], REG_PV, -4 * 8);
4530
4531         /* do the native function call */
4532
4533         M_ALD(REG_PV, REG_PV, -1 * 8);      /* load adress of native method       */
4534         M_JSR(REG_RA, REG_PV);              /* call native method                 */
4535         disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4536         M_LDA(REG_PV, REG_RA, disp);        /* recompute pv from ra               */
4537
4538         /* remove stackframe if there is one */
4539
4540         if (stackframesize)
4541                 M_LDA(REG_SP, REG_SP, stackframesize * 8);
4542
4543         /* 13 instructions */
4544
4545         if (runverbose) {
4546                 M_LDA(REG_SP, REG_SP, -2 * 8);
4547                 M_ALD(rd->argintregs[0], REG_PV, -6 * 8); /* load method adress       */
4548                 M_LST(REG_RESULT, REG_SP, 0 * 8);
4549                 M_DST(REG_FRESULT, REG_SP, 1 * 8);
4550                 M_MOV(REG_RESULT, rd->argintregs[1]);
4551                 M_FMOV(REG_FRESULT, rd->argfltregs[2]);
4552                 M_FMOV(REG_FRESULT, rd->argfltregs[3]);
4553                 M_ALD(REG_PV, REG_PV, -7 * 8);  /* builtin_displaymethodstop          */
4554                 M_JSR(REG_RA, REG_PV);
4555                 disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4556                 M_LDA(REG_PV, REG_RA, disp);
4557                 M_LLD(REG_RESULT, REG_SP, 0 * 8);
4558                 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
4559                 M_LDA(REG_SP, REG_SP, 2 * 8);
4560         }
4561
4562         M_LLD(REG_ITMP3, REG_SP, (NATIVESTUB_STACKTRACE_OFFSET + 2) * 8); /* get address of stacktrace helper pointer */
4563         M_LLD(REG_ITMP1, REG_SP, (NATIVESTUB_STACKTRACE_OFFSET + 1) * 8); /* get old value */
4564         M_LST(REG_ITMP1, REG_ITMP3, 0); /* set old value */
4565
4566         /* check for exception */
4567
4568 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4569         if (IS_FLT_DBL_TYPE(m->returntype))
4570                 M_DST(REG_FRESULT, REG_SP, 1 * 8);
4571         else
4572                 M_AST(REG_RESULT, REG_SP, 1 * 8);
4573
4574         M_ALD(REG_PV, REG_PV, -2 * 8);      /* builtin_get_exceptionptrptr        */
4575         M_JSR(REG_RA, REG_PV);
4576         disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4577         M_LDA(REG_PV, REG_RA, disp);
4578         M_MOV(REG_RESULT, REG_ITMP3);
4579
4580         if (IS_FLT_DBL_TYPE(m->returntype))
4581                 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
4582         else
4583                 M_ALD(REG_RESULT, REG_SP, 1 * 8);
4584 #else
4585         M_ALD(REG_ITMP3, REG_PV, -2 * 8);   /* get address of exceptionptr        */
4586 #endif
4587
4588         M_ALD(REG_ITMP1, REG_ITMP3, 0);     /* load exception into reg. itmp1     */
4589         M_BNEZ(REG_ITMP1, 3);               /* if no exception then return        */
4590
4591         M_ALD(REG_RA, REG_SP, 0 * 8);       /* load return address                */
4592         M_LDA(REG_SP, REG_SP, NATIVESTUB_STACK * 8); /* remove stackframe         */
4593         M_RET(REG_ZERO, REG_RA);            /* return to caller                   */
4594
4595         /* handle exception */
4596
4597         M_AST(REG_ZERO, REG_ITMP3, 0);      /* store NULL into exceptionptr       */
4598
4599         M_ALD(REG_RA, REG_SP, 0 * 8);       /* load return address                */
4600         M_LDA(REG_SP, REG_SP, NATIVESTUB_STACK * 8); /* remove stackframe         */
4601         M_LDA(REG_ITMP2, REG_RA, -4);       /* move fault address into reg. itmp2 */
4602         M_ALD(REG_ITMP3, REG_PV, -3 * 8);   /* load asm exception handler address */
4603         M_JMP(REG_ZERO, REG_ITMP3);         /* jump to asm exception handler      */
4604
4605         /* generate put/getstatic stub call code */
4606
4607         {
4608                 patchref *pref;
4609                 s4       *xcodeptr;
4610                 s4       *tmpmcodeptr;
4611
4612                 /* there can only be one <clinit> ref entry                           */
4613                 pref = cd->patchrefs;
4614
4615                 if (pref) {
4616                         /* Get machine code which is patched back in later. The call is   */
4617                         /* 1 instruction word long.                                       */
4618
4619                         xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
4620                         *(cs-11) = (u4) *xcodeptr;
4621
4622                         /* patch in the call to call the following code (done at compile  */
4623                         /* time)                                                          */
4624
4625                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
4626                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
4627
4628                         M_BSR(REG_ITMP3, tmpmcodeptr - (xcodeptr + 1));
4629
4630                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
4631
4632                         /* create stack frame                                             */
4633
4634                         M_LSUB_IMM(REG_SP, 5 * 8, REG_SP);
4635
4636                         /* move return address onto stack */
4637
4638                         M_AST(REG_ITMP3, REG_SP, 4 * 8);
4639
4640                         /* move pointer to java_objectheader onto stack */
4641
4642 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4643                         M_LDA(REG_ITMP3, REG_PV, -14 * 8);    /* virtual objectheader     */
4644                         M_AST(REG_ITMP3, REG_SP, 3 * 8);
4645 #else
4646                         M_AST(REG_ZERO, REG_SP, 3 * 8);
4647 #endif
4648
4649                         /* move machine code onto stack                                   */
4650
4651                         M_ILD(REG_ITMP3, REG_PV, -11 * 8);    /* machine code             */
4652                         M_IST(REG_ITMP3, REG_SP, 2 * 8);
4653
4654                         /* move class reference onto stack                                */
4655
4656                         M_ALD(REG_ITMP3, REG_PV, -8 * 8);     /* class                    */
4657                         M_AST(REG_ITMP3, REG_SP, 1 * 8);
4658
4659                         /* move patcher function pointer onto stack                       */
4660
4661                         M_ALD(REG_ITMP3, REG_PV, -12 * 8);    /* patcher function         */
4662                         M_AST(REG_ITMP3, REG_SP, 0 * 8);
4663
4664                         M_ALD(REG_ITMP3, REG_PV, -9 * 8);     /* asm_wrapper_patcher      */
4665                         M_JMP(REG_ZERO, REG_ITMP3);
4666                 }
4667         }
4668
4669         /* Check if the stub size is big enough to hold the whole stub generated. */
4670         /* If not, this can lead into unpredictable crashes, because of heap      */
4671         /* corruption.                                                            */
4672         if ((s4) ((ptrint) mcodeptr - (ptrint) s) > stubsize * sizeof(u8)) {
4673                 throw_cacao_exception_exit(string_java_lang_InternalError,
4674                                                                    "Native stub size %d is to small for current stub size %d",
4675                                                                    stubsize, (s4) ((ptrint) mcodeptr - (ptrint) s));
4676         }
4677
4678
4679         /* disassemble native stub */
4680
4681         if (showdisassemble)
4682                 codegen_disassemble_nativestub(m, (s4 *) (s + NATIVESTUB_OFFSET),
4683                                                                            (s4) ((ptrint) mcodeptr -
4684                                                                                          (ptrint) (s + NATIVESTUB_OFFSET)));
4685
4686
4687 #if defined(STATISTICS)
4688         if (opt_stat)
4689                 count_nstub_len += NATIVESTUB_SIZE * 8;
4690 #endif
4691
4692         /* release dump area */
4693
4694         dump_release(dumpsize);
4695
4696         return (u1 *) (s + NATIVESTUB_OFFSET);
4697 }
4698
4699
4700 /* removenativestub ************************************************************
4701
4702    Removes a previously created native-stub from memory.
4703
4704 *******************************************************************************/
4705
4706 void removenativestub(u1 *stub)
4707 {
4708         CFREE((u8 *) stub - NATIVESTUBOFFSET, NATIVESTUBSIZE * 8);
4709 }
4710
4711
4712 /*
4713  * These are local overrides for various environment variables in Emacs.
4714  * Please do not remove this and leave it at the end of the file, where
4715  * Emacs will automagically detect them.
4716  * ---------------------------------------------------------------------
4717  * Local variables:
4718  * mode: c
4719  * indent-tabs-mode: t
4720  * c-basic-offset: 4
4721  * tab-width: 4
4722  * End:
4723  */