src/vm/jit/alpha/codegen.c

   1 /* src/vm/jit/alpha/codegen.c - machine code generator for Alpha
   2
   3    Copyright (C) 1996-2005 R. Grafl, A. Krall, C. Kruegel, C. Oates,
   4    R. Obermaisser, M. Platter, M. Probst, S. Ring, E. Steiner,
   5    C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich, J. Wenninger,
   6    Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  23    02111-1307, USA.
  24
  25    Contact: cacao@complang.tuwien.ac.at
  26
  27    Authors: Andreas Krall
  28             Reinhard Grafl
  29
  30    Changes: Joseph Wenninger
  31             Christian Thalinger
  32             Christian Ullrich
  33             Edwin Steiner
  34
  35    $Id: codegen.c 3921 2005-12-08 23:12:01Z twisti $
  36
  37 */
  38
  39
  40 #include <stdio.h>
  41
  42 #include "config.h"
  43 #include "vm/types.h"
  44
  45 #include "md.h"
  46 #include "md-abi.h"
  47 #include "md-abi.inc"
  48
  49 #include "vm/jit/alpha/arch.h"
  50 #include "vm/jit/alpha/codegen.h"
  51
  52 #include "cacao/cacao.h"
  53 #include "native/jni.h"
  54 #include "native/native.h"
  55 #include "vm/builtin.h"
  56 #include "vm/global.h"
  57 #include "vm/loader.h"
  58 #include "vm/stringlocal.h"
  59 #include "vm/jit/asmpart.h"
  60 #include "vm/jit/codegen.inc"
  61 #include "vm/jit/jit.h"
  62
  63 #if defined(LSRA)
  64 # include "vm/jit/lsra.h"
  65 # include "vm/jit/lsra.inc"
  66 #endif
  67
  68 #include "vm/jit/parse.h"
  69 #include "vm/jit/patcher.h"
  70 #include "vm/jit/reg.h"
  71 #include "vm/jit/reg.inc"
  72
  73
  74 /* codegen *********************************************************************
  75
  76    Generates machine code.
  77
  78 *******************************************************************************/
  79
  80 bool codegen(methodinfo *m, codegendata *cd, registerdata *rd)
  81 {
  82         s4                  len, s1, s2, s3, d, disp;
  83         s4                  parentargs_base;
  84         s4                 *mcodeptr;
  85         stackptr            src;
  86         varinfo            *var;
  87         basicblock         *bptr;
  88         instruction        *iptr;
  89         exceptiontable     *ex;
  90         u2                  currentline;
  91         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE*  */
  92         builtintable_entry *bte;
  93         methoddesc         *md;
  94
  95         /* prevent compiler warnings */
  96
  97         d = 0;
  98         currentline = 0;
  99         lm = NULL;
 100         bte = NULL;
 101
 102         {
 103         s4 i, p, t, l;
 104         s4 savedregs_num;
 105
 106         savedregs_num = (m->isleafmethod) ? 0 : 1;        /* space to save the RA */
 107
 108         /* space to save used callee saved registers */
 109
 110         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
 111         savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
 112
 113         parentargs_base = rd->memuse + savedregs_num;
 114
 115 #if defined(USE_THREADS)           /* space to save argument of monitor_enter */
 116         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 117                 parentargs_base++;
 118 #endif
 119
 120         /* create method header */
 121
 122         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
 123         (void) dseg_adds4(cd, parentargs_base * 8);             /* FrameSize      */
 124
 125 #if defined(USE_THREADS)
 126         /* IsSync contains the offset relative to the stack pointer for the
 127            argument of monitor_exit used in the exception handler. Since the
 128            offset could be zero and give a wrong meaning of the flag it is
 129            offset by one.
 130         */
 131
 132         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 133                 (void) dseg_adds4(cd, (rd->memuse + 1) * 8);        /* IsSync         */
 134         else
 135 #endif
 136                 (void) dseg_adds4(cd, 0);                           /* IsSync         */
 137
 138         (void) dseg_adds4(cd, m->isleafmethod);                 /* IsLeaf         */
 139         (void) dseg_adds4(cd, INT_SAV_CNT - rd->savintreguse);  /* IntSave        */
 140         (void) dseg_adds4(cd, FLT_SAV_CNT - rd->savfltreguse);  /* FltSave        */
 141
 142         dseg_addlinenumbertablesize(cd);
 143
 144         (void) dseg_adds4(cd, cd->exceptiontablelength);        /* ExTableSize    */
 145
 146         /* create exception table */
 147
 148         for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
 149                 dseg_addtarget(cd, ex->start);
 150                 dseg_addtarget(cd, ex->end);
 151                 dseg_addtarget(cd, ex->handler);
 152                 (void) dseg_addaddress(cd, ex->catchtype.cls);
 153         }
 154
 155         /* initialize mcode variables */
 156
 157         mcodeptr = (s4 *) cd->mcodeptr;
 158
 159         MCODECHECK(128 + m->paramcount);
 160
 161         /* create stack frame (if necessary) */
 162
 163         if (parentargs_base) {
 164                 M_LDA(REG_SP, REG_SP, -parentargs_base * 8);
 165         }
 166
 167         /* save return address and used callee saved registers */
 168
 169         p = parentargs_base;
 170         if (!m->isleafmethod) {
 171                 p--; M_AST(REG_RA, REG_SP, p * 8);
 172         }
 173         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
 174                 p--; M_LST(rd->savintregs[i], REG_SP, p * 8);
 175         }
 176         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
 177                 p--; M_DST(rd->savfltregs[i], REG_SP, p * 8);
 178         }
 179
 180         /* take arguments out of register or stack frame */
 181
 182         md = m->parseddesc;
 183
 184         for (p = 0, l = 0; p < md->paramcount; p++) {
 185                 t = md->paramtypes[p].type;
 186                 var = &(rd->locals[l][t]);
 187                 l++;
 188                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 189                         l++;
 190                 if (var->type < 0)
 191                         continue;
 192                 s1 = md->params[p].regoff;
 193                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 194                         if (!md->params[p].inmemory) {           /* register arguments    */
 195                                 s2 = rd->argintregs[s1];
 196                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 197                                         M_INTMOVE(s2, var->regoff);
 198
 199                                 } else {                             /* reg arg -> spilled    */
 200                                         M_LST(s2, REG_SP, var->regoff * 8);
 201                                 }
 202
 203                         } else {                                 /* stack arguments       */
 204                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 205                                         M_LLD(var->regoff, REG_SP, (parentargs_base + s1) * 8);
 206
 207                                 } else {                             /* stack arg -> spilled  */
 208                                         var->regoff = parentargs_base + s1;
 209                                 }
 210                         }
 211
 212                 } else {                                     /* floating args         */
 213                         if (!md->params[p].inmemory) {           /* register arguments    */
 214                                 s2 = rd->argfltregs[s1];
 215                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 216                                         M_FLTMOVE(s2, var->regoff);
 217
 218                                 } else {                                         /* reg arg -> spilled    */
 219                                         M_DST(s2, REG_SP, var->regoff * 8);
 220                                 }
 221
 222                         } else {                                 /* stack arguments       */
 223                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 224                                         M_DLD(var->regoff, REG_SP, (parentargs_base + s1) * 8);
 225
 226                                 } else {                             /* stack-arg -> spilled  */
 227                                         var->regoff = parentargs_base + s1;
 228                                 }
 229                         }
 230                 }
 231         } /* end for */
 232
 233         /* call monitorenter function */
 234
 235 #if defined(USE_THREADS)
 236         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 237                 /* stack offset for monitor argument */
 238
 239                 s1 = rd->memuse;
 240
 241                 if (runverbose) {
 242                         M_LDA(REG_SP, REG_SP, -(INT_ARG_CNT + FLT_ARG_CNT) * 8);
 243
 244                         for (p = 0; p < INT_ARG_CNT; p++)
 245                                 M_LST(rd->argintregs[p], REG_SP, p * 8);
 246
 247                         for (p = 0; p < FLT_ARG_CNT; p++)
 248                                 M_DST(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
 249
 250                         s1 += INT_ARG_CNT + FLT_ARG_CNT;
 251                 }
 252
 253                 /* decide which monitor enter function to call */
 254
 255                 if (m->flags & ACC_STATIC) {
 256                         disp = dseg_addaddress(cd, m->class);
 257                         M_ALD(rd->argintregs[0], REG_PV, disp);
 258                         M_AST(rd->argintregs[0], REG_SP, s1 * 8);
 259                         disp = dseg_addaddress(cd, BUILTIN_staticmonitorenter);
 260                         M_ALD(REG_PV, REG_PV, disp);
 261                         M_JSR(REG_RA, REG_PV);
 262                         disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 263                         M_LDA(REG_PV, REG_RA, disp);
 264
 265                 } else {
 266                         M_BEQZ(rd->argintregs[0], 0);
 267                         codegen_addxnullrefs(cd, mcodeptr);
 268                         M_AST(rd->argintregs[0], REG_SP, s1 * 8);
 269                         disp = dseg_addaddress(cd, BUILTIN_monitorenter);
 270                         M_ALD(REG_PV, REG_PV, disp);
 271                         M_JSR(REG_RA, REG_PV);
 272                         disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 273                         M_LDA(REG_PV, REG_RA, disp);
 274                 }
 275
 276                 if (runverbose) {
 277                         for (p = 0; p < INT_ARG_CNT; p++)
 278                                 M_LLD(rd->argintregs[p], REG_SP, p * 8);
 279
 280                         for (p = 0; p < FLT_ARG_CNT; p++)
 281                                 M_DLD(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
 282
 283                         M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT) * 8);
 284                 }
 285         }
 286 #endif
 287
 288         /* call trace function */
 289
 290         if (runverbose) {
 291                 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
 292                 M_AST(REG_RA, REG_SP, 1 * 8);
 293
 294                 /* save integer argument registers */
 295
 296                 for (p = 0; p < md->paramcount && p < INT_ARG_CNT; p++)
 297                         M_LST(rd->argintregs[p], REG_SP, (2 + p) * 8);
 298
 299                 /* save and copy float arguments into integer registers */
 300
 301                 for (p = 0; p < md->paramcount && p < FLT_ARG_CNT; p++) {
 302                         t = md->paramtypes[p].type;
 303
 304                         if (IS_FLT_DBL_TYPE(t)) {
 305                                 if (IS_2_WORD_TYPE(t)) {
 306                                         M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 307
 308                                 } else {
 309                                         M_FST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 310                                 }
 311
 312                                 M_LLD(rd->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 313
 314                         } else {
 315                                 M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 316                         }
 317                 }
 318
 319                 disp = dseg_addaddress(cd, m);
 320                 M_ALD(REG_ITMP1, REG_PV, disp);
 321                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
 322                 disp = dseg_addaddress(cd, (void *) builtin_trace_args);
 323                 M_ALD(REG_PV, REG_PV, disp);
 324                 M_JSR(REG_RA, REG_PV);
 325                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 326                 M_LDA(REG_PV, REG_RA, disp);
 327                 M_ALD(REG_RA, REG_SP, 1 * 8);
 328
 329                 /* restore integer argument registers */
 330
 331                 for (p = 0; p < md->paramcount && p < INT_ARG_CNT; p++)
 332                         M_LLD(rd->argintregs[p], REG_SP, (2 + p) * 8);
 333
 334                 /* restore float argument registers */
 335
 336                 for (p = 0; p < md->paramcount && p < FLT_ARG_CNT; p++) {
 337                         t = md->paramtypes[p].type;
 338
 339                         if (IS_FLT_DBL_TYPE(t)) {
 340                                 if (IS_2_WORD_TYPE(t)) {
 341                                         M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 342
 343                                 } else {
 344                                         M_FLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 345                                 }
 346
 347                         } else {
 348                                 M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 349                         }
 350                 }
 351
 352                 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
 353         }
 354
 355         }
 356
 357         /* end of header generation */
 358
 359         /* walk through all basic blocks */
 360
 361         for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
 362
 363                 bptr->mpc = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 364
 365                 if (bptr->flags >= BBREACHED) {
 366
 367                 /* branch resolving */
 368
 369                 {
 370                 branchref *brefs;
 371                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 372                         gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
 373                                           brefs->branchpos, bptr->mpc);
 374                         }
 375                 }
 376
 377                 /* copy interface registers to their destination */
 378
 379                 src = bptr->instack;
 380                 len = bptr->indepth;
 381                 MCODECHECK(64+len);
 382 #ifdef LSRA
 383                 if (opt_lsra) {
 384                 while (src != NULL) {
 385                         len--;
 386                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 387                                         /*                              d = reg_of_var(m, src, REG_ITMP1); */
 388                                         if (!(src->flags & INMEMORY))
 389                                                 d = src->regoff;
 390                                         else
 391                                                 d = REG_ITMP1;
 392                                         M_INTMOVE(REG_ITMP1, d);
 393                                         store_reg_to_var_int(src, d);
 394                                 }
 395                                 src = src->prev;
 396                         }
 397                 } else {
 398 #endif
 399                         while (src != NULL) {
 400                                 len--;
 401                                 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 402                                         d = reg_of_var(rd, src, REG_ITMP1);
 403                                         M_INTMOVE(REG_ITMP1, d);
 404                                         store_reg_to_var_int(src, d);
 405                                 } else {
 406                                         d = reg_of_var(rd, src, REG_IFTMP);
 407                                         if ((src->varkind != STACKVAR)) {
 408                                                 s2 = src->type;
 409                                                 if (IS_FLT_DBL_TYPE(s2)) {
 410                                                         if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 411                                                                 s1 = rd->interfaces[len][s2].regoff;
 412                                                                 M_FLTMOVE(s1, d);
 413                                                         } else {
 414                                                                 M_DLD(d, REG_SP, rd->interfaces[len][s2].regoff * 8);
 415                                                         }
 416                                                         store_reg_to_var_flt(src, d);
 417                                                 }
 418                                                 else {
 419                                                         if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 420                                                                 s1 = rd->interfaces[len][s2].regoff;
 421                                                                 M_INTMOVE(s1, d);
 422                                                         } else {
 423                                                                 M_LLD(d, REG_SP, rd->interfaces[len][s2].regoff * 8);
 424                                                         }
 425                                                         store_reg_to_var_int(src, d);
 426                                                 }
 427                                         }
 428                                 }
 429                                 src = src->prev;
 430                         }
 431 #ifdef LSRA
 432                 }
 433 #endif
 434
 435                 /* walk through all instructions */
 436
 437                 src = bptr->instack;
 438                 len = bptr->icount;
 439
 440                 for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) {
 441                         if (iptr->line != currentline) {
 442                                 dseg_addlinenumber(cd, iptr->line, (u1 *) mcodeptr);
 443                                 currentline = iptr->line;
 444                         }
 445
 446                 MCODECHECK(64);       /* an instruction usually needs < 64 words      */
 447                 switch (iptr->opc) {
 448
 449                 case ICMD_INLINE_START:
 450                 case ICMD_INLINE_END:
 451                         break;
 452
 453                 case ICMD_NOP:        /* ...  ==> ...                                 */
 454                         break;
 455
 456                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
 457
 458                         var_to_reg_int(s1, src, REG_ITMP1);
 459                         M_BEQZ(s1, 0);
 460                         codegen_addxnullrefs(cd, mcodeptr);
 461                         break;
 462
 463                 /* constant operations ************************************************/
 464
 465                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 466                                       /* op1 = 0, val.i = constant                    */
 467
 468                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 469                         ICONST(d, iptr->val.i);
 470                         store_reg_to_var_int(iptr->dst, d);
 471                         break;
 472
 473                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 474                                       /* op1 = 0, val.l = constant                    */
 475
 476                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 477                         LCONST(d, iptr->val.l);
 478                         store_reg_to_var_int(iptr->dst, d);
 479                         break;
 480
 481                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 482                                       /* op1 = 0, val.f = constant                    */
 483
 484                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 485                         disp = dseg_addfloat(cd, iptr->val.f);
 486                         M_FLD(d, REG_PV, disp);
 487                         store_reg_to_var_flt(iptr->dst, d);
 488                         break;
 489
 490                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 491                                       /* op1 = 0, val.d = constant                    */
 492
 493                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 494                         disp = dseg_adddouble(cd, iptr->val.d);
 495                         M_DLD(d, REG_PV, disp);
 496                         store_reg_to_var_flt(iptr->dst, d);
 497                         break;
 498
 499                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 500                                       /* op1 = 0, val.a = constant                    */
 501
 502                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 503
 504                         if ((iptr->target != NULL) && (iptr->val.a == NULL)) {
 505                                 disp = dseg_addaddress(cd, iptr->val.a);
 506
 507                                 codegen_addpatchref(cd, mcodeptr,
 508                                                                         PATCHER_aconst,
 509                                                                         (unresolved_class *) iptr->target, disp);
 510
 511                                 if (opt_showdisassemble)
 512                                         M_NOP;
 513
 514                                 M_ALD(d, REG_PV, disp);
 515
 516                         } else {
 517                                 if (iptr->val.a == NULL) {
 518                                         M_INTMOVE(REG_ZERO, d);
 519                                 } else {
 520                                         disp = dseg_addaddress(cd, iptr->val.a);
 521                                         M_ALD(d, REG_PV, disp);
 522                                 }
 523                         }
 524                         store_reg_to_var_int(iptr->dst, d);
 525                         break;
 526
 527
 528                 /* load/store operations **********************************************/
 529
 530                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 531                 case ICMD_LLOAD:      /* op1 = local variable                         */
 532                 case ICMD_ALOAD:
 533
 534                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 535                         if ((iptr->dst->varkind == LOCALVAR) &&
 536                             (iptr->dst->varnum == iptr->op1))
 537                                 break;
 538                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 539                         if (var->flags & INMEMORY) {
 540                                 M_LLD(d, REG_SP, var->regoff * 8);
 541                         } else {
 542                                 M_INTMOVE(var->regoff, d);
 543                         }
 544                         store_reg_to_var_int(iptr->dst, d);
 545                         break;
 546
 547                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 548                 case ICMD_DLOAD:      /* op1 = local variable                         */
 549
 550                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 551                         if ((iptr->dst->varkind == LOCALVAR) &&
 552                             (iptr->dst->varnum == iptr->op1))
 553                                 break;
 554                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 555                         if (var->flags & INMEMORY) {
 556                                 M_DLD(d, REG_SP, var->regoff * 8);
 557                         } else {
 558                                 M_FLTMOVE(var->regoff, d);
 559                         }
 560                         store_reg_to_var_flt(iptr->dst, d);
 561                         break;
 562
 563
 564                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 565                 case ICMD_LSTORE:     /* op1 = local variable                         */
 566                 case ICMD_ASTORE:
 567
 568                         if ((src->varkind == LOCALVAR) &&
 569                             (src->varnum == iptr->op1))
 570                                 break;
 571                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 572                         if (var->flags & INMEMORY) {
 573                                 var_to_reg_int(s1, src, REG_ITMP1);
 574                                 M_LST(s1, REG_SP, var->regoff * 8);
 575                         } else {
 576                                 var_to_reg_int(s1, src, var->regoff);
 577                                 M_INTMOVE(s1, var->regoff);
 578                         }
 579                         break;
 580
 581                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 582                 case ICMD_DSTORE:     /* op1 = local variable                         */
 583
 584                         if ((src->varkind == LOCALVAR) &&
 585                             (src->varnum == iptr->op1))
 586                                 break;
 587                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 588                         if (var->flags & INMEMORY) {
 589                                 var_to_reg_flt(s1, src, REG_FTMP1);
 590                                 M_DST(s1, REG_SP, var->regoff * 8);
 591                         } else {
 592                                 var_to_reg_flt(s1, src, var->regoff);
 593                                 M_FLTMOVE(s1, var->regoff);
 594                         }
 595                         break;
 596
 597
 598                 /* pop/dup/swap operations ********************************************/
 599
 600                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 601
 602                 case ICMD_POP:        /* ..., value  ==> ...                          */
 603                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 604                         break;
 605
 606                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 607                         M_COPY(src, iptr->dst);
 608                         break;
 609
 610                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 611
 612                         M_COPY(src,       iptr->dst);
 613                         M_COPY(src->prev, iptr->dst->prev);
 614                         M_COPY(iptr->dst, iptr->dst->prev->prev);
 615                         break;
 616
 617                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 618
 619                         M_COPY(src,             iptr->dst);
 620                         M_COPY(src->prev,       iptr->dst->prev);
 621                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 622                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 623                         break;
 624
 625                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 626
 627                         M_COPY(src,       iptr->dst);
 628                         M_COPY(src->prev, iptr->dst->prev);
 629                         break;
 630
 631                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 632
 633                         M_COPY(src,             iptr->dst);
 634                         M_COPY(src->prev,       iptr->dst->prev);
 635                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 636                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 637                         M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
 638                         break;
 639
 640                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 641
 642                         M_COPY(src,                   iptr->dst);
 643                         M_COPY(src->prev,             iptr->dst->prev);
 644                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 645                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 646                         M_COPY(iptr->dst,             iptr->dst->prev->prev->prev->prev);
 647                         M_COPY(iptr->dst->prev,       iptr->dst->prev->prev->prev->prev->prev);
 648                         break;
 649
 650                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 651
 652                         M_COPY(src,       iptr->dst->prev);
 653                         M_COPY(src->prev, iptr->dst);
 654                         break;
 655
 656
 657                 /* integer operations *************************************************/
 658
 659                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 660
 661                         var_to_reg_int(s1, src, REG_ITMP1);
 662                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 663                         M_ISUB(REG_ZERO, s1, d);
 664                         store_reg_to_var_int(iptr->dst, d);
 665                         break;
 666
 667                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 668
 669                         var_to_reg_int(s1, src, REG_ITMP1);
 670                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 671                         M_LSUB(REG_ZERO, s1, d);
 672                         store_reg_to_var_int(iptr->dst, d);
 673                         break;
 674
 675                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 676
 677                         var_to_reg_int(s1, src, REG_ITMP1);
 678                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 679                         M_INTMOVE(s1, d);
 680                         store_reg_to_var_int(iptr->dst, d);
 681                         break;
 682
 683                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 684
 685                         var_to_reg_int(s1, src, REG_ITMP1);
 686                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 687                         M_IADD(s1, REG_ZERO, d);
 688                         store_reg_to_var_int(iptr->dst, d);
 689                         break;
 690
 691                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 692
 693                         var_to_reg_int(s1, src, REG_ITMP1);
 694                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 695                         if (has_ext_instr_set) {
 696                                 M_BSEXT(s1, d);
 697                         } else {
 698                                 M_SLL_IMM(s1, 56, d);
 699                                 M_SRA_IMM( d, 56, d);
 700                         }
 701                         store_reg_to_var_int(iptr->dst, d);
 702                         break;
 703
 704                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 705
 706                         var_to_reg_int(s1, src, REG_ITMP1);
 707                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 708             M_CZEXT(s1, d);
 709                         store_reg_to_var_int(iptr->dst, d);
 710                         break;
 711
 712                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 713
 714                         var_to_reg_int(s1, src, REG_ITMP1);
 715                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 716                         if (has_ext_instr_set) {
 717                                 M_SSEXT(s1, d);
 718                         } else {
 719                                 M_SLL_IMM(s1, 48, d);
 720                                 M_SRA_IMM( d, 48, d);
 721                         }
 722                         store_reg_to_var_int(iptr->dst, d);
 723                         break;
 724
 725
 726                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 727
 728                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 729                         var_to_reg_int(s2, src, REG_ITMP2);
 730                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 731                         M_IADD(s1, s2, d);
 732                         store_reg_to_var_int(iptr->dst, d);
 733                         break;
 734
 735                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 736                                       /* val.i = constant                             */
 737
 738                         var_to_reg_int(s1, src, REG_ITMP1);
 739                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 740                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 741                                 M_IADD_IMM(s1, iptr->val.i, d);
 742                         } else {
 743                                 ICONST(REG_ITMP2, iptr->val.i);
 744                                 M_IADD(s1, REG_ITMP2, d);
 745                         }
 746                         store_reg_to_var_int(iptr->dst, d);
 747                         break;
 748
 749                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 750
 751                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 752                         var_to_reg_int(s2, src, REG_ITMP2);
 753                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 754                         M_LADD(s1, s2, d);
 755                         store_reg_to_var_int(iptr->dst, d);
 756                         break;
 757
 758                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 759                                       /* val.l = constant                             */
 760
 761                         var_to_reg_int(s1, src, REG_ITMP1);
 762                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 763                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 764                                 M_LADD_IMM(s1, iptr->val.l, d);
 765                         } else {
 766                                 LCONST(REG_ITMP2, iptr->val.l);
 767                                 M_LADD(s1, REG_ITMP2, d);
 768                         }
 769                         store_reg_to_var_int(iptr->dst, d);
 770                         break;
 771
 772                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 773
 774                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 775                         var_to_reg_int(s2, src, REG_ITMP2);
 776                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 777                         M_ISUB(s1, s2, d);
 778                         store_reg_to_var_int(iptr->dst, d);
 779                         break;
 780
 781                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 782                                       /* val.i = constant                             */
 783
 784                         var_to_reg_int(s1, src, REG_ITMP1);
 785                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 786                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 787                                 M_ISUB_IMM(s1, iptr->val.i, d);
 788                         } else {
 789                                 ICONST(REG_ITMP2, iptr->val.i);
 790                                 M_ISUB(s1, REG_ITMP2, d);
 791                         }
 792                         store_reg_to_var_int(iptr->dst, d);
 793                         break;
 794
 795                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 796
 797                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 798                         var_to_reg_int(s2, src, REG_ITMP2);
 799                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 800                         M_LSUB(s1, s2, d);
 801                         store_reg_to_var_int(iptr->dst, d);
 802                         break;
 803
 804                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 805                                       /* val.l = constant                             */
 806
 807                         var_to_reg_int(s1, src, REG_ITMP1);
 808                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 809                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 810                                 M_LSUB_IMM(s1, iptr->val.l, d);
 811                         } else {
 812                                 LCONST(REG_ITMP2, iptr->val.l);
 813                                 M_LSUB(s1, REG_ITMP2, d);
 814                         }
 815                         store_reg_to_var_int(iptr->dst, d);
 816                         break;
 817
 818                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 819
 820                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 821                         var_to_reg_int(s2, src, REG_ITMP2);
 822                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 823                         M_IMUL(s1, s2, d);
 824                         store_reg_to_var_int(iptr->dst, d);
 825                         break;
 826
 827                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 828                                       /* val.i = constant                             */
 829
 830                         var_to_reg_int(s1, src, REG_ITMP1);
 831                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 832                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 833                                 M_IMUL_IMM(s1, iptr->val.i, d);
 834                         } else {
 835                                 ICONST(REG_ITMP2, iptr->val.i);
 836                                 M_IMUL(s1, REG_ITMP2, d);
 837                         }
 838                         store_reg_to_var_int(iptr->dst, d);
 839                         break;
 840
 841                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 842
 843                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 844                         var_to_reg_int(s2, src, REG_ITMP2);
 845                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 846                         M_LMUL(s1, s2, d);
 847                         store_reg_to_var_int(iptr->dst, d);
 848                         break;
 849
 850                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
 851                                       /* val.l = constant                             */
 852
 853                         var_to_reg_int(s1, src, REG_ITMP1);
 854                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 855                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 856                                 M_LMUL_IMM(s1, iptr->val.l, d);
 857                         } else {
 858                                 LCONST(REG_ITMP2, iptr->val.l);
 859                                 M_LMUL(s1, REG_ITMP2, d);
 860                         }
 861                         store_reg_to_var_int(iptr->dst, d);
 862                         break;
 863
 864                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 865                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 866
 867                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 868                         var_to_reg_int(s2, src, REG_ITMP2);
 869                         d = reg_of_var(rd, iptr->dst, REG_RESULT);
 870                         M_BEQZ(s2, 0);
 871                         codegen_addxdivrefs(cd, mcodeptr);
 872
 873                         M_MOV(s1, rd->argintregs[0]);
 874                         M_MOV(s2, rd->argintregs[1]);
 875                         bte = iptr->val.a;
 876                         disp = dseg_addaddress(cd, bte->fp);
 877                         M_ALD(REG_PV, REG_PV, disp);
 878                         M_JSR(REG_RA, REG_PV);
 879                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 880                         M_LDA(REG_PV, REG_RA, -disp);
 881
 882                         M_IADD(REG_RESULT, REG_ZERO, d); /* sign extend (bugfix for gcc -O2) */
 883                         store_reg_to_var_int(iptr->dst, d);
 884                         break;
 885
 886                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 887                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 888
 889                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 890                         var_to_reg_int(s2, src, REG_ITMP2);
 891                         d = reg_of_var(rd, iptr->dst, REG_RESULT);
 892                         M_BEQZ(s2, 0);
 893                         codegen_addxdivrefs(cd, mcodeptr);
 894
 895                         M_MOV(s1, rd->argintregs[0]);
 896                         M_MOV(s2, rd->argintregs[1]);
 897                         bte = iptr->val.a;
 898                         disp = dseg_addaddress(cd, bte->fp);
 899                         M_ALD(REG_PV, REG_PV, disp);
 900                         M_JSR(REG_RA, REG_PV);
 901                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 902                         M_LDA(REG_PV, REG_RA, -disp);
 903
 904                         M_INTMOVE(REG_RESULT, d);
 905                         store_reg_to_var_int(iptr->dst, d);
 906                         break;
 907
 908                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
 909                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
 910
 911                         var_to_reg_int(s1, src, REG_ITMP1);
 912                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 913                         if (iptr->val.i <= 15) {
 914                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
 915                                 M_CMOVGE(s1, s1, REG_ITMP2);
 916                         } else {
 917                                 M_SRA_IMM(s1, 63, REG_ITMP2);
 918                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
 919                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
 920                         }
 921                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
 922                         store_reg_to_var_int(iptr->dst, d);
 923                         break;
 924
 925                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 926
 927                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 928                         var_to_reg_int(s2, src, REG_ITMP2);
 929                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 930                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 931                         M_SLL(s1, REG_ITMP3, d);
 932                         M_IADD(d, REG_ZERO, d);
 933                         store_reg_to_var_int(iptr->dst, d);
 934                         break;
 935
 936                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
 937                                       /* val.i = constant                             */
 938
 939                         var_to_reg_int(s1, src, REG_ITMP1);
 940                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 941                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
 942                         M_IADD(d, REG_ZERO, d);
 943                         store_reg_to_var_int(iptr->dst, d);
 944                         break;
 945
 946                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
 947
 948                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 949                         var_to_reg_int(s2, src, REG_ITMP2);
 950                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 951                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 952                         M_SRA(s1, REG_ITMP3, d);
 953                         store_reg_to_var_int(iptr->dst, d);
 954                         break;
 955
 956                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
 957                                       /* val.i = constant                             */
 958
 959                         var_to_reg_int(s1, src, REG_ITMP1);
 960                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 961                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
 962                         store_reg_to_var_int(iptr->dst, d);
 963                         break;
 964
 965                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
 966
 967                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 968                         var_to_reg_int(s2, src, REG_ITMP2);
 969                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 970                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
 971             M_IZEXT(s1, d);
 972                         M_SRL(d, REG_ITMP2, d);
 973                         M_IADD(d, REG_ZERO, d);
 974                         store_reg_to_var_int(iptr->dst, d);
 975                         break;
 976
 977                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
 978                                       /* val.i = constant                             */
 979
 980                         var_to_reg_int(s1, src, REG_ITMP1);
 981                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 982             M_IZEXT(s1, d);
 983                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
 984                         M_IADD(d, REG_ZERO, d);
 985                         store_reg_to_var_int(iptr->dst, d);
 986                         break;
 987
 988                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 989
 990                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 991                         var_to_reg_int(s2, src, REG_ITMP2);
 992                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 993                         M_SLL(s1, s2, d);
 994                         store_reg_to_var_int(iptr->dst, d);
 995                         break;
 996
 997                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
 998                                       /* val.i = constant                             */
 999
1000                         var_to_reg_int(s1, src, REG_ITMP1);
1001                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1002                         M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
1003                         store_reg_to_var_int(iptr->dst, d);
1004                         break;
1005
1006                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1007
1008                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1009                         var_to_reg_int(s2, src, REG_ITMP2);
1010                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1011                         M_SRA(s1, s2, d);
1012                         store_reg_to_var_int(iptr->dst, d);
1013                         break;
1014
1015                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1016                                       /* val.i = constant                             */
1017
1018                         var_to_reg_int(s1, src, REG_ITMP1);
1019                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1020                         M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
1021                         store_reg_to_var_int(iptr->dst, d);
1022                         break;
1023
1024                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1025
1026                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1027                         var_to_reg_int(s2, src, REG_ITMP2);
1028                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1029                         M_SRL(s1, s2, d);
1030                         store_reg_to_var_int(iptr->dst, d);
1031                         break;
1032
1033                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1034                                       /* val.i = constant                             */
1035
1036                         var_to_reg_int(s1, src, REG_ITMP1);
1037                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1038                         M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
1039                         store_reg_to_var_int(iptr->dst, d);
1040                         break;
1041
1042                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1043                 case ICMD_LAND:
1044
1045                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1046                         var_to_reg_int(s2, src, REG_ITMP2);
1047                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1048                         M_AND(s1, s2, d);
1049                         store_reg_to_var_int(iptr->dst, d);
1050                         break;
1051
1052                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1053                                       /* val.i = constant                             */
1054
1055                         var_to_reg_int(s1, src, REG_ITMP1);
1056                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1057                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1058                                 M_AND_IMM(s1, iptr->val.i, d);
1059                         } else if (iptr->val.i == 0xffff) {
1060                                 M_CZEXT(s1, d);
1061                         } else if (iptr->val.i == 0xffffff) {
1062                                 M_ZAPNOT_IMM(s1, 0x07, d);
1063                         } else {
1064                                 ICONST(REG_ITMP2, iptr->val.i);
1065                                 M_AND(s1, REG_ITMP2, d);
1066                         }
1067                         store_reg_to_var_int(iptr->dst, d);
1068                         break;
1069
1070                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1071                                       /* val.i = constant                             */
1072
1073                         var_to_reg_int(s1, src, REG_ITMP1);
1074                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1075                         if (s1 == d) {
1076                                 M_MOV(s1, REG_ITMP1);
1077                                 s1 = REG_ITMP1;
1078                         }
1079                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1080                                 M_AND_IMM(s1, iptr->val.i, d);
1081                                 M_BGEZ(s1, 3);
1082                                 M_ISUB(REG_ZERO, s1, d);
1083                                 M_AND_IMM(d, iptr->val.i, d);
1084                         } else if (iptr->val.i == 0xffff) {
1085                                 M_CZEXT(s1, d);
1086                                 M_BGEZ(s1, 3);
1087                                 M_ISUB(REG_ZERO, s1, d);
1088                                 M_CZEXT(d, d);
1089                         } else if (iptr->val.i == 0xffffff) {
1090                                 M_ZAPNOT_IMM(s1, 0x07, d);
1091                                 M_BGEZ(s1, 3);
1092                                 M_ISUB(REG_ZERO, s1, d);
1093                                 M_ZAPNOT_IMM(d, 0x07, d);
1094                         } else {
1095                                 ICONST(REG_ITMP2, iptr->val.i);
1096                                 M_AND(s1, REG_ITMP2, d);
1097                                 M_BGEZ(s1, 3);
1098                                 M_ISUB(REG_ZERO, s1, d);
1099                                 M_AND(d, REG_ITMP2, d);
1100                         }
1101                         M_ISUB(REG_ZERO, d, d);
1102                         store_reg_to_var_int(iptr->dst, d);
1103                         break;
1104
1105                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1106                                       /* val.l = constant                             */
1107
1108                         var_to_reg_int(s1, src, REG_ITMP1);
1109                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1110                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1111                                 M_AND_IMM(s1, iptr->val.l, d);
1112                         } else if (iptr->val.l == 0xffffL) {
1113                                 M_CZEXT(s1, d);
1114                         } else if (iptr->val.l == 0xffffffL) {
1115                                 M_ZAPNOT_IMM(s1, 0x07, d);
1116                         } else if (iptr->val.l == 0xffffffffL) {
1117                                 M_IZEXT(s1, d);
1118                         } else if (iptr->val.l == 0xffffffffffL) {
1119                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1120                         } else if (iptr->val.l == 0xffffffffffffL) {
1121                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1122                         } else if (iptr->val.l == 0xffffffffffffffL) {
1123                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1124                         } else {
1125                                 LCONST(REG_ITMP2, iptr->val.l);
1126                                 M_AND(s1, REG_ITMP2, d);
1127                         }
1128                         store_reg_to_var_int(iptr->dst, d);
1129                         break;
1130
1131                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1132                                       /* val.l = constant                             */
1133
1134                         var_to_reg_int(s1, src, REG_ITMP1);
1135                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1136                         if (s1 == d) {
1137                                 M_MOV(s1, REG_ITMP1);
1138                                 s1 = REG_ITMP1;
1139                         }
1140                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1141                                 M_AND_IMM(s1, iptr->val.l, d);
1142                                 M_BGEZ(s1, 3);
1143                                 M_LSUB(REG_ZERO, s1, d);
1144                                 M_AND_IMM(d, iptr->val.l, d);
1145                         } else if (iptr->val.l == 0xffffL) {
1146                                 M_CZEXT(s1, d);
1147                                 M_BGEZ(s1, 3);
1148                                 M_LSUB(REG_ZERO, s1, d);
1149                                 M_CZEXT(d, d);
1150                         } else if (iptr->val.l == 0xffffffL) {
1151                                 M_ZAPNOT_IMM(s1, 0x07, d);
1152                                 M_BGEZ(s1, 3);
1153                                 M_LSUB(REG_ZERO, s1, d);
1154                                 M_ZAPNOT_IMM(d, 0x07, d);
1155                         } else if (iptr->val.l == 0xffffffffL) {
1156                                 M_IZEXT(s1, d);
1157                                 M_BGEZ(s1, 3);
1158                                 M_LSUB(REG_ZERO, s1, d);
1159                                 M_IZEXT(d, d);
1160                         } else if (iptr->val.l == 0xffffffffffL) {
1161                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1162                                 M_BGEZ(s1, 3);
1163                                 M_LSUB(REG_ZERO, s1, d);
1164                                 M_ZAPNOT_IMM(d, 0x1f, d);
1165                         } else if (iptr->val.l == 0xffffffffffffL) {
1166                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1167                                 M_BGEZ(s1, 3);
1168                                 M_LSUB(REG_ZERO, s1, d);
1169                                 M_ZAPNOT_IMM(d, 0x3f, d);
1170                         } else if (iptr->val.l == 0xffffffffffffffL) {
1171                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1172                                 M_BGEZ(s1, 3);
1173                                 M_LSUB(REG_ZERO, s1, d);
1174                                 M_ZAPNOT_IMM(d, 0x7f, d);
1175                         } else {
1176                                 LCONST(REG_ITMP2, iptr->val.l);
1177                                 M_AND(s1, REG_ITMP2, d);
1178                                 M_BGEZ(s1, 3);
1179                                 M_LSUB(REG_ZERO, s1, d);
1180                                 M_AND(d, REG_ITMP2, d);
1181                         }
1182                         M_LSUB(REG_ZERO, d, d);
1183                         store_reg_to_var_int(iptr->dst, d);
1184                         break;
1185
1186                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1187                 case ICMD_LOR:
1188
1189                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1190                         var_to_reg_int(s2, src, REG_ITMP2);
1191                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1192                         M_OR( s1,s2, d);
1193                         store_reg_to_var_int(iptr->dst, d);
1194                         break;
1195
1196                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1197                                       /* val.i = constant                             */
1198
1199                         var_to_reg_int(s1, src, REG_ITMP1);
1200                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1201                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1202                                 M_OR_IMM(s1, iptr->val.i, d);
1203                         } else {
1204                                 ICONST(REG_ITMP2, iptr->val.i);
1205                                 M_OR(s1, REG_ITMP2, d);
1206                         }
1207                         store_reg_to_var_int(iptr->dst, d);
1208                         break;
1209
1210                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1211                                       /* val.l = constant                             */
1212
1213                         var_to_reg_int(s1, src, REG_ITMP1);
1214                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1215                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1216                                 M_OR_IMM(s1, iptr->val.l, d);
1217                         } else {
1218                                 LCONST(REG_ITMP2, iptr->val.l);
1219                                 M_OR(s1, REG_ITMP2, d);
1220                         }
1221                         store_reg_to_var_int(iptr->dst, d);
1222                         break;
1223
1224                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1225                 case ICMD_LXOR:
1226
1227                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1228                         var_to_reg_int(s2, src, REG_ITMP2);
1229                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1230                         M_XOR(s1, s2, d);
1231                         store_reg_to_var_int(iptr->dst, d);
1232                         break;
1233
1234                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1235                                       /* val.i = constant                             */
1236
1237                         var_to_reg_int(s1, src, REG_ITMP1);
1238                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1239                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1240                                 M_XOR_IMM(s1, iptr->val.i, d);
1241                         } else {
1242                                 ICONST(REG_ITMP2, iptr->val.i);
1243                                 M_XOR(s1, REG_ITMP2, d);
1244                         }
1245                         store_reg_to_var_int(iptr->dst, d);
1246                         break;
1247
1248                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1249                                       /* val.l = constant                             */
1250
1251                         var_to_reg_int(s1, src, REG_ITMP1);
1252                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1253                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1254                                 M_XOR_IMM(s1, iptr->val.l, d);
1255                         } else {
1256                                 LCONST(REG_ITMP2, iptr->val.l);
1257                                 M_XOR(s1, REG_ITMP2, d);
1258                         }
1259                         store_reg_to_var_int(iptr->dst, d);
1260                         break;
1261
1262
1263                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1264
1265                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1266                         var_to_reg_int(s2, src, REG_ITMP2);
1267                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1268                         M_CMPLT(s1, s2, REG_ITMP3);
1269                         M_CMPLT(s2, s1, REG_ITMP1);
1270                         M_LSUB(REG_ITMP1, REG_ITMP3, d);
1271                         store_reg_to_var_int(iptr->dst, d);
1272                         break;
1273
1274
1275                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1276                                       /* op1 = variable, val.i = constant             */
1277
1278                         var = &(rd->locals[iptr->op1][TYPE_INT]);
1279                         if (var->flags & INMEMORY) {
1280                                 s1 = REG_ITMP1;
1281                                 M_LLD(s1, REG_SP, var->regoff * 8);
1282                         } else
1283                                 s1 = var->regoff;
1284                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1285                                 M_IADD_IMM(s1, iptr->val.i, s1);
1286                         } else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1287                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1288                         } else {
1289                                 M_LDA (s1, s1, iptr->val.i);
1290                                 M_IADD(s1, REG_ZERO, s1);
1291                         }
1292                         if (var->flags & INMEMORY)
1293                                 M_LST(s1, REG_SP, var->regoff * 8);
1294                         break;
1295
1296
1297                 /* floating operations ************************************************/
1298
1299                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1300
1301                         var_to_reg_flt(s1, src, REG_FTMP1);
1302                         d = reg_of_var(rd, iptr->dst, REG_FTMP2);
1303                         M_FMOVN(s1, d);
1304                         store_reg_to_var_flt(iptr->dst, d);
1305                         break;
1306
1307                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1308
1309                         var_to_reg_flt(s1, src, REG_FTMP1);
1310                         d = reg_of_var(rd, iptr->dst, REG_FTMP2);
1311                         M_FMOVN(s1, d);
1312                         store_reg_to_var_flt(iptr->dst, d);
1313                         break;
1314
1315                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1316
1317                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1318                         var_to_reg_flt(s2, src, REG_FTMP2);
1319                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1320                         if (opt_noieee) {
1321                                 M_FADD(s1, s2, d);
1322                         } else {
1323                                 if (d == s1 || d == s2) {
1324                                         M_FADDS(s1, s2, REG_FTMP3);
1325                                         M_TRAPB;
1326                                         M_FMOV(REG_FTMP3, d);
1327                                 } else {
1328                                         M_FADDS(s1, s2, d);
1329                                         M_TRAPB;
1330                                 }
1331                         }
1332                         store_reg_to_var_flt(iptr->dst, d);
1333                         break;
1334
1335                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1336
1337                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1338                         var_to_reg_flt(s2, src, REG_FTMP2);
1339                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1340                         if (opt_noieee) {
1341                                 M_DADD(s1, s2, d);
1342                         } else {
1343                                 if (d == s1 || d == s2) {
1344                                         M_DADDS(s1, s2, REG_FTMP3);
1345                                         M_TRAPB;
1346                                         M_FMOV(REG_FTMP3, d);
1347                                 } else {
1348                                         M_DADDS(s1, s2, d);
1349                                         M_TRAPB;
1350                                 }
1351                         }
1352                         store_reg_to_var_flt(iptr->dst, d);
1353                         break;
1354
1355                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1356
1357                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1358                         var_to_reg_flt(s2, src, REG_FTMP2);
1359                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1360                         if (opt_noieee) {
1361                                 M_FSUB(s1, s2, d);
1362                         } else {
1363                                 if (d == s1 || d == s2) {
1364                                         M_FSUBS(s1, s2, REG_FTMP3);
1365                                         M_TRAPB;
1366                                         M_FMOV(REG_FTMP3, d);
1367                                 } else {
1368                                         M_FSUBS(s1, s2, d);
1369                                         M_TRAPB;
1370                                 }
1371                         }
1372                         store_reg_to_var_flt(iptr->dst, d);
1373                         break;
1374
1375                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1376
1377                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1378                         var_to_reg_flt(s2, src, REG_FTMP2);
1379                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1380                         if (opt_noieee) {
1381                                 M_DSUB(s1, s2, d);
1382                         } else {
1383                                 if (d == s1 || d == s2) {
1384                                         M_DSUBS(s1, s2, REG_FTMP3);
1385                                         M_TRAPB;
1386                                         M_FMOV(REG_FTMP3, d);
1387                                 } else {
1388                                         M_DSUBS(s1, s2, d);
1389                                         M_TRAPB;
1390                                 }
1391                         }
1392                         store_reg_to_var_flt(iptr->dst, d);
1393                         break;
1394
1395                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1396
1397                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1398                         var_to_reg_flt(s2, src, REG_FTMP2);
1399                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1400                         if (opt_noieee) {
1401                                 M_FMUL(s1, s2, d);
1402                         } else {
1403                                 if (d == s1 || d == s2) {
1404                                         M_FMULS(s1, s2, REG_FTMP3);
1405                                         M_TRAPB;
1406                                         M_FMOV(REG_FTMP3, d);
1407                                 } else {
1408                                         M_FMULS(s1, s2, d);
1409                                         M_TRAPB;
1410                                 }
1411                         }
1412                         store_reg_to_var_flt(iptr->dst, d);
1413                         break;
1414
1415                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2      */
1416
1417                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1418                         var_to_reg_flt(s2, src, REG_FTMP2);
1419                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1420                         if (opt_noieee) {
1421                                 M_DMUL(s1, s2, d);
1422                         } else {
1423                                 if (d == s1 || d == s2) {
1424                                         M_DMULS(s1, s2, REG_FTMP3);
1425                                         M_TRAPB;
1426                                         M_FMOV(REG_FTMP3, d);
1427                                 } else {
1428                                         M_DMULS(s1, s2, d);
1429                                         M_TRAPB;
1430                                 }
1431                         }
1432                         store_reg_to_var_flt(iptr->dst, d);
1433                         break;
1434
1435                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1436
1437                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1438                         var_to_reg_flt(s2, src, REG_FTMP2);
1439                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1440                         if (opt_noieee) {
1441                                 M_FDIV(s1, s2, d);
1442                         } else {
1443                                 if (d == s1 || d == s2) {
1444                                         M_FDIVS(s1, s2, REG_FTMP3);
1445                                         M_TRAPB;
1446                                         M_FMOV(REG_FTMP3, d);
1447                                 } else {
1448                                         M_FDIVS(s1, s2, d);
1449                                         M_TRAPB;
1450                                 }
1451                         }
1452                         store_reg_to_var_flt(iptr->dst, d);
1453                         break;
1454
1455                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1456
1457                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1458                         var_to_reg_flt(s2, src, REG_FTMP2);
1459                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1460                         if (opt_noieee) {
1461                                 M_DDIV(s1, s2, d);
1462                         } else {
1463                                 if (d == s1 || d == s2) {
1464                                         M_DDIVS(s1, s2, REG_FTMP3);
1465                                         M_TRAPB;
1466                                         M_FMOV(REG_FTMP3, d);
1467                                 } else {
1468                                         M_DDIVS(s1, s2, d);
1469                                         M_TRAPB;
1470                                 }
1471                         }
1472                         store_reg_to_var_flt(iptr->dst, d);
1473                         break;
1474
1475                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1476                 case ICMD_L2F:
1477                         var_to_reg_int(s1, src, REG_ITMP1);
1478                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1479                         disp = dseg_adddouble(cd, 0.0);
1480                         M_LST(s1, REG_PV, disp);
1481                         M_DLD(d, REG_PV, disp);
1482                         M_CVTLF(d, d);
1483                         store_reg_to_var_flt(iptr->dst, d);
1484                         break;
1485
1486                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1487                 case ICMD_L2D:
1488                         var_to_reg_int(s1, src, REG_ITMP1);
1489                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1490                         disp = dseg_adddouble(cd, 0.0);
1491                         M_LST(s1, REG_PV, disp);
1492                         M_DLD(d, REG_PV, disp);
1493                         M_CVTLD(d, d);
1494                         store_reg_to_var_flt(iptr->dst, d);
1495                         break;
1496
1497                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1498                 case ICMD_D2I:
1499                         var_to_reg_flt(s1, src, REG_FTMP1);
1500                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1501                         disp = dseg_adddouble(cd, 0.0);
1502                         M_CVTDL_C(s1, REG_FTMP2);
1503                         M_CVTLI(REG_FTMP2, REG_FTMP3);
1504                         M_DST(REG_FTMP3, REG_PV, disp);
1505                         M_ILD(d, REG_PV, disp);
1506                         store_reg_to_var_int(iptr->dst, d);
1507                         break;
1508
1509                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1510                 case ICMD_D2L:
1511                         var_to_reg_flt(s1, src, REG_FTMP1);
1512                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1513                         disp = dseg_adddouble(cd, 0.0);
1514                         M_CVTDL_C(s1, REG_FTMP2);
1515                         M_DST(REG_FTMP2, REG_PV, disp);
1516                         M_LLD(d, REG_PV, disp);
1517                         store_reg_to_var_int(iptr->dst, d);
1518                         break;
1519
1520                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1521
1522                         var_to_reg_flt(s1, src, REG_FTMP1);
1523                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1524                         M_CVTFDS(s1, d);
1525                         M_TRAPB;
1526                         store_reg_to_var_flt(iptr->dst, d);
1527                         break;
1528
1529                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1530
1531                         var_to_reg_flt(s1, src, REG_FTMP1);
1532                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1533                         if (opt_noieee) {
1534                                 M_CVTDF(s1, d);
1535                         } else {
1536                                 M_CVTDFS(s1, d);
1537                                 M_TRAPB;
1538                         }
1539                         store_reg_to_var_flt(iptr->dst, d);
1540                         break;
1541
1542                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1543                 case ICMD_DCMPL:
1544                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1545                         var_to_reg_flt(s2, src, REG_FTMP2);
1546                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1547                         if (opt_noieee) {
1548                                 M_LSUB_IMM(REG_ZERO, 1, d);
1549                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1550                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1551                                 M_CLR   (d);
1552                                 M_FCMPLT(s2, s1, REG_FTMP3);
1553                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1554                                 M_LADD_IMM(REG_ZERO, 1, d);
1555                         } else {
1556                                 M_LSUB_IMM(REG_ZERO, 1, d);
1557                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1558                                 M_TRAPB;
1559                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1560                                 M_CLR   (d);
1561                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1562                                 M_TRAPB;
1563                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1564                                 M_LADD_IMM(REG_ZERO, 1, d);
1565                         }
1566                         store_reg_to_var_int(iptr->dst, d);
1567                         break;
1568
1569                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1570                 case ICMD_DCMPG:
1571                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1572                         var_to_reg_flt(s2, src, REG_FTMP2);
1573                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1574                         if (opt_noieee) {
1575                                 M_LADD_IMM(REG_ZERO, 1, d);
1576                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1577                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1578                                 M_CLR   (d);
1579                                 M_FCMPLT(s1, s2, REG_FTMP3);
1580                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1581                                 M_LSUB_IMM(REG_ZERO, 1, d);
1582                         } else {
1583                                 M_LADD_IMM(REG_ZERO, 1, d);
1584                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1585                                 M_TRAPB;
1586                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1587                                 M_CLR   (d);
1588                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1589                                 M_TRAPB;
1590                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1591                                 M_LSUB_IMM(REG_ZERO, 1, d);
1592                         }
1593                         store_reg_to_var_int(iptr->dst, d);
1594                         break;
1595
1596
1597                 /* memory operations **************************************************/
1598
1599                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1600
1601                         var_to_reg_int(s1, src, REG_ITMP1);
1602                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1603                         gen_nullptr_check(s1);
1604                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1605                         store_reg_to_var_int(iptr->dst, d);
1606                         break;
1607
1608                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1609
1610                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1611                         var_to_reg_int(s2, src, REG_ITMP2);
1612                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1613                         if (iptr->op1 == 0) {
1614                                 gen_nullptr_check(s1);
1615                                 gen_bound_check;
1616                         }
1617                         if (has_ext_instr_set) {
1618                                 M_LADD   (s2, s1, REG_ITMP1);
1619                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
1620                                 M_BSEXT  (d, d);
1621                         } else {
1622                                 M_LADD(s2, s1, REG_ITMP1);
1623                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1624                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
1625                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1626                                 M_SRA_IMM(d, 56, d);
1627                         }
1628                         store_reg_to_var_int(iptr->dst, d);
1629                         break;
1630
1631                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1632
1633                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1634                         var_to_reg_int(s2, src, REG_ITMP2);
1635                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1636                         if (iptr->op1 == 0) {
1637                                 gen_nullptr_check(s1);
1638                                 gen_bound_check;
1639                         }
1640                         if (has_ext_instr_set) {
1641                                 M_LADD(s2, s1, REG_ITMP1);
1642                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1643                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1644                         } else {
1645                                 M_LADD (s2, s1, REG_ITMP1);
1646                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1647                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1648                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1649                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
1650                         }
1651                         store_reg_to_var_int(iptr->dst, d);
1652                         break;
1653
1654                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1655
1656                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1657                         var_to_reg_int(s2, src, REG_ITMP2);
1658                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1659                         if (iptr->op1 == 0) {
1660                                 gen_nullptr_check(s1);
1661                                 gen_bound_check;
1662                         }
1663                         if (has_ext_instr_set) {
1664                                 M_LADD(s2, s1, REG_ITMP1);
1665                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1666                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
1667                                 M_SSEXT(d, d);
1668                         } else {
1669                                 M_LADD(s2, s1, REG_ITMP1);
1670                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1671                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1672                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
1673                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1674                                 M_SRA_IMM(d, 48, d);
1675                         }
1676                         store_reg_to_var_int(iptr->dst, d);
1677                         break;
1678
1679                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1680
1681                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1682                         var_to_reg_int(s2, src, REG_ITMP2);
1683                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1684                         if (iptr->op1 == 0) {
1685                                 gen_nullptr_check(s1);
1686                                 gen_bound_check;
1687                         }
1688                         M_S4ADDQ(s2, s1, REG_ITMP1);
1689                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1690                         store_reg_to_var_int(iptr->dst, d);
1691                         break;
1692
1693                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1694
1695                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1696                         var_to_reg_int(s2, src, REG_ITMP2);
1697                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1698                         if (iptr->op1 == 0) {
1699                                 gen_nullptr_check(s1);
1700                                 gen_bound_check;
1701                         }
1702                         M_S8ADDQ(s2, s1, REG_ITMP1);
1703                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1704                         store_reg_to_var_int(iptr->dst, d);
1705                         break;
1706
1707                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1708
1709                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1710                         var_to_reg_int(s2, src, REG_ITMP2);
1711                         d = reg_of_var(rd, iptr->dst, REG_FTMP2);
1712                         if (iptr->op1 == 0) {
1713                                 gen_nullptr_check(s1);
1714                                 gen_bound_check;
1715                         }
1716                         M_S4ADDQ(s2, s1, REG_ITMP1);
1717                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1718                         store_reg_to_var_flt(iptr->dst, d);
1719                         break;
1720
1721                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1722
1723                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1724                         var_to_reg_int(s2, src, REG_ITMP2);
1725                         d = reg_of_var(rd, iptr->dst, REG_FTMP2);
1726                         if (iptr->op1 == 0) {
1727                                 gen_nullptr_check(s1);
1728                                 gen_bound_check;
1729                         }
1730                         M_S8ADDQ(s2, s1, REG_ITMP1);
1731                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1732                         store_reg_to_var_flt(iptr->dst, d);
1733                         break;
1734
1735                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1736
1737                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1738                         var_to_reg_int(s2, src, REG_ITMP2);
1739                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1740                         if (iptr->op1 == 0) {
1741                                 gen_nullptr_check(s1);
1742                                 gen_bound_check;
1743                         }
1744                         M_SAADDQ(s2, s1, REG_ITMP1);
1745                         M_ALD(d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1746                         store_reg_to_var_int(iptr->dst, d);
1747                         break;
1748
1749
1750                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1751
1752                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1753                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1754                         if (iptr->op1 == 0) {
1755                                 gen_nullptr_check(s1);
1756                                 gen_bound_check;
1757                         }
1758                         var_to_reg_int(s3, src, REG_ITMP3);
1759                         if (has_ext_instr_set) {
1760                                 M_LADD(s2, s1, REG_ITMP1);
1761                                 M_BST(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1762                         } else {
1763                                 M_LADD(s2, s1, REG_ITMP1);
1764                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1765                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1766                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
1767                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1768                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1769                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1770                         }
1771                         break;
1772
1773                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1774
1775                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1776                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1777                         if (iptr->op1 == 0) {
1778                                 gen_nullptr_check(s1);
1779                                 gen_bound_check;
1780                         }
1781                         var_to_reg_int(s3, src, REG_ITMP3);
1782                         if (has_ext_instr_set) {
1783                                 M_LADD(s2, s1, REG_ITMP1);
1784                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1785                                 M_SST(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1786                         } else {
1787                                 M_LADD(s2, s1, REG_ITMP1);
1788                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1789                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1790                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1791                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1792                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1793                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1794                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1795                         }
1796                         break;
1797
1798                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1799
1800                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1801                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1802                         if (iptr->op1 == 0) {
1803                                 gen_nullptr_check(s1);
1804                                 gen_bound_check;
1805                         }
1806                         var_to_reg_int(s3, src, REG_ITMP3);
1807                         if (has_ext_instr_set) {
1808                                 M_LADD(s2, s1, REG_ITMP1);
1809                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1810                                 M_SST(s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1811                         } else {
1812                                 M_LADD(s2, s1, REG_ITMP1);
1813                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1814                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1815                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1816                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1817                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1818                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1819                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1820                         }
1821                         break;
1822
1823                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1824
1825                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1826                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1827                         if (iptr->op1 == 0) {
1828                                 gen_nullptr_check(s1);
1829                                 gen_bound_check;
1830                         }
1831                         var_to_reg_int(s3, src, REG_ITMP3);
1832                         M_S4ADDQ(s2, s1, REG_ITMP1);
1833                         M_IST(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1834                         break;
1835
1836                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1837
1838                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1839                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1840                         if (iptr->op1 == 0) {
1841                                 gen_nullptr_check(s1);
1842                                 gen_bound_check;
1843                         }
1844                         var_to_reg_int(s3, src, REG_ITMP3);
1845                         M_S8ADDQ(s2, s1, REG_ITMP1);
1846                         M_LST(s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1847                         break;
1848
1849                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1850
1851                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1852                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1853                         if (iptr->op1 == 0) {
1854                                 gen_nullptr_check(s1);
1855                                 gen_bound_check;
1856                         }
1857                         var_to_reg_flt(s3, src, REG_FTMP3);
1858                         M_S4ADDQ(s2, s1, REG_ITMP1);
1859                         M_FST(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1860                         break;
1861
1862                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1863
1864                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1865                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1866                         if (iptr->op1 == 0) {
1867                                 gen_nullptr_check(s1);
1868                                 gen_bound_check;
1869                         }
1870                         var_to_reg_flt(s3, src, REG_FTMP3);
1871                         M_S8ADDQ(s2, s1, REG_ITMP1);
1872                         M_DST(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1873                         break;
1874
1875                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1876
1877                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1878                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1879                         if (iptr->op1 == 0) {
1880                                 gen_nullptr_check(s1);
1881                                 gen_bound_check;
1882                         }
1883                         var_to_reg_int(s3, src, REG_ITMP3);
1884
1885                         M_MOV(s1, rd->argintregs[0]);
1886                         M_MOV(s3, rd->argintregs[1]);
1887                         disp = dseg_addaddress(cd, BUILTIN_canstore);
1888                         M_ALD(REG_PV, REG_PV, disp);
1889                         M_JSR(REG_RA, REG_PV);
1890                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
1891                         M_LDA(REG_PV, REG_RA, -disp);
1892
1893                         M_BEQZ(REG_RESULT, 0);
1894                         codegen_addxstorerefs(cd, mcodeptr);
1895
1896                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1897                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1898                         var_to_reg_int(s3, src, REG_ITMP3);
1899                         M_SAADDQ(s2, s1, REG_ITMP1);
1900                         M_AST(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1901                         break;
1902
1903
1904                 case ICMD_IASTORECONST:   /* ..., arrayref, index  ==> ...            */
1905
1906                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1907                         var_to_reg_int(s2, src, REG_ITMP2);
1908                         if (iptr->op1 == 0) {
1909                                 gen_nullptr_check(s1);
1910                                 gen_bound_check;
1911                         }
1912                         M_S4ADDQ(s2, s1, REG_ITMP1);
1913                         M_IST(REG_ZERO, REG_ITMP1, OFFSET(java_intarray, data[0]));
1914                         break;
1915
1916                 case ICMD_LASTORECONST:   /* ..., arrayref, index  ==> ...            */
1917
1918                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1919                         var_to_reg_int(s2, src, REG_ITMP2);
1920                         if (iptr->op1 == 0) {
1921                                 gen_nullptr_check(s1);
1922                                 gen_bound_check;
1923                         }
1924                         M_S8ADDQ(s2, s1, REG_ITMP1);
1925                         M_LST(REG_ZERO, REG_ITMP1, OFFSET(java_longarray, data[0]));
1926                         break;
1927
1928                 case ICMD_AASTORECONST:   /* ..., arrayref, index  ==> ...            */
1929
1930                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1931                         var_to_reg_int(s2, src, REG_ITMP2);
1932                         if (iptr->op1 == 0) {
1933                                 gen_nullptr_check(s1);
1934                                 gen_bound_check;
1935                         }
1936                         M_SAADDQ(s2, s1, REG_ITMP1);
1937                         M_AST(REG_ZERO, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1938                         break;
1939
1940                 case ICMD_BASTORECONST:   /* ..., arrayref, index  ==> ...            */
1941
1942                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1943                         var_to_reg_int(s2, src, REG_ITMP2);
1944                         if (iptr->op1 == 0) {
1945                                 gen_nullptr_check(s1);
1946                                 gen_bound_check;
1947                         }
1948                         if (has_ext_instr_set) {
1949                                 M_LADD(s2, s1, REG_ITMP1);
1950                                 M_BST(REG_ZERO, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1951
1952                         } else {
1953                                 M_LADD(s2, s1, REG_ITMP1);
1954                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1955                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1956                                 M_INSBL(REG_ZERO, REG_ITMP1, REG_ITMP3);
1957                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1958                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1959                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1960                         }
1961                         break;
1962
1963                 case ICMD_CASTORECONST:   /* ..., arrayref, index  ==> ...            */
1964
1965                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1966                         var_to_reg_int(s2, src, REG_ITMP2);
1967                         if (iptr->op1 == 0) {
1968                                 gen_nullptr_check(s1);
1969                                 gen_bound_check;
1970                         }
1971                         if (has_ext_instr_set) {
1972                                 M_LADD(s2, s1, REG_ITMP1);
1973                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1974                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_chararray, data[0]));
1975
1976                         } else {
1977                                 M_LADD(s2, s1, REG_ITMP1);
1978                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1979                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1980                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1981                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
1982                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1983                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1984                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1985                         }
1986                         break;
1987
1988                 case ICMD_SASTORECONST:   /* ..., arrayref, index  ==> ...            */
1989
1990                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1991                         var_to_reg_int(s2, src, REG_ITMP2);
1992                         if (iptr->op1 == 0) {
1993                                 gen_nullptr_check(s1);
1994                                 gen_bound_check;
1995                         }
1996                         if (has_ext_instr_set) {
1997                                 M_LADD(s2, s1, REG_ITMP1);
1998                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1999                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2000
2001                         } else {
2002                                 M_LADD(s2, s1, REG_ITMP1);
2003                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2004                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2005                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2006                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2007                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2008                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2009                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2010                         }
2011                         break;
2012
2013
2014                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2015                                       /* op1 = type, val.a = field address            */
2016
2017                         if (!iptr->val.a) {
2018                                 disp = dseg_addaddress(cd, 0);
2019
2020                                 codegen_addpatchref(cd, mcodeptr,
2021                                                                         PATCHER_get_putstatic,
2022                                                                         (unresolved_field *) iptr->target, disp);
2023
2024                                 if (opt_showdisassemble)
2025                                         M_NOP;
2026
2027
2028                         } else {
2029                                 fieldinfo *fi = iptr->val.a;
2030
2031                                 disp = dseg_addaddress(cd, &(fi->value));
2032
2033                                 if (!(fi->class->state & CLASS_INITIALIZED)) {
2034                                         codegen_addpatchref(cd, mcodeptr,
2035                                                                                 PATCHER_clinit, fi->class, 0);
2036
2037                                         if (opt_showdisassemble)
2038                                                 M_NOP;
2039                                 }
2040                         }
2041
2042                         M_ALD(REG_ITMP1, REG_PV, disp);
2043                         switch (iptr->op1) {
2044                         case TYPE_INT:
2045                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2046                                 M_ILD(d, REG_ITMP1, 0);
2047                                 store_reg_to_var_int(iptr->dst, d);
2048                                 break;
2049                         case TYPE_LNG:
2050                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2051                                 M_LLD(d, REG_ITMP1, 0);
2052                                 store_reg_to_var_int(iptr->dst, d);
2053                                 break;
2054                         case TYPE_ADR:
2055                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2056                                 M_ALD(d, REG_ITMP1, 0);
2057                                 store_reg_to_var_int(iptr->dst, d);
2058                                 break;
2059                         case TYPE_FLT:
2060                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2061                                 M_FLD(d, REG_ITMP1, 0);
2062                                 store_reg_to_var_flt(iptr->dst, d);
2063                                 break;
2064                         case TYPE_DBL:
2065                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2066                                 M_DLD(d, REG_ITMP1, 0);
2067                                 store_reg_to_var_flt(iptr->dst, d);
2068                                 break;
2069                         }
2070                         break;
2071
2072                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2073                                       /* op1 = type, val.a = field address            */
2074
2075                         if (!iptr->val.a) {
2076                                 disp = dseg_addaddress(cd, 0);
2077
2078                                 codegen_addpatchref(cd, mcodeptr,
2079                                                                         PATCHER_get_putstatic,
2080                                                                         (unresolved_field *) iptr->target, disp);
2081
2082                                 if (opt_showdisassemble)
2083                                         M_NOP;
2084
2085                         } else {
2086                                 fieldinfo *fi = iptr->val.a;
2087
2088                                 disp = dseg_addaddress(cd, &(fi->value));
2089
2090                                 if (!(fi->class->state & CLASS_INITIALIZED)) {
2091                                         codegen_addpatchref(cd, mcodeptr,
2092                                                                                 PATCHER_clinit, fi->class, 0);
2093
2094                                         if (opt_showdisassemble)
2095                                                 M_NOP;
2096                                 }
2097                         }
2098
2099                         M_ALD(REG_ITMP1, REG_PV, disp);
2100                         switch (iptr->op1) {
2101                         case TYPE_INT:
2102                                 var_to_reg_int(s2, src, REG_ITMP2);
2103                                 M_IST(s2, REG_ITMP1, 0);
2104                                 break;
2105                         case TYPE_LNG:
2106                                 var_to_reg_int(s2, src, REG_ITMP2);
2107                                 M_LST(s2, REG_ITMP1, 0);
2108                                 break;
2109                         case TYPE_ADR:
2110                                 var_to_reg_int(s2, src, REG_ITMP2);
2111                                 M_AST(s2, REG_ITMP1, 0);
2112                                 break;
2113                         case TYPE_FLT:
2114                                 var_to_reg_flt(s2, src, REG_FTMP2);
2115                                 M_FST(s2, REG_ITMP1, 0);
2116                                 break;
2117                         case TYPE_DBL:
2118                                 var_to_reg_flt(s2, src, REG_FTMP2);
2119                                 M_DST(s2, REG_ITMP1, 0);
2120                                 break;
2121                         }
2122                         break;
2123
2124                 case ICMD_PUTSTATICCONST: /* ...  ==> ...                             */
2125                                           /* val = value (in current instruction)     */
2126                                           /* op1 = type, val.a = field address (in    */
2127                                           /* following NOP)                           */
2128
2129                         if (!iptr[1].val.a) {
2130                                 disp = dseg_addaddress(cd, 0);
2131
2132                                 codegen_addpatchref(cd, mcodeptr,
2133                                                                         PATCHER_get_putstatic,
2134                                                                         (unresolved_field *) iptr[1].target, disp);
2135
2136                                 if (opt_showdisassemble)
2137                                         M_NOP;
2138
2139                         } else {
2140                                 fieldinfo *fi = iptr[1].val.a;
2141
2142                                 disp = dseg_addaddress(cd, &(fi->value));
2143
2144                                 if (!(fi->class->state & CLASS_INITIALIZED)) {
2145                                         codegen_addpatchref(cd, mcodeptr,
2146                                                                                 PATCHER_clinit, fi->class, 0);
2147
2148                                         if (opt_showdisassemble)
2149                                                 M_NOP;
2150                                 }
2151                         }
2152
2153                         M_ALD(REG_ITMP1, REG_PV, disp);
2154                         switch (iptr->op1) {
2155                         case TYPE_INT:
2156                                 M_IST(REG_ZERO, REG_ITMP1, 0);
2157                                 break;
2158                         case TYPE_LNG:
2159                                 M_LST(REG_ZERO, REG_ITMP1, 0);
2160                                 break;
2161                         case TYPE_ADR:
2162                                 M_AST(REG_ZERO, REG_ITMP1, 0);
2163                                 break;
2164                         case TYPE_FLT:
2165                                 M_FST(REG_ZERO, REG_ITMP1, 0);
2166                                 break;
2167                         case TYPE_DBL:
2168                                 M_DST(REG_ZERO, REG_ITMP1, 0);
2169                                 break;
2170                         }
2171                         break;
2172
2173
2174                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2175                                       /* op1 = type, val.i = field offset             */
2176
2177                         var_to_reg_int(s1, src, REG_ITMP1);
2178                         gen_nullptr_check(s1);
2179
2180                         if (!iptr->val.a) {
2181                                 codegen_addpatchref(cd, mcodeptr,
2182                                                                         PATCHER_get_putfield,
2183                                                                         (unresolved_field *) iptr->target, 0);
2184
2185                                 if (opt_showdisassemble)
2186                                         M_NOP;
2187
2188                                 disp = 0;
2189
2190                         } else {
2191                                 disp = ((fieldinfo *) (iptr->val.a))->offset;
2192                         }
2193
2194                         switch (iptr->op1) {
2195                         case TYPE_INT:
2196                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2197                                 M_ILD(d, s1, disp);
2198                                 store_reg_to_var_int(iptr->dst, d);
2199                                 break;
2200                         case TYPE_LNG:
2201                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2202                                 M_LLD(d, s1, disp);
2203                                 store_reg_to_var_int(iptr->dst, d);
2204                                 break;
2205                         case TYPE_ADR:
2206                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2207                                 M_ALD(d, s1, disp);
2208                                 store_reg_to_var_int(iptr->dst, d);
2209                                 break;
2210                         case TYPE_FLT:
2211                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2212                                 M_FLD(d, s1, disp);
2213                                 store_reg_to_var_flt(iptr->dst, d);
2214                                 break;
2215                         case TYPE_DBL:
2216                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2217                                 M_DLD(d, s1, disp);
2218                                 store_reg_to_var_flt(iptr->dst, d);
2219                                 break;
2220                         }
2221                         break;
2222
2223                 case ICMD_PUTFIELD:   /* ..., objectref, value  ==> ...               */
2224                                       /* op1 = type, val.a = field address            */
2225
2226                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2227                         gen_nullptr_check(s1);
2228
2229                         if (!IS_FLT_DBL_TYPE(iptr->op1)) {
2230                                 var_to_reg_int(s2, src, REG_ITMP2);
2231                         } else {
2232                                 var_to_reg_flt(s2, src, REG_FTMP2);
2233                         }
2234
2235                         if (!iptr->val.a) {
2236                                 codegen_addpatchref(cd, mcodeptr,
2237                                                                         PATCHER_get_putfield,
2238                                                                         (unresolved_field *) iptr->target, 0);
2239
2240                                 if (opt_showdisassemble)
2241                                         M_NOP;
2242
2243                                 disp = 0;
2244
2245                         } else {
2246                                 disp = ((fieldinfo *) (iptr->val.a))->offset;
2247                         }
2248
2249                         switch (iptr->op1) {
2250                         case TYPE_INT:
2251                                 M_IST(s2, s1, disp);
2252                                 break;
2253                         case TYPE_LNG:
2254                                 M_LST(s2, s1, disp);
2255                                 break;
2256                         case TYPE_ADR:
2257                                 M_AST(s2, s1, disp);
2258                                 break;
2259                         case TYPE_FLT:
2260                                 M_FST(s2, s1, disp);
2261                                 break;
2262                         case TYPE_DBL:
2263                                 M_DST(s2, s1, disp);
2264                                 break;
2265                         }
2266                         break;
2267
2268                 case ICMD_PUTFIELDCONST:  /* ..., objectref  ==> ...                  */
2269                                           /* val = value (in current instruction)     */
2270                                           /* op1 = type, val.a = field address (in    */
2271                                           /* following NOP)                           */
2272
2273                         var_to_reg_int(s1, src, REG_ITMP1);
2274                         gen_nullptr_check(s1);
2275
2276                         if (!iptr[1].val.a) {
2277                                 codegen_addpatchref(cd, mcodeptr,
2278                                                                         PATCHER_get_putfield,
2279                                                                         (unresolved_field *) iptr[1].target, 0);
2280
2281                                 if (opt_showdisassemble)
2282                                         M_NOP;
2283
2284                                 disp = 0;
2285
2286                         } else {
2287                                 disp = ((fieldinfo *) (iptr[1].val.a))->offset;
2288                         }
2289
2290                         switch (iptr[1].op1) {
2291                         case TYPE_INT:
2292                                 M_IST(REG_ZERO, s1, disp);
2293                                 break;
2294                         case TYPE_LNG:
2295                                 M_LST(REG_ZERO, s1, disp);
2296                                 break;
2297                         case TYPE_ADR:
2298                                 M_AST(REG_ZERO, s1, disp);
2299                                 break;
2300                         case TYPE_FLT:
2301                                 M_FST(REG_ZERO, s1, disp);
2302                                 break;
2303                         case TYPE_DBL:
2304                                 M_DST(REG_ZERO, s1, disp);
2305                                 break;
2306                         }
2307                         break;
2308
2309
2310                 /* branch operations **************************************************/
2311
2312                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2313
2314                         var_to_reg_int(s1, src, REG_ITMP1);
2315                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2316
2317 #ifdef ENABLE_VERIFIER
2318                         if (iptr->val.a) {
2319                                 codegen_addpatchref(cd, mcodeptr,
2320                                                                         PATCHER_athrow_areturn,
2321                                                                         (unresolved_class *) iptr->val.a, 0);
2322
2323                                 if (opt_showdisassemble)
2324                                         M_NOP;
2325                         }
2326 #endif /* ENABLE_VERIFIER */
2327
2328                         disp = dseg_addaddress(cd, asm_handle_exception);
2329                         M_ALD(REG_ITMP2, REG_PV, disp);
2330                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2331                         M_NOP;              /* nop ensures that XPC is less than the end */
2332                                             /* of basic block                            */
2333                         ALIGNCODENOP;
2334                         break;
2335
2336                 case ICMD_GOTO:         /* ... ==> ...                                */
2337                                         /* op1 = target JavaVM pc                     */
2338                         M_BR(0);
2339                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2340                         ALIGNCODENOP;
2341                         break;
2342
2343                 case ICMD_JSR:          /* ... ==> ...                                */
2344                                         /* op1 = target JavaVM pc                     */
2345
2346                         M_BSR(REG_ITMP1, 0);
2347                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2348                         break;
2349
2350                 case ICMD_RET:          /* ... ==> ...                                */
2351                                         /* op1 = local variable                       */
2352
2353                         var = &(rd->locals[iptr->op1][TYPE_ADR]);
2354                         if (var->flags & INMEMORY) {
2355                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2356                                 M_RET(REG_ZERO, REG_ITMP1);
2357                                 }
2358                         else
2359                                 M_RET(REG_ZERO, var->regoff);
2360                         ALIGNCODENOP;
2361                         break;
2362
2363                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2364                                         /* op1 = target JavaVM pc                     */
2365
2366                         var_to_reg_int(s1, src, REG_ITMP1);
2367                         M_BEQZ(s1, 0);
2368                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2369                         break;
2370
2371                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2372                                         /* op1 = target JavaVM pc                     */
2373
2374                         var_to_reg_int(s1, src, REG_ITMP1);
2375                         M_BNEZ(s1, 0);
2376                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2377                         break;
2378
2379                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2380                                         /* op1 = target JavaVM pc, val.i = constant   */
2381
2382                         var_to_reg_int(s1, src, REG_ITMP1);
2383                         if (iptr->val.i == 0) {
2384                                 M_BEQZ(s1, 0);
2385                                 }
2386                         else {
2387                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2388                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2389                                         }
2390                                 else {
2391                                         ICONST(REG_ITMP2, iptr->val.i);
2392                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2393                                         }
2394                                 M_BNEZ(REG_ITMP1, 0);
2395                                 }
2396                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2397                         break;
2398
2399                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2400                                         /* op1 = target JavaVM pc, val.i = constant   */
2401
2402                         var_to_reg_int(s1, src, REG_ITMP1);
2403                         if (iptr->val.i == 0) {
2404                                 M_BLTZ(s1, 0);
2405                                 }
2406                         else {
2407                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2408                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2409                                         }
2410                                 else {
2411                                         ICONST(REG_ITMP2, iptr->val.i);
2412                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2413                                         }
2414                                 M_BNEZ(REG_ITMP1, 0);
2415                                 }
2416                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2417                         break;
2418
2419                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2420                                         /* op1 = target JavaVM pc, val.i = constant   */
2421
2422                         var_to_reg_int(s1, src, REG_ITMP1);
2423                         if (iptr->val.i == 0) {
2424                                 M_BLEZ(s1, 0);
2425                                 }
2426                         else {
2427                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2428                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2429                                         }
2430                                 else {
2431                                         ICONST(REG_ITMP2, iptr->val.i);
2432                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2433                                         }
2434                                 M_BNEZ(REG_ITMP1, 0);
2435                                 }
2436                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2437                         break;
2438
2439                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2440                                         /* op1 = target JavaVM pc, val.i = constant   */
2441
2442                         var_to_reg_int(s1, src, REG_ITMP1);
2443                         if (iptr->val.i == 0) {
2444                                 M_BNEZ(s1, 0);
2445                                 }
2446                         else {
2447                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2448                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2449                                         }
2450                                 else {
2451                                         ICONST(REG_ITMP2, iptr->val.i);
2452                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2453                                         }
2454                                 M_BEQZ(REG_ITMP1, 0);
2455                                 }
2456                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2457                         break;
2458
2459                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2460                                         /* op1 = target JavaVM pc, val.i = constant   */
2461
2462                         var_to_reg_int(s1, src, REG_ITMP1);
2463                         if (iptr->val.i == 0) {
2464                                 M_BGTZ(s1, 0);
2465                                 }
2466                         else {
2467                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2468                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2469                                         }
2470                                 else {
2471                                         ICONST(REG_ITMP2, iptr->val.i);
2472                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2473                                         }
2474                                 M_BEQZ(REG_ITMP1, 0);
2475                                 }
2476                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2477                         break;
2478
2479                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2480                                         /* op1 = target JavaVM pc, val.i = constant   */
2481
2482                         var_to_reg_int(s1, src, REG_ITMP1);
2483                         if (iptr->val.i == 0) {
2484                                 M_BGEZ(s1, 0);
2485                                 }
2486                         else {
2487                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2488                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2489                                         }
2490                                 else {
2491                                         ICONST(REG_ITMP2, iptr->val.i);
2492                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2493                                         }
2494                                 M_BEQZ(REG_ITMP1, 0);
2495                                 }
2496                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2497                         break;
2498
2499                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2500                                         /* op1 = target JavaVM pc, val.l = constant   */
2501
2502                         var_to_reg_int(s1, src, REG_ITMP1);
2503                         if (iptr->val.l == 0) {
2504                                 M_BEQZ(s1, 0);
2505                                 }
2506                         else {
2507                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2508                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2509                                         }
2510                                 else {
2511                                         LCONST(REG_ITMP2, iptr->val.l);
2512                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2513                                         }
2514                                 M_BNEZ(REG_ITMP1, 0);
2515                                 }
2516                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2517                         break;
2518
2519                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2520                                         /* op1 = target JavaVM pc, val.l = constant   */
2521
2522                         var_to_reg_int(s1, src, REG_ITMP1);
2523                         if (iptr->val.l == 0) {
2524                                 M_BLTZ(s1, 0);
2525                                 }
2526                         else {
2527                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2528                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2529                                         }
2530                                 else {
2531                                         LCONST(REG_ITMP2, iptr->val.l);
2532                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2533                                         }
2534                                 M_BNEZ(REG_ITMP1, 0);
2535                                 }
2536                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2537                         break;
2538
2539                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2540                                         /* op1 = target JavaVM pc, val.l = constant   */
2541
2542                         var_to_reg_int(s1, src, REG_ITMP1);
2543                         if (iptr->val.l == 0) {
2544                                 M_BLEZ(s1, 0);
2545                                 }
2546                         else {
2547                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2548                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2549                                         }
2550                                 else {
2551                                         LCONST(REG_ITMP2, iptr->val.l);
2552                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2553                                         }
2554                                 M_BNEZ(REG_ITMP1, 0);
2555                                 }
2556                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2557                         break;
2558
2559                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2560                                         /* op1 = target JavaVM pc, val.l = constant   */
2561
2562                         var_to_reg_int(s1, src, REG_ITMP1);
2563                         if (iptr->val.l == 0) {
2564                                 M_BNEZ(s1, 0);
2565                                 }
2566                         else {
2567                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2568                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2569                                         }
2570                                 else {
2571                                         LCONST(REG_ITMP2, iptr->val.l);
2572                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2573                                         }
2574                                 M_BEQZ(REG_ITMP1, 0);
2575                                 }
2576                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2577                         break;
2578
2579                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2580                                         /* op1 = target JavaVM pc, val.l = constant   */
2581
2582                         var_to_reg_int(s1, src, REG_ITMP1);
2583                         if (iptr->val.l == 0) {
2584                                 M_BGTZ(s1, 0);
2585                                 }
2586                         else {
2587                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2588                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2589                                         }
2590                                 else {
2591                                         LCONST(REG_ITMP2, iptr->val.l);
2592                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2593                                         }
2594                                 M_BEQZ(REG_ITMP1, 0);
2595                                 }
2596                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2597                         break;
2598
2599                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2600                                         /* op1 = target JavaVM pc, val.l = constant   */
2601
2602                         var_to_reg_int(s1, src, REG_ITMP1);
2603                         if (iptr->val.l == 0) {
2604                                 M_BGEZ(s1, 0);
2605                                 }
2606                         else {
2607                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2608                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2609                                         }
2610                                 else {
2611                                         LCONST(REG_ITMP2, iptr->val.l);
2612                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2613                                         }
2614                                 M_BEQZ(REG_ITMP1, 0);
2615                                 }
2616                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2617                         break;
2618
2619                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2620                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2621                 case ICMD_IF_ACMPEQ:
2622
2623                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2624                         var_to_reg_int(s2, src, REG_ITMP2);
2625                         M_CMPEQ(s1, s2, REG_ITMP1);
2626                         M_BNEZ(REG_ITMP1, 0);
2627                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2628                         break;
2629
2630                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2631                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2632                 case ICMD_IF_ACMPNE:
2633
2634                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2635                         var_to_reg_int(s2, src, REG_ITMP2);
2636                         M_CMPEQ(s1, s2, REG_ITMP1);
2637                         M_BEQZ(REG_ITMP1, 0);
2638                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2639                         break;
2640
2641                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2642                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2643
2644                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2645                         var_to_reg_int(s2, src, REG_ITMP2);
2646                         M_CMPLT(s1, s2, REG_ITMP1);
2647                         M_BNEZ(REG_ITMP1, 0);
2648                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2649                         break;
2650
2651                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2652                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2653
2654                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2655                         var_to_reg_int(s2, src, REG_ITMP2);
2656                         M_CMPLE(s1, s2, REG_ITMP1);
2657                         M_BEQZ(REG_ITMP1, 0);
2658                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2659                         break;
2660
2661                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2662                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2663
2664                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2665                         var_to_reg_int(s2, src, REG_ITMP2);
2666                         M_CMPLE(s1, s2, REG_ITMP1);
2667                         M_BNEZ(REG_ITMP1, 0);
2668                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2669                         break;
2670
2671                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2672                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2673
2674                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2675                         var_to_reg_int(s2, src, REG_ITMP2);
2676                         M_CMPLT(s1, s2, REG_ITMP1);
2677                         M_BEQZ(REG_ITMP1, 0);
2678                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2679                         break;
2680
2681                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2682
2683                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2684                         break;
2685
2686                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2687                                         /* val.i = constant                           */
2688
2689                         var_to_reg_int(s1, src, REG_ITMP1);
2690                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2691                         s3 = iptr->val.i;
2692                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2693                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2694                                         M_CMPEQ(s1, REG_ZERO, d);
2695                                         store_reg_to_var_int(iptr->dst, d);
2696                                         break;
2697                                 }
2698                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2699                                         M_CMPEQ(s1, REG_ZERO, d);
2700                                         M_XOR_IMM(d, 1, d);
2701                                         store_reg_to_var_int(iptr->dst, d);
2702                                         break;
2703                                 }
2704                                 if (s1 == d) {
2705                                         M_MOV(s1, REG_ITMP1);
2706                                         s1 = REG_ITMP1;
2707                                 }
2708                                 ICONST(d, iptr[1].val.i);
2709                         }
2710                         if ((s3 >= 0) && (s3 <= 255)) {
2711                                 M_CMOVEQ_IMM(s1, s3, d);
2712                         } else {
2713                                 ICONST(REG_ITMP3, s3);
2714                                 M_CMOVEQ(s1, REG_ITMP3, d);
2715                         }
2716                         store_reg_to_var_int(iptr->dst, d);
2717                         break;
2718
2719                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2720                                         /* val.i = constant                           */
2721
2722                         var_to_reg_int(s1, src, REG_ITMP1);
2723                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2724                         s3 = iptr->val.i;
2725                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2726                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2727                                         M_CMPEQ(s1, REG_ZERO, d);
2728                                         store_reg_to_var_int(iptr->dst, d);
2729                                         break;
2730                                 }
2731                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2732                                         M_CMPEQ(s1, REG_ZERO, d);
2733                                         M_XOR_IMM(d, 1, d);
2734                                         store_reg_to_var_int(iptr->dst, d);
2735                                         break;
2736                                 }
2737                                 if (s1 == d) {
2738                                         M_MOV(s1, REG_ITMP1);
2739                                         s1 = REG_ITMP1;
2740                                 }
2741                                 ICONST(d, iptr[1].val.i);
2742                         }
2743                         if ((s3 >= 0) && (s3 <= 255)) {
2744                                 M_CMOVNE_IMM(s1, s3, d);
2745                         } else {
2746                                 ICONST(REG_ITMP3, s3);
2747                                 M_CMOVNE(s1, REG_ITMP3, d);
2748                         }
2749                         store_reg_to_var_int(iptr->dst, d);
2750                         break;
2751
2752                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2753                                         /* val.i = constant                           */
2754
2755                         var_to_reg_int(s1, src, REG_ITMP1);
2756                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2757                         s3 = iptr->val.i;
2758                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2759                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2760                                         M_CMPLT(s1, REG_ZERO, d);
2761                                         store_reg_to_var_int(iptr->dst, d);
2762                                         break;
2763                                 }
2764                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2765                                         M_CMPLE(REG_ZERO, s1, d);
2766                                         store_reg_to_var_int(iptr->dst, d);
2767                                         break;
2768                                 }
2769                                 if (s1 == d) {
2770                                         M_MOV(s1, REG_ITMP1);
2771                                         s1 = REG_ITMP1;
2772                                 }
2773                                 ICONST(d, iptr[1].val.i);
2774                         }
2775                         if ((s3 >= 0) && (s3 <= 255)) {
2776                                 M_CMOVLT_IMM(s1, s3, d);
2777                         } else {
2778                                 ICONST(REG_ITMP3, s3);
2779                                 M_CMOVLT(s1, REG_ITMP3, d);
2780                         }
2781                         store_reg_to_var_int(iptr->dst, d);
2782                         break;
2783
2784                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2785                                         /* val.i = constant                           */
2786
2787                         var_to_reg_int(s1, src, REG_ITMP1);
2788                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2789                         s3 = iptr->val.i;
2790                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2791                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2792                                         M_CMPLE(REG_ZERO, s1, d);
2793                                         store_reg_to_var_int(iptr->dst, d);
2794                                         break;
2795                                 }
2796                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2797                                         M_CMPLT(s1, REG_ZERO, d);
2798                                         store_reg_to_var_int(iptr->dst, d);
2799                                         break;
2800                                 }
2801                                 if (s1 == d) {
2802                                         M_MOV(s1, REG_ITMP1);
2803                                         s1 = REG_ITMP1;
2804                                 }
2805                                 ICONST(d, iptr[1].val.i);
2806                         }
2807                         if ((s3 >= 0) && (s3 <= 255)) {
2808                                 M_CMOVGE_IMM(s1, s3, d);
2809                         } else {
2810                                 ICONST(REG_ITMP3, s3);
2811                                 M_CMOVGE(s1, REG_ITMP3, d);
2812                         }
2813                         store_reg_to_var_int(iptr->dst, d);
2814                         break;
2815
2816                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2817                                         /* val.i = constant                           */
2818
2819                         var_to_reg_int(s1, src, REG_ITMP1);
2820                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2821                         s3 = iptr->val.i;
2822                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2823                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2824                                         M_CMPLT(REG_ZERO, s1, d);
2825                                         store_reg_to_var_int(iptr->dst, d);
2826                                         break;
2827                                 }
2828                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2829                                         M_CMPLE(s1, REG_ZERO, d);
2830                                         store_reg_to_var_int(iptr->dst, d);
2831                                         break;
2832                                 }
2833                                 if (s1 == d) {
2834                                         M_MOV(s1, REG_ITMP1);
2835                                         s1 = REG_ITMP1;
2836                                 }
2837                                 ICONST(d, iptr[1].val.i);
2838                         }
2839                         if ((s3 >= 0) && (s3 <= 255)) {
2840                                 M_CMOVGT_IMM(s1, s3, d);
2841                         } else {
2842                                 ICONST(REG_ITMP3, s3);
2843                                 M_CMOVGT(s1, REG_ITMP3, d);
2844                         }
2845                         store_reg_to_var_int(iptr->dst, d);
2846                         break;
2847
2848                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2849                                         /* val.i = constant                           */
2850
2851                         var_to_reg_int(s1, src, REG_ITMP1);
2852                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2853                         s3 = iptr->val.i;
2854                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2855                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2856                                         M_CMPLE(s1, REG_ZERO, d);
2857                                         store_reg_to_var_int(iptr->dst, d);
2858                                         break;
2859                                 }
2860                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2861                                         M_CMPLT(REG_ZERO, s1, d);
2862                                         store_reg_to_var_int(iptr->dst, d);
2863                                         break;
2864                                 }
2865                                 if (s1 == d) {
2866                                         M_MOV(s1, REG_ITMP1);
2867                                         s1 = REG_ITMP1;
2868                                 }
2869                                 ICONST(d, iptr[1].val.i);
2870                         }
2871                         if ((s3 >= 0) && (s3 <= 255)) {
2872                                 M_CMOVLE_IMM(s1, s3, d);
2873                         } else {
2874                                 ICONST(REG_ITMP3, s3);
2875                                 M_CMOVLE(s1, REG_ITMP3, d);
2876                         }
2877                         store_reg_to_var_int(iptr->dst, d);
2878                         break;
2879
2880
2881                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2882                 case ICMD_LRETURN:
2883
2884                         var_to_reg_int(s1, src, REG_RESULT);
2885                         M_INTMOVE(s1, REG_RESULT);
2886                         goto nowperformreturn;
2887
2888                 case ICMD_ARETURN:      /* ..., retvalue ==> ...                      */
2889
2890                         var_to_reg_int(s1, src, REG_RESULT);
2891                         M_INTMOVE(s1, REG_RESULT);
2892
2893 #ifdef ENABLE_VERIFIER
2894                         if (iptr->val.a) {
2895                                 codegen_addpatchref(cd, mcodeptr,
2896                                                                         PATCHER_athrow_areturn,
2897                                                                         (unresolved_class *) iptr->val.a, 0);
2898
2899                                 if (opt_showdisassemble)
2900                                         M_NOP;
2901                         }
2902 #endif /* ENABLE_VERIFIER */
2903                         goto nowperformreturn;
2904
2905                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2906                 case ICMD_DRETURN:
2907
2908                         var_to_reg_flt(s1, src, REG_FRESULT);
2909                         M_FLTMOVE(s1, REG_FRESULT);
2910                         goto nowperformreturn;
2911
2912                 case ICMD_RETURN:       /* ...  ==> ...                               */
2913
2914 nowperformreturn:
2915                         {
2916                         s4 i, p;
2917
2918                         p = parentargs_base;
2919
2920                         /* call trace function */
2921
2922                         if (runverbose) {
2923                                 M_LDA(REG_SP, REG_SP, -3 * 8);
2924                                 M_AST(REG_RA, REG_SP, 0 * 8);
2925                                 M_LST(REG_RESULT, REG_SP, 1 * 8);
2926                                 M_DST(REG_FRESULT, REG_SP, 2 * 8);
2927
2928                                 disp = dseg_addaddress(cd, m);
2929                                 M_ALD(rd->argintregs[0], REG_PV, disp);
2930                                 M_MOV(REG_RESULT, rd->argintregs[1]);
2931                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[2]);
2932                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[3]);
2933
2934                                 disp = dseg_addaddress(cd, (void *) builtin_displaymethodstop);
2935                                 M_ALD(REG_PV, REG_PV, disp);
2936                                 M_JSR(REG_RA, REG_PV);
2937                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2938                                 M_LDA(REG_PV, REG_RA, -disp);
2939
2940                                 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
2941                                 M_LLD(REG_RESULT, REG_SP, 1 * 8);
2942                                 M_ALD(REG_RA, REG_SP, 0 * 8);
2943                                 M_LDA(REG_SP, REG_SP, 3 * 8);
2944                         }
2945
2946 #if defined(USE_THREADS)
2947                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2948                                 M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 8);
2949
2950                                 switch (iptr->opc) {
2951                                 case ICMD_IRETURN:
2952                                 case ICMD_LRETURN:
2953                                 case ICMD_ARETURN:
2954                                         M_LST(REG_RESULT, REG_SP, rd->memuse * 8);
2955                                         break;
2956                                 case ICMD_FRETURN:
2957                                 case ICMD_DRETURN:
2958                                         M_DST(REG_FRESULT, REG_SP, rd->memuse * 8);
2959                                         break;
2960                                 }
2961
2962                                 disp = dseg_addaddress(cd, BUILTIN_monitorexit);
2963                                 M_ALD(REG_PV, REG_PV, disp);
2964                                 M_JSR(REG_RA, REG_PV);
2965                                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
2966                                 M_LDA(REG_PV, REG_RA, disp);
2967
2968                                 switch (iptr->opc) {
2969                                 case ICMD_IRETURN:
2970                                 case ICMD_LRETURN:
2971                                 case ICMD_ARETURN:
2972                                         M_LLD(REG_RESULT, REG_SP, rd->memuse * 8);
2973                                         break;
2974                                 case ICMD_FRETURN:
2975                                 case ICMD_DRETURN:
2976                                         M_DLD(REG_FRESULT, REG_SP, rd->memuse * 8);
2977                                         break;
2978                                 }
2979                         }
2980 #endif
2981
2982                         /* restore return address                                         */
2983
2984                         if (!m->isleafmethod) {
2985                                 p--; M_LLD(REG_RA, REG_SP, p * 8);
2986                         }
2987
2988                         /* restore saved registers                                        */
2989
2990                         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
2991                                 p--; M_LLD(rd->savintregs[i], REG_SP, p * 8);
2992                         }
2993                         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
2994                                 p--; M_DLD(rd->savfltregs[i], REG_SP, p * 8);
2995                         }
2996
2997                         /* deallocate stack                                               */
2998
2999                         if (parentargs_base) {
3000                                 M_LDA(REG_SP, REG_SP, parentargs_base * 8);
3001                         }
3002
3003                         M_RET(REG_ZERO, REG_RA);
3004                         ALIGNCODENOP;
3005                         }
3006                         break;
3007
3008
3009                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
3010                         {
3011                         s4 i, l, *s4ptr;
3012                         void **tptr;
3013
3014                         tptr = (void **) iptr->target;
3015
3016                         s4ptr = iptr->val.a;
3017                         l = s4ptr[1];                          /* low     */
3018                         i = s4ptr[2];                          /* high    */
3019
3020                         var_to_reg_int(s1, src, REG_ITMP1);
3021                         if (l == 0) {
3022                                 M_INTMOVE(s1, REG_ITMP1);
3023                         } else if (l <= 32768) {
3024                                 M_LDA(REG_ITMP1, s1, -l);
3025                         } else {
3026                                 ICONST(REG_ITMP2, l);
3027                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3028                         }
3029                         i = i - l + 1;
3030
3031                         /* range check */
3032
3033                         if (i <= 256)
3034                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3035                         else {
3036                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3037                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3038                         }
3039                         M_BEQZ(REG_ITMP2, 0);
3040                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3041
3042                         /* build jump table top down and use address of lowest entry */
3043
3044                         /* s4ptr += 3 + i; */
3045                         tptr += i;
3046
3047                         while (--i >= 0) {
3048                                 dseg_addtarget(cd, (basicblock *) tptr[0]);
3049                                 --tptr;
3050                         }
3051                         }
3052
3053                         /* length of dataseg after last dseg_addtarget is used by load */
3054
3055                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3056                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
3057                         M_JMP(REG_ZERO, REG_ITMP2);
3058                         ALIGNCODENOP;
3059                         break;
3060
3061
3062                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3063                         {
3064                         s4 i, l, val, *s4ptr;
3065                         void **tptr;
3066
3067                         tptr = (void **) iptr->target;
3068
3069                         s4ptr = iptr->val.a;
3070                         l = s4ptr[0];                          /* default  */
3071                         i = s4ptr[1];                          /* count    */
3072
3073                         MCODECHECK((i<<2)+8);
3074                         var_to_reg_int(s1, src, REG_ITMP1);
3075                         while (--i >= 0) {
3076                                 s4ptr += 2;
3077                                 ++tptr;
3078
3079                                 val = s4ptr[0];
3080                                 if ((val >= 0) && (val <= 255)) {
3081                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
3082                                 } else {
3083                                         if ((val >= -32768) && (val <= 32767)) {
3084                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
3085                                         } else {
3086                                                 disp = dseg_adds4(cd, val);
3087                                                 M_ILD(REG_ITMP2, REG_PV, disp);
3088                                         }
3089                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3090                                 }
3091                                 M_BNEZ(REG_ITMP2, 0);
3092                                 codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3093                         }
3094
3095                         M_BR(0);
3096
3097                         tptr = (void **) iptr->target;
3098                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3099
3100                         ALIGNCODENOP;
3101                         break;
3102                         }
3103
3104
3105                 case ICMD_BUILTIN:      /* ..., arg1, arg2, arg3 ==> ...              */
3106                                         /* op1 = arg count val.a = builtintable entry */
3107
3108                         bte = iptr->val.a;
3109                         md = bte->md;
3110                         goto gen_method;
3111
3112                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3113                                         /* op1 = arg count, val.a = method pointer    */
3114
3115                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3116                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
3117                 case ICMD_INVOKEINTERFACE:
3118
3119                         lm = iptr->val.a;
3120
3121                         if (lm == NULL) {
3122                                 unresolved_method *um = iptr->target;
3123                                 md = um->methodref->parseddesc.md;
3124                         } else {
3125                                 md = lm->parseddesc;
3126                         }
3127
3128 gen_method:
3129                         s3 = md->paramcount;
3130
3131                         MCODECHECK((s3 << 1) + 64);
3132
3133                         /* copy arguments to registers or stack location                  */
3134
3135                         for (s3 = s3 - 1; s3 >= 0; s3--, src = src->prev) {
3136                                 if (src->varkind == ARGVAR)
3137                                         continue;
3138                                 if (IS_INT_LNG_TYPE(src->type)) {
3139                                         if (!md->params[s3].inmemory) {
3140                                                 s1 = rd->argintregs[md->params[s3].regoff];
3141                                                 var_to_reg_int(d, src, s1);
3142                                                 M_INTMOVE(d, s1);
3143                                         } else {
3144                                                 var_to_reg_int(d, src, REG_ITMP1);
3145                                                 M_LST(d, REG_SP, md->params[s3].regoff * 8);
3146                                         }
3147
3148                                 } else {
3149                                         if (!md->params[s3].inmemory) {
3150                                                 s1 = rd->argfltregs[md->params[s3].regoff];
3151                                                 var_to_reg_flt(d, src, s1);
3152                                                 M_FLTMOVE(d, s1);
3153                                         } else {
3154                                                 var_to_reg_flt(d, src, REG_FTMP1);
3155                                                 M_DST(d, REG_SP, md->params[s3].regoff * 8);
3156                                         }
3157                                 }
3158                         }
3159
3160                         switch (iptr->opc) {
3161                         case ICMD_BUILTIN:
3162                                 disp = dseg_addaddress(cd, bte->fp);
3163                                 d = md->returntype.type;
3164
3165                                 M_ALD(REG_PV, REG_PV, disp);  /* Pointer to built-in-function */
3166                                 M_JSR(REG_RA, REG_PV);
3167                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3168                                 M_LDA(REG_PV, REG_RA, -disp);
3169
3170                                 /* if op1 == true, we need to check for an exception */
3171
3172                                 if (iptr->op1 == true) {
3173                                         M_BEQZ(REG_RESULT, 0);
3174                                         codegen_addxexceptionrefs(cd, mcodeptr);
3175                                 }
3176                                 break;
3177
3178                         case ICMD_INVOKESPECIAL:
3179                                 M_BEQZ(rd->argintregs[0], 0);
3180                                 codegen_addxnullrefs(cd, mcodeptr);
3181                                 /* fall through */
3182
3183                         case ICMD_INVOKESTATIC:
3184                                 if (!lm) {
3185                                         unresolved_method *um = iptr->target;
3186
3187                                         disp = dseg_addaddress(cd, NULL);
3188
3189                                         codegen_addpatchref(cd, mcodeptr,
3190                                                                                 PATCHER_invokestatic_special, um, disp);
3191
3192                                         if (opt_showdisassemble)
3193                                                 M_NOP;
3194
3195                                         d = um->methodref->parseddesc.md->returntype.type;
3196
3197                                 } else {
3198                                         disp = dseg_addaddress(cd, lm->stubroutine);
3199                                         d = lm->parseddesc->returntype.type;
3200                                 }
3201
3202                                 M_ALD(REG_PV, REG_PV, disp);         /* method pointer in r27 */
3203                                 M_JSR(REG_RA, REG_PV);
3204                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3205                                 M_LDA(REG_PV, REG_RA, -disp);
3206                                 break;
3207
3208                         case ICMD_INVOKEVIRTUAL:
3209                                 gen_nullptr_check(rd->argintregs[0]);
3210
3211                                 if (!lm) {
3212                                         unresolved_method *um = iptr->target;
3213
3214                                         codegen_addpatchref(cd, mcodeptr,
3215                                                                                 PATCHER_invokevirtual, um, 0);
3216
3217                                         if (opt_showdisassemble)
3218                                                 M_NOP;
3219
3220                                         s1 = 0;
3221                                         d = um->methodref->parseddesc.md->returntype.type;
3222
3223                                 } else {
3224                                         s1 = OFFSET(vftbl_t, table[0]) +
3225                                                 sizeof(methodptr) * lm->vftblindex;
3226                                         d = lm->parseddesc->returntype.type;
3227                                 }
3228
3229                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
3230                                           OFFSET(java_objectheader, vftbl));
3231                                 M_ALD(REG_PV, REG_METHODPTR, s1);
3232                                 M_JSR(REG_RA, REG_PV);
3233                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3234                                 M_LDA(REG_PV, REG_RA, -disp);
3235                                 break;
3236
3237                         case ICMD_INVOKEINTERFACE:
3238                                 gen_nullptr_check(rd->argintregs[0]);
3239
3240                                 if (!lm) {
3241                                         unresolved_method *um = iptr->target;
3242
3243                                         codegen_addpatchref(cd, mcodeptr,
3244                                                                                 PATCHER_invokeinterface, um, 0);
3245
3246                                         if (opt_showdisassemble)
3247                                                 M_NOP;
3248
3249                                         s1 = 0;
3250                                         s2 = 0;
3251                                         d = um->methodref->parseddesc.md->returntype.type;
3252
3253                                 } else {
3254                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
3255                                                 sizeof(methodptr*) * lm->class->index;
3256
3257                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
3258
3259                                         d = lm->parseddesc->returntype.type;
3260                                 }
3261
3262                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
3263                                           OFFSET(java_objectheader, vftbl));
3264                                 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
3265                                 M_ALD(REG_PV, REG_METHODPTR, s2);
3266                                 M_JSR(REG_RA, REG_PV);
3267                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3268                                 M_LDA(REG_PV, REG_RA, -disp);
3269                                 break;
3270                         }
3271
3272                         /* d contains return type */
3273
3274                         if (d != TYPE_VOID) {
3275                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3276                                         s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
3277                                         M_INTMOVE(REG_RESULT, s1);
3278                                         store_reg_to_var_int(iptr->dst, s1);
3279                                 } else {
3280                                         s1 = reg_of_var(rd, iptr->dst, REG_FRESULT);
3281                                         M_FLTMOVE(REG_FRESULT, s1);
3282                                         store_reg_to_var_flt(iptr->dst, s1);
3283                                 }
3284                         }
3285                         break;
3286
3287
3288                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3289
3290                                       /* op1:   0 == array, 1 == class                */
3291                                       /* val.a: (classinfo*) superclass               */
3292
3293                         /*  superclass is an interface:
3294                          *
3295                          *  OK if ((sub == NULL) ||
3296                          *         (sub->vftbl->interfacetablelength > super->index) &&
3297                          *         (sub->vftbl->interfacetable[-super->index] != NULL));
3298                          *
3299                          *  superclass is a class:
3300                          *
3301                          *  OK if ((sub == NULL) || (0
3302                          *         <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3303                          *         super->vftbl->diffval));
3304                          */
3305
3306                         if (iptr->op1 == 1) {
3307                                 /* object type cast-check */
3308
3309                                 classinfo *super;
3310                                 vftbl_t   *supervftbl;
3311                                 s4         superindex;
3312
3313                                 super = (classinfo *) iptr->val.a;
3314
3315                                 if (!super) {
3316                                         superindex = 0;
3317                                         supervftbl = NULL;
3318
3319                                 } else {
3320                                         superindex = super->index;
3321                                         supervftbl = super->vftbl;
3322                                 }
3323
3324 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3325                                 codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
3326 #endif
3327                                 var_to_reg_int(s1, src, REG_ITMP1);
3328
3329                                 /* calculate interface checkcast code size */
3330
3331                                 s2 = 6;
3332                                 if (!super)
3333                                         s2 += opt_showdisassemble ? 1 : 0;
3334
3335                                 /* calculate class checkcast code size */
3336
3337                                 s3 = 9 /* 8 + (s1 == REG_ITMP1) */;
3338                                 if (!super)
3339                                         s3 += opt_showdisassemble ? 1 : 0;
3340
3341                                 /* if class is not resolved, check which code to call */
3342
3343                                 if (!super) {
3344                                         M_BEQZ(s1, 4 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3345
3346                                         disp = dseg_adds4(cd, 0);                 /* super->flags */
3347
3348                                         codegen_addpatchref(cd, mcodeptr,
3349                                                                                 PATCHER_checkcast_instanceof_flags,
3350                                                                                 (constant_classref *) iptr->target,
3351                                                                                 disp);
3352
3353                                         if (opt_showdisassemble)
3354                                                 M_NOP;
3355
3356                                         M_ILD(REG_ITMP2, REG_PV, disp);
3357                                         disp = dseg_adds4(cd, ACC_INTERFACE);
3358                                         M_ILD(REG_ITMP3, REG_PV, disp);
3359                                         M_AND(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3360                                         M_BEQZ(REG_ITMP2, s2 + 1);
3361                                 }
3362
3363                                 /* interface checkcast code */
3364
3365                                 if (!super || (super->flags & ACC_INTERFACE)) {
3366                                         if (super) {
3367                                                 M_BEQZ(s1, s2);
3368
3369                                         } else {
3370                                                 codegen_addpatchref(cd, mcodeptr,
3371                                                                                         PATCHER_checkcast_instanceof_interface,
3372                                                                                         (constant_classref *) iptr->target,
3373                                                                                         0);
3374
3375                                                 if (opt_showdisassemble)
3376                                                         M_NOP;
3377                                         }
3378
3379                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3380                                         M_ILD(REG_ITMP3, REG_ITMP2,
3381                                                   OFFSET(vftbl_t, interfacetablelength));
3382                                         M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3383                                         M_BLEZ(REG_ITMP3, 0);
3384                                         codegen_addxcastrefs(cd, mcodeptr);
3385                                         M_ALD(REG_ITMP3, REG_ITMP2,
3386                                                   (s4) (OFFSET(vftbl_t, interfacetable[0]) -
3387                                                                 superindex * sizeof(methodptr*)));
3388                                         M_BEQZ(REG_ITMP3, 0);
3389                                         codegen_addxcastrefs(cd, mcodeptr);
3390
3391                                         if (!super)
3392                                                 M_BR(s3);
3393                                 }
3394
3395                                 /* class checkcast code */
3396
3397                                 if (!super || !(super->flags & ACC_INTERFACE)) {
3398                                         disp = dseg_addaddress(cd, supervftbl);
3399
3400                                         if (super) {
3401                                                 M_BEQZ(s1, s3);
3402
3403                                         } else {
3404                                                 codegen_addpatchref(cd, mcodeptr,
3405                                                                                         PATCHER_checkcast_instanceof_class,
3406                                                                                         (constant_classref *) iptr->target,
3407                                                                                         disp);
3408
3409                                                 if (opt_showdisassemble)
3410                                                         M_NOP;
3411                                         }
3412
3413                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3414                                         M_ALD(REG_ITMP3, REG_PV, disp);
3415 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3416                                         codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3417 #endif
3418                                         M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3419                                         /*                              if (s1 != REG_ITMP1) { */
3420                                         /*                                      M_ILD(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, baseval)); */
3421                                         /*                                      M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval)); */
3422                                         /*  #if defined(USE_THREADS) && defined(NATIVE_THREADS) */
3423                                         /*                                      codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase); */
3424                                         /*  #endif */
3425                                         /*                                      M_ISUB(REG_ITMP2, REG_ITMP1, REG_ITMP2); */
3426
3427                                         /*                              } else { */
3428                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, baseval));
3429                                         M_ISUB(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3430                                         M_ALD(REG_ITMP3, REG_PV, disp);
3431                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval));
3432 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3433                                         codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3434 #endif
3435                                         /*                              } */
3436                                         M_CMPULE(REG_ITMP2, REG_ITMP3, REG_ITMP3);
3437                                         M_BEQZ(REG_ITMP3, 0);
3438                                         codegen_addxcastrefs(cd, mcodeptr);
3439                                 }
3440                                 d = reg_of_var(rd, iptr->dst, s1);
3441
3442                         } else {
3443                                 /* array type cast-check */
3444
3445                                 var_to_reg_int(s1, src, rd->argintregs[0]);
3446                                 M_INTMOVE(s1, rd->argintregs[0]);
3447
3448                                 disp = dseg_addaddress(cd, iptr->val.a);
3449
3450                                 if (iptr->val.a == NULL) {
3451                                         codegen_addpatchref(cd, mcodeptr,
3452                                                                                 PATCHER_builtin_arraycheckcast,
3453                                                                                 (constant_classref *) iptr->target,
3454                                                                                 disp);
3455
3456                                         if (opt_showdisassemble)
3457                                                 M_NOP;
3458                                 }
3459
3460                                 M_ALD(rd->argintregs[1], REG_PV, disp);
3461                                 disp = dseg_addaddress(cd, BUILTIN_arraycheckcast);
3462                                 M_ALD(REG_PV, REG_PV, disp);
3463                                 M_JSR(REG_RA, REG_PV);
3464                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3465                                 M_LDA(REG_PV, REG_RA, -disp);
3466
3467                                 M_BEQZ(REG_RESULT, 0);
3468                                 codegen_addxcastrefs(cd, mcodeptr);
3469
3470                                 var_to_reg_int(s1, src, REG_ITMP1);
3471                                 d = reg_of_var(rd, iptr->dst, s1);
3472                         }
3473                         M_INTMOVE(s1, d);
3474                         store_reg_to_var_int(iptr->dst, d);
3475                         break;
3476
3477                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3478
3479                                       /* op1:   0 == array, 1 == class                */
3480                                       /* val.a: (classinfo*) superclass               */
3481
3482                         /*  superclass is an interface:
3483                          *
3484                          *  return (sub != NULL) &&
3485                          *         (sub->vftbl->interfacetablelength > super->index) &&
3486                          *         (sub->vftbl->interfacetable[-super->index] != NULL);
3487                          *
3488                          *  superclass is a class:
3489                          *
3490                          *  return ((sub != NULL) && (0
3491                          *          <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3492                          *          super->vftbl->diffvall));
3493                          */
3494
3495                         {
3496                         classinfo *super;
3497                         vftbl_t   *supervftbl;
3498                         s4         superindex;
3499
3500                         super = (classinfo *) iptr->val.a;
3501
3502                         if (!super) {
3503                                 superindex = 0;
3504                                 supervftbl = NULL;
3505
3506                         } else {
3507                                 superindex = super->index;
3508                                 supervftbl = super->vftbl;
3509                         }
3510
3511 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3512                         codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
3513 #endif
3514                         var_to_reg_int(s1, src, REG_ITMP1);
3515                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
3516                         if (s1 == d) {
3517                                 M_MOV(s1, REG_ITMP1);
3518                                 s1 = REG_ITMP1;
3519                         }
3520
3521                         /* calculate interface instanceof code size */
3522
3523                         s2 = 6;
3524                         if (!super)
3525                                 s2 += (d == REG_ITMP2 ? 1 : 0) + (opt_showdisassemble ? 1 : 0);
3526
3527                         /* calculate class instanceof code size */
3528
3529                         s3 = 7;
3530                         if (!super)
3531                                 s3 += (opt_showdisassemble ? 1 : 0);
3532
3533                         /* if class is not resolved, check which code to call */
3534
3535                         if (!super) {
3536                                 M_CLR(d);
3537                                 M_BEQZ(s1, 4 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3538
3539                                 disp = dseg_adds4(cd, 0);                     /* super->flags */
3540
3541                                 codegen_addpatchref(cd, mcodeptr,
3542                                                                         PATCHER_checkcast_instanceof_flags,
3543                                                                         (constant_classref *) iptr->target, disp);
3544
3545                                 if (opt_showdisassemble)
3546                                         M_NOP;
3547
3548                                 M_ILD(REG_ITMP3, REG_PV, disp);
3549
3550                                 disp = dseg_adds4(cd, ACC_INTERFACE);
3551                                 M_ILD(REG_ITMP2, REG_PV, disp);
3552                                 M_AND(REG_ITMP3, REG_ITMP2, REG_ITMP3);
3553                                 M_BEQZ(REG_ITMP3, s2 + 1);
3554                         }
3555
3556                         /* interface instanceof code */
3557
3558                         if (!super || (super->flags & ACC_INTERFACE)) {
3559                                 if (super) {
3560                                         M_CLR(d);
3561                                         M_BEQZ(s1, s2);
3562
3563                                 } else {
3564                                         /* If d == REG_ITMP2, then it's destroyed in check code   */
3565                                         /* above.                                                 */
3566                                         if (d == REG_ITMP2)
3567                                                 M_CLR(d);
3568
3569                                         codegen_addpatchref(cd, mcodeptr,
3570                                                                                 PATCHER_checkcast_instanceof_interface,
3571                                                                                 (constant_classref *) iptr->target, 0);
3572
3573                                         if (opt_showdisassemble)
3574                                                 M_NOP;
3575                                 }
3576
3577                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3578                                 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3579                                 M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3580                                 M_BLEZ(REG_ITMP3, 2);
3581                                 M_ALD(REG_ITMP1, REG_ITMP1,
3582                                           (s4) (OFFSET(vftbl_t, interfacetable[0]) -
3583                                                         superindex * sizeof(methodptr*)));
3584                                 M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3585
3586                                 if (!super)
3587                                         M_BR(s3);
3588                         }
3589
3590                         /* class instanceof code */
3591
3592                         if (!super || !(super->flags & ACC_INTERFACE)) {
3593                                 disp = dseg_addaddress(cd, supervftbl);
3594
3595                                 if (super) {
3596                                         M_CLR(d);
3597                                         M_BEQZ(s1, s3);
3598
3599                                 } else {
3600                                         codegen_addpatchref(cd, mcodeptr,
3601                                                                                 PATCHER_checkcast_instanceof_class,
3602                                                                                 (constant_classref *) iptr->target,
3603                                                                                 disp);
3604
3605                                         if (opt_showdisassemble)
3606                                                 M_NOP;
3607                                 }
3608
3609                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3610                                 M_ALD(REG_ITMP2, REG_PV, disp);
3611 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3612                                 codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3613 #endif
3614                                 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3615                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3616                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3617 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3618                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3619 #endif
3620                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3621                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3622                         }
3623                         store_reg_to_var_int(iptr->dst, d);
3624                         }
3625                         break;
3626
3627                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3628                                       /* op1 = dimension, val.a = array descriptor    */
3629
3630                         /* check for negative sizes and copy sizes to stack if necessary  */
3631
3632                         MCODECHECK((iptr->op1 << 1) + 64);
3633
3634                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3635                                 /* copy SAVEDVAR sizes to stack */
3636
3637                                 if (src->varkind != ARGVAR) {
3638                                         var_to_reg_int(s2, src, REG_ITMP1);
3639                                         M_LST(s2, REG_SP, s1 * 8);
3640                                 }
3641                         }
3642
3643                         /* a0 = dimension count */
3644
3645                         ICONST(rd->argintregs[0], iptr->op1);
3646
3647                         /* is patcher function set? */
3648
3649                         if (iptr->target) {
3650                                 disp = dseg_addaddress(cd, 0);
3651
3652                                 codegen_addpatchref(cd, mcodeptr,
3653                                                                         (functionptr) iptr->target, iptr->val.a,
3654                                                                         disp);
3655
3656                                 if (opt_showdisassemble)
3657                                         M_NOP;
3658
3659                         } else {
3660                                 disp = dseg_addaddress(cd, iptr->val.a);
3661                         }
3662
3663                         /* a1 = arraydescriptor */
3664
3665                         M_ALD(rd->argintregs[1], REG_PV, disp);
3666
3667                         /* a2 = pointer to dimensions = stack pointer */
3668
3669                         M_INTMOVE(REG_SP, rd->argintregs[2]);
3670
3671                         disp = dseg_addaddress(cd, (void *) BUILTIN_multianewarray);
3672                         M_ALD(REG_PV, REG_PV, disp);
3673                         M_JSR(REG_RA, REG_PV);
3674                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3675                         M_LDA(REG_PV, REG_RA, -disp);
3676
3677                         /* check for exception before result assignment */
3678
3679                         M_BEQZ(REG_RESULT, 0);
3680                         codegen_addxexceptionrefs(cd, mcodeptr);
3681
3682                         d = reg_of_var(rd, iptr->dst, REG_RESULT);
3683                         M_INTMOVE(REG_RESULT, d);
3684                         store_reg_to_var_int(iptr->dst, d);
3685                         break;
3686
3687                 default:
3688                         *exceptionptr =
3689                                 new_internalerror("Unknown ICMD %d", iptr->opc);
3690                         return false;
3691         } /* switch */
3692
3693         } /* for instruction */
3694
3695         /* copy values to interface registers */
3696
3697         src = bptr->outstack;
3698         len = bptr->outdepth;
3699         MCODECHECK(64+len);
3700 #ifdef LSRA
3701         if (!opt_lsra)
3702 #endif
3703         while (src) {
3704                 len--;
3705                 if ((src->varkind != STACKVAR)) {
3706                         s2 = src->type;
3707                         if (IS_FLT_DBL_TYPE(s2)) {
3708                                 var_to_reg_flt(s1, src, REG_FTMP1);
3709                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3710                                         M_FLTMOVE(s1,rd->interfaces[len][s2].regoff);
3711                                         }
3712                                 else {
3713                                         M_DST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3714                                         }
3715                                 }
3716                         else {
3717                                 var_to_reg_int(s1, src, REG_ITMP1);
3718                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3719                                         M_INTMOVE(s1,rd->interfaces[len][s2].regoff);
3720                                         }
3721                                 else {
3722                                         M_LST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3723                                         }
3724                                 }
3725                         }
3726                 src = src->prev;
3727                 }
3728         } /* if (bptr -> flags >= BBREACHED) */
3729         } /* for basic block */
3730
3731         codegen_createlinenumbertable(cd);
3732
3733         {
3734
3735         s4 *xcodeptr = NULL;
3736         branchref *bref;
3737
3738         /* generate ArithmeticException stubs */
3739
3740         for (bref = cd->xdivrefs; bref != NULL; bref = bref->next) {
3741                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3742                                   bref->branchpos,
3743                                                   (u1 *) mcodeptr - cd->mcodebase);
3744
3745                 MCODECHECK(100);
3746
3747                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3748
3749                 if (xcodeptr != NULL) {
3750                         disp = xcodeptr - mcodeptr - 1;
3751                         M_BR(disp);
3752
3753                 } else {
3754                         xcodeptr = mcodeptr;
3755
3756                         M_MOV(REG_PV, rd->argintregs[0]);
3757                         M_MOV(REG_SP, rd->argintregs[1]);
3758                         M_ALD(rd->argintregs[2],
3759                                   REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
3760                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3761
3762                         M_LDA(REG_SP, REG_SP, -1 * 8);
3763                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3764
3765                         disp = dseg_addaddress(cd, stacktrace_inline_arithmeticexception);
3766                         M_ALD(REG_PV, REG_PV, disp);
3767                         M_JSR(REG_RA, REG_PV);
3768                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3769                         M_LDA(REG_PV, REG_RA, -disp);
3770
3771                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3772
3773                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3774                         M_LDA(REG_SP, REG_SP, 1 * 8);
3775
3776                         disp = dseg_addaddress(cd, asm_handle_exception);
3777                         M_ALD(REG_ITMP3, REG_PV, disp);
3778                         M_JMP(REG_ZERO, REG_ITMP3);
3779                 }
3780         }
3781
3782         /* generate ArrayIndexOutOfBoundsException stubs */
3783
3784         xcodeptr = NULL;
3785
3786         for (bref = cd->xboundrefs; bref != NULL; bref = bref->next) {
3787                 gen_resolvebranch((u1*) cd->mcodebase + bref->branchpos,
3788                                   bref->branchpos,
3789                                                   (u1*) mcodeptr - cd->mcodebase);
3790
3791                 MCODECHECK(100);
3792
3793                 /* move index register into REG_ITMP1 */
3794
3795                 M_MOV(bref->reg, REG_ITMP1);
3796                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3797
3798                 if (xcodeptr != NULL) {
3799                         disp = xcodeptr - mcodeptr - 1;
3800                         M_BR(disp);
3801
3802                 } else {
3803                         xcodeptr = mcodeptr;
3804
3805                         M_MOV(REG_PV, rd->argintregs[0]);
3806                         M_MOV(REG_SP, rd->argintregs[1]);
3807
3808                         if (m->isleafmethod)
3809                                 M_MOV(REG_RA, rd->argintregs[2]);
3810                         else
3811                                 M_ALD(rd->argintregs[2],
3812                                           REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
3813
3814                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3815                         M_MOV(REG_ITMP1, rd->argintregs[4]);
3816
3817                         M_LDA(REG_SP, REG_SP, -2 * 8);
3818                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3819
3820                         if (m->isleafmethod)
3821                                 M_AST(REG_RA, REG_SP, 1 * 8);
3822
3823                         disp = dseg_addaddress(cd, stacktrace_inline_arrayindexoutofboundsexception);
3824                         M_ALD(REG_PV, REG_PV, disp);
3825                         M_JSR(REG_RA, REG_PV);
3826                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3827                         M_LDA(REG_PV, REG_RA, -disp);
3828
3829                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3830
3831                         if (m->isleafmethod)
3832                                 M_ALD(REG_RA, REG_SP, 1 * 8);
3833
3834                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3835                         M_LDA(REG_SP, REG_SP, 2 * 8);
3836
3837                         disp = dseg_addaddress(cd, asm_handle_exception);
3838                         M_ALD(REG_ITMP3, REG_PV, disp);
3839                         M_JMP(REG_ZERO, REG_ITMP3);
3840                 }
3841         }
3842
3843         /* generate ArrayStoreException stubs */
3844
3845         xcodeptr = NULL;
3846
3847         for (bref = cd->xstorerefs; bref != NULL; bref = bref->next) {
3848                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3849                                   bref->branchpos,
3850                                                   (u1 *) mcodeptr - cd->mcodebase);
3851
3852                 MCODECHECK(100);
3853
3854                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3855
3856                 if (xcodeptr != NULL) {
3857                         disp = xcodeptr - mcodeptr - 1;
3858                         M_BR(disp);
3859
3860                 } else {
3861                         xcodeptr = mcodeptr;
3862
3863                         M_MOV(REG_PV, rd->argintregs[0]);
3864                         M_MOV(REG_SP, rd->argintregs[1]);
3865                         M_ALD(rd->argintregs[2],
3866                                   REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
3867                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3868
3869                         M_LDA(REG_SP, REG_SP, -1 * 8);
3870                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3871
3872                         disp = dseg_addaddress(cd, stacktrace_inline_arraystoreexception);
3873                         M_ALD(REG_PV, REG_PV, disp);
3874                         M_JSR(REG_RA, REG_PV);
3875                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3876                         M_LDA(REG_PV, REG_RA, -disp);
3877
3878                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3879
3880                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3881                         M_LDA(REG_SP, REG_SP, 1 * 8);
3882
3883                         disp = dseg_addaddress(cd, asm_handle_exception);
3884                         M_ALD(REG_ITMP3, REG_PV, disp);
3885                         M_JMP(REG_ZERO, REG_ITMP3);
3886                 }
3887         }
3888
3889         /* generate ClassCastException stubs */
3890
3891         xcodeptr = NULL;
3892
3893         for (bref = cd->xcastrefs; bref != NULL; bref = bref->next) {
3894                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3895                                   bref->branchpos,
3896                                                   (u1 *) mcodeptr - cd->mcodebase);
3897
3898                 MCODECHECK(100);
3899
3900                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3901
3902                 if (xcodeptr != NULL) {
3903                         disp = xcodeptr - mcodeptr - 1;
3904                         M_BR(disp);
3905
3906                 } else {
3907                         xcodeptr = mcodeptr;
3908
3909                         M_MOV(REG_PV, rd->argintregs[0]);
3910                         M_MOV(REG_SP, rd->argintregs[1]);
3911
3912                         if (m->isleafmethod)
3913                                 M_MOV(REG_RA, rd->argintregs[2]);
3914                         else
3915                                 M_ALD(rd->argintregs[2],
3916                                           REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
3917
3918                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3919
3920                         M_LDA(REG_SP, REG_SP, -2 * 8);
3921                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3922
3923                         if (m->isleafmethod)
3924                                 M_AST(REG_RA, REG_SP, 1 * 8);
3925
3926                         disp = dseg_addaddress(cd, stacktrace_inline_classcastexception);
3927                         M_ALD(REG_PV, REG_PV, disp);
3928                         M_JSR(REG_RA, REG_PV);
3929                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3930                         M_LDA(REG_PV, REG_RA, -disp);
3931
3932                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3933
3934                         if (m->isleafmethod)
3935                                 M_ALD(REG_RA, REG_SP, 1 * 8);
3936
3937                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3938                         M_LDA(REG_SP, REG_SP, 2 * 8);
3939
3940                         disp = dseg_addaddress(cd, asm_handle_exception);
3941                         M_ALD(REG_ITMP3, REG_PV, disp);
3942                         M_JMP(REG_ZERO, REG_ITMP3);
3943                 }
3944         }
3945
3946         /* generate NullPointerException stubs */
3947
3948         xcodeptr = NULL;
3949
3950         for (bref = cd->xnullrefs; bref != NULL; bref = bref->next) {
3951                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3952                                   bref->branchpos,
3953                                                   (u1 *) mcodeptr - cd->mcodebase);
3954
3955                 MCODECHECK(100);
3956
3957                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3958
3959                 if (xcodeptr != NULL) {
3960                         disp = xcodeptr - mcodeptr - 1;
3961                         M_BR(disp);
3962
3963                 } else {
3964                         xcodeptr = mcodeptr;
3965
3966                         M_MOV(REG_PV, rd->argintregs[0]);
3967                         M_MOV(REG_SP, rd->argintregs[1]);
3968
3969                         if (m->isleafmethod)
3970                                 M_MOV(REG_RA, rd->argintregs[2]);
3971                         else
3972                                 M_ALD(rd->argintregs[2],
3973                                           REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
3974
3975                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3976
3977                         M_LDA(REG_SP, REG_SP, -2 * 8);
3978                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3979
3980                         if (m->isleafmethod)
3981                                 M_AST(REG_RA, REG_SP, 1 * 8);
3982
3983                         disp = dseg_addaddress(cd, stacktrace_inline_nullpointerexception);
3984                         M_ALD(REG_PV, REG_PV, disp);
3985                         M_JSR(REG_RA, REG_PV);
3986                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3987                         M_LDA(REG_PV, REG_RA, -disp);
3988
3989                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3990
3991                         if (m->isleafmethod)
3992                                 M_ALD(REG_RA, REG_SP, 1 * 8);
3993
3994                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3995                         M_LDA(REG_SP, REG_SP, 2 * 8);
3996
3997                         disp = dseg_addaddress(cd, asm_handle_exception);
3998                         M_ALD(REG_ITMP3, REG_PV, disp);
3999                         M_JMP(REG_ZERO, REG_ITMP3);
4000                 }
4001         }
4002
4003         /* generate exception check stubs */
4004
4005         xcodeptr = NULL;
4006
4007         for (bref = cd->xexceptionrefs; bref != NULL; bref = bref->next) {
4008                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
4009                                   bref->branchpos,
4010                                                   (u1 *) mcodeptr - cd->mcodebase);
4011
4012                 MCODECHECK(100);
4013
4014                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
4015
4016                 if (xcodeptr != NULL) {
4017                         disp = xcodeptr - mcodeptr - 1;
4018                         M_BR(disp);
4019
4020                 } else {
4021                         xcodeptr = mcodeptr;
4022
4023                         M_MOV(REG_PV, rd->argintregs[0]);
4024                         M_MOV(REG_SP, rd->argintregs[1]);
4025                         M_ALD(rd->argintregs[2],
4026                                   REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
4027                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
4028
4029                         M_LDA(REG_SP, REG_SP, -1 * 8);
4030                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
4031
4032                         disp = dseg_addaddress(cd, stacktrace_inline_fillInStackTrace);
4033                         M_ALD(REG_PV, REG_PV, disp);
4034                         M_JSR(REG_RA, REG_PV);
4035                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4036                         M_LDA(REG_PV, REG_RA, -disp);
4037
4038                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
4039
4040                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
4041                         M_LDA(REG_SP, REG_SP, 1 * 8);
4042
4043                         disp = dseg_addaddress(cd, asm_handle_exception);
4044                         M_ALD(REG_ITMP3, REG_PV, disp);
4045                         M_JMP(REG_ZERO, REG_ITMP3);
4046                 }
4047         }
4048
4049         /* generate patcher stub call code */
4050
4051         {
4052                 patchref *pref;
4053                 u4        mcode;
4054                 s4       *tmpmcodeptr;
4055
4056                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4057                         /* check code segment size */
4058
4059                         MCODECHECK(100);
4060
4061                         /* Get machine code which is patched back in later. The call is   */
4062                         /* 1 instruction word long.                                       */
4063
4064                         xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
4065                         mcode = *xcodeptr;
4066
4067                         /* patch in the call to call the following code (done at compile  */
4068                         /* time)                                                          */
4069
4070                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
4071                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
4072
4073                         M_BSR(REG_ITMP3, tmpmcodeptr - (xcodeptr + 1));
4074
4075                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
4076
4077                         /* create stack frame */
4078
4079                         M_LSUB_IMM(REG_SP, 6 * 8, REG_SP);
4080
4081                         /* move return address onto stack */
4082
4083                         M_AST(REG_ITMP3, REG_SP, 5 * 8);
4084
4085                         /* move pointer to java_objectheader onto stack */
4086
4087 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4088                         /* create a virtual java_objectheader */
4089
4090                         (void) dseg_addaddress(cd, get_dummyLR());          /* monitorPtr */
4091                         disp = dseg_addaddress(cd, NULL);                   /* vftbl      */
4092
4093                         M_LDA(REG_ITMP3, REG_PV, disp);
4094                         M_AST(REG_ITMP3, REG_SP, 4 * 8);
4095 #else
4096                         /* do nothing */
4097 #endif
4098
4099                         /* move machine code onto stack */
4100
4101                         disp = dseg_adds4(cd, mcode);
4102                         M_ILD(REG_ITMP3, REG_PV, disp);
4103                         M_IST(REG_ITMP3, REG_SP, 3 * 8);
4104
4105                         /* move class/method/field reference onto stack */
4106
4107                         disp = dseg_addaddress(cd, pref->ref);
4108                         M_ALD(REG_ITMP3, REG_PV, disp);
4109                         M_AST(REG_ITMP3, REG_SP, 2 * 8);
4110
4111                         /* move data segment displacement onto stack */
4112
4113                         disp = dseg_adds4(cd, pref->disp);
4114                         M_ILD(REG_ITMP3, REG_PV, disp);
4115                         M_IST(REG_ITMP3, REG_SP, 1 * 8);
4116
4117                         /* move patcher function pointer onto stack */
4118
4119                         disp = dseg_addaddress(cd, pref->patcher);
4120                         M_ALD(REG_ITMP3, REG_PV, disp);
4121                         M_AST(REG_ITMP3, REG_SP, 0 * 8);
4122
4123                         disp = dseg_addaddress(cd, asm_wrapper_patcher);
4124                         M_ALD(REG_ITMP3, REG_PV, disp);
4125                         M_JMP(REG_ZERO, REG_ITMP3);
4126                 }
4127         }
4128         }
4129
4130         codegen_finish(m, cd, (s4) ((u1 *) mcodeptr - cd->mcodebase));
4131
4132         /* everything's ok */
4133
4134         return true;
4135 }
4136
4137
4138 /* createcompilerstub **********************************************************
4139
4140    Creates a stub routine which calls the compiler.
4141
4142 *******************************************************************************/
4143
4144 #define COMPSTUBSIZE    3
4145
4146 u1 *createcompilerstub(methodinfo *m)
4147 {
4148         u8 *s = CNEW(u8, COMPSTUBSIZE);     /* memory to hold the stub            */
4149         s4 *mcodeptr = (s4 *) s;            /* code generation pointer            */
4150
4151                                             /* code for the stub                  */
4152         M_ALD(REG_PV, REG_PV, 16);          /* load pointer to the compiler       */
4153         M_JMP(0, REG_PV);                   /* jump to the compiler, return address
4154                                                in reg 0 is used as method pointer */
4155         s[1] = (ptrint) m;                  /* literals to be adressed            */
4156         s[2] = (ptrint) asm_call_jit_compiler; /* jump directly via PV from above */
4157
4158 #if defined(STATISTICS)
4159         if (opt_stat)
4160                 count_cstub_len += COMPSTUBSIZE * 8;
4161 #endif
4162
4163         return (u1 *) s;
4164 }
4165
4166
4167 /* createnativestub ************************************************************
4168
4169    Creates a stub routine which calls a native method.
4170
4171 *******************************************************************************/
4172
4173 u1 *createnativestub(functionptr f, methodinfo *m, codegendata *cd,
4174                                          registerdata *rd, methoddesc *nmd)
4175 {
4176         s4         *mcodeptr;               /* code generation pointer            */
4177         s4          stackframesize;         /* size of stackframe if needed       */
4178         methoddesc *md;
4179         s4          nativeparams;
4180         s4          i, j;                   /* count variables                    */
4181         s4          t;
4182         s4          s1, s2, disp;
4183         s4          funcdisp;               /* displacement of the function       */
4184
4185         /* initialize variables */
4186
4187         md = m->parseddesc;
4188         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
4189
4190
4191         /* calculate stack frame size */
4192
4193         stackframesize =
4194                 1 +                             /* return address                     */
4195                 sizeof(stackframeinfo) / SIZEOF_VOID_P +
4196                 sizeof(localref_table) / SIZEOF_VOID_P +
4197                 1 +                             /* methodinfo for call trace          */
4198                 (md->paramcount > INT_ARG_CNT ? INT_ARG_CNT : md->paramcount) +
4199                 nmd->memuse;
4200
4201
4202         /* create method header */
4203
4204         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
4205         (void) dseg_adds4(cd, stackframesize * 8);              /* FrameSize      */
4206         (void) dseg_adds4(cd, 0);                               /* IsSync         */
4207         (void) dseg_adds4(cd, 0);                               /* IsLeaf         */
4208         (void) dseg_adds4(cd, 0);                               /* IntSave        */
4209         (void) dseg_adds4(cd, 0);                               /* FltSave        */
4210         (void) dseg_addlinenumbertablesize(cd);
4211         (void) dseg_adds4(cd, 0);                               /* ExTableSize    */
4212
4213
4214         /* initialize mcode variables */
4215
4216         mcodeptr = (s4 *) cd->mcodeptr;
4217
4218
4219         /* generate stub code */
4220
4221         M_LDA(REG_SP, REG_SP, -stackframesize * 8);
4222         M_AST(REG_RA, REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
4223
4224
4225         /* call trace function */
4226
4227         if (runverbose) {
4228                 /* save integer argument registers */
4229
4230                 for (i = 0, j = 1; i < md->paramcount && i < INT_ARG_CNT; i++) {
4231                         if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
4232                                 M_LST(rd->argintregs[i], REG_SP, j * 8);
4233                                 j++;
4234                         }
4235                 }
4236
4237                 /* save and copy float arguments into integer registers */
4238
4239                 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4240                         t = md->paramtypes[i].type;
4241
4242                         if (IS_FLT_DBL_TYPE(t)) {
4243                                 if (IS_2_WORD_TYPE(t)) {
4244                                         M_DST(rd->argfltregs[i], REG_SP, j * 8);
4245                                         M_LLD(rd->argintregs[i], REG_SP, j * 8);
4246                                 } else {
4247                                         M_FST(rd->argfltregs[i], REG_SP, j * 8);
4248                                         M_ILD(rd->argintregs[i], REG_SP, j * 8);
4249                                 }
4250                                 j++;
4251                         }
4252                 }
4253
4254                 disp = dseg_addaddress(cd, m);
4255                 M_ALD(REG_ITMP1, REG_PV, disp);
4256                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
4257                 disp = dseg_addaddress(cd, builtin_trace_args);
4258                 M_ALD(REG_PV, REG_PV, disp);
4259                 M_JSR(REG_RA, REG_PV);
4260                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4261                 M_LDA(REG_PV, REG_RA, -disp);
4262
4263                 for (i = 0, j = 1; i < md->paramcount && i < INT_ARG_CNT; i++) {
4264                         if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
4265                                 M_LLD(rd->argintregs[i], REG_SP, j * 8);
4266                                 j++;
4267                         }
4268                 }
4269
4270                 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4271                         t = md->paramtypes[i].type;
4272
4273                         if (IS_FLT_DBL_TYPE(t)) {
4274                                 if (IS_2_WORD_TYPE(t)) {
4275                                         M_DLD(rd->argfltregs[i], REG_SP, j * 8);
4276                                 } else {
4277                                         M_FLD(rd->argfltregs[i], REG_SP, j * 8);
4278                                 }
4279                                 j++;
4280                         }
4281                 }
4282         }
4283
4284         /* get function address (this must happen before the stackframeinfo) */
4285
4286         funcdisp = dseg_addaddress(cd, f);
4287
4288 #if !defined(ENABLE_STATICVM)
4289         if (f == NULL) {
4290                 codegen_addpatchref(cd, mcodeptr, PATCHER_resolve_native, m, funcdisp);
4291
4292                 if (opt_showdisassemble)
4293                         M_NOP;
4294         }
4295 #endif
4296
4297         /* save integer and float argument registers */
4298
4299         for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
4300                 if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
4301                         M_LST(rd->argintregs[i], REG_SP, j * 8);
4302                         j++;
4303                 }
4304         }
4305
4306         for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4307                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
4308                         M_DST(rd->argfltregs[i], REG_SP, j * 8);
4309                         j++;
4310                 }
4311         }
4312
4313         /* prepare data structures for native function call */
4314
4315         M_LDA(rd->argintregs[0], REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
4316         M_MOV(REG_PV, rd->argintregs[1]);
4317         M_LDA(rd->argintregs[2], REG_SP, stackframesize * 8);
4318         M_ALD(rd->argintregs[3], REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
4319         disp = dseg_addaddress(cd, codegen_start_native_call);
4320         M_ALD(REG_PV, REG_PV, disp);
4321         M_JSR(REG_RA, REG_PV);
4322         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4323         M_LDA(REG_PV, REG_RA, -disp);
4324
4325         /* restore integer and float argument registers */
4326
4327         for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
4328                 if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
4329                         M_LLD(rd->argintregs[i], REG_SP, j * 8);
4330                         j++;
4331                 }
4332         }
4333
4334         for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4335                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
4336                         M_DLD(rd->argfltregs[i], REG_SP, j * 8);
4337                         j++;
4338                 }
4339         }
4340
4341         /* copy or spill arguments to new locations */
4342
4343         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
4344                 t = md->paramtypes[i].type;
4345
4346                 if (IS_INT_LNG_TYPE(t)) {
4347                         if (!md->params[i].inmemory) {
4348                                 s1 = rd->argintregs[md->params[i].regoff];
4349
4350                                 if (!nmd->params[j].inmemory) {
4351                                         s2 = rd->argintregs[nmd->params[j].regoff];
4352                                         M_INTMOVE(s1, s2);
4353
4354                                 } else {
4355                                         s2 = nmd->params[j].regoff;
4356                                         M_LST(s1, REG_SP, s2 * 8);
4357                                 }
4358
4359                         } else {
4360                                 s1 = md->params[i].regoff + stackframesize;
4361                                 s2 = nmd->params[j].regoff;
4362                                 M_LLD(REG_ITMP1, REG_SP, s1 * 8);
4363                                 M_LST(REG_ITMP1, REG_SP, s2 * 8);
4364                         }
4365
4366                 } else {
4367                         if (!md->params[i].inmemory) {
4368                                 s1 = rd->argfltregs[md->params[i].regoff];
4369
4370                                 if (!nmd->params[j].inmemory) {
4371                                         s2 = rd->argfltregs[nmd->params[j].regoff];
4372                                         M_FLTMOVE(s1, s2);
4373
4374                                 } else {
4375                                         s2 = nmd->params[j].regoff;
4376                                         if (IS_2_WORD_TYPE(t))
4377                                                 M_DST(s1, REG_SP, s2 * 8);
4378                                         else
4379                                                 M_FST(s1, REG_SP, s2 * 8);
4380                                 }
4381
4382                         } else {
4383                                 s1 = md->params[i].regoff + stackframesize;
4384                                 s2 = nmd->params[j].regoff;
4385                                 M_DLD(REG_FTMP1, REG_SP, s1 * 8);
4386                                 if (IS_2_WORD_TYPE(t))
4387                                         M_DST(REG_FTMP1, REG_SP, s2 * 8);
4388                                 else
4389                                         M_FST(REG_FTMP1, REG_SP, s2 * 8);
4390                         }
4391                 }
4392         }
4393
4394         /* put class into second argument register */
4395
4396         if (m->flags & ACC_STATIC) {
4397                 disp = dseg_addaddress(cd, m->class);
4398                 M_ALD(rd->argintregs[1], REG_PV, disp);
4399         }
4400
4401         /* put env into first argument register */
4402
4403         disp = dseg_addaddress(cd, &env);
4404         M_ALD(rd->argintregs[0], REG_PV, disp);
4405
4406         /* do the native function call */
4407
4408         M_ALD(REG_PV, REG_PV, funcdisp);
4409         M_JSR(REG_RA, REG_PV);              /* call native method                 */
4410         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4411         M_LDA(REG_PV, REG_RA, -disp);       /* recompute pv from ra               */
4412
4413         /* save return value */
4414
4415         if (IS_INT_LNG_TYPE(md->returntype.type))
4416                 M_LST(REG_RESULT, REG_SP, 0 * 8);
4417         else
4418                 M_DST(REG_FRESULT, REG_SP, 0 * 8);
4419
4420         /* remove native stackframe info */
4421
4422         M_LDA(rd->argintregs[0], REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
4423         disp = dseg_addaddress(cd, codegen_finish_native_call);
4424         M_ALD(REG_PV, REG_PV, disp);
4425         M_JSR(REG_RA, REG_PV);
4426         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4427         M_LDA(REG_PV, REG_RA, -disp);
4428
4429         /* call finished trace */
4430
4431         if (runverbose) {
4432                 /* just restore the value we need, don't care about the other */
4433
4434                 if (IS_INT_LNG_TYPE(md->returntype.type))
4435                         M_LLD(REG_RESULT, REG_SP, 0 * 8);
4436                 else
4437                         M_DLD(REG_FRESULT, REG_SP, 0 * 8);
4438
4439                 disp = dseg_addaddress(cd, m);
4440                 M_ALD(rd->argintregs[0], REG_PV, disp);
4441
4442                 M_MOV(REG_RESULT, rd->argintregs[1]);
4443                 M_FMOV(REG_FRESULT, rd->argfltregs[2]);
4444                 M_FMOV(REG_FRESULT, rd->argfltregs[3]);
4445
4446                 disp = dseg_addaddress(cd, builtin_displaymethodstop);
4447                 M_ALD(REG_PV, REG_PV, disp);
4448                 M_JSR(REG_RA, REG_PV);
4449                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4450                 M_LDA(REG_PV, REG_RA, -disp);
4451         }
4452
4453         /* check for exception */
4454
4455 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4456         disp = dseg_addaddress(cd, builtin_get_exceptionptrptr);
4457         M_ALD(REG_PV, REG_PV, disp);
4458         M_JSR(REG_RA, REG_PV);
4459         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4460         M_LDA(REG_PV, REG_RA, -disp);
4461         M_MOV(REG_RESULT, REG_ITMP3);
4462 #else
4463         disp = dseg_addaddress(cd, &_exceptionptr);
4464         M_ALD(REG_RESULT, REG_PV, disp);    /* get address of exceptionptr        */
4465 #endif
4466         M_ALD(REG_ITMP1, REG_ITMP3, 0);     /* load exception into reg. itmp1     */
4467
4468         /* restore return value */
4469
4470         if (IS_INT_LNG_TYPE(md->returntype.type))
4471                 M_LLD(REG_RESULT, REG_SP, 0 * 8);
4472         else
4473                 M_DLD(REG_FRESULT, REG_SP, 0 * 8);
4474
4475         M_BNEZ(REG_ITMP1, 3);               /* if no exception then return        */
4476
4477         M_ALD(REG_RA, REG_SP, (stackframesize - 1) * 8); /* load return address   */
4478         M_LDA(REG_SP, REG_SP, stackframesize * 8);
4479         M_RET(REG_ZERO, REG_RA);            /* return to caller                   */
4480
4481         /* handle exception */
4482
4483         M_AST(REG_ZERO, REG_ITMP3, 0);      /* store NULL into exceptionptr       */
4484
4485         M_ALD(REG_RA, REG_SP, (stackframesize - 1) * 8); /* load return address   */
4486         M_LDA(REG_ITMP2, REG_RA, -4);       /* move fault address into reg. itmp2 */
4487
4488         M_LDA(REG_SP, REG_SP, stackframesize * 8);
4489
4490         disp = dseg_addaddress(cd, asm_handle_nat_exception);
4491         M_ALD(REG_ITMP3, REG_PV, disp);     /* load asm exception handler address */
4492         M_JMP(REG_ZERO, REG_ITMP3);         /* jump to asm exception handler      */
4493
4494
4495         /* process patcher calls **************************************************/
4496
4497         {
4498                 patchref *pref;
4499                 s4       *xcodeptr;
4500                 u4        mcode;
4501                 s4       *tmpmcodeptr;
4502
4503                 /* there can only be one <clinit> ref entry                           */
4504                 pref = cd->patchrefs;
4505
4506                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4507                         /* Get machine code which is patched back in later. The call is   */
4508                         /* 1 instruction word long.                                       */
4509
4510                         xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
4511                         mcode = (u4) *xcodeptr;
4512
4513                         /* patch in the call to call the following code (done at compile  */
4514                         /* time)                                                          */
4515
4516                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
4517                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
4518
4519                         M_BSR(REG_ITMP3, tmpmcodeptr - (xcodeptr + 1));
4520
4521                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
4522
4523                         /* create stack frame                                             */
4524
4525                         M_LSUB_IMM(REG_SP, 6 * 8, REG_SP);
4526
4527                         /* move return address onto stack */
4528
4529                         M_AST(REG_ITMP3, REG_SP, 5 * 8);
4530
4531                         /* move pointer to java_objectheader onto stack */
4532
4533 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4534                         /* create a virtual java_objectheader */
4535
4536                         (void) dseg_addaddress(cd, get_dummyLR());          /* monitorPtr */
4537                         disp = dseg_addaddress(cd, NULL);                   /* vftbl      */
4538
4539                         M_LDA(REG_ITMP3, REG_PV, disp);
4540                         M_AST(REG_ITMP3, REG_SP, 4 * 8);
4541 #else
4542                         M_AST(REG_ZERO, REG_SP, 4 * 8);
4543 #endif
4544
4545                         /* move machine code onto stack */
4546
4547                         disp = dseg_adds4(cd, mcode);
4548                         M_ILD(REG_ITMP3, REG_PV, disp);
4549                         M_IST(REG_ITMP3, REG_SP, 3 * 8);
4550
4551                         /* move class/method/field reference onto stack */
4552
4553                         disp = dseg_addaddress(cd, pref->ref);
4554                         M_ALD(REG_ITMP3, REG_PV, disp);
4555                         M_AST(REG_ITMP3, REG_SP, 2 * 8);
4556
4557                         /* move data segment displacement onto stack */
4558
4559                         disp = dseg_adds4(cd, pref->disp);
4560                         M_ILD(REG_ITMP3, REG_PV, disp);
4561                         M_IST(REG_ITMP3, REG_SP, 1 * 8);
4562
4563                         /* move patcher function pointer onto stack */
4564
4565                         disp = dseg_addaddress(cd, pref->patcher);
4566                         M_ALD(REG_ITMP3, REG_PV, disp);
4567                         M_AST(REG_ITMP3, REG_SP, 0 * 8);
4568
4569                         disp = dseg_addaddress(cd, asm_wrapper_patcher);
4570                         M_ALD(REG_ITMP3, REG_PV, disp);
4571                         M_JMP(REG_ZERO, REG_ITMP3);
4572                 }
4573         }
4574
4575         codegen_finish(m, cd, (s4) ((u1 *) mcodeptr - cd->mcodebase));
4576
4577         return m->entrypoint;
4578 }
4579
4580
4581 /*
4582  * These are local overrides for various environment variables in Emacs.
4583  * Please do not remove this and leave it at the end of the file, where
4584  * Emacs will automagically detect them.
4585  * ---------------------------------------------------------------------
4586  * Local variables:
4587  * mode: c
4588  * indent-tabs-mode: t
4589  * c-basic-offset: 4
4590  * tab-width: 4
4591  * End:
4592  */