1 /* src/vm/jit/alpha/codegen.c - machine code generator for Alpha
3 Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
4 C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
5 E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
6 J. Wenninger, Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
25 Contact: cacao@cacaojvm.org
27 Authors: Andreas Krall
30 Changes: Joseph Wenninger
35 $Id: codegen.c 5145 2006-07-17 11:48:38Z twisti $
50 #include "vm/jit/alpha/arch.h"
51 #include "vm/jit/alpha/codegen.h"
53 #include "native/jni.h"
54 #include "native/native.h"
56 #if defined(ENABLE_THREADS)
57 # include "threads/native/lock.h"
60 #include "vm/builtin.h"
61 #include "vm/exceptions.h"
62 #include "vm/global.h"
63 #include "vm/loader.h"
64 #include "vm/options.h"
65 #include "vm/stringlocal.h"
67 #include "vm/jit/asmpart.h"
68 #include "vm/jit/codegen-common.h"
69 #include "vm/jit/dseg.h"
70 #include "vm/jit/emit.h"
71 #include "vm/jit/jit.h"
72 #include "vm/jit/parse.h"
73 #include "vm/jit/patcher.h"
74 #include "vm/jit/reg.h"
75 #include "vm/jit/replace.h"
77 #if defined(ENABLE_LSRA)
78 # include "vm/jit/allocator/lsra.h"
82 /* codegen *********************************************************************
84 Generates machine code.
86 *******************************************************************************/
88 bool codegen(jitdata *jd)
94 s4 len, s1, s2, s3, d, disp;
102 methodinfo *lm; /* local methodinfo for ICMD_INVOKE* */
103 builtintable_entry *bte;
105 rplpoint *replacementpoint;
107 /* get required compiler data */
114 /* prevent compiler warnings */
125 savedregs_num = (jd->isleafmethod) ? 0 : 1; /* space to save the RA */
127 /* space to save used callee saved registers */
129 savedregs_num += (INT_SAV_CNT - rd->savintreguse);
130 savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
132 stackframesize = rd->memuse + savedregs_num;
134 #if defined(ENABLE_THREADS) /* space to save argument of monitor_enter */
135 if (checksync && (m->flags & ACC_SYNCHRONIZED))
139 /* create method header */
142 stackframesize = (stackframesize + 1) & ~1; /* align stack to 16-bytes */
145 (void) dseg_addaddress(cd, code); /* CodeinfoPointer */
146 (void) dseg_adds4(cd, stackframesize * 8); /* FrameSize */
148 #if defined(ENABLE_THREADS)
149 /* IsSync contains the offset relative to the stack pointer for the
150 argument of monitor_exit used in the exception handler. Since the
151 offset could be zero and give a wrong meaning of the flag it is
155 if (checksync && (m->flags & ACC_SYNCHRONIZED))
156 (void) dseg_adds4(cd, (rd->memuse + 1) * 8); /* IsSync */
159 (void) dseg_adds4(cd, 0); /* IsSync */
161 (void) dseg_adds4(cd, jd->isleafmethod); /* IsLeaf */
162 (void) dseg_adds4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave */
163 (void) dseg_adds4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave */
165 dseg_addlinenumbertablesize(cd);
167 (void) dseg_adds4(cd, cd->exceptiontablelength); /* ExTableSize */
169 /* create exception table */
171 for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
172 dseg_addtarget(cd, ex->start);
173 dseg_addtarget(cd, ex->end);
174 dseg_addtarget(cd, ex->handler);
175 (void) dseg_addaddress(cd, ex->catchtype.cls);
178 /* create stack frame (if necessary) */
181 M_LDA(REG_SP, REG_SP, -stackframesize * 8);
183 /* save return address and used callee saved registers */
186 if (!jd->isleafmethod) {
187 p--; M_AST(REG_RA, REG_SP, p * 8);
189 for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
190 p--; M_LST(rd->savintregs[i], REG_SP, p * 8);
192 for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
193 p--; M_DST(rd->savfltregs[i], REG_SP, p * 8);
196 /* take arguments out of register or stack frame */
200 for (p = 0, l = 0; p < md->paramcount; p++) {
201 t = md->paramtypes[p].type;
202 var = &(rd->locals[l][t]);
204 if (IS_2_WORD_TYPE(t)) /* increment local counter for 2 word types */
208 s1 = md->params[p].regoff;
209 if (IS_INT_LNG_TYPE(t)) { /* integer args */
210 if (!md->params[p].inmemory) { /* register arguments */
211 s2 = rd->argintregs[s1];
212 if (!(var->flags & INMEMORY)) { /* reg arg -> register */
213 M_INTMOVE(s2, var->regoff);
215 } else { /* reg arg -> spilled */
216 M_LST(s2, REG_SP, var->regoff * 8);
219 } else { /* stack arguments */
220 if (!(var->flags & INMEMORY)) { /* stack arg -> register */
221 M_LLD(var->regoff, REG_SP, (stackframesize + s1) * 8);
223 } else { /* stack arg -> spilled */
224 var->regoff = stackframesize + s1;
228 } else { /* floating args */
229 if (!md->params[p].inmemory) { /* register arguments */
230 s2 = rd->argfltregs[s1];
231 if (!(var->flags & INMEMORY)) { /* reg arg -> register */
232 M_FLTMOVE(s2, var->regoff);
234 } else { /* reg arg -> spilled */
235 M_DST(s2, REG_SP, var->regoff * 8);
238 } else { /* stack arguments */
239 if (!(var->flags & INMEMORY)) { /* stack-arg -> register */
240 M_DLD(var->regoff, REG_SP, (stackframesize + s1) * 8);
242 } else { /* stack-arg -> spilled */
243 var->regoff = stackframesize + s1;
249 /* call monitorenter function */
251 #if defined(ENABLE_THREADS)
252 if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
253 /* stack offset for monitor argument */
258 if (opt_verbosecall) {
259 M_LDA(REG_SP, REG_SP, -(INT_ARG_CNT + FLT_ARG_CNT) * 8);
261 for (p = 0; p < INT_ARG_CNT; p++)
262 M_LST(rd->argintregs[p], REG_SP, p * 8);
264 for (p = 0; p < FLT_ARG_CNT; p++)
265 M_DST(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
267 s1 += INT_ARG_CNT + FLT_ARG_CNT;
269 #endif /* !defined(NDEBUG) */
271 /* decide which monitor enter function to call */
273 if (m->flags & ACC_STATIC) {
274 disp = dseg_addaddress(cd, &m->class->object.header);
275 M_ALD(rd->argintregs[0], REG_PV, disp);
278 M_BEQZ(rd->argintregs[0], 0);
279 codegen_add_nullpointerexception_ref(cd);
282 M_AST(rd->argintregs[0], REG_SP, s1 * 8);
283 disp = dseg_addaddress(cd, LOCK_monitor_enter);
284 M_ALD(REG_PV, REG_PV, disp);
285 M_JSR(REG_RA, REG_PV);
286 disp = (s4) (cd->mcodeptr - cd->mcodebase);
287 M_LDA(REG_PV, REG_RA, -disp);
290 if (opt_verbosecall) {
291 for (p = 0; p < INT_ARG_CNT; p++)
292 M_LLD(rd->argintregs[p], REG_SP, p * 8);
294 for (p = 0; p < FLT_ARG_CNT; p++)
295 M_DLD(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
297 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT) * 8);
299 #endif /* !defined(NDEBUG) */
303 /* call trace function */
306 if (opt_verbosecall) {
307 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
308 M_AST(REG_RA, REG_SP, 1 * 8);
310 /* save integer argument registers */
312 for (p = 0; p < md->paramcount && p < INT_ARG_CNT; p++)
313 M_LST(rd->argintregs[p], REG_SP, (2 + p) * 8);
315 /* save and copy float arguments into integer registers */
317 for (p = 0; p < md->paramcount && p < FLT_ARG_CNT; p++) {
318 t = md->paramtypes[p].type;
320 if (IS_FLT_DBL_TYPE(t)) {
321 if (IS_2_WORD_TYPE(t)) {
322 M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
325 M_FST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
328 M_LLD(rd->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
331 M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
335 disp = dseg_addaddress(cd, m);
336 M_ALD(REG_ITMP1, REG_PV, disp);
337 M_AST(REG_ITMP1, REG_SP, 0 * 8);
338 disp = dseg_addaddress(cd, (void *) builtin_trace_args);
339 M_ALD(REG_PV, REG_PV, disp);
340 M_JSR(REG_RA, REG_PV);
341 disp = (s4) (cd->mcodeptr - cd->mcodebase);
342 M_LDA(REG_PV, REG_RA, -disp);
343 M_ALD(REG_RA, REG_SP, 1 * 8);
345 /* restore integer argument registers */
347 for (p = 0; p < md->paramcount && p < INT_ARG_CNT; p++)
348 M_LLD(rd->argintregs[p], REG_SP, (2 + p) * 8);
350 /* restore float argument registers */
352 for (p = 0; p < md->paramcount && p < FLT_ARG_CNT; p++) {
353 t = md->paramtypes[p].type;
355 if (IS_FLT_DBL_TYPE(t)) {
356 if (IS_2_WORD_TYPE(t)) {
357 M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
360 M_FLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
364 M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
368 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
370 #endif /* !defined(NDEBUG) */
374 /* end of header generation */
376 replacementpoint = jd->code->rplpoints;
378 /* walk through all basic blocks */
380 for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
382 bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase);
384 if (bptr->flags >= BBREACHED) {
386 /* branch resolving */
390 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
391 gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
392 brefs->branchpos, bptr->mpc);
396 /* handle replacement points */
398 if (bptr->bitflags & BBFLAG_REPLACEMENT) {
399 replacementpoint->pc = (u1*)(ptrint)bptr->mpc; /* will be resolved later */
404 /* copy interface registers to their destination */
409 #if defined(ENABLE_LSRA)
411 while (src != NULL) {
413 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
414 /* d = reg_of_var(m, src, REG_ITMP1); */
415 if (!(src->flags & INMEMORY))
419 M_INTMOVE(REG_ITMP1, d);
420 emit_store(jd, NULL, src, d);
426 while (src != NULL) {
428 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
429 d = codegen_reg_of_var(rd, 0, src, REG_ITMP1);
430 M_INTMOVE(REG_ITMP1, d);
431 emit_store(jd, NULL, src, d);
434 d = codegen_reg_of_var(rd, 0, src, REG_IFTMP);
435 if ((src->varkind != STACKVAR)) {
437 if (IS_FLT_DBL_TYPE(s2)) {
438 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
439 s1 = rd->interfaces[len][s2].regoff;
442 M_DLD(d, REG_SP, rd->interfaces[len][s2].regoff * 8);
444 emit_store(jd, NULL, src, d);
447 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
448 s1 = rd->interfaces[len][s2].regoff;
451 M_LLD(d, REG_SP, rd->interfaces[len][s2].regoff * 8);
453 emit_store(jd, NULL, src, d);
459 #if defined(ENABLE_LSRA)
463 /* walk through all instructions */
468 for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) {
469 if (iptr->line != currentline) {
470 dseg_addlinenumber(cd, iptr->line);
471 currentline = iptr->line;
474 MCODECHECK(64); /* an instruction usually needs < 64 words */
477 case ICMD_INLINE_START:
478 case ICMD_INLINE_END:
481 case ICMD_NOP: /* ... ==> ... */
484 case ICMD_CHECKNULL: /* ..., objectref ==> ..., objectref */
486 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
488 codegen_add_nullpointerexception_ref(cd);
491 /* constant operations ************************************************/
493 case ICMD_ICONST: /* ... ==> ..., constant */
494 /* op1 = 0, val.i = constant */
496 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
497 ICONST(d, iptr->val.i);
498 emit_store(jd, iptr, iptr->dst, d);
501 case ICMD_LCONST: /* ... ==> ..., constant */
502 /* op1 = 0, val.l = constant */
504 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
505 LCONST(d, iptr->val.l);
506 emit_store(jd, iptr, iptr->dst, d);
509 case ICMD_FCONST: /* ... ==> ..., constant */
510 /* op1 = 0, val.f = constant */
512 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
513 disp = dseg_addfloat(cd, iptr->val.f);
514 M_FLD(d, REG_PV, disp);
515 emit_store(jd, iptr, iptr->dst, d);
518 case ICMD_DCONST: /* ... ==> ..., constant */
519 /* op1 = 0, val.d = constant */
521 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
522 disp = dseg_adddouble(cd, iptr->val.d);
523 M_DLD(d, REG_PV, disp);
524 emit_store(jd, iptr, iptr->dst, d);
527 case ICMD_ACONST: /* ... ==> ..., constant */
528 /* op1 = 0, val.a = constant */
530 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
532 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
533 disp = dseg_addaddress(cd, NULL);
535 codegen_addpatchref(cd, PATCHER_aconst,
536 ICMD_ACONST_UNRESOLVED_CLASSREF(iptr),
539 if (opt_showdisassemble)
542 M_ALD(d, REG_PV, disp);
545 if (iptr->val.a == NULL) {
546 M_INTMOVE(REG_ZERO, d);
548 disp = dseg_addaddress(cd, iptr->val.a);
549 M_ALD(d, REG_PV, disp);
552 emit_store(jd, iptr, iptr->dst, d);
556 /* load/store operations **********************************************/
558 case ICMD_ILOAD: /* ... ==> ..., content of local variable */
559 case ICMD_LLOAD: /* op1 = local variable */
562 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
563 if ((iptr->dst->varkind == LOCALVAR) &&
564 (iptr->dst->varnum == iptr->op1))
566 var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
567 if (var->flags & INMEMORY) {
568 M_LLD(d, REG_SP, var->regoff * 8);
570 M_INTMOVE(var->regoff, d);
572 emit_store(jd, iptr, iptr->dst, d);
575 case ICMD_FLOAD: /* ... ==> ..., content of local variable */
576 case ICMD_DLOAD: /* op1 = local variable */
578 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
579 if ((iptr->dst->varkind == LOCALVAR) &&
580 (iptr->dst->varnum == iptr->op1))
582 var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
583 if (var->flags & INMEMORY) {
584 M_DLD(d, REG_SP, var->regoff * 8);
586 M_FLTMOVE(var->regoff, d);
588 emit_store(jd, iptr, iptr->dst, d);
592 case ICMD_ISTORE: /* ..., value ==> ... */
593 case ICMD_LSTORE: /* op1 = local variable */
596 if ((src->varkind == LOCALVAR) &&
597 (src->varnum == iptr->op1))
599 var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
600 if (var->flags & INMEMORY) {
601 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
602 M_LST(s1, REG_SP, var->regoff * 8);
604 s1 = emit_load_s1(jd, iptr, src, var->regoff);
605 M_INTMOVE(s1, var->regoff);
609 case ICMD_FSTORE: /* ..., value ==> ... */
610 case ICMD_DSTORE: /* op1 = local variable */
612 if ((src->varkind == LOCALVAR) &&
613 (src->varnum == iptr->op1))
615 var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
616 if (var->flags & INMEMORY) {
617 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
618 M_DST(s1, REG_SP, var->regoff * 8);
620 s1 = emit_load_s1(jd, iptr, src, var->regoff);
621 M_FLTMOVE(s1, var->regoff);
626 /* pop/dup/swap operations ********************************************/
628 /* attention: double and longs are only one entry in CACAO ICMDs */
630 case ICMD_POP: /* ..., value ==> ... */
631 case ICMD_POP2: /* ..., value, value ==> ... */
634 case ICMD_DUP: /* ..., a ==> ..., a, a */
635 M_COPY(src, iptr->dst);
638 case ICMD_DUP_X1: /* ..., a, b ==> ..., b, a, b */
640 M_COPY(src, iptr->dst);
641 M_COPY(src->prev, iptr->dst->prev);
642 M_COPY(iptr->dst, iptr->dst->prev->prev);
645 case ICMD_DUP_X2: /* ..., a, b, c ==> ..., c, a, b, c */
647 M_COPY(src, iptr->dst);
648 M_COPY(src->prev, iptr->dst->prev);
649 M_COPY(src->prev->prev, iptr->dst->prev->prev);
650 M_COPY(iptr->dst, iptr->dst->prev->prev->prev);
653 case ICMD_DUP2: /* ..., a, b ==> ..., a, b, a, b */
655 M_COPY(src, iptr->dst);
656 M_COPY(src->prev, iptr->dst->prev);
659 case ICMD_DUP2_X1: /* ..., a, b, c ==> ..., b, c, a, b, c */
661 M_COPY(src, iptr->dst);
662 M_COPY(src->prev, iptr->dst->prev);
663 M_COPY(src->prev->prev, iptr->dst->prev->prev);
664 M_COPY(iptr->dst, iptr->dst->prev->prev->prev);
665 M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
668 case ICMD_DUP2_X2: /* ..., a, b, c, d ==> ..., c, d, a, b, c, d */
670 M_COPY(src, iptr->dst);
671 M_COPY(src->prev, iptr->dst->prev);
672 M_COPY(src->prev->prev, iptr->dst->prev->prev);
673 M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
674 M_COPY(iptr->dst, iptr->dst->prev->prev->prev->prev);
675 M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev->prev);
678 case ICMD_SWAP: /* ..., a, b ==> ..., b, a */
680 M_COPY(src, iptr->dst->prev);
681 M_COPY(src->prev, iptr->dst);
685 /* integer operations *************************************************/
687 case ICMD_INEG: /* ..., value ==> ..., - value */
689 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
690 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
691 M_ISUB(REG_ZERO, s1, d);
692 emit_store(jd, iptr, iptr->dst, d);
695 case ICMD_LNEG: /* ..., value ==> ..., - value */
697 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
698 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
699 M_LSUB(REG_ZERO, s1, d);
700 emit_store(jd, iptr, iptr->dst, d);
703 case ICMD_I2L: /* ..., value ==> ..., value */
705 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
706 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
708 emit_store(jd, iptr, iptr->dst, d);
711 case ICMD_L2I: /* ..., value ==> ..., value */
713 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
714 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
715 M_IADD(s1, REG_ZERO, d);
716 emit_store(jd, iptr, iptr->dst, d);
719 case ICMD_INT2BYTE: /* ..., value ==> ..., value */
721 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
722 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
723 if (has_ext_instr_set) {
726 M_SLL_IMM(s1, 56, d);
727 M_SRA_IMM( d, 56, d);
729 emit_store(jd, iptr, iptr->dst, d);
732 case ICMD_INT2CHAR: /* ..., value ==> ..., value */
734 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
735 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
737 emit_store(jd, iptr, iptr->dst, d);
740 case ICMD_INT2SHORT: /* ..., value ==> ..., value */
742 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
743 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
744 if (has_ext_instr_set) {
747 M_SLL_IMM(s1, 48, d);
748 M_SRA_IMM( d, 48, d);
750 emit_store(jd, iptr, iptr->dst, d);
754 case ICMD_IADD: /* ..., val1, val2 ==> ..., val1 + val2 */
756 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
757 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
758 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
760 emit_store(jd, iptr, iptr->dst, d);
763 case ICMD_IADDCONST: /* ..., value ==> ..., value + constant */
764 /* val.i = constant */
766 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
767 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
768 if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
769 M_IADD_IMM(s1, iptr->val.i, d);
771 ICONST(REG_ITMP2, iptr->val.i);
772 M_IADD(s1, REG_ITMP2, d);
774 emit_store(jd, iptr, iptr->dst, d);
777 case ICMD_LADD: /* ..., val1, val2 ==> ..., val1 + val2 */
779 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
780 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
781 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
783 emit_store(jd, iptr, iptr->dst, d);
786 case ICMD_LADDCONST: /* ..., value ==> ..., value + constant */
787 /* val.l = constant */
789 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
790 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
791 if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
792 M_LADD_IMM(s1, iptr->val.l, d);
794 LCONST(REG_ITMP2, iptr->val.l);
795 M_LADD(s1, REG_ITMP2, d);
797 emit_store(jd, iptr, iptr->dst, d);
800 case ICMD_ISUB: /* ..., val1, val2 ==> ..., val1 - val2 */
802 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
803 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
804 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
806 emit_store(jd, iptr, iptr->dst, d);
809 case ICMD_ISUBCONST: /* ..., value ==> ..., value + constant */
810 /* val.i = constant */
812 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
813 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
814 if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
815 M_ISUB_IMM(s1, iptr->val.i, d);
817 ICONST(REG_ITMP2, iptr->val.i);
818 M_ISUB(s1, REG_ITMP2, d);
820 emit_store(jd, iptr, iptr->dst, d);
823 case ICMD_LSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
825 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
826 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
827 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
829 emit_store(jd, iptr, iptr->dst, d);
832 case ICMD_LSUBCONST: /* ..., value ==> ..., value - constant */
833 /* val.l = constant */
835 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
836 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
837 if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
838 M_LSUB_IMM(s1, iptr->val.l, d);
840 LCONST(REG_ITMP2, iptr->val.l);
841 M_LSUB(s1, REG_ITMP2, d);
843 emit_store(jd, iptr, iptr->dst, d);
846 case ICMD_IMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
848 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
849 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
850 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
852 emit_store(jd, iptr, iptr->dst, d);
855 case ICMD_IMULCONST: /* ..., value ==> ..., value * constant */
856 /* val.i = constant */
858 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
859 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
860 if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
861 M_IMUL_IMM(s1, iptr->val.i, d);
863 ICONST(REG_ITMP2, iptr->val.i);
864 M_IMUL(s1, REG_ITMP2, d);
866 emit_store(jd, iptr, iptr->dst, d);
869 case ICMD_LMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
871 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
872 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
873 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
875 emit_store(jd, iptr, iptr->dst, d);
878 case ICMD_LMULCONST: /* ..., value ==> ..., value * constant */
879 /* val.l = constant */
881 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
882 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
883 if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
884 M_LMUL_IMM(s1, iptr->val.l, d);
886 LCONST(REG_ITMP2, iptr->val.l);
887 M_LMUL(s1, REG_ITMP2, d);
889 emit_store(jd, iptr, iptr->dst, d);
892 case ICMD_IDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
893 case ICMD_IREM: /* ..., val1, val2 ==> ..., val1 % val2 */
895 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
896 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
897 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_RESULT);
899 codegen_add_arithmeticexception_ref(cd);
901 M_MOV(s1, rd->argintregs[0]);
902 M_MOV(s2, rd->argintregs[1]);
904 disp = dseg_addaddress(cd, bte->fp);
905 M_ALD(REG_PV, REG_PV, disp);
906 M_JSR(REG_RA, REG_PV);
907 disp = (s4) (cd->mcodeptr - cd->mcodebase);
908 M_LDA(REG_PV, REG_RA, -disp);
910 M_IADD(REG_RESULT, REG_ZERO, d); /* sign extend (bugfix for gcc -O2) */
911 emit_store(jd, iptr, iptr->dst, d);
914 case ICMD_LDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
915 case ICMD_LREM: /* ..., val1, val2 ==> ..., val1 % val2 */
917 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
918 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
919 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_RESULT);
921 codegen_add_arithmeticexception_ref(cd);
923 M_MOV(s1, rd->argintregs[0]);
924 M_MOV(s2, rd->argintregs[1]);
926 disp = dseg_addaddress(cd, bte->fp);
927 M_ALD(REG_PV, REG_PV, disp);
928 M_JSR(REG_RA, REG_PV);
929 disp = (s4) (cd->mcodeptr - cd->mcodebase);
930 M_LDA(REG_PV, REG_RA, -disp);
932 M_INTMOVE(REG_RESULT, d);
933 emit_store(jd, iptr, iptr->dst, d);
936 case ICMD_IDIVPOW2: /* ..., value ==> ..., value << constant */
937 case ICMD_LDIVPOW2: /* val.i = constant */
939 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
940 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
941 if (iptr->val.i <= 15) {
942 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
943 M_CMOVGE(s1, s1, REG_ITMP2);
945 M_SRA_IMM(s1, 63, REG_ITMP2);
946 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
947 M_LADD(s1, REG_ITMP2, REG_ITMP2);
949 M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
950 emit_store(jd, iptr, iptr->dst, d);
953 case ICMD_ISHL: /* ..., val1, val2 ==> ..., val1 << val2 */
955 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
956 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
957 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
958 M_AND_IMM(s2, 0x1f, REG_ITMP3);
959 M_SLL(s1, REG_ITMP3, d);
960 M_IADD(d, REG_ZERO, d);
961 emit_store(jd, iptr, iptr->dst, d);
964 case ICMD_ISHLCONST: /* ..., value ==> ..., value << constant */
965 /* val.i = constant */
967 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
968 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
969 M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
970 M_IADD(d, REG_ZERO, d);
971 emit_store(jd, iptr, iptr->dst, d);
974 case ICMD_ISHR: /* ..., val1, val2 ==> ..., val1 >> val2 */
976 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
977 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
978 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
979 M_AND_IMM(s2, 0x1f, REG_ITMP3);
980 M_SRA(s1, REG_ITMP3, d);
981 emit_store(jd, iptr, iptr->dst, d);
984 case ICMD_ISHRCONST: /* ..., value ==> ..., value >> constant */
985 /* val.i = constant */
987 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
988 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
989 M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
990 emit_store(jd, iptr, iptr->dst, d);
993 case ICMD_IUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */
995 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
996 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
997 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
998 M_AND_IMM(s2, 0x1f, REG_ITMP2);
1000 M_SRL(d, REG_ITMP2, d);
1001 M_IADD(d, REG_ZERO, d);
1002 emit_store(jd, iptr, iptr->dst, d);
1005 case ICMD_IUSHRCONST: /* ..., value ==> ..., value >>> constant */
1006 /* val.i = constant */
1008 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1009 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1011 M_SRL_IMM(d, iptr->val.i & 0x1f, d);
1012 M_IADD(d, REG_ZERO, d);
1013 emit_store(jd, iptr, iptr->dst, d);
1016 case ICMD_LSHL: /* ..., val1, val2 ==> ..., val1 << val2 */
1018 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1019 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1020 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1022 emit_store(jd, iptr, iptr->dst, d);
1025 case ICMD_LSHLCONST: /* ..., value ==> ..., value << constant */
1026 /* val.i = constant */
1028 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1029 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1030 M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
1031 emit_store(jd, iptr, iptr->dst, d);
1034 case ICMD_LSHR: /* ..., val1, val2 ==> ..., val1 >> val2 */
1036 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1037 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1038 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1040 emit_store(jd, iptr, iptr->dst, d);
1043 case ICMD_LSHRCONST: /* ..., value ==> ..., value >> constant */
1044 /* val.i = constant */
1046 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1047 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1048 M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
1049 emit_store(jd, iptr, iptr->dst, d);
1052 case ICMD_LUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */
1054 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1055 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1056 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1058 emit_store(jd, iptr, iptr->dst, d);
1061 case ICMD_LUSHRCONST: /* ..., value ==> ..., value >>> constant */
1062 /* val.i = constant */
1064 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1065 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1066 M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
1067 emit_store(jd, iptr, iptr->dst, d);
1070 case ICMD_IAND: /* ..., val1, val2 ==> ..., val1 & val2 */
1073 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1074 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1075 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1077 emit_store(jd, iptr, iptr->dst, d);
1080 case ICMD_IANDCONST: /* ..., value ==> ..., value & constant */
1081 /* val.i = constant */
1083 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1084 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1085 if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1086 M_AND_IMM(s1, iptr->val.i, d);
1087 } else if (iptr->val.i == 0xffff) {
1089 } else if (iptr->val.i == 0xffffff) {
1090 M_ZAPNOT_IMM(s1, 0x07, d);
1092 ICONST(REG_ITMP2, iptr->val.i);
1093 M_AND(s1, REG_ITMP2, d);
1095 emit_store(jd, iptr, iptr->dst, d);
1098 case ICMD_IREMPOW2: /* ..., value ==> ..., value % constant */
1099 /* val.i = constant */
1101 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1102 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1104 M_MOV(s1, REG_ITMP1);
1107 if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1108 M_AND_IMM(s1, iptr->val.i, d);
1110 M_ISUB(REG_ZERO, s1, d);
1111 M_AND_IMM(d, iptr->val.i, d);
1112 } else if (iptr->val.i == 0xffff) {
1115 M_ISUB(REG_ZERO, s1, d);
1117 } else if (iptr->val.i == 0xffffff) {
1118 M_ZAPNOT_IMM(s1, 0x07, d);
1120 M_ISUB(REG_ZERO, s1, d);
1121 M_ZAPNOT_IMM(d, 0x07, d);
1123 ICONST(REG_ITMP2, iptr->val.i);
1124 M_AND(s1, REG_ITMP2, d);
1126 M_ISUB(REG_ZERO, s1, d);
1127 M_AND(d, REG_ITMP2, d);
1129 M_ISUB(REG_ZERO, d, d);
1130 emit_store(jd, iptr, iptr->dst, d);
1133 case ICMD_LANDCONST: /* ..., value ==> ..., value & constant */
1134 /* val.l = constant */
1136 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1137 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1138 if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1139 M_AND_IMM(s1, iptr->val.l, d);
1140 } else if (iptr->val.l == 0xffffL) {
1142 } else if (iptr->val.l == 0xffffffL) {
1143 M_ZAPNOT_IMM(s1, 0x07, d);
1144 } else if (iptr->val.l == 0xffffffffL) {
1146 } else if (iptr->val.l == 0xffffffffffL) {
1147 M_ZAPNOT_IMM(s1, 0x1f, d);
1148 } else if (iptr->val.l == 0xffffffffffffL) {
1149 M_ZAPNOT_IMM(s1, 0x3f, d);
1150 } else if (iptr->val.l == 0xffffffffffffffL) {
1151 M_ZAPNOT_IMM(s1, 0x7f, d);
1153 LCONST(REG_ITMP2, iptr->val.l);
1154 M_AND(s1, REG_ITMP2, d);
1156 emit_store(jd, iptr, iptr->dst, d);
1159 case ICMD_LREMPOW2: /* ..., value ==> ..., value % constant */
1160 /* val.l = constant */
1162 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1163 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1165 M_MOV(s1, REG_ITMP1);
1168 if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1169 M_AND_IMM(s1, iptr->val.l, d);
1171 M_LSUB(REG_ZERO, s1, d);
1172 M_AND_IMM(d, iptr->val.l, d);
1173 } else if (iptr->val.l == 0xffffL) {
1176 M_LSUB(REG_ZERO, s1, d);
1178 } else if (iptr->val.l == 0xffffffL) {
1179 M_ZAPNOT_IMM(s1, 0x07, d);
1181 M_LSUB(REG_ZERO, s1, d);
1182 M_ZAPNOT_IMM(d, 0x07, d);
1183 } else if (iptr->val.l == 0xffffffffL) {
1186 M_LSUB(REG_ZERO, s1, d);
1188 } else if (iptr->val.l == 0xffffffffffL) {
1189 M_ZAPNOT_IMM(s1, 0x1f, d);
1191 M_LSUB(REG_ZERO, s1, d);
1192 M_ZAPNOT_IMM(d, 0x1f, d);
1193 } else if (iptr->val.l == 0xffffffffffffL) {
1194 M_ZAPNOT_IMM(s1, 0x3f, d);
1196 M_LSUB(REG_ZERO, s1, d);
1197 M_ZAPNOT_IMM(d, 0x3f, d);
1198 } else if (iptr->val.l == 0xffffffffffffffL) {
1199 M_ZAPNOT_IMM(s1, 0x7f, d);
1201 M_LSUB(REG_ZERO, s1, d);
1202 M_ZAPNOT_IMM(d, 0x7f, d);
1204 LCONST(REG_ITMP2, iptr->val.l);
1205 M_AND(s1, REG_ITMP2, d);
1207 M_LSUB(REG_ZERO, s1, d);
1208 M_AND(d, REG_ITMP2, d);
1210 M_LSUB(REG_ZERO, d, d);
1211 emit_store(jd, iptr, iptr->dst, d);
1214 case ICMD_IOR: /* ..., val1, val2 ==> ..., val1 | val2 */
1217 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1218 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1219 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1221 emit_store(jd, iptr, iptr->dst, d);
1224 case ICMD_IORCONST: /* ..., value ==> ..., value | constant */
1225 /* val.i = constant */
1227 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1228 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1229 if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1230 M_OR_IMM(s1, iptr->val.i, d);
1232 ICONST(REG_ITMP2, iptr->val.i);
1233 M_OR(s1, REG_ITMP2, d);
1235 emit_store(jd, iptr, iptr->dst, d);
1238 case ICMD_LORCONST: /* ..., value ==> ..., value | constant */
1239 /* val.l = constant */
1241 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1242 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1243 if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1244 M_OR_IMM(s1, iptr->val.l, d);
1246 LCONST(REG_ITMP2, iptr->val.l);
1247 M_OR(s1, REG_ITMP2, d);
1249 emit_store(jd, iptr, iptr->dst, d);
1252 case ICMD_IXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
1255 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1256 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1257 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1259 emit_store(jd, iptr, iptr->dst, d);
1262 case ICMD_IXORCONST: /* ..., value ==> ..., value ^ constant */
1263 /* val.i = constant */
1265 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1266 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1267 if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1268 M_XOR_IMM(s1, iptr->val.i, d);
1270 ICONST(REG_ITMP2, iptr->val.i);
1271 M_XOR(s1, REG_ITMP2, d);
1273 emit_store(jd, iptr, iptr->dst, d);
1276 case ICMD_LXORCONST: /* ..., value ==> ..., value ^ constant */
1277 /* val.l = constant */
1279 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1280 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1281 if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1282 M_XOR_IMM(s1, iptr->val.l, d);
1284 LCONST(REG_ITMP2, iptr->val.l);
1285 M_XOR(s1, REG_ITMP2, d);
1287 emit_store(jd, iptr, iptr->dst, d);
1291 case ICMD_LCMP: /* ..., val1, val2 ==> ..., val1 cmp val2 */
1293 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1294 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1295 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1296 M_CMPLT(s1, s2, REG_ITMP3);
1297 M_CMPLT(s2, s1, REG_ITMP1);
1298 M_LSUB(REG_ITMP1, REG_ITMP3, d);
1299 emit_store(jd, iptr, iptr->dst, d);
1303 case ICMD_IINC: /* ..., value ==> ..., value + constant */
1304 /* op1 = variable, val.i = constant */
1306 var = &(rd->locals[iptr->op1][TYPE_INT]);
1307 if (var->flags & INMEMORY) {
1309 M_LLD(s1, REG_SP, var->regoff * 8);
1312 if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1313 M_IADD_IMM(s1, iptr->val.i, s1);
1314 } else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1315 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1317 M_LDA (s1, s1, iptr->val.i);
1318 M_IADD(s1, REG_ZERO, s1);
1320 if (var->flags & INMEMORY)
1321 M_LST(s1, REG_SP, var->regoff * 8);
1325 /* floating operations ************************************************/
1327 case ICMD_FNEG: /* ..., value ==> ..., - value */
1329 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1330 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP2);
1332 emit_store(jd, iptr, iptr->dst, d);
1335 case ICMD_DNEG: /* ..., value ==> ..., - value */
1337 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1338 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP2);
1340 emit_store(jd, iptr, iptr->dst, d);
1343 case ICMD_FADD: /* ..., val1, val2 ==> ..., val1 + val2 */
1345 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1346 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1347 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1351 if (d == s1 || d == s2) {
1352 M_FADDS(s1, s2, REG_FTMP3);
1354 M_FMOV(REG_FTMP3, d);
1360 emit_store(jd, iptr, iptr->dst, d);
1363 case ICMD_DADD: /* ..., val1, val2 ==> ..., val1 + val2 */
1365 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1366 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1367 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1371 if (d == s1 || d == s2) {
1372 M_DADDS(s1, s2, REG_FTMP3);
1374 M_FMOV(REG_FTMP3, d);
1380 emit_store(jd, iptr, iptr->dst, d);
1383 case ICMD_FSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
1385 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1386 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1387 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1391 if (d == s1 || d == s2) {
1392 M_FSUBS(s1, s2, REG_FTMP3);
1394 M_FMOV(REG_FTMP3, d);
1400 emit_store(jd, iptr, iptr->dst, d);
1403 case ICMD_DSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
1405 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1406 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1407 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1411 if (d == s1 || d == s2) {
1412 M_DSUBS(s1, s2, REG_FTMP3);
1414 M_FMOV(REG_FTMP3, d);
1420 emit_store(jd, iptr, iptr->dst, d);
1423 case ICMD_FMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
1425 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1426 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1427 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1431 if (d == s1 || d == s2) {
1432 M_FMULS(s1, s2, REG_FTMP3);
1434 M_FMOV(REG_FTMP3, d);
1440 emit_store(jd, iptr, iptr->dst, d);
1443 case ICMD_DMUL: /* ..., val1, val2 ==> ..., val1 *** val2 */
1445 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1446 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1447 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1451 if (d == s1 || d == s2) {
1452 M_DMULS(s1, s2, REG_FTMP3);
1454 M_FMOV(REG_FTMP3, d);
1460 emit_store(jd, iptr, iptr->dst, d);
1463 case ICMD_FDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
1465 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1466 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1467 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1471 if (d == s1 || d == s2) {
1472 M_FDIVS(s1, s2, REG_FTMP3);
1474 M_FMOV(REG_FTMP3, d);
1480 emit_store(jd, iptr, iptr->dst, d);
1483 case ICMD_DDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
1485 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1486 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1487 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1491 if (d == s1 || d == s2) {
1492 M_DDIVS(s1, s2, REG_FTMP3);
1494 M_FMOV(REG_FTMP3, d);
1500 emit_store(jd, iptr, iptr->dst, d);
1503 case ICMD_I2F: /* ..., value ==> ..., (float) value */
1505 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1506 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1507 disp = dseg_adddouble(cd, 0.0);
1508 M_LST(s1, REG_PV, disp);
1509 M_DLD(d, REG_PV, disp);
1511 emit_store(jd, iptr, iptr->dst, d);
1514 case ICMD_I2D: /* ..., value ==> ..., (double) value */
1516 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1517 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1518 disp = dseg_adddouble(cd, 0.0);
1519 M_LST(s1, REG_PV, disp);
1520 M_DLD(d, REG_PV, disp);
1522 emit_store(jd, iptr, iptr->dst, d);
1525 case ICMD_F2I: /* ..., value ==> ..., (int) value */
1527 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1528 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3);
1529 disp = dseg_adddouble(cd, 0.0);
1530 M_CVTDL_C(s1, REG_FTMP2);
1531 M_CVTLI(REG_FTMP2, REG_FTMP3);
1532 M_DST(REG_FTMP3, REG_PV, disp);
1533 M_ILD(d, REG_PV, disp);
1534 emit_store(jd, iptr, iptr->dst, d);
1537 case ICMD_F2L: /* ..., value ==> ..., (long) value */
1539 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1540 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3);
1541 disp = dseg_adddouble(cd, 0.0);
1542 M_CVTDL_C(s1, REG_FTMP2);
1543 M_DST(REG_FTMP2, REG_PV, disp);
1544 M_LLD(d, REG_PV, disp);
1545 emit_store(jd, iptr, iptr->dst, d);
1548 case ICMD_F2D: /* ..., value ==> ..., (double) value */
1550 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1551 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1554 emit_store(jd, iptr, iptr->dst, d);
1557 case ICMD_D2F: /* ..., value ==> ..., (float) value */
1559 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1560 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1567 emit_store(jd, iptr, iptr->dst, d);
1570 case ICMD_FCMPL: /* ..., val1, val2 ==> ..., val1 fcmpl val2 */
1572 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1573 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1574 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3);
1576 M_LSUB_IMM(REG_ZERO, 1, d);
1577 M_FCMPEQ(s1, s2, REG_FTMP3);
1578 M_FBEQZ (REG_FTMP3, 1); /* jump over next instructions */
1580 M_FCMPLT(s2, s1, REG_FTMP3);
1581 M_FBEQZ (REG_FTMP3, 1); /* jump over next instruction */
1582 M_LADD_IMM(REG_ZERO, 1, d);
1584 M_LSUB_IMM(REG_ZERO, 1, d);
1585 M_FCMPEQS(s1, s2, REG_FTMP3);
1587 M_FBEQZ (REG_FTMP3, 1); /* jump over next instructions */
1589 M_FCMPLTS(s2, s1, REG_FTMP3);
1591 M_FBEQZ (REG_FTMP3, 1); /* jump over next instruction */
1592 M_LADD_IMM(REG_ZERO, 1, d);
1594 emit_store(jd, iptr, iptr->dst, d);
1597 case ICMD_FCMPG: /* ..., val1, val2 ==> ..., val1 fcmpg val2 */
1599 s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1600 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1601 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3);
1603 M_LADD_IMM(REG_ZERO, 1, d);
1604 M_FCMPEQ(s1, s2, REG_FTMP3);
1605 M_FBEQZ (REG_FTMP3, 1); /* jump over next instruction */
1607 M_FCMPLT(s1, s2, REG_FTMP3);
1608 M_FBEQZ (REG_FTMP3, 1); /* jump over next instruction */
1609 M_LSUB_IMM(REG_ZERO, 1, d);
1611 M_LADD_IMM(REG_ZERO, 1, d);
1612 M_FCMPEQS(s1, s2, REG_FTMP3);
1614 M_FBEQZ (REG_FTMP3, 1); /* jump over next instruction */
1616 M_FCMPLTS(s1, s2, REG_FTMP3);
1618 M_FBEQZ (REG_FTMP3, 1); /* jump over next instruction */
1619 M_LSUB_IMM(REG_ZERO, 1, d);
1621 emit_store(jd, iptr, iptr->dst, d);
1625 /* memory operations **************************************************/
1627 case ICMD_ARRAYLENGTH: /* ..., arrayref ==> ..., length */
1629 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1630 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1631 gen_nullptr_check(s1);
1632 M_ILD(d, s1, OFFSET(java_arrayheader, size));
1633 emit_store(jd, iptr, iptr->dst, d);
1636 case ICMD_BALOAD: /* ..., arrayref, index ==> ..., value */
1638 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1639 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1640 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1641 if (iptr->op1 == 0) {
1642 gen_nullptr_check(s1);
1645 if (has_ext_instr_set) {
1646 M_LADD (s2, s1, REG_ITMP1);
1647 M_BLDU (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
1650 M_LADD(s2, s1, REG_ITMP1);
1651 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1652 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
1653 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1654 M_SRA_IMM(d, 56, d);
1656 emit_store(jd, iptr, iptr->dst, d);
1659 case ICMD_CALOAD: /* ..., arrayref, index ==> ..., value */
1661 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1662 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1663 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1664 if (iptr->op1 == 0) {
1665 gen_nullptr_check(s1);
1668 if (has_ext_instr_set) {
1669 M_LADD(s2, s1, REG_ITMP1);
1670 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1671 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1673 M_LADD (s2, s1, REG_ITMP1);
1674 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1675 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1676 M_LDA (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1677 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
1679 emit_store(jd, iptr, iptr->dst, d);
1682 case ICMD_SALOAD: /* ..., arrayref, index ==> ..., value */
1684 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1685 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1686 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1687 if (iptr->op1 == 0) {
1688 gen_nullptr_check(s1);
1691 if (has_ext_instr_set) {
1692 M_LADD(s2, s1, REG_ITMP1);
1693 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1694 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
1697 M_LADD(s2, s1, REG_ITMP1);
1698 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1699 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1700 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
1701 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1702 M_SRA_IMM(d, 48, d);
1704 emit_store(jd, iptr, iptr->dst, d);
1707 case ICMD_IALOAD: /* ..., arrayref, index ==> ..., value */
1709 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1710 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1711 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1712 if (iptr->op1 == 0) {
1713 gen_nullptr_check(s1);
1716 M_S4ADDQ(s2, s1, REG_ITMP1);
1717 M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1718 emit_store(jd, iptr, iptr->dst, d);
1721 case ICMD_LALOAD: /* ..., arrayref, index ==> ..., value */
1723 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1724 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1725 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1726 if (iptr->op1 == 0) {
1727 gen_nullptr_check(s1);
1730 M_S8ADDQ(s2, s1, REG_ITMP1);
1731 M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1732 emit_store(jd, iptr, iptr->dst, d);
1735 case ICMD_FALOAD: /* ..., arrayref, index ==> ..., value */
1737 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1738 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1739 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP2);
1740 if (iptr->op1 == 0) {
1741 gen_nullptr_check(s1);
1744 M_S4ADDQ(s2, s1, REG_ITMP1);
1745 M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1746 emit_store(jd, iptr, iptr->dst, d);
1749 case ICMD_DALOAD: /* ..., arrayref, index ==> ..., value */
1751 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1752 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1753 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP2);
1754 if (iptr->op1 == 0) {
1755 gen_nullptr_check(s1);
1758 M_S8ADDQ(s2, s1, REG_ITMP1);
1759 M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1760 emit_store(jd, iptr, iptr->dst, d);
1763 case ICMD_AALOAD: /* ..., arrayref, index ==> ..., value */
1765 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1766 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1767 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1768 if (iptr->op1 == 0) {
1769 gen_nullptr_check(s1);
1772 M_SAADDQ(s2, s1, REG_ITMP1);
1773 M_ALD(d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1774 emit_store(jd, iptr, iptr->dst, d);
1778 case ICMD_BASTORE: /* ..., arrayref, index, value ==> ... */
1780 s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1781 s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1782 if (iptr->op1 == 0) {
1783 gen_nullptr_check(s1);
1786 s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1787 if (has_ext_instr_set) {
1788 M_LADD(s2, s1, REG_ITMP1);
1789 M_BST(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1791 M_LADD(s2, s1, REG_ITMP1);
1792 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1793 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1794 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
1795 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1796 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1797 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1801 case ICMD_CASTORE: /* ..., arrayref, index, value ==> ... */
1803 s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1804 s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1805 if (iptr->op1 == 0) {
1806 gen_nullptr_check(s1);
1809 s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1810 if (has_ext_instr_set) {
1811 M_LADD(s2, s1, REG_ITMP1);
1812 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1813 M_SST(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1815 M_LADD(s2, s1, REG_ITMP1);
1816 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1817 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1818 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1819 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1820 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1821 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1822 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1826 case ICMD_SASTORE: /* ..., arrayref, index, value ==> ... */
1828 s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1829 s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1830 if (iptr->op1 == 0) {
1831 gen_nullptr_check(s1);
1834 s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1835 if (has_ext_instr_set) {
1836 M_LADD(s2, s1, REG_ITMP1);
1837 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1838 M_SST(s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1840 M_LADD(s2, s1, REG_ITMP1);
1841 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1842 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1843 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1844 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1845 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1846 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1847 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1851 case ICMD_IASTORE: /* ..., arrayref, index, value ==> ... */
1853 s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1854 s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1855 if (iptr->op1 == 0) {
1856 gen_nullptr_check(s1);
1859 s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1860 M_S4ADDQ(s2, s1, REG_ITMP1);
1861 M_IST(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1864 case ICMD_LASTORE: /* ..., arrayref, index, value ==> ... */
1866 s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1867 s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1868 if (iptr->op1 == 0) {
1869 gen_nullptr_check(s1);
1872 s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1873 M_S8ADDQ(s2, s1, REG_ITMP1);
1874 M_LST(s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1877 case ICMD_FASTORE: /* ..., arrayref, index, value ==> ... */
1879 s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1880 s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1881 if (iptr->op1 == 0) {
1882 gen_nullptr_check(s1);
1885 s3 = emit_load_s3(jd, iptr, src, REG_FTMP3);
1886 M_S4ADDQ(s2, s1, REG_ITMP1);
1887 M_FST(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1890 case ICMD_DASTORE: /* ..., arrayref, index, value ==> ... */
1892 s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1893 s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1894 if (iptr->op1 == 0) {
1895 gen_nullptr_check(s1);
1898 s3 = emit_load_s3(jd, iptr, src, REG_FTMP3);
1899 M_S8ADDQ(s2, s1, REG_ITMP1);
1900 M_DST(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1903 case ICMD_AASTORE: /* ..., arrayref, index, value ==> ... */
1905 s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1906 s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1907 if (iptr->op1 == 0) {
1908 gen_nullptr_check(s1);
1911 s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1913 M_MOV(s1, rd->argintregs[0]);
1914 M_MOV(s3, rd->argintregs[1]);
1915 disp = dseg_addaddress(cd, BUILTIN_canstore);
1916 M_ALD(REG_PV, REG_PV, disp);
1917 M_JSR(REG_RA, REG_PV);
1918 disp = (s4) (cd->mcodeptr - cd->mcodebase);
1919 M_LDA(REG_PV, REG_RA, -disp);
1921 M_BEQZ(REG_RESULT, 0);
1922 codegen_add_arraystoreexception_ref(cd);
1924 s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1925 s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1926 s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1927 M_SAADDQ(s2, s1, REG_ITMP1);
1928 M_AST(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1932 case ICMD_IASTORECONST: /* ..., arrayref, index ==> ... */
1934 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1935 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1936 if (iptr->op1 == 0) {
1937 gen_nullptr_check(s1);
1940 M_S4ADDQ(s2, s1, REG_ITMP1);
1941 M_IST(REG_ZERO, REG_ITMP1, OFFSET(java_intarray, data[0]));
1944 case ICMD_LASTORECONST: /* ..., arrayref, index ==> ... */
1946 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1947 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1948 if (iptr->op1 == 0) {
1949 gen_nullptr_check(s1);
1952 M_S8ADDQ(s2, s1, REG_ITMP1);
1953 M_LST(REG_ZERO, REG_ITMP1, OFFSET(java_longarray, data[0]));
1956 case ICMD_AASTORECONST: /* ..., arrayref, index ==> ... */
1958 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1959 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1960 if (iptr->op1 == 0) {
1961 gen_nullptr_check(s1);
1964 M_SAADDQ(s2, s1, REG_ITMP1);
1965 M_AST(REG_ZERO, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1968 case ICMD_BASTORECONST: /* ..., arrayref, index ==> ... */
1970 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1971 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1972 if (iptr->op1 == 0) {
1973 gen_nullptr_check(s1);
1976 if (has_ext_instr_set) {
1977 M_LADD(s2, s1, REG_ITMP1);
1978 M_BST(REG_ZERO, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1981 M_LADD(s2, s1, REG_ITMP1);
1982 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1983 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1984 M_INSBL(REG_ZERO, REG_ITMP1, REG_ITMP3);
1985 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1986 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1987 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1991 case ICMD_CASTORECONST: /* ..., arrayref, index ==> ... */
1993 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1994 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1995 if (iptr->op1 == 0) {
1996 gen_nullptr_check(s1);
1999 if (has_ext_instr_set) {
2000 M_LADD(s2, s1, REG_ITMP1);
2001 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2002 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_chararray, data[0]));
2005 M_LADD(s2, s1, REG_ITMP1);
2006 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2007 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2008 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2009 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2010 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2011 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2012 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2016 case ICMD_SASTORECONST: /* ..., arrayref, index ==> ... */
2018 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2019 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2020 if (iptr->op1 == 0) {
2021 gen_nullptr_check(s1);
2024 if (has_ext_instr_set) {
2025 M_LADD(s2, s1, REG_ITMP1);
2026 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2027 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2030 M_LADD(s2, s1, REG_ITMP1);
2031 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2032 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2033 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2034 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2035 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2036 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2037 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2042 case ICMD_GETSTATIC: /* ... ==> ..., value */
2043 /* op1 = type, val.a = field address */
2045 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2046 disp = dseg_addaddress(cd, 0);
2048 codegen_addpatchref(cd, PATCHER_get_putstatic,
2049 INSTRUCTION_UNRESOLVED_FIELD(iptr), disp);
2051 if (opt_showdisassemble)
2056 fieldinfo *fi = INSTRUCTION_RESOLVED_FIELDINFO(iptr);
2058 disp = dseg_addaddress(cd, &(fi->value));
2060 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
2061 codegen_addpatchref(cd, PATCHER_clinit, fi->class, 0);
2063 if (opt_showdisassemble)
2068 M_ALD(REG_ITMP1, REG_PV, disp);
2069 switch (iptr->op1) {
2071 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2072 M_ILD(d, REG_ITMP1, 0);
2075 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2076 M_LLD(d, REG_ITMP1, 0);
2079 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2080 M_ALD(d, REG_ITMP1, 0);
2083 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
2084 M_FLD(d, REG_ITMP1, 0);
2087 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
2088 M_DLD(d, REG_ITMP1, 0);
2091 emit_store(jd, iptr, iptr->dst, d);
2094 case ICMD_PUTSTATIC: /* ..., value ==> ... */
2095 /* op1 = type, val.a = field address */
2097 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2098 disp = dseg_addaddress(cd, 0);
2100 codegen_addpatchref(cd, PATCHER_get_putstatic,
2101 INSTRUCTION_UNRESOLVED_FIELD(iptr), disp);
2103 if (opt_showdisassemble)
2107 fieldinfo *fi = INSTRUCTION_RESOLVED_FIELDINFO(iptr);
2109 disp = dseg_addaddress(cd, &(fi->value));
2111 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
2112 codegen_addpatchref(cd, PATCHER_clinit, fi->class, 0);
2114 if (opt_showdisassemble)
2119 M_ALD(REG_ITMP1, REG_PV, disp);
2120 switch (iptr->op1) {
2122 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2123 M_IST(s2, REG_ITMP1, 0);
2126 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2127 M_LST(s2, REG_ITMP1, 0);
2130 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2131 M_AST(s2, REG_ITMP1, 0);
2134 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
2135 M_FST(s2, REG_ITMP1, 0);
2138 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
2139 M_DST(s2, REG_ITMP1, 0);
2144 case ICMD_PUTSTATICCONST: /* ... ==> ... */
2145 /* val = value (in current instruction) */
2146 /* op1 = type, val.a = field address (in */
2147 /* following NOP) */
2149 if (INSTRUCTION_IS_UNRESOLVED(iptr + 1)) {
2150 disp = dseg_addaddress(cd, 0);
2152 codegen_addpatchref(cd, PATCHER_get_putstatic,
2153 INSTRUCTION_UNRESOLVED_FIELD(iptr + 1), disp);
2155 if (opt_showdisassemble)
2159 fieldinfo *fi = INSTRUCTION_RESOLVED_FIELDINFO(iptr + 1);
2161 disp = dseg_addaddress(cd, &(fi->value));
2163 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
2164 codegen_addpatchref(cd, PATCHER_clinit, fi->class, 0);
2166 if (opt_showdisassemble)
2171 M_ALD(REG_ITMP1, REG_PV, disp);
2172 switch (iptr->op1) {
2174 M_IST(REG_ZERO, REG_ITMP1, 0);
2177 M_LST(REG_ZERO, REG_ITMP1, 0);
2180 M_AST(REG_ZERO, REG_ITMP1, 0);
2183 M_FST(REG_ZERO, REG_ITMP1, 0);
2186 M_DST(REG_ZERO, REG_ITMP1, 0);
2192 case ICMD_GETFIELD: /* ... ==> ..., value */
2193 /* op1 = type, val.i = field offset */
2195 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2196 gen_nullptr_check(s1);
2198 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2199 codegen_addpatchref(cd, PATCHER_get_putfield,
2200 INSTRUCTION_UNRESOLVED_FIELD(iptr), 0);
2202 if (opt_showdisassemble)
2208 disp = INSTRUCTION_RESOLVED_FIELDINFO(iptr)->offset;
2211 switch (iptr->op1) {
2213 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2217 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2221 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2225 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
2229 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
2233 emit_store(jd, iptr, iptr->dst, d);
2236 case ICMD_PUTFIELD: /* ..., objectref, value ==> ... */
2237 /* op1 = type, val.a = field address */
2239 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2240 gen_nullptr_check(s1);
2242 if (!IS_FLT_DBL_TYPE(iptr->op1)) {
2243 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2245 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
2248 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2249 codegen_addpatchref(cd, PATCHER_get_putfield,
2250 INSTRUCTION_UNRESOLVED_FIELD(iptr), 0);
2252 if (opt_showdisassemble)
2258 disp = INSTRUCTION_RESOLVED_FIELDINFO(iptr)->offset;
2261 switch (iptr->op1) {
2263 M_IST(s2, s1, disp);
2266 M_LST(s2, s1, disp);
2269 M_AST(s2, s1, disp);
2272 M_FST(s2, s1, disp);
2275 M_DST(s2, s1, disp);
2280 case ICMD_PUTFIELDCONST: /* ..., objectref ==> ... */
2281 /* val = value (in current instruction) */
2282 /* op1 = type, val.a = field address (in */
2283 /* following NOP) */
2285 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2286 gen_nullptr_check(s1);
2288 if (INSTRUCTION_IS_UNRESOLVED(iptr + 1)) {
2289 codegen_addpatchref(cd, PATCHER_get_putfield,
2290 INSTRUCTION_UNRESOLVED_FIELD(iptr + 1), 0);
2292 if (opt_showdisassemble)
2298 disp = INSTRUCTION_RESOLVED_FIELDINFO(iptr + 1)->offset;
2301 switch (iptr[1].op1) {
2303 M_IST(REG_ZERO, s1, disp);
2306 M_LST(REG_ZERO, s1, disp);
2309 M_AST(REG_ZERO, s1, disp);
2312 M_FST(REG_ZERO, s1, disp);
2315 M_DST(REG_ZERO, s1, disp);
2321 /* branch operations **************************************************/
2323 case ICMD_ATHROW: /* ..., objectref ==> ... (, objectref) */
2325 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2326 M_INTMOVE(s1, REG_ITMP1_XPTR);
2328 #ifdef ENABLE_VERIFIER
2330 codegen_addpatchref(cd, PATCHER_athrow_areturn,
2331 (unresolved_class *) iptr->val.a, 0);
2333 if (opt_showdisassemble)
2336 #endif /* ENABLE_VERIFIER */
2338 disp = dseg_addaddress(cd, asm_handle_exception);
2339 M_ALD(REG_ITMP2, REG_PV, disp);
2340 M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2341 M_NOP; /* nop ensures that XPC is less than the end */
2342 /* of basic block */
2346 case ICMD_GOTO: /* ... ==> ... */
2347 /* op1 = target JavaVM pc */
2349 codegen_addreference(cd, (basicblock *) iptr->target);
2353 case ICMD_JSR: /* ... ==> ... */
2354 /* op1 = target JavaVM pc */
2356 M_BSR(REG_ITMP1, 0);
2357 codegen_addreference(cd, (basicblock *) iptr->target);
2360 case ICMD_RET: /* ... ==> ... */
2361 /* op1 = local variable */
2363 var = &(rd->locals[iptr->op1][TYPE_ADR]);
2364 if (var->flags & INMEMORY) {
2365 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2366 M_RET(REG_ZERO, REG_ITMP1);
2369 M_RET(REG_ZERO, var->regoff);
2373 case ICMD_IFNULL: /* ..., value ==> ... */
2374 /* op1 = target JavaVM pc */
2376 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2378 codegen_addreference(cd, (basicblock *) iptr->target);
2381 case ICMD_IFNONNULL: /* ..., value ==> ... */
2382 /* op1 = target JavaVM pc */
2384 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2386 codegen_addreference(cd, (basicblock *) iptr->target);
2389 case ICMD_IFEQ: /* ..., value ==> ... */
2390 /* op1 = target JavaVM pc, val.i = constant */
2392 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2393 if (iptr->val.i == 0) {
2397 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2398 M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2401 ICONST(REG_ITMP2, iptr->val.i);
2402 M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2404 M_BNEZ(REG_ITMP1, 0);
2406 codegen_addreference(cd, (basicblock *) iptr->target);
2409 case ICMD_IFLT: /* ..., value ==> ... */
2410 /* op1 = target JavaVM pc, val.i = constant */
2412 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2413 if (iptr->val.i == 0) {
2417 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2418 M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2421 ICONST(REG_ITMP2, iptr->val.i);
2422 M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2424 M_BNEZ(REG_ITMP1, 0);
2426 codegen_addreference(cd, (basicblock *) iptr->target);
2429 case ICMD_IFLE: /* ..., value ==> ... */
2430 /* op1 = target JavaVM pc, val.i = constant */
2432 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2433 if (iptr->val.i == 0) {
2437 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2438 M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2441 ICONST(REG_ITMP2, iptr->val.i);
2442 M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2444 M_BNEZ(REG_ITMP1, 0);
2446 codegen_addreference(cd, (basicblock *) iptr->target);
2449 case ICMD_IFNE: /* ..., value ==> ... */
2450 /* op1 = target JavaVM pc, val.i = constant */
2452 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2453 if (iptr->val.i == 0) {
2457 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2458 M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2461 ICONST(REG_ITMP2, iptr->val.i);
2462 M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2464 M_BEQZ(REG_ITMP1, 0);
2466 codegen_addreference(cd, (basicblock *) iptr->target);
2469 case ICMD_IFGT: /* ..., value ==> ... */
2470 /* op1 = target JavaVM pc, val.i = constant */
2472 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2473 if (iptr->val.i == 0) {
2477 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2478 M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2481 ICONST(REG_ITMP2, iptr->val.i);
2482 M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2484 M_BEQZ(REG_ITMP1, 0);
2486 codegen_addreference(cd, (basicblock *) iptr->target);
2489 case ICMD_IFGE: /* ..., value ==> ... */
2490 /* op1 = target JavaVM pc, val.i = constant */
2492 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2493 if (iptr->val.i == 0) {
2497 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2498 M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2501 ICONST(REG_ITMP2, iptr->val.i);
2502 M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2504 M_BEQZ(REG_ITMP1, 0);
2506 codegen_addreference(cd, (basicblock *) iptr->target);
2509 case ICMD_IF_LEQ: /* ..., value ==> ... */
2510 /* op1 = target JavaVM pc, val.l = constant */
2512 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2513 if (iptr->val.l == 0) {
2517 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2518 M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2521 LCONST(REG_ITMP2, iptr->val.l);
2522 M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2524 M_BNEZ(REG_ITMP1, 0);
2526 codegen_addreference(cd, (basicblock *) iptr->target);
2529 case ICMD_IF_LLT: /* ..., value ==> ... */
2530 /* op1 = target JavaVM pc, val.l = constant */
2532 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2533 if (iptr->val.l == 0) {
2537 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2538 M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2541 LCONST(REG_ITMP2, iptr->val.l);
2542 M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2544 M_BNEZ(REG_ITMP1, 0);
2546 codegen_addreference(cd, (basicblock *) iptr->target);
2549 case ICMD_IF_LLE: /* ..., value ==> ... */
2550 /* op1 = target JavaVM pc, val.l = constant */
2552 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2553 if (iptr->val.l == 0) {
2557 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2558 M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2561 LCONST(REG_ITMP2, iptr->val.l);
2562 M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2564 M_BNEZ(REG_ITMP1, 0);
2566 codegen_addreference(cd, (basicblock *) iptr->target);
2569 case ICMD_IF_LNE: /* ..., value ==> ... */
2570 /* op1 = target JavaVM pc, val.l = constant */
2572 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2573 if (iptr->val.l == 0) {
2577 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2578 M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2581 LCONST(REG_ITMP2, iptr->val.l);
2582 M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2584 M_BEQZ(REG_ITMP1, 0);
2586 codegen_addreference(cd, (basicblock *) iptr->target);
2589 case ICMD_IF_LGT: /* ..., value ==> ... */
2590 /* op1 = target JavaVM pc, val.l = constant */
2592 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2593 if (iptr->val.l == 0) {
2597 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2598 M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2601 LCONST(REG_ITMP2, iptr->val.l);
2602 M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2604 M_BEQZ(REG_ITMP1, 0);
2606 codegen_addreference(cd, (basicblock *) iptr->target);
2609 case ICMD_IF_LGE: /* ..., value ==> ... */
2610 /* op1 = target JavaVM pc, val.l = constant */
2612 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2613 if (iptr->val.l == 0) {
2617 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2618 M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2621 LCONST(REG_ITMP2, iptr->val.l);
2622 M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2624 M_BEQZ(REG_ITMP1, 0);
2626 codegen_addreference(cd, (basicblock *) iptr->target);
2629 case ICMD_IF_ICMPEQ: /* ..., value, value ==> ... */
2630 case ICMD_IF_LCMPEQ: /* op1 = target JavaVM pc */
2631 case ICMD_IF_ACMPEQ:
2633 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2634 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2635 M_CMPEQ(s1, s2, REG_ITMP1);
2636 M_BNEZ(REG_ITMP1, 0);
2637 codegen_addreference(cd, (basicblock *) iptr->target);
2640 case ICMD_IF_ICMPNE: /* ..., value, value ==> ... */
2641 case ICMD_IF_LCMPNE: /* op1 = target JavaVM pc */
2642 case ICMD_IF_ACMPNE:
2644 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2645 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2646 M_CMPEQ(s1, s2, REG_ITMP1);
2647 M_BEQZ(REG_ITMP1, 0);
2648 codegen_addreference(cd, (basicblock *) iptr->target);
2651 case ICMD_IF_ICMPLT: /* ..., value, value ==> ... */
2652 case ICMD_IF_LCMPLT: /* op1 = target JavaVM pc */
2654 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2655 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2656 M_CMPLT(s1, s2, REG_ITMP1);
2657 M_BNEZ(REG_ITMP1, 0);
2658 codegen_addreference(cd, (basicblock *) iptr->target);
2661 case ICMD_IF_ICMPGT: /* ..., value, value ==> ... */
2662 case ICMD_IF_LCMPGT: /* op1 = target JavaVM pc */
2664 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2665 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2666 M_CMPLE(s1, s2, REG_ITMP1);
2667 M_BEQZ(REG_ITMP1, 0);
2668 codegen_addreference(cd, (basicblock *) iptr->target);
2671 case ICMD_IF_ICMPLE: /* ..., value, value ==> ... */
2672 case ICMD_IF_LCMPLE: /* op1 = target JavaVM pc */
2674 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2675 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2676 M_CMPLE(s1, s2, REG_ITMP1);
2677 M_BNEZ(REG_ITMP1, 0);
2678 codegen_addreference(cd, (basicblock *) iptr->target);
2681 case ICMD_IF_ICMPGE: /* ..., value, value ==> ... */
2682 case ICMD_IF_LCMPGE: /* op1 = target JavaVM pc */
2684 s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2685 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2686 M_CMPLT(s1, s2, REG_ITMP1);
2687 M_BEQZ(REG_ITMP1, 0);
2688 codegen_addreference(cd, (basicblock *) iptr->target);
2691 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST */
2693 case ICMD_ELSE_ICONST: /* handled by IFxx_ICONST */
2696 case ICMD_IFEQ_ICONST: /* ..., value ==> ..., constant */
2697 /* val.i = constant */
2699 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2700 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2702 if (iptr[1].opc == ICMD_ELSE_ICONST) {
2703 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2704 M_CMPEQ(s1, REG_ZERO, d);
2705 emit_store(jd, iptr, iptr->dst, d);
2708 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2709 M_CMPEQ(s1, REG_ZERO, d);
2711 emit_store(jd, iptr, iptr->dst, d);
2715 M_MOV(s1, REG_ITMP1);
2718 ICONST(d, iptr[1].val.i);
2720 if ((s3 >= 0) && (s3 <= 255)) {
2721 M_CMOVEQ_IMM(s1, s3, d);
2723 ICONST(REG_ITMP3, s3);
2724 M_CMOVEQ(s1, REG_ITMP3, d);
2726 emit_store(jd, iptr, iptr->dst, d);
2729 case ICMD_IFNE_ICONST: /* ..., value ==> ..., constant */
2730 /* val.i = constant */
2732 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2733 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2735 if (iptr[1].opc == ICMD_ELSE_ICONST) {
2736 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2737 M_CMPEQ(s1, REG_ZERO, d);
2738 emit_store(jd, iptr, iptr->dst, d);
2741 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2742 M_CMPEQ(s1, REG_ZERO, d);
2744 emit_store(jd, iptr, iptr->dst, d);
2748 M_MOV(s1, REG_ITMP1);
2751 ICONST(d, iptr[1].val.i);
2753 if ((s3 >= 0) && (s3 <= 255)) {
2754 M_CMOVNE_IMM(s1, s3, d);
2756 ICONST(REG_ITMP3, s3);
2757 M_CMOVNE(s1, REG_ITMP3, d);
2759 emit_store(jd, iptr, iptr->dst, d);
2762 case ICMD_IFLT_ICONST: /* ..., value ==> ..., constant */
2763 /* val.i = constant */
2765 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2766 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2768 if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2769 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2770 M_CMPLT(s1, REG_ZERO, d);
2771 emit_store(jd, iptr, iptr->dst, d);
2774 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2775 M_CMPLE(REG_ZERO, s1, d);
2776 emit_store(jd, iptr, iptr->dst, d);
2780 M_MOV(s1, REG_ITMP1);
2783 ICONST(d, iptr[1].val.i);
2785 if ((s3 >= 0) && (s3 <= 255)) {
2786 M_CMOVLT_IMM(s1, s3, d);
2788 ICONST(REG_ITMP3, s3);
2789 M_CMOVLT(s1, REG_ITMP3, d);
2791 emit_store(jd, iptr, iptr->dst, d);
2794 case ICMD_IFGE_ICONST: /* ..., value ==> ..., constant */
2795 /* val.i = constant */
2797 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2798 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2800 if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2801 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2802 M_CMPLE(REG_ZERO, s1, d);
2803 emit_store(jd, iptr, iptr->dst, d);
2806 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2807 M_CMPLT(s1, REG_ZERO, d);
2808 emit_store(jd, iptr, iptr->dst, d);
2812 M_MOV(s1, REG_ITMP1);
2815 ICONST(d, iptr[1].val.i);
2817 if ((s3 >= 0) && (s3 <= 255)) {
2818 M_CMOVGE_IMM(s1, s3, d);
2820 ICONST(REG_ITMP3, s3);
2821 M_CMOVGE(s1, REG_ITMP3, d);
2823 emit_store(jd, iptr, iptr->dst, d);
2826 case ICMD_IFGT_ICONST: /* ..., value ==> ..., constant */
2827 /* val.i = constant */
2829 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2830 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2832 if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2833 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2834 M_CMPLT(REG_ZERO, s1, d);
2835 emit_store(jd, iptr, iptr->dst, d);
2838 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2839 M_CMPLE(s1, REG_ZERO, d);
2840 emit_store(jd, iptr, iptr->dst, d);
2844 M_MOV(s1, REG_ITMP1);
2847 ICONST(d, iptr[1].val.i);
2849 if ((s3 >= 0) && (s3 <= 255)) {
2850 M_CMOVGT_IMM(s1, s3, d);
2852 ICONST(REG_ITMP3, s3);
2853 M_CMOVGT(s1, REG_ITMP3, d);
2855 emit_store(jd, iptr, iptr->dst, d);
2858 case ICMD_IFLE_ICONST: /* ..., value ==> ..., constant */
2859 /* val.i = constant */
2861 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2862 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2864 if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2865 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2866 M_CMPLE(s1, REG_ZERO, d);
2867 emit_store(jd, iptr, iptr->dst, d);
2870 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2871 M_CMPLT(REG_ZERO, s1, d);
2872 emit_store(jd, iptr, iptr->dst, d);
2876 M_MOV(s1, REG_ITMP1);
2879 ICONST(d, iptr[1].val.i);
2881 if ((s3 >= 0) && (s3 <= 255)) {
2882 M_CMOVLE_IMM(s1, s3, d);
2884 ICONST(REG_ITMP3, s3);
2885 M_CMOVLE(s1, REG_ITMP3, d);
2887 emit_store(jd, iptr, iptr->dst, d);
2891 case ICMD_IRETURN: /* ..., retvalue ==> ... */
2894 s1 = emit_load_s1(jd, iptr, src, REG_RESULT);
2895 M_INTMOVE(s1, REG_RESULT);
2896 goto nowperformreturn;
2898 case ICMD_ARETURN: /* ..., retvalue ==> ... */
2900 s1 = emit_load_s1(jd, iptr, src, REG_RESULT);
2901 M_INTMOVE(s1, REG_RESULT);
2903 #ifdef ENABLE_VERIFIER
2905 codegen_addpatchref(cd, PATCHER_athrow_areturn,
2906 (unresolved_class *) iptr->val.a, 0);
2908 if (opt_showdisassemble)
2911 #endif /* ENABLE_VERIFIER */
2912 goto nowperformreturn;
2914 case ICMD_FRETURN: /* ..., retvalue ==> ... */
2917 s1 = emit_load_s1(jd, iptr, src, REG_FRESULT);
2918 M_FLTMOVE(s1, REG_FRESULT);
2919 goto nowperformreturn;
2921 case ICMD_RETURN: /* ... ==> ... */
2929 /* call trace function */
2931 #if !defined(NDEBUG)
2932 if (opt_verbosecall) {
2933 M_LDA(REG_SP, REG_SP, -3 * 8);
2934 M_AST(REG_RA, REG_SP, 0 * 8);
2935 M_LST(REG_RESULT, REG_SP, 1 * 8);
2936 M_DST(REG_FRESULT, REG_SP, 2 * 8);
2938 disp = dseg_addaddress(cd, m);
2939 M_ALD(rd->argintregs[0], REG_PV, disp);
2940 M_MOV(REG_RESULT, rd->argintregs[1]);
2941 M_FLTMOVE(REG_FRESULT, rd->argfltregs[2]);
2942 M_FLTMOVE(REG_FRESULT, rd->argfltregs[3]);
2944 disp = dseg_addaddress(cd, (void *) builtin_displaymethodstop);
2945 M_ALD(REG_PV, REG_PV, disp);
2946 M_JSR(REG_RA, REG_PV);
2947 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2948 M_LDA(REG_PV, REG_RA, -disp);
2950 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
2951 M_LLD(REG_RESULT, REG_SP, 1 * 8);
2952 M_ALD(REG_RA, REG_SP, 0 * 8);
2953 M_LDA(REG_SP, REG_SP, 3 * 8);
2957 #if defined(ENABLE_THREADS)
2958 if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2959 M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 8);
2961 switch (iptr->opc) {
2965 M_LST(REG_RESULT, REG_SP, rd->memuse * 8);
2969 M_DST(REG_FRESULT, REG_SP, rd->memuse * 8);
2973 disp = dseg_addaddress(cd, LOCK_monitor_exit);
2974 M_ALD(REG_PV, REG_PV, disp);
2975 M_JSR(REG_RA, REG_PV);
2976 disp = -(s4) (cd->mcodeptr - cd->mcodebase);
2977 M_LDA(REG_PV, REG_RA, disp);
2979 switch (iptr->opc) {
2983 M_LLD(REG_RESULT, REG_SP, rd->memuse * 8);
2987 M_DLD(REG_FRESULT, REG_SP, rd->memuse * 8);
2993 /* restore return address */
2995 if (!jd->isleafmethod) {
2996 p--; M_LLD(REG_RA, REG_SP, p * 8);
2999 /* restore saved registers */
3001 for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
3002 p--; M_LLD(rd->savintregs[i], REG_SP, p * 8);
3004 for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
3005 p--; M_DLD(rd->savfltregs[i], REG_SP, p * 8);
3008 /* deallocate stack */
3011 M_LDA(REG_SP, REG_SP, stackframesize * 8);
3013 M_RET(REG_ZERO, REG_RA);
3019 case ICMD_TABLESWITCH: /* ..., index ==> ... */
3024 tptr = (void **) iptr->target;
3026 s4ptr = iptr->val.a;
3027 l = s4ptr[1]; /* low */
3028 i = s4ptr[2]; /* high */
3030 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3032 M_INTMOVE(s1, REG_ITMP1);
3033 } else if (l <= 32768) {
3034 M_LDA(REG_ITMP1, s1, -l);
3036 ICONST(REG_ITMP2, l);
3037 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3044 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3046 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3047 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3049 M_BEQZ(REG_ITMP2, 0);
3050 codegen_addreference(cd, (basicblock *) tptr[0]);
3052 /* build jump table top down and use address of lowest entry */
3054 /* s4ptr += 3 + i; */
3058 dseg_addtarget(cd, (basicblock *) tptr[0]);
3063 /* length of dataseg after last dseg_addtarget is used by load */
3065 M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3066 M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
3067 M_JMP(REG_ZERO, REG_ITMP2);
3072 case ICMD_LOOKUPSWITCH: /* ..., key ==> ... */
3074 s4 i, l, val, *s4ptr;
3077 tptr = (void **) iptr->target;
3079 s4ptr = iptr->val.a;
3080 l = s4ptr[0]; /* default */
3081 i = s4ptr[1]; /* count */
3083 MCODECHECK((i<<2)+8);
3084 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3090 if ((val >= 0) && (val <= 255)) {
3091 M_CMPEQ_IMM(s1, val, REG_ITMP2);
3093 if ((val >= -32768) && (val <= 32767)) {
3094 M_LDA(REG_ITMP2, REG_ZERO, val);
3096 disp = dseg_adds4(cd, val);
3097 M_ILD(REG_ITMP2, REG_PV, disp);
3099 M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3101 M_BNEZ(REG_ITMP2, 0);
3102 codegen_addreference(cd, (basicblock *) tptr[0]);
3107 tptr = (void **) iptr->target;
3108 codegen_addreference(cd, (basicblock *) tptr[0]);
3115 case ICMD_BUILTIN: /* ..., arg1, arg2, arg3 ==> ... */
3116 /* op1 = arg count val.a = builtintable entry */
3122 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ... */
3123 /* op1 = arg count, val.a = method pointer */
3125 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3126 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer */
3127 case ICMD_INVOKEINTERFACE:
3129 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
3130 md = INSTRUCTION_UNRESOLVED_METHOD(iptr)->methodref->parseddesc.md;
3134 lm = INSTRUCTION_RESOLVED_METHODINFO(iptr);
3135 md = lm->parseddesc;
3139 s3 = md->paramcount;
3141 MCODECHECK((s3 << 1) + 64);
3143 /* copy arguments to registers or stack location */
3145 for (s3 = s3 - 1; s3 >= 0; s3--, src = src->prev) {
3146 if (src->varkind == ARGVAR)
3148 if (IS_INT_LNG_TYPE(src->type)) {
3149 if (!md->params[s3].inmemory) {
3150 s1 = rd->argintregs[md->params[s3].regoff];
3151 d = emit_load_s1(jd, iptr, src, s1);
3154 d = emit_load_s1(jd, iptr, src, REG_ITMP1);
3155 M_LST(d, REG_SP, md->params[s3].regoff * 8);
3159 if (!md->params[s3].inmemory) {
3160 s1 = rd->argfltregs[md->params[s3].regoff];
3161 d = emit_load_s1(jd, iptr, src, s1);
3164 d = emit_load_s1(jd, iptr, src, REG_FTMP1);
3165 M_DST(d, REG_SP, md->params[s3].regoff * 8);
3170 switch (iptr->opc) {
3172 disp = dseg_addaddress(cd, bte->fp);
3173 d = md->returntype.type;
3175 M_ALD(REG_PV, REG_PV, disp); /* Pointer to built-in-function */
3176 M_JSR(REG_RA, REG_PV);
3177 disp = (s4) (cd->mcodeptr - cd->mcodebase);
3178 M_LDA(REG_PV, REG_RA, -disp);
3180 /* if op1 == true, we need to check for an exception */
3182 if (iptr->op1 == true) {
3183 M_BEQZ(REG_RESULT, 0);
3184 codegen_add_fillinstacktrace_ref(cd);
3188 case ICMD_INVOKESPECIAL:
3189 M_BEQZ(rd->argintregs[0], 0);
3190 codegen_add_nullpointerexception_ref(cd);
3193 case ICMD_INVOKESTATIC:
3195 unresolved_method *um = INSTRUCTION_UNRESOLVED_METHOD(iptr);
3197 disp = dseg_addaddress(cd, NULL);
3199 codegen_addpatchref(cd, PATCHER_invokestatic_special,
3202 if (opt_showdisassemble)
3205 d = um->methodref->parseddesc.md->returntype.type;
3208 disp = dseg_addaddress(cd, lm->stubroutine);
3209 d = lm->parseddesc->returntype.type;
3212 M_ALD(REG_PV, REG_PV, disp); /* method pointer in r27 */
3213 M_JSR(REG_RA, REG_PV);
3214 disp = (s4) (cd->mcodeptr - cd->mcodebase);
3215 M_LDA(REG_PV, REG_RA, -disp);
3218 case ICMD_INVOKEVIRTUAL:
3219 gen_nullptr_check(rd->argintregs[0]);
3222 unresolved_method *um = INSTRUCTION_UNRESOLVED_METHOD(iptr);
3224 codegen_addpatchref(cd, PATCHER_invokevirtual, um, 0);
3226 if (opt_showdisassemble)
3230 d = um->methodref->parseddesc.md->returntype.type;
3233 s1 = OFFSET(vftbl_t, table[0]) +
3234 sizeof(methodptr) * lm->vftblindex;
3235 d = lm->parseddesc->returntype.type;
3238 M_ALD(REG_METHODPTR, rd->argintregs[0],
3239 OFFSET(java_objectheader, vftbl));
3240 M_ALD(REG_PV, REG_METHODPTR, s1);
3241 M_JSR(REG_RA, REG_PV);
3242 disp = (s4) (cd->mcodeptr - cd->mcodebase);
3243 M_LDA(REG_PV, REG_RA, -disp);
3246 case ICMD_INVOKEINTERFACE:
3247 gen_nullptr_check(rd->argintregs[0]);
3250 unresolved_method *um = INSTRUCTION_UNRESOLVED_METHOD(iptr);
3252 codegen_addpatchref(cd, PATCHER_invokeinterface, um, 0);
3254 if (opt_showdisassemble)
3259 d = um->methodref->parseddesc.md->returntype.type;
3262 s1 = OFFSET(vftbl_t, interfacetable[0]) -
3263 sizeof(methodptr*) * lm->class->index;
3265 s2 = sizeof(methodptr) * (lm - lm->class->methods);
3267 d = lm->parseddesc->returntype.type;
3270 M_ALD(REG_METHODPTR, rd->argintregs[0],
3271 OFFSET(java_objectheader, vftbl));
3272 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
3273 M_ALD(REG_PV, REG_METHODPTR, s2);
3274 M_JSR(REG_RA, REG_PV);
3275 disp = (s4) (cd->mcodeptr - cd->mcodebase);
3276 M_LDA(REG_PV, REG_RA, -disp);
3280 /* d contains return type */
3282 if (d != TYPE_VOID) {
3283 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3284 s1 = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_RESULT);
3285 M_INTMOVE(REG_RESULT, s1);
3286 /* emit_store(jd, iptr, iptr->dst, s1); */
3288 s1 = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FRESULT);
3289 M_FLTMOVE(REG_FRESULT, s1);
3290 /* emit_store(jd, iptr, iptr->dst, s1); */
3292 emit_store(jd, iptr, iptr->dst, s1);
3297 case ICMD_CHECKCAST: /* ..., objectref ==> ..., objectref */
3299 /* op1: 0 == array, 1 == class */
3300 /* val.a: (classinfo*) superclass */
3302 /* superclass is an interface:
3304 * OK if ((sub == NULL) ||
3305 * (sub->vftbl->interfacetablelength > super->index) &&
3306 * (sub->vftbl->interfacetable[-super->index] != NULL));
3308 * superclass is a class:
3310 * OK if ((sub == NULL) || (0
3311 * <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3312 * super->vftbl->diffval));
3315 if (iptr->op1 == 1) {
3316 /* object type cast-check */
3319 vftbl_t *supervftbl;
3322 super = (classinfo *) iptr->val.a;
3324 if (super == NULL) {
3329 superindex = super->index;
3330 supervftbl = super->vftbl;
3333 #if defined(ENABLE_THREADS)
3334 codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
3336 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3338 /* calculate interface checkcast code size */
3342 s2 += opt_showdisassemble ? 1 : 0;
3344 /* calculate class checkcast code size */
3346 s3 = 9 /* 8 + (s1 == REG_ITMP1) */;
3348 s3 += opt_showdisassemble ? 1 : 0;
3350 /* if class is not resolved, check which code to call */
3352 if (super == NULL) {
3353 M_BEQZ(s1, 4 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3355 disp = dseg_adds4(cd, 0); /* super->flags */
3357 codegen_addpatchref(cd, PATCHER_checkcast_instanceof_flags,
3358 (constant_classref *) iptr->target,
3361 if (opt_showdisassemble)
3364 M_ILD(REG_ITMP2, REG_PV, disp);
3365 disp = dseg_adds4(cd, ACC_INTERFACE);
3366 M_ILD(REG_ITMP3, REG_PV, disp);
3367 M_AND(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3368 M_BEQZ(REG_ITMP2, s2 + 1);
3371 /* interface checkcast code */
3373 if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
3374 if (super != NULL) {
3378 codegen_addpatchref(cd,
3379 PATCHER_checkcast_instanceof_interface,
3380 (constant_classref *) iptr->target,
3383 if (opt_showdisassemble)
3387 M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3388 M_ILD(REG_ITMP3, REG_ITMP2,
3389 OFFSET(vftbl_t, interfacetablelength));
3390 M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3391 M_BLEZ(REG_ITMP3, 0);
3392 codegen_add_classcastexception_ref(cd, s1);
3393 M_ALD(REG_ITMP3, REG_ITMP2,
3394 (s4) (OFFSET(vftbl_t, interfacetable[0]) -
3395 superindex * sizeof(methodptr*)));
3396 M_BEQZ(REG_ITMP3, 0);
3397 codegen_add_classcastexception_ref(cd, s1);
3403 /* class checkcast code */
3405 if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
3406 disp = dseg_addaddress(cd, supervftbl);
3408 if (super != NULL) {
3412 codegen_addpatchref(cd,
3413 PATCHER_checkcast_instanceof_class,
3414 (constant_classref *) iptr->target,
3417 if (opt_showdisassemble)
3421 M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3422 M_ALD(REG_ITMP3, REG_PV, disp);
3423 #if defined(ENABLE_THREADS)
3424 codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
3426 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3427 /* if (s1 != REG_ITMP1) { */
3428 /* M_ILD(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, baseval)); */
3429 /* M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval)); */
3430 /* #if defined(ENABLE_THREADS) */
3431 /* codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase); */
3433 /* M_ISUB(REG_ITMP2, REG_ITMP1, REG_ITMP2); */
3436 M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, baseval));
3437 M_ISUB(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3438 M_ALD(REG_ITMP3, REG_PV, disp);
3439 M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval));
3440 #if defined(ENABLE_THREADS)
3441 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
3444 M_CMPULE(REG_ITMP2, REG_ITMP3, REG_ITMP3);
3445 M_BEQZ(REG_ITMP3, 0);
3446 codegen_add_classcastexception_ref(cd, s1);
3449 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, s1);
3452 /* array type cast-check */
3454 s1 = emit_load_s1(jd, iptr, src, rd->argintregs[0]);
3455 M_INTMOVE(s1, rd->argintregs[0]);
3457 disp = dseg_addaddress(cd, iptr->val.a);
3459 if (iptr->val.a == NULL) {
3460 codegen_addpatchref(cd, PATCHER_builtin_arraycheckcast,
3461 (constant_classref *) iptr->target,
3464 if (opt_showdisassemble)
3468 M_ALD(rd->argintregs[1], REG_PV, disp);
3469 disp = dseg_addaddress(cd, BUILTIN_arraycheckcast);
3470 M_ALD(REG_PV, REG_PV, disp);
3471 M_JSR(REG_RA, REG_PV);
3472 disp = (s4) (cd->mcodeptr - cd->mcodebase);
3473 M_LDA(REG_PV, REG_RA, -disp);
3475 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3476 M_BEQZ(REG_RESULT, 0);
3477 codegen_add_classcastexception_ref(cd, s1);
3479 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, s1);
3483 emit_store(jd, iptr, iptr->dst, d);
3486 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult */
3488 /* op1: 0 == array, 1 == class */
3489 /* val.a: (classinfo*) superclass */
3491 /* superclass is an interface:
3493 * return (sub != NULL) &&
3494 * (sub->vftbl->interfacetablelength > super->index) &&
3495 * (sub->vftbl->interfacetable[-super->index] != NULL);
3497 * superclass is a class:
3499 * return ((sub != NULL) && (0
3500 * <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3501 * super->vftbl->diffvall));
3506 vftbl_t *supervftbl;
3509 super = (classinfo *) iptr->val.a;
3511 if (super == NULL) {
3516 superindex = super->index;
3517 supervftbl = super->vftbl;
3520 #if defined(ENABLE_THREADS)
3521 codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
3523 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3524 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
3526 M_MOV(s1, REG_ITMP1);
3530 /* calculate interface instanceof code size */
3534 s2 += (d == REG_ITMP2 ? 1 : 0) + (opt_showdisassemble ? 1 : 0);
3536 /* calculate class instanceof code size */
3540 s3 += (opt_showdisassemble ? 1 : 0);
3542 /* if class is not resolved, check which code to call */
3544 if (super == NULL) {
3546 M_BEQZ(s1, 4 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3548 disp = dseg_adds4(cd, 0); /* super->flags */
3550 codegen_addpatchref(cd, PATCHER_checkcast_instanceof_flags,
3551 (constant_classref *) iptr->target, disp);
3553 if (opt_showdisassemble)
3556 M_ILD(REG_ITMP3, REG_PV, disp);
3558 disp = dseg_adds4(cd, ACC_INTERFACE);
3559 M_ILD(REG_ITMP2, REG_PV, disp);
3560 M_AND(REG_ITMP3, REG_ITMP2, REG_ITMP3);
3561 M_BEQZ(REG_ITMP3, s2 + 1);
3564 /* interface instanceof code */
3566 if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
3567 if (super != NULL) {
3572 /* If d == REG_ITMP2, then it's destroyed in check
3577 codegen_addpatchref(cd,
3578 PATCHER_checkcast_instanceof_interface,
3579 (constant_classref *) iptr->target, 0);
3581 if (opt_showdisassemble)
3585 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3586 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3587 M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3588 M_BLEZ(REG_ITMP3, 2);
3589 M_ALD(REG_ITMP1, REG_ITMP1,
3590 (s4) (OFFSET(vftbl_t, interfacetable[0]) -
3591 superindex * sizeof(methodptr*)));
3592 M_CMPULT(REG_ZERO, REG_ITMP1, d); /* REG_ITMP1 != 0 */
3598 /* class instanceof code */
3600 if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
3601 disp = dseg_addaddress(cd, supervftbl);
3603 if (super != NULL) {
3608 codegen_addpatchref(cd, PATCHER_checkcast_instanceof_class,
3609 (constant_classref *) iptr->target,
3612 if (opt_showdisassemble)
3616 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3617 M_ALD(REG_ITMP2, REG_PV, disp);
3618 #if defined(ENABLE_THREADS)
3619 codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
3621 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3622 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3623 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3624 #if defined(ENABLE_THREADS)
3625 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
3627 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3628 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3630 emit_store(jd, iptr, iptr->dst, d);
3634 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref */
3635 /* op1 = dimension, val.a = class */
3637 /* check for negative sizes and copy sizes to stack if necessary */
3639 MCODECHECK((iptr->op1 << 1) + 64);
3641 for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3642 /* copy SAVEDVAR sizes to stack */
3644 if (src->varkind != ARGVAR) {
3645 s2 = emit_load_s2(jd, iptr, src, REG_ITMP1);
3646 M_LST(s2, REG_SP, s1 * 8);
3650 /* a0 = dimension count */
3652 ICONST(rd->argintregs[0], iptr->op1);
3654 /* is patcher function set? */
3656 if (iptr->val.a == NULL) {
3657 disp = dseg_addaddress(cd, 0);
3659 codegen_addpatchref(cd, PATCHER_builtin_multianewarray,
3660 (constant_classref *) iptr->target,
3663 if (opt_showdisassemble)
3667 disp = dseg_addaddress(cd, iptr->val.a);
3670 /* a1 = arraydescriptor */
3672 M_ALD(rd->argintregs[1], REG_PV, disp);
3674 /* a2 = pointer to dimensions = stack pointer */
3676 M_INTMOVE(REG_SP, rd->argintregs[2]);
3678 disp = dseg_addaddress(cd, BUILTIN_multianewarray);
3679 M_ALD(REG_PV, REG_PV, disp);
3680 M_JSR(REG_RA, REG_PV);
3681 disp = (s4) (cd->mcodeptr - cd->mcodebase);
3682 M_LDA(REG_PV, REG_RA, -disp);
3684 /* check for exception before result assignment */
3686 M_BEQZ(REG_RESULT, 0);
3687 codegen_add_fillinstacktrace_ref(cd);
3689 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_RESULT);
3690 M_INTMOVE(REG_RESULT, d);
3691 emit_store(jd, iptr, iptr->dst, d);
3696 new_internalerror("Unknown ICMD %d", iptr->opc);
3700 } /* for instruction */
3702 /* copy values to interface registers */
3704 src = bptr->outstack;
3705 len = bptr->outdepth;
3707 #if defined(ENABLE_LSRA)
3712 if ((src->varkind != STACKVAR)) {
3714 if (IS_FLT_DBL_TYPE(s2)) {
3715 /* XXX can be one call */
3716 s1 = emit_load_s1(jd, NULL, src, REG_FTMP1);
3717 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3718 M_FLTMOVE(s1,rd->interfaces[len][s2].regoff);
3721 M_DST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3725 /* XXX can be one call */
3726 s1 = emit_load_s1(jd, NULL, src, REG_ITMP1);
3727 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3728 M_INTMOVE(s1,rd->interfaces[len][s2].regoff);
3731 M_LST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3737 } /* if (bptr -> flags >= BBREACHED) */
3738 } /* for basic block */
3740 dseg_createlinenumbertable(cd);
3743 /* generate exception and patcher stubs */
3752 savedmcodeptr = NULL;
3754 /* generate exception stubs */
3756 for (eref = cd->exceptionrefs; eref != NULL; eref = eref->next) {
3757 gen_resolvebranch(cd->mcodebase + eref->branchpos,
3758 eref->branchpos, cd->mcodeptr - cd->mcodebase);
3762 /* move index register into REG_ITMP1 */
3764 /* Check if the exception is an
3765 ArrayIndexOutOfBoundsException. If so, move index register
3768 if (eref->reg != -1)
3769 M_MOV(eref->reg, rd->argintregs[4]);
3771 /* calcuate exception address */
3773 M_LDA(rd->argintregs[3], REG_PV, eref->branchpos - 4);
3775 /* move function to call into REG_ITMP3 */
3777 disp = dseg_addaddress(cd, eref->function);
3778 M_ALD(REG_ITMP3, REG_PV, disp);
3780 if (savedmcodeptr != NULL) {
3781 disp = ((u4 *) savedmcodeptr) - (((u4 *) cd->mcodeptr) + 1);
3785 savedmcodeptr = cd->mcodeptr;
3787 M_MOV(REG_PV, rd->argintregs[0]);
3788 M_MOV(REG_SP, rd->argintregs[1]);
3790 if (jd->isleafmethod)
3791 M_MOV(REG_RA, rd->argintregs[2]);
3793 M_ALD(rd->argintregs[2],
3794 REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
3796 M_LDA(REG_SP, REG_SP, -2 * 8);
3797 M_AST(rd->argintregs[3], REG_SP, 0 * 8); /* store XPC */
3799 if (jd->isleafmethod)
3800 M_AST(REG_RA, REG_SP, 1 * 8);
3802 M_MOV(REG_ITMP3, REG_PV);
3803 M_JSR(REG_RA, REG_PV);
3804 disp = (s4) (cd->mcodeptr - cd->mcodebase);
3805 M_LDA(REG_PV, REG_RA, -disp);
3807 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3809 if (jd->isleafmethod)
3810 M_ALD(REG_RA, REG_SP, 1 * 8);
3812 M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3813 M_LDA(REG_SP, REG_SP, 2 * 8);
3815 disp = dseg_addaddress(cd, asm_handle_exception);
3816 M_ALD(REG_ITMP3, REG_PV, disp);
3817 M_JMP(REG_ZERO, REG_ITMP3);
3822 /* generate code patching stub call code */
3824 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
3825 /* check code segment size */
3829 /* Get machine code which is patched back in later. The
3830 call is 1 instruction word long. */
3832 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
3834 mcode = *((u4 *) tmpmcodeptr);
3836 /* Patch in the call to call the following code (done at
3839 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
3840 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
3842 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
3843 M_BSR(REG_ITMP3, disp);
3845 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
3847 /* create stack frame */
3849 M_LSUB_IMM(REG_SP, 6 * 8, REG_SP);
3851 /* move return address onto stack */
3853 M_AST(REG_ITMP3, REG_SP, 5 * 8);
3855 /* move pointer to java_objectheader onto stack */
3857 #if defined(ENABLE_THREADS)
3858 /* create a virtual java_objectheader */
3860 (void) dseg_addaddress(cd, NULL); /* flcword */
3861 (void) dseg_addaddress(cd, lock_get_initial_lock_word()); /* monitorPtr */
3862 disp = dseg_addaddress(cd, NULL); /* vftbl */
3864 M_LDA(REG_ITMP3, REG_PV, disp);
3865 M_AST(REG_ITMP3, REG_SP, 4 * 8);
3870 /* move machine code onto stack */
3872 disp = dseg_adds4(cd, mcode);
3873 M_ILD(REG_ITMP3, REG_PV, disp);
3874 M_IST(REG_ITMP3, REG_SP, 3 * 8);
3876 /* move class/method/field reference onto stack */
3878 disp = dseg_addaddress(cd, pref->ref);
3879 M_ALD(REG_ITMP3, REG_PV, disp);
3880 M_AST(REG_ITMP3, REG_SP, 2 * 8);
3882 /* move data segment displacement onto stack */
3884 disp = dseg_adds4(cd, pref->disp);
3885 M_ILD(REG_ITMP3, REG_PV, disp);
3886 M_IST(REG_ITMP3, REG_SP, 1 * 8);
3888 /* move patcher function pointer onto stack */
3890 disp = dseg_addaddress(cd, pref->patcher);
3891 M_ALD(REG_ITMP3, REG_PV, disp);
3892 M_AST(REG_ITMP3, REG_SP, 0 * 8);
3894 disp = dseg_addaddress(cd, asm_patcher_wrapper);
3895 M_ALD(REG_ITMP3, REG_PV, disp);
3896 M_JMP(REG_ZERO, REG_ITMP3);
3899 /* generate replacement-out stubs */
3904 replacementpoint = jd->code->rplpoints;
3906 for (i = 0; i < jd->code->rplpointcount; ++i, ++replacementpoint) {
3907 /* check code segment size */
3911 /* note start of stub code */
3913 replacementpoint->outcode = (u1 *) (ptrint) (cd->mcodeptr - cd->mcodebase);
3915 /* make machine code for patching */
3917 savedmcodeptr = cd->mcodeptr;
3918 cd->mcodeptr = (u1 *) &(replacementpoint->mcode);
3920 disp = (ptrint)((s4*)replacementpoint->outcode - (s4*)replacementpoint->pc) - 1;
3923 cd->mcodeptr = savedmcodeptr;
3925 /* create stack frame - 16-byte aligned */
3927 M_LSUB_IMM(REG_SP, 2 * 8, REG_SP);
3929 /* push address of `rplpoint` struct */
3931 disp = dseg_addaddress(cd, replacementpoint);
3932 M_ALD(REG_ITMP3, REG_PV, disp);
3933 M_AST(REG_ITMP3, REG_SP, 0 * 8);
3935 /* jump to replacement function */
3937 disp = dseg_addaddress(cd, asm_replacement_out);
3938 M_ALD(REG_ITMP3, REG_PV, disp);
3939 M_JMP(REG_ZERO, REG_ITMP3);
3946 /* everything's ok */
3952 /* createcompilerstub **********************************************************
3954 Creates a stub routine which calls the compiler.
3956 *******************************************************************************/
3958 #define COMPILERSTUB_DATASIZE 3 * SIZEOF_VOID_P
3959 #define COMPILERSTUB_CODESIZE 3 * 4
3961 #define COMPILERSTUB_SIZE COMPILERSTUB_DATASIZE + COMPILERSTUB_CODESIZE
3964 u1 *createcompilerstub(methodinfo *m)
3966 u1 *s; /* memory to hold the stub */
3970 s4 dumpsize; /* code generation pointer */
3972 s = CNEW(u1, COMPILERSTUB_SIZE);
3974 /* set data pointer and code pointer */
3977 s = s + COMPILERSTUB_DATASIZE;
3979 /* mark start of dump memory area */
3981 dumpsize = dump_size();
3983 cd = DNEW(codegendata);
3986 /* Store the codeinfo pointer in the same place as in the
3987 methodheader for compiled methods. */
3989 code = code_codeinfo_new(m);
3991 d[0] = (ptrint) asm_call_jit_compiler;
3993 d[2] = (ptrint) code;
3995 /* code for the stub */
3997 M_ALD(REG_ITMP1, REG_PV, -2 * 8); /* load codeinfo pointer */
3998 M_ALD(REG_PV, REG_PV, -3 * 8); /* load pointer to the compiler */
3999 M_JMP(REG_ZERO, REG_PV); /* jump to the compiler */
4001 #if defined(ENABLE_STATISTICS)
4003 count_cstub_len += COMPILERSTUB_SIZE;
4006 /* release dump area */
4008 dump_release(dumpsize);
4014 /* createnativestub ************************************************************
4016 Creates a stub routine which calls a native method.
4018 *******************************************************************************/
4020 u1 *createnativestub(functionptr f, jitdata *jd, methoddesc *nmd)
4026 s4 stackframesize; /* size of stackframe if needed */
4029 s4 i, j; /* count variables */
4032 s4 funcdisp; /* displacement of the function */
4034 /* get required compiler data */
4041 /* initialize variables */
4044 nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
4046 /* calculate stack frame size */
4049 1 + /* return address */
4050 sizeof(stackframeinfo) / SIZEOF_VOID_P +
4051 sizeof(localref_table) / SIZEOF_VOID_P +
4052 1 + /* methodinfo for call trace */
4053 (md->paramcount > INT_ARG_CNT ? INT_ARG_CNT : md->paramcount) +
4056 /* create method header */
4058 (void) dseg_addaddress(cd, code); /* CodeinfoPointer */
4059 (void) dseg_adds4(cd, stackframesize * 8); /* FrameSize */
4060 (void) dseg_adds4(cd, 0); /* IsSync */
4061 (void) dseg_adds4(cd, 0); /* IsLeaf */
4062 (void) dseg_adds4(cd, 0); /* IntSave */
4063 (void) dseg_adds4(cd, 0); /* FltSave */
4064 (void) dseg_addlinenumbertablesize(cd);
4065 (void) dseg_adds4(cd, 0); /* ExTableSize */
4067 /* generate stub code */
4069 M_LDA(REG_SP, REG_SP, -stackframesize * 8);
4070 M_AST(REG_RA, REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
4072 /* call trace function */
4074 #if !defined(NDEBUG)
4075 if (opt_verbosecall) {
4076 /* save integer argument registers */
4078 for (i = 0, j = 1; i < md->paramcount && i < INT_ARG_CNT; i++) {
4079 if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
4080 M_LST(rd->argintregs[i], REG_SP, j * 8);
4085 /* save and copy float arguments into integer registers */
4087 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4088 t = md->paramtypes[i].type;
4090 if (IS_FLT_DBL_TYPE(t)) {
4091 if (IS_2_WORD_TYPE(t)) {
4092 M_DST(rd->argfltregs[i], REG_SP, j * 8);
4093 M_LLD(rd->argintregs[i], REG_SP, j * 8);
4095 M_FST(rd->argfltregs[i], REG_SP, j * 8);
4096 M_ILD(rd->argintregs[i], REG_SP, j * 8);
4102 disp = dseg_addaddress(cd, m);
4103 M_ALD(REG_ITMP1, REG_PV, disp);
4104 M_AST(REG_ITMP1, REG_SP, 0 * 8);
4105 disp = dseg_addaddress(cd, builtin_trace_args);
4106 M_ALD(REG_PV, REG_PV, disp);
4107 M_JSR(REG_RA, REG_PV);
4108 disp = (s4) (cd->mcodeptr - cd->mcodebase);
4109 M_LDA(REG_PV, REG_RA, -disp);
4111 for (i = 0, j = 1; i < md->paramcount && i < INT_ARG_CNT; i++) {
4112 if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
4113 M_LLD(rd->argintregs[i], REG_SP, j * 8);
4118 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4119 t = md->paramtypes[i].type;
4121 if (IS_FLT_DBL_TYPE(t)) {
4122 if (IS_2_WORD_TYPE(t)) {
4123 M_DLD(rd->argfltregs[i], REG_SP, j * 8);
4125 M_FLD(rd->argfltregs[i], REG_SP, j * 8);
4131 #endif /* !defined(NDEBUG) */
4133 /* get function address (this must happen before the stackframeinfo) */
4135 funcdisp = dseg_addaddress(cd, f);
4137 #if !defined(WITH_STATIC_CLASSPATH)
4139 codegen_addpatchref(cd, PATCHER_resolve_native, m, funcdisp);
4141 if (opt_showdisassemble)
4146 /* save integer and float argument registers */
4148 for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
4149 if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
4150 M_LST(rd->argintregs[i], REG_SP, j * 8);
4155 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4156 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
4157 M_DST(rd->argfltregs[i], REG_SP, j * 8);
4162 /* prepare data structures for native function call */
4164 M_LDA(rd->argintregs[0], REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
4165 M_MOV(REG_PV, rd->argintregs[1]);
4166 M_LDA(rd->argintregs[2], REG_SP, stackframesize * 8);
4167 M_ALD(rd->argintregs[3], REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
4168 disp = dseg_addaddress(cd, codegen_start_native_call);
4169 M_ALD(REG_PV, REG_PV, disp);
4170 M_JSR(REG_RA, REG_PV);
4171 disp = (s4) (cd->mcodeptr - cd->mcodebase);
4172 M_LDA(REG_PV, REG_RA, -disp);
4174 /* restore integer and float argument registers */
4176 for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
4177 if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
4178 M_LLD(rd->argintregs[i], REG_SP, j * 8);
4183 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4184 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
4185 M_DLD(rd->argfltregs[i], REG_SP, j * 8);
4190 /* copy or spill arguments to new locations */
4192 for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
4193 t = md->paramtypes[i].type;
4195 if (IS_INT_LNG_TYPE(t)) {
4196 if (!md->params[i].inmemory) {
4197 s1 = rd->argintregs[md->params[i].regoff];
4199 if (!nmd->params[j].inmemory) {
4200 s2 = rd->argintregs[nmd->params[j].regoff];
4204 s2 = nmd->params[j].regoff;
4205 M_LST(s1, REG_SP, s2 * 8);
4209 s1 = md->params[i].regoff + stackframesize;
4210 s2 = nmd->params[j].regoff;
4211 M_LLD(REG_ITMP1, REG_SP, s1 * 8);
4212 M_LST(REG_ITMP1, REG_SP, s2 * 8);
4216 if (!md->params[i].inmemory) {
4217 s1 = rd->argfltregs[md->params[i].regoff];
4219 if (!nmd->params[j].inmemory) {
4220 s2 = rd->argfltregs[nmd->params[j].regoff];
4224 s2 = nmd->params[j].regoff;
4225 if (IS_2_WORD_TYPE(t))
4226 M_DST(s1, REG_SP, s2 * 8);
4228 M_FST(s1, REG_SP, s2 * 8);
4232 s1 = md->params[i].regoff + stackframesize;
4233 s2 = nmd->params[j].regoff;
4234 M_DLD(REG_FTMP1, REG_SP, s1 * 8);
4235 if (IS_2_WORD_TYPE(t))
4236 M_DST(REG_FTMP1, REG_SP, s2 * 8);
4238 M_FST(REG_FTMP1, REG_SP, s2 * 8);
4243 /* put class into second argument register */
4245 if (m->flags & ACC_STATIC) {
4246 disp = dseg_addaddress(cd, m->class);
4247 M_ALD(rd->argintregs[1], REG_PV, disp);
4250 /* put env into first argument register */
4252 disp = dseg_addaddress(cd, _Jv_env);
4253 M_ALD(rd->argintregs[0], REG_PV, disp);
4255 /* do the native function call */
4257 M_ALD(REG_PV, REG_PV, funcdisp);
4258 M_JSR(REG_RA, REG_PV); /* call native method */
4259 disp = (s4) (cd->mcodeptr - cd->mcodebase);
4260 M_LDA(REG_PV, REG_RA, -disp); /* recompute pv from ra */
4262 /* save return value */
4264 if (md->returntype.type != TYPE_VOID) {
4265 if (IS_INT_LNG_TYPE(md->returntype.type))
4266 M_LST(REG_RESULT, REG_SP, 0 * 8);
4268 M_DST(REG_FRESULT, REG_SP, 0 * 8);
4271 /* call finished trace */
4273 #if !defined(NDEBUG)
4274 if (opt_verbosecall) {
4275 /* just restore the value we need, don't care about the other */
4277 if (md->returntype.type != TYPE_VOID) {
4278 if (IS_INT_LNG_TYPE(md->returntype.type))
4279 M_LLD(REG_RESULT, REG_SP, 0 * 8);
4281 M_DLD(REG_FRESULT, REG_SP, 0 * 8);
4284 disp = dseg_addaddress(cd, m);
4285 M_ALD(rd->argintregs[0], REG_PV, disp);
4287 M_MOV(REG_RESULT, rd->argintregs[1]);
4288 M_FMOV(REG_FRESULT, rd->argfltregs[2]);
4289 M_FMOV(REG_FRESULT, rd->argfltregs[3]);
4291 disp = dseg_addaddress(cd, builtin_displaymethodstop);
4292 M_ALD(REG_PV, REG_PV, disp);
4293 M_JSR(REG_RA, REG_PV);
4294 disp = (s4) (cd->mcodeptr - cd->mcodebase);
4295 M_LDA(REG_PV, REG_RA, -disp);
4297 #endif /* !defined(NDEBUG) */
4299 /* remove native stackframe info */
4301 M_LDA(rd->argintregs[0], REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
4302 disp = dseg_addaddress(cd, codegen_finish_native_call);
4303 M_ALD(REG_PV, REG_PV, disp);
4304 M_JSR(REG_RA, REG_PV);
4305 disp = (s4) (cd->mcodeptr - cd->mcodebase);
4306 M_LDA(REG_PV, REG_RA, -disp);
4307 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
4309 /* restore return value */
4311 if (md->returntype.type != TYPE_VOID) {
4312 if (IS_INT_LNG_TYPE(md->returntype.type))
4313 M_LLD(REG_RESULT, REG_SP, 0 * 8);
4315 M_DLD(REG_FRESULT, REG_SP, 0 * 8);
4318 M_ALD(REG_RA, REG_SP, (stackframesize - 1) * 8); /* load return address */
4319 M_LDA(REG_SP, REG_SP, stackframesize * 8);
4321 /* check for exception */
4323 M_BNEZ(REG_ITMP1_XPTR, 1); /* if no exception then return */
4324 M_RET(REG_ZERO, REG_RA); /* return to caller */
4326 /* handle exception */
4328 M_ASUB_IMM(REG_RA, 4, REG_ITMP2_XPC); /* get exception address */
4330 disp = dseg_addaddress(cd, asm_handle_nat_exception);
4331 M_ALD(REG_ITMP3, REG_PV, disp); /* load asm exception handler address */
4332 M_JMP(REG_ZERO, REG_ITMP3); /* jump to asm exception handler */
4335 /* process patcher calls **************************************************/
4343 /* there can only be one <clinit> ref entry */
4345 pref = cd->patchrefs;
4347 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4348 /* Get machine code which is patched back in later. The
4349 call is 1 instruction word long. */
4351 tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
4353 mcode = *((u4 *) tmpmcodeptr);
4355 /* Patch in the call to call the following code (done at
4358 savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
4359 cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
4361 disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
4362 M_BSR(REG_ITMP3, disp);
4364 cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
4366 /* create stack frame */
4368 M_LSUB_IMM(REG_SP, 6 * 8, REG_SP);
4370 /* move return address onto stack */
4372 M_AST(REG_ITMP3, REG_SP, 5 * 8);
4374 /* move pointer to java_objectheader onto stack */
4376 #if defined(ENABLE_THREADS)
4377 /* create a virtual java_objectheader */
4379 (void) dseg_addaddress(cd, NULL); /* flcword */
4380 (void) dseg_addaddress(cd, lock_get_initial_lock_word()); /* monitorPtr */
4381 disp = dseg_addaddress(cd, NULL); /* vftbl */
4383 M_LDA(REG_ITMP3, REG_PV, disp);
4384 M_AST(REG_ITMP3, REG_SP, 4 * 8);
4386 M_AST(REG_ZERO, REG_SP, 4 * 8);
4389 /* move machine code onto stack */
4391 disp = dseg_adds4(cd, mcode);
4392 M_ILD(REG_ITMP3, REG_PV, disp);
4393 M_IST(REG_ITMP3, REG_SP, 3 * 8);
4395 /* move class/method/field reference onto stack */
4397 disp = dseg_addaddress(cd, pref->ref);
4398 M_ALD(REG_ITMP3, REG_PV, disp);
4399 M_AST(REG_ITMP3, REG_SP, 2 * 8);
4401 /* move data segment displacement onto stack */
4403 disp = dseg_adds4(cd, pref->disp);
4404 M_ILD(REG_ITMP3, REG_PV, disp);
4405 M_IST(REG_ITMP3, REG_SP, 1 * 8);
4407 /* move patcher function pointer onto stack */
4409 disp = dseg_addaddress(cd, pref->patcher);
4410 M_ALD(REG_ITMP3, REG_PV, disp);
4411 M_AST(REG_ITMP3, REG_SP, 0 * 8);
4413 disp = dseg_addaddress(cd, asm_patcher_wrapper);
4414 M_ALD(REG_ITMP3, REG_PV, disp);
4415 M_JMP(REG_ZERO, REG_ITMP3);
4421 return code->entrypoint;
4426 * These are local overrides for various environment variables in Emacs.
4427 * Please do not remove this and leave it at the end of the file, where
4428 * Emacs will automagically detect them.
4429 * ---------------------------------------------------------------------
4432 * indent-tabs-mode: t
4436 * vim:noexpandtab:sw=4:ts=4: