src/vm/jit/alpha/codegen.c

   1 /* src/vm/jit/alpha/codegen.c - machine code generator for Alpha
   2
   3    Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
   4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
   5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
   6    J. Wenninger, Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  23    02110-1301, USA.
  24
  25    Contact: cacao@cacaojvm.org
  26
  27    Authors: Andreas Krall
  28             Reinhard Grafl
  29
  30    Changes: Joseph Wenninger
  31             Christian Thalinger
  32             Christian Ullrich
  33             Edwin Steiner
  34
  35    $Id: codegen.c 5173 2006-07-25 15:57:11Z twisti $
  36
  37 */
  38
  39
  40 #include "config.h"
  41
  42 #include <assert.h>
  43 #include <stdio.h>
  44
  45 #include "vm/types.h"
  46
  47 #include "md.h"
  48 #include "md-abi.h"
  49
  50 #include "vm/jit/alpha/arch.h"
  51 #include "vm/jit/alpha/codegen.h"
  52
  53 #include "native/jni.h"
  54 #include "native/native.h"
  55
  56 #if defined(ENABLE_THREADS)
  57 # include "threads/native/lock.h"
  58 #endif
  59
  60 #include "vm/builtin.h"
  61 #include "vm/exceptions.h"
  62 #include "vm/global.h"
  63 #include "vm/loader.h"
  64 #include "vm/options.h"
  65 #include "vm/stringlocal.h"
  66 #include "vm/vm.h"
  67 #include "vm/jit/asmpart.h"
  68 #include "vm/jit/codegen-common.h"
  69 #include "vm/jit/dseg.h"
  70 #include "vm/jit/emit.h"
  71 #include "vm/jit/jit.h"
  72 #include "vm/jit/parse.h"
  73 #include "vm/jit/patcher.h"
  74 #include "vm/jit/reg.h"
  75 #include "vm/jit/replace.h"
  76
  77 #if defined(ENABLE_LSRA)
  78 # include "vm/jit/allocator/lsra.h"
  79 #endif
  80
  81
  82 /* codegen *********************************************************************
  83
  84    Generates machine code.
  85
  86 *******************************************************************************/
  87
  88 bool codegen(jitdata *jd)
  89 {
  90         methodinfo         *m;
  91         codeinfo           *code;
  92         codegendata        *cd;
  93         registerdata       *rd;
  94         s4                  len, s1, s2, s3, d, disp;
  95         s4                  stackframesize;
  96         stackptr            src;
  97         varinfo            *var;
  98         basicblock         *bptr;
  99         instruction        *iptr;
 100         exceptiontable     *ex;
 101         u2                  currentline;
 102         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE*  */
 103         builtintable_entry *bte;
 104         methoddesc         *md;
 105         rplpoint           *replacementpoint;
 106
 107         /* get required compiler data */
 108
 109         m    = jd->m;
 110         code = jd->code;
 111         cd   = jd->cd;
 112         rd   = jd->rd;
 113
 114         /* prevent compiler warnings */
 115
 116         d = 0;
 117         currentline = 0;
 118         lm = NULL;
 119         bte = NULL;
 120
 121         {
 122         s4 i, p, t, l;
 123         s4 savedregs_num;
 124
 125         savedregs_num = (jd->isleafmethod) ? 0 : 1;       /* space to save the RA */
 126
 127         /* space to save used callee saved registers */
 128
 129         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
 130         savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
 131
 132         stackframesize = rd->memuse + savedregs_num;
 133
 134 #if defined(ENABLE_THREADS)        /* space to save argument of monitor_enter */
 135         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 136                 stackframesize++;
 137 #endif
 138
 139         /* create method header */
 140
 141 #if 0
 142         stackframesize = (stackframesize + 1) & ~1;    /* align stack to 16-bytes */
 143 #endif
 144
 145         (void) dseg_addaddress(cd, code);                      /* CodeinfoPointer */
 146         (void) dseg_adds4(cd, stackframesize * 8);             /* FrameSize       */
 147
 148 #if defined(ENABLE_THREADS)
 149         /* IsSync contains the offset relative to the stack pointer for the
 150            argument of monitor_exit used in the exception handler. Since the
 151            offset could be zero and give a wrong meaning of the flag it is
 152            offset by one.
 153         */
 154
 155         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 156                 (void) dseg_adds4(cd, (rd->memuse + 1) * 8);       /* IsSync          */
 157         else
 158 #endif
 159                 (void) dseg_adds4(cd, 0);                          /* IsSync          */
 160
 161         (void) dseg_adds4(cd, jd->isleafmethod);               /* IsLeaf          */
 162         (void) dseg_adds4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave         */
 163         (void) dseg_adds4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave         */
 164
 165         dseg_addlinenumbertablesize(cd);
 166
 167         (void) dseg_adds4(cd, cd->exceptiontablelength);       /* ExTableSize     */
 168
 169         /* create exception table */
 170
 171         for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
 172                 dseg_addtarget(cd, ex->start);
 173                 dseg_addtarget(cd, ex->end);
 174                 dseg_addtarget(cd, ex->handler);
 175                 (void) dseg_addaddress(cd, ex->catchtype.cls);
 176         }
 177
 178         /* create stack frame (if necessary) */
 179
 180         if (stackframesize)
 181                 M_LDA(REG_SP, REG_SP, -stackframesize * 8);
 182
 183         /* save return address and used callee saved registers */
 184
 185         p = stackframesize;
 186         if (!jd->isleafmethod) {
 187                 p--; M_AST(REG_RA, REG_SP, p * 8);
 188         }
 189         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
 190                 p--; M_LST(rd->savintregs[i], REG_SP, p * 8);
 191         }
 192         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
 193                 p--; M_DST(rd->savfltregs[i], REG_SP, p * 8);
 194         }
 195
 196         /* take arguments out of register or stack frame */
 197
 198         md = m->parseddesc;
 199
 200         for (p = 0, l = 0; p < md->paramcount; p++) {
 201                 t = md->paramtypes[p].type;
 202                 var = &(rd->locals[l][t]);
 203                 l++;
 204                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 205                         l++;
 206                 if (var->type < 0)
 207                         continue;
 208                 s1 = md->params[p].regoff;
 209                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 210                         if (!md->params[p].inmemory) {           /* register arguments    */
 211                                 s2 = rd->argintregs[s1];
 212                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 213                                         M_INTMOVE(s2, var->regoff);
 214
 215                                 } else {                             /* reg arg -> spilled    */
 216                                         M_LST(s2, REG_SP, var->regoff * 8);
 217                                 }
 218
 219                         } else {                                 /* stack arguments       */
 220                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 221                                         M_LLD(var->regoff, REG_SP, (stackframesize + s1) * 8);
 222
 223                                 } else {                             /* stack arg -> spilled  */
 224                                         var->regoff = stackframesize + s1;
 225                                 }
 226                         }
 227
 228                 } else {                                     /* floating args         */
 229                         if (!md->params[p].inmemory) {           /* register arguments    */
 230                                 s2 = rd->argfltregs[s1];
 231                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 232                                         M_FLTMOVE(s2, var->regoff);
 233
 234                                 } else {                                         /* reg arg -> spilled    */
 235                                         M_DST(s2, REG_SP, var->regoff * 8);
 236                                 }
 237
 238                         } else {                                 /* stack arguments       */
 239                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 240                                         M_DLD(var->regoff, REG_SP, (stackframesize + s1) * 8);
 241
 242                                 } else {                             /* stack-arg -> spilled  */
 243                                         var->regoff = stackframesize + s1;
 244                                 }
 245                         }
 246                 }
 247         } /* end for */
 248
 249         /* call monitorenter function */
 250
 251 #if defined(ENABLE_THREADS)
 252         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 253                 /* stack offset for monitor argument */
 254
 255                 s1 = rd->memuse;
 256
 257 #if !defined(NDEBUG)
 258                 if (opt_verbosecall) {
 259                         M_LDA(REG_SP, REG_SP, -(INT_ARG_CNT + FLT_ARG_CNT) * 8);
 260
 261                         for (p = 0; p < INT_ARG_CNT; p++)
 262                                 M_LST(rd->argintregs[p], REG_SP, p * 8);
 263
 264                         for (p = 0; p < FLT_ARG_CNT; p++)
 265                                 M_DST(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
 266
 267                         s1 += INT_ARG_CNT + FLT_ARG_CNT;
 268                 }
 269 #endif /* !defined(NDEBUG) */
 270
 271                 /* decide which monitor enter function to call */
 272
 273                 if (m->flags & ACC_STATIC) {
 274                         disp = dseg_addaddress(cd, &m->class->object.header);
 275                         M_ALD(rd->argintregs[0], REG_PV, disp);
 276                 }
 277                 else {
 278                         M_BEQZ(rd->argintregs[0], 0);
 279                         codegen_add_nullpointerexception_ref(cd);
 280                 }
 281
 282                 M_AST(rd->argintregs[0], REG_SP, s1 * 8);
 283                 disp = dseg_addaddress(cd, LOCK_monitor_enter);
 284                 M_ALD(REG_PV, REG_PV, disp);
 285                 M_JSR(REG_RA, REG_PV);
 286                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
 287                 M_LDA(REG_PV, REG_RA, -disp);
 288
 289 #if !defined(NDEBUG)
 290                 if (opt_verbosecall) {
 291                         for (p = 0; p < INT_ARG_CNT; p++)
 292                                 M_LLD(rd->argintregs[p], REG_SP, p * 8);
 293
 294                         for (p = 0; p < FLT_ARG_CNT; p++)
 295                                 M_DLD(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
 296
 297                         M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT) * 8);
 298                 }
 299 #endif /* !defined(NDEBUG) */
 300         }
 301 #endif
 302
 303         /* call trace function */
 304
 305 #if !defined(NDEBUG)
 306         if (opt_verbosecall) {
 307                 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
 308                 M_AST(REG_RA, REG_SP, 1 * 8);
 309
 310                 /* save integer argument registers */
 311
 312                 for (p = 0; p < md->paramcount && p < INT_ARG_CNT; p++)
 313                         M_LST(rd->argintregs[p], REG_SP, (2 + p) * 8);
 314
 315                 /* save and copy float arguments into integer registers */
 316
 317                 for (p = 0; p < md->paramcount && p < FLT_ARG_CNT; p++) {
 318                         t = md->paramtypes[p].type;
 319
 320                         if (IS_FLT_DBL_TYPE(t)) {
 321                                 if (IS_2_WORD_TYPE(t)) {
 322                                         M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 323
 324                                 } else {
 325                                         M_FST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 326                                 }
 327
 328                                 M_LLD(rd->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 329
 330                         } else {
 331                                 M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 332                         }
 333                 }
 334
 335                 disp = dseg_addaddress(cd, m);
 336                 M_ALD(REG_ITMP1, REG_PV, disp);
 337                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
 338                 disp = dseg_addaddress(cd, (void *) builtin_trace_args);
 339                 M_ALD(REG_PV, REG_PV, disp);
 340                 M_JSR(REG_RA, REG_PV);
 341                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
 342                 M_LDA(REG_PV, REG_RA, -disp);
 343                 M_ALD(REG_RA, REG_SP, 1 * 8);
 344
 345                 /* restore integer argument registers */
 346
 347                 for (p = 0; p < md->paramcount && p < INT_ARG_CNT; p++)
 348                         M_LLD(rd->argintregs[p], REG_SP, (2 + p) * 8);
 349
 350                 /* restore float argument registers */
 351
 352                 for (p = 0; p < md->paramcount && p < FLT_ARG_CNT; p++) {
 353                         t = md->paramtypes[p].type;
 354
 355                         if (IS_FLT_DBL_TYPE(t)) {
 356                                 if (IS_2_WORD_TYPE(t)) {
 357                                         M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 358
 359                                 } else {
 360                                         M_FLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 361                                 }
 362
 363                         } else {
 364                                 M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 365                         }
 366                 }
 367
 368                 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
 369         }
 370 #endif /* !defined(NDEBUG) */
 371
 372         }
 373
 374         /* end of header generation */
 375
 376         replacementpoint = jd->code->rplpoints;
 377
 378         /* walk through all basic blocks */
 379
 380         for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
 381
 382                 bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase);
 383
 384                 if (bptr->flags >= BBREACHED) {
 385
 386                 /* branch resolving */
 387
 388                 {
 389                 branchref *brefs;
 390                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 391                         gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
 392                                           brefs->branchpos, bptr->mpc);
 393                         }
 394                 }
 395
 396                 /* handle replacement points */
 397
 398                 if (bptr->bitflags & BBFLAG_REPLACEMENT) {
 399                         replacementpoint->pc = (u1*)(ptrint)bptr->mpc; /* will be resolved later */
 400
 401                         replacementpoint++;
 402                 }
 403
 404                 /* copy interface registers to their destination */
 405
 406                 src = bptr->instack;
 407                 len = bptr->indepth;
 408                 MCODECHECK(64+len);
 409 #if defined(ENABLE_LSRA)
 410                 if (opt_lsra) {
 411                 while (src != NULL) {
 412                         len--;
 413                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 414                                         /*                              d = reg_of_var(m, src, REG_ITMP1); */
 415                                         if (!(src->flags & INMEMORY))
 416                                                 d = src->regoff;
 417                                         else
 418                                                 d = REG_ITMP1;
 419                                         M_INTMOVE(REG_ITMP1, d);
 420                                         emit_store(jd, NULL, src, d);
 421                                 }
 422                                 src = src->prev;
 423                         }
 424                 } else {
 425 #endif
 426                         while (src != NULL) {
 427                                 len--;
 428                                 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 429                                         d = codegen_reg_of_var(rd, 0, src, REG_ITMP1);
 430                                         M_INTMOVE(REG_ITMP1, d);
 431                                         emit_store(jd, NULL, src, d);
 432
 433                                 } else {
 434                                         d = codegen_reg_of_var(rd, 0, src, REG_IFTMP);
 435                                         if ((src->varkind != STACKVAR)) {
 436                                                 s2 = src->type;
 437                                                 if (IS_FLT_DBL_TYPE(s2)) {
 438                                                         if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 439                                                                 s1 = rd->interfaces[len][s2].regoff;
 440                                                                 M_FLTMOVE(s1, d);
 441                                                         } else {
 442                                                                 M_DLD(d, REG_SP, rd->interfaces[len][s2].regoff * 8);
 443                                                         }
 444                                                         emit_store(jd, NULL, src, d);
 445                                                 }
 446                                                 else {
 447                                                         if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 448                                                                 s1 = rd->interfaces[len][s2].regoff;
 449                                                                 M_INTMOVE(s1, d);
 450                                                         } else {
 451                                                                 M_LLD(d, REG_SP, rd->interfaces[len][s2].regoff * 8);
 452                                                         }
 453                                                         emit_store(jd, NULL, src, d);
 454                                                 }
 455                                         }
 456                                 }
 457                                 src = src->prev;
 458                         }
 459 #if defined(ENABLE_LSRA)
 460                 }
 461 #endif
 462
 463                 /* walk through all instructions */
 464
 465                 src = bptr->instack;
 466                 len = bptr->icount;
 467
 468                 for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) {
 469                         if (iptr->line != currentline) {
 470                                 dseg_addlinenumber(cd, iptr->line);
 471                                 currentline = iptr->line;
 472                         }
 473
 474                 MCODECHECK(64);       /* an instruction usually needs < 64 words      */
 475                 switch (iptr->opc) {
 476
 477                 case ICMD_INLINE_START:
 478                 case ICMD_INLINE_END:
 479                         break;
 480
 481                 case ICMD_NOP:        /* ...  ==> ...                                 */
 482                         break;
 483
 484                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
 485
 486                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 487                         M_BEQZ(s1, 0);
 488                         codegen_add_nullpointerexception_ref(cd);
 489                         break;
 490
 491                 /* constant operations ************************************************/
 492
 493                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 494                                       /* op1 = 0, val.i = constant                    */
 495
 496                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
 497                         ICONST(d, iptr->val.i);
 498                         emit_store(jd, iptr, iptr->dst, d);
 499                         break;
 500
 501                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 502                                       /* op1 = 0, val.l = constant                    */
 503
 504                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
 505                         LCONST(d, iptr->val.l);
 506                         emit_store(jd, iptr, iptr->dst, d);
 507                         break;
 508
 509                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 510                                       /* op1 = 0, val.f = constant                    */
 511
 512                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
 513                         disp = dseg_addfloat(cd, iptr->val.f);
 514                         M_FLD(d, REG_PV, disp);
 515                         emit_store(jd, iptr, iptr->dst, d);
 516                         break;
 517
 518                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 519                                       /* op1 = 0, val.d = constant                    */
 520
 521                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
 522                         disp = dseg_adddouble(cd, iptr->val.d);
 523                         M_DLD(d, REG_PV, disp);
 524                         emit_store(jd, iptr, iptr->dst, d);
 525                         break;
 526
 527                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 528                                       /* op1 = 0, val.a = constant                    */
 529
 530                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
 531
 532                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
 533                                 disp = dseg_addaddress(cd, NULL);
 534
 535                                 codegen_addpatchref(cd, PATCHER_aconst,
 536                                                                         ICMD_ACONST_UNRESOLVED_CLASSREF(iptr),
 537                                                                         disp);
 538
 539                                 if (opt_showdisassemble)
 540                                         M_NOP;
 541
 542                                 M_ALD(d, REG_PV, disp);
 543
 544                         } else {
 545                                 if (iptr->val.a == NULL) {
 546                                         M_INTMOVE(REG_ZERO, d);
 547                                 } else {
 548                                         disp = dseg_addaddress(cd, iptr->val.a);
 549                                         M_ALD(d, REG_PV, disp);
 550                                 }
 551                         }
 552                         emit_store(jd, iptr, iptr->dst, d);
 553                         break;
 554
 555
 556                 /* load/store operations **********************************************/
 557
 558                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 559                 case ICMD_LLOAD:      /* op1 = local variable                         */
 560                 case ICMD_ALOAD:
 561
 562                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP1);
 563                         if ((iptr->dst->varkind == LOCALVAR) &&
 564                             (iptr->dst->varnum == iptr->op1))
 565                                 break;
 566                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 567                         if (var->flags & INMEMORY) {
 568                                 M_LLD(d, REG_SP, var->regoff * 8);
 569                         } else {
 570                                 M_INTMOVE(var->regoff, d);
 571                         }
 572                         emit_store(jd, iptr, iptr->dst, d);
 573                         break;
 574
 575                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 576                 case ICMD_DLOAD:      /* op1 = local variable                         */
 577
 578                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
 579                         if ((iptr->dst->varkind == LOCALVAR) &&
 580                             (iptr->dst->varnum == iptr->op1))
 581                                 break;
 582                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 583                         if (var->flags & INMEMORY) {
 584                                 M_DLD(d, REG_SP, var->regoff * 8);
 585                         } else {
 586                                 M_FLTMOVE(var->regoff, d);
 587                         }
 588                         emit_store(jd, iptr, iptr->dst, d);
 589                         break;
 590
 591
 592                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 593                 case ICMD_LSTORE:     /* op1 = local variable                         */
 594                 case ICMD_ASTORE:
 595
 596                         if ((src->varkind == LOCALVAR) &&
 597                             (src->varnum == iptr->op1))
 598                                 break;
 599                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 600                         if (var->flags & INMEMORY) {
 601                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 602                                 M_LST(s1, REG_SP, var->regoff * 8);
 603                         } else {
 604                                 s1 = emit_load_s1(jd, iptr, src, var->regoff);
 605                                 M_INTMOVE(s1, var->regoff);
 606                         }
 607                         break;
 608
 609                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 610                 case ICMD_DSTORE:     /* op1 = local variable                         */
 611
 612                         if ((src->varkind == LOCALVAR) &&
 613                             (src->varnum == iptr->op1))
 614                                 break;
 615                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 616                         if (var->flags & INMEMORY) {
 617                                 s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
 618                                 M_DST(s1, REG_SP, var->regoff * 8);
 619                         } else {
 620                                 s1 = emit_load_s1(jd, iptr, src, var->regoff);
 621                                 M_FLTMOVE(s1, var->regoff);
 622                         }
 623                         break;
 624
 625
 626                 /* pop/dup/swap operations ********************************************/
 627
 628                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 629
 630                 case ICMD_POP:        /* ..., value  ==> ...                          */
 631                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 632                         break;
 633
 634                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 635                         M_COPY(src, iptr->dst);
 636                         break;
 637
 638                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 639
 640                         M_COPY(src,       iptr->dst);
 641                         M_COPY(src->prev, iptr->dst->prev);
 642                         M_COPY(iptr->dst, iptr->dst->prev->prev);
 643                         break;
 644
 645                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 646
 647                         M_COPY(src,             iptr->dst);
 648                         M_COPY(src->prev,       iptr->dst->prev);
 649                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 650                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 651                         break;
 652
 653                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 654
 655                         M_COPY(src,       iptr->dst);
 656                         M_COPY(src->prev, iptr->dst->prev);
 657                         break;
 658
 659                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 660
 661                         M_COPY(src,             iptr->dst);
 662                         M_COPY(src->prev,       iptr->dst->prev);
 663                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 664                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 665                         M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
 666                         break;
 667
 668                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 669
 670                         M_COPY(src,                   iptr->dst);
 671                         M_COPY(src->prev,             iptr->dst->prev);
 672                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 673                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 674                         M_COPY(iptr->dst,             iptr->dst->prev->prev->prev->prev);
 675                         M_COPY(iptr->dst->prev,       iptr->dst->prev->prev->prev->prev->prev);
 676                         break;
 677
 678                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 679
 680                         M_COPY(src,       iptr->dst->prev);
 681                         M_COPY(src->prev, iptr->dst);
 682                         break;
 683
 684
 685                 /* integer operations *************************************************/
 686
 687                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 688
 689                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 690                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 691                         M_ISUB(REG_ZERO, s1, d);
 692                         emit_store(jd, iptr, iptr->dst, d);
 693                         break;
 694
 695                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 696
 697                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 698                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 699                         M_LSUB(REG_ZERO, s1, d);
 700                         emit_store(jd, iptr, iptr->dst, d);
 701                         break;
 702
 703                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 704
 705                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 706                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 707                         M_INTMOVE(s1, d);
 708                         emit_store(jd, iptr, iptr->dst, d);
 709                         break;
 710
 711                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 712
 713                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 714                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 715                         M_IADD(s1, REG_ZERO, d);
 716                         emit_store(jd, iptr, iptr->dst, d);
 717                         break;
 718
 719                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 720
 721                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 722                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 723                         if (has_ext_instr_set) {
 724                                 M_BSEXT(s1, d);
 725                         } else {
 726                                 M_SLL_IMM(s1, 56, d);
 727                                 M_SRA_IMM( d, 56, d);
 728                         }
 729                         emit_store(jd, iptr, iptr->dst, d);
 730                         break;
 731
 732                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 733
 734                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 735                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 736             M_CZEXT(s1, d);
 737                         emit_store(jd, iptr, iptr->dst, d);
 738                         break;
 739
 740                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 741
 742                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 743                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 744                         if (has_ext_instr_set) {
 745                                 M_SSEXT(s1, d);
 746                         } else {
 747                                 M_SLL_IMM(s1, 48, d);
 748                                 M_SRA_IMM( d, 48, d);
 749                         }
 750                         emit_store(jd, iptr, iptr->dst, d);
 751                         break;
 752
 753
 754                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 755
 756                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 757                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 758                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 759                         M_IADD(s1, s2, d);
 760                         emit_store(jd, iptr, iptr->dst, d);
 761                         break;
 762
 763                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 764                                       /* val.i = constant                             */
 765
 766                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 767                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 768                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 769                                 M_IADD_IMM(s1, iptr->val.i, d);
 770                         } else {
 771                                 ICONST(REG_ITMP2, iptr->val.i);
 772                                 M_IADD(s1, REG_ITMP2, d);
 773                         }
 774                         emit_store(jd, iptr, iptr->dst, d);
 775                         break;
 776
 777                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 778
 779                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 780                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 781                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 782                         M_LADD(s1, s2, d);
 783                         emit_store(jd, iptr, iptr->dst, d);
 784                         break;
 785
 786                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 787                                       /* val.l = constant                             */
 788
 789                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 790                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 791                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 792                                 M_LADD_IMM(s1, iptr->val.l, d);
 793                         } else {
 794                                 LCONST(REG_ITMP2, iptr->val.l);
 795                                 M_LADD(s1, REG_ITMP2, d);
 796                         }
 797                         emit_store(jd, iptr, iptr->dst, d);
 798                         break;
 799
 800                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 801
 802                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 803                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 804                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 805                         M_ISUB(s1, s2, d);
 806                         emit_store(jd, iptr, iptr->dst, d);
 807                         break;
 808
 809                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 810                                       /* val.i = constant                             */
 811
 812                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 813                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 814                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 815                                 M_ISUB_IMM(s1, iptr->val.i, d);
 816                         } else {
 817                                 ICONST(REG_ITMP2, iptr->val.i);
 818                                 M_ISUB(s1, REG_ITMP2, d);
 819                         }
 820                         emit_store(jd, iptr, iptr->dst, d);
 821                         break;
 822
 823                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 824
 825                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 826                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 827                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 828                         M_LSUB(s1, s2, d);
 829                         emit_store(jd, iptr, iptr->dst, d);
 830                         break;
 831
 832                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 833                                       /* val.l = constant                             */
 834
 835                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 836                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 837                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 838                                 M_LSUB_IMM(s1, iptr->val.l, d);
 839                         } else {
 840                                 LCONST(REG_ITMP2, iptr->val.l);
 841                                 M_LSUB(s1, REG_ITMP2, d);
 842                         }
 843                         emit_store(jd, iptr, iptr->dst, d);
 844                         break;
 845
 846                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 847
 848                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 849                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 850                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 851                         M_IMUL(s1, s2, d);
 852                         emit_store(jd, iptr, iptr->dst, d);
 853                         break;
 854
 855                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 856                                       /* val.i = constant                             */
 857
 858                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 859                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 860                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 861                                 M_IMUL_IMM(s1, iptr->val.i, d);
 862                         } else {
 863                                 ICONST(REG_ITMP2, iptr->val.i);
 864                                 M_IMUL(s1, REG_ITMP2, d);
 865                         }
 866                         emit_store(jd, iptr, iptr->dst, d);
 867                         break;
 868
 869                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 870
 871                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 872                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 873                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 874                         M_LMUL(s1, s2, d);
 875                         emit_store(jd, iptr, iptr->dst, d);
 876                         break;
 877
 878                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
 879                                       /* val.l = constant                             */
 880
 881                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 882                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 883                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 884                                 M_LMUL_IMM(s1, iptr->val.l, d);
 885                         } else {
 886                                 LCONST(REG_ITMP2, iptr->val.l);
 887                                 M_LMUL(s1, REG_ITMP2, d);
 888                         }
 889                         emit_store(jd, iptr, iptr->dst, d);
 890                         break;
 891
 892                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 893                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 894
 895                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 896                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 897                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_RESULT);
 898                         M_BEQZ(s2, 0);
 899                         codegen_add_arithmeticexception_ref(cd);
 900
 901                         M_MOV(s1, rd->argintregs[0]);
 902                         M_MOV(s2, rd->argintregs[1]);
 903                         bte = iptr->val.a;
 904                         disp = dseg_addaddress(cd, bte->fp);
 905                         M_ALD(REG_PV, REG_PV, disp);
 906                         M_JSR(REG_RA, REG_PV);
 907                         disp = (s4) (cd->mcodeptr - cd->mcodebase);
 908                         M_LDA(REG_PV, REG_RA, -disp);
 909
 910                         M_IADD(REG_RESULT, REG_ZERO, d); /* sign extend (bugfix for gcc -O2) */
 911                         emit_store(jd, iptr, iptr->dst, d);
 912                         break;
 913
 914                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 915                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 916
 917                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 918                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 919                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_RESULT);
 920                         M_BEQZ(s2, 0);
 921                         codegen_add_arithmeticexception_ref(cd);
 922
 923                         M_MOV(s1, rd->argintregs[0]);
 924                         M_MOV(s2, rd->argintregs[1]);
 925                         bte = iptr->val.a;
 926                         disp = dseg_addaddress(cd, bte->fp);
 927                         M_ALD(REG_PV, REG_PV, disp);
 928                         M_JSR(REG_RA, REG_PV);
 929                         disp = (s4) (cd->mcodeptr - cd->mcodebase);
 930                         M_LDA(REG_PV, REG_RA, -disp);
 931
 932                         M_INTMOVE(REG_RESULT, d);
 933                         emit_store(jd, iptr, iptr->dst, d);
 934                         break;
 935
 936                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
 937                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
 938
 939                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 940                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 941                         if (iptr->val.i <= 15) {
 942                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
 943                                 M_CMOVGE(s1, s1, REG_ITMP2);
 944                         } else {
 945                                 M_SRA_IMM(s1, 63, REG_ITMP2);
 946                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
 947                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
 948                         }
 949                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
 950                         emit_store(jd, iptr, iptr->dst, d);
 951                         break;
 952
 953                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 954
 955                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 956                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 957                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 958                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 959                         M_SLL(s1, REG_ITMP3, d);
 960                         M_IADD(d, REG_ZERO, d);
 961                         emit_store(jd, iptr, iptr->dst, d);
 962                         break;
 963
 964                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
 965                                       /* val.i = constant                             */
 966
 967                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 968                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 969                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
 970                         M_IADD(d, REG_ZERO, d);
 971                         emit_store(jd, iptr, iptr->dst, d);
 972                         break;
 973
 974                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
 975
 976                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 977                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 978                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 979                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 980                         M_SRA(s1, REG_ITMP3, d);
 981                         emit_store(jd, iptr, iptr->dst, d);
 982                         break;
 983
 984                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
 985                                       /* val.i = constant                             */
 986
 987                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
 988                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 989                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
 990                         emit_store(jd, iptr, iptr->dst, d);
 991                         break;
 992
 993                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
 994
 995                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
 996                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
 997                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
 998                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
 999             M_IZEXT(s1, d);
1000                         M_SRL(d, REG_ITMP2, d);
1001                         M_IADD(d, REG_ZERO, d);
1002                         emit_store(jd, iptr, iptr->dst, d);
1003                         break;
1004
1005                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1006                                       /* val.i = constant                             */
1007
1008                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1009                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1010             M_IZEXT(s1, d);
1011                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
1012                         M_IADD(d, REG_ZERO, d);
1013                         emit_store(jd, iptr, iptr->dst, d);
1014                         break;
1015
1016                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1017
1018                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1019                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1020                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1021                         M_SLL(s1, s2, d);
1022                         emit_store(jd, iptr, iptr->dst, d);
1023                         break;
1024
1025                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1026                                       /* val.i = constant                             */
1027
1028                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1029                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1030                         M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
1031                         emit_store(jd, iptr, iptr->dst, d);
1032                         break;
1033
1034                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1035
1036                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1037                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1038                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1039                         M_SRA(s1, s2, d);
1040                         emit_store(jd, iptr, iptr->dst, d);
1041                         break;
1042
1043                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1044                                       /* val.i = constant                             */
1045
1046                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1047                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1048                         M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
1049                         emit_store(jd, iptr, iptr->dst, d);
1050                         break;
1051
1052                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1053
1054                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1055                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1056                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1057                         M_SRL(s1, s2, d);
1058                         emit_store(jd, iptr, iptr->dst, d);
1059                         break;
1060
1061                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1062                                       /* val.i = constant                             */
1063
1064                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1065                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1066                         M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
1067                         emit_store(jd, iptr, iptr->dst, d);
1068                         break;
1069
1070                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1071                 case ICMD_LAND:
1072
1073                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1074                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1075                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1076                         M_AND(s1, s2, d);
1077                         emit_store(jd, iptr, iptr->dst, d);
1078                         break;
1079
1080                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1081                                       /* val.i = constant                             */
1082
1083                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1084                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1085                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1086                                 M_AND_IMM(s1, iptr->val.i, d);
1087                         } else if (iptr->val.i == 0xffff) {
1088                                 M_CZEXT(s1, d);
1089                         } else if (iptr->val.i == 0xffffff) {
1090                                 M_ZAPNOT_IMM(s1, 0x07, d);
1091                         } else {
1092                                 ICONST(REG_ITMP2, iptr->val.i);
1093                                 M_AND(s1, REG_ITMP2, d);
1094                         }
1095                         emit_store(jd, iptr, iptr->dst, d);
1096                         break;
1097
1098                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1099                                       /* val.i = constant                             */
1100
1101                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1102                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1103                         if (s1 == d) {
1104                                 M_MOV(s1, REG_ITMP1);
1105                                 s1 = REG_ITMP1;
1106                         }
1107                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1108                                 M_AND_IMM(s1, iptr->val.i, d);
1109                                 M_BGEZ(s1, 3);
1110                                 M_ISUB(REG_ZERO, s1, d);
1111                                 M_AND_IMM(d, iptr->val.i, d);
1112                         } else if (iptr->val.i == 0xffff) {
1113                                 M_CZEXT(s1, d);
1114                                 M_BGEZ(s1, 3);
1115                                 M_ISUB(REG_ZERO, s1, d);
1116                                 M_CZEXT(d, d);
1117                         } else if (iptr->val.i == 0xffffff) {
1118                                 M_ZAPNOT_IMM(s1, 0x07, d);
1119                                 M_BGEZ(s1, 3);
1120                                 M_ISUB(REG_ZERO, s1, d);
1121                                 M_ZAPNOT_IMM(d, 0x07, d);
1122                         } else {
1123                                 ICONST(REG_ITMP2, iptr->val.i);
1124                                 M_AND(s1, REG_ITMP2, d);
1125                                 M_BGEZ(s1, 3);
1126                                 M_ISUB(REG_ZERO, s1, d);
1127                                 M_AND(d, REG_ITMP2, d);
1128                         }
1129                         M_ISUB(REG_ZERO, d, d);
1130                         emit_store(jd, iptr, iptr->dst, d);
1131                         break;
1132
1133                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1134                                       /* val.l = constant                             */
1135
1136                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1137                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1138                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1139                                 M_AND_IMM(s1, iptr->val.l, d);
1140                         } else if (iptr->val.l == 0xffffL) {
1141                                 M_CZEXT(s1, d);
1142                         } else if (iptr->val.l == 0xffffffL) {
1143                                 M_ZAPNOT_IMM(s1, 0x07, d);
1144                         } else if (iptr->val.l == 0xffffffffL) {
1145                                 M_IZEXT(s1, d);
1146                         } else if (iptr->val.l == 0xffffffffffL) {
1147                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1148                         } else if (iptr->val.l == 0xffffffffffffL) {
1149                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1150                         } else if (iptr->val.l == 0xffffffffffffffL) {
1151                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1152                         } else {
1153                                 LCONST(REG_ITMP2, iptr->val.l);
1154                                 M_AND(s1, REG_ITMP2, d);
1155                         }
1156                         emit_store(jd, iptr, iptr->dst, d);
1157                         break;
1158
1159                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1160                                       /* val.l = constant                             */
1161
1162                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1163                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1164                         if (s1 == d) {
1165                                 M_MOV(s1, REG_ITMP1);
1166                                 s1 = REG_ITMP1;
1167                         }
1168                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1169                                 M_AND_IMM(s1, iptr->val.l, d);
1170                                 M_BGEZ(s1, 3);
1171                                 M_LSUB(REG_ZERO, s1, d);
1172                                 M_AND_IMM(d, iptr->val.l, d);
1173                         } else if (iptr->val.l == 0xffffL) {
1174                                 M_CZEXT(s1, d);
1175                                 M_BGEZ(s1, 3);
1176                                 M_LSUB(REG_ZERO, s1, d);
1177                                 M_CZEXT(d, d);
1178                         } else if (iptr->val.l == 0xffffffL) {
1179                                 M_ZAPNOT_IMM(s1, 0x07, d);
1180                                 M_BGEZ(s1, 3);
1181                                 M_LSUB(REG_ZERO, s1, d);
1182                                 M_ZAPNOT_IMM(d, 0x07, d);
1183                         } else if (iptr->val.l == 0xffffffffL) {
1184                                 M_IZEXT(s1, d);
1185                                 M_BGEZ(s1, 3);
1186                                 M_LSUB(REG_ZERO, s1, d);
1187                                 M_IZEXT(d, d);
1188                         } else if (iptr->val.l == 0xffffffffffL) {
1189                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1190                                 M_BGEZ(s1, 3);
1191                                 M_LSUB(REG_ZERO, s1, d);
1192                                 M_ZAPNOT_IMM(d, 0x1f, d);
1193                         } else if (iptr->val.l == 0xffffffffffffL) {
1194                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1195                                 M_BGEZ(s1, 3);
1196                                 M_LSUB(REG_ZERO, s1, d);
1197                                 M_ZAPNOT_IMM(d, 0x3f, d);
1198                         } else if (iptr->val.l == 0xffffffffffffffL) {
1199                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1200                                 M_BGEZ(s1, 3);
1201                                 M_LSUB(REG_ZERO, s1, d);
1202                                 M_ZAPNOT_IMM(d, 0x7f, d);
1203                         } else {
1204                                 LCONST(REG_ITMP2, iptr->val.l);
1205                                 M_AND(s1, REG_ITMP2, d);
1206                                 M_BGEZ(s1, 3);
1207                                 M_LSUB(REG_ZERO, s1, d);
1208                                 M_AND(d, REG_ITMP2, d);
1209                         }
1210                         M_LSUB(REG_ZERO, d, d);
1211                         emit_store(jd, iptr, iptr->dst, d);
1212                         break;
1213
1214                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1215                 case ICMD_LOR:
1216
1217                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1218                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1219                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1220                         M_OR( s1,s2, d);
1221                         emit_store(jd, iptr, iptr->dst, d);
1222                         break;
1223
1224                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1225                                       /* val.i = constant                             */
1226
1227                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1228                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1229                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1230                                 M_OR_IMM(s1, iptr->val.i, d);
1231                         } else {
1232                                 ICONST(REG_ITMP2, iptr->val.i);
1233                                 M_OR(s1, REG_ITMP2, d);
1234                         }
1235                         emit_store(jd, iptr, iptr->dst, d);
1236                         break;
1237
1238                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1239                                       /* val.l = constant                             */
1240
1241                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1242                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1243                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1244                                 M_OR_IMM(s1, iptr->val.l, d);
1245                         } else {
1246                                 LCONST(REG_ITMP2, iptr->val.l);
1247                                 M_OR(s1, REG_ITMP2, d);
1248                         }
1249                         emit_store(jd, iptr, iptr->dst, d);
1250                         break;
1251
1252                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1253                 case ICMD_LXOR:
1254
1255                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1256                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1257                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1258                         M_XOR(s1, s2, d);
1259                         emit_store(jd, iptr, iptr->dst, d);
1260                         break;
1261
1262                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1263                                       /* val.i = constant                             */
1264
1265                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1266                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1267                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1268                                 M_XOR_IMM(s1, iptr->val.i, d);
1269                         } else {
1270                                 ICONST(REG_ITMP2, iptr->val.i);
1271                                 M_XOR(s1, REG_ITMP2, d);
1272                         }
1273                         emit_store(jd, iptr, iptr->dst, d);
1274                         break;
1275
1276                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1277                                       /* val.l = constant                             */
1278
1279                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1280                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1281                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1282                                 M_XOR_IMM(s1, iptr->val.l, d);
1283                         } else {
1284                                 LCONST(REG_ITMP2, iptr->val.l);
1285                                 M_XOR(s1, REG_ITMP2, d);
1286                         }
1287                         emit_store(jd, iptr, iptr->dst, d);
1288                         break;
1289
1290
1291                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1292
1293                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1294                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1295                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1296                         M_CMPLT(s1, s2, REG_ITMP3);
1297                         M_CMPLT(s2, s1, REG_ITMP1);
1298                         M_LSUB(REG_ITMP1, REG_ITMP3, d);
1299                         emit_store(jd, iptr, iptr->dst, d);
1300                         break;
1301
1302
1303                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1304                                       /* op1 = variable, val.i = constant             */
1305
1306                         var = &(rd->locals[iptr->op1][TYPE_INT]);
1307                         if (var->flags & INMEMORY) {
1308                                 s1 = REG_ITMP1;
1309                                 M_LLD(s1, REG_SP, var->regoff * 8);
1310                         } else
1311                                 s1 = var->regoff;
1312                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1313                                 M_IADD_IMM(s1, iptr->val.i, s1);
1314                         } else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1315                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1316                         } else {
1317                                 M_LDA (s1, s1, iptr->val.i);
1318                                 M_IADD(s1, REG_ZERO, s1);
1319                         }
1320                         if (var->flags & INMEMORY)
1321                                 M_LST(s1, REG_SP, var->regoff * 8);
1322                         break;
1323
1324
1325                 /* floating operations ************************************************/
1326
1327                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1328
1329                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1330                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP2);
1331                         M_FMOVN(s1, d);
1332                         emit_store(jd, iptr, iptr->dst, d);
1333                         break;
1334
1335                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1336
1337                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1338                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP2);
1339                         M_FMOVN(s1, d);
1340                         emit_store(jd, iptr, iptr->dst, d);
1341                         break;
1342
1343                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1344
1345                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1346                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1347                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1348                         if (opt_noieee) {
1349                                 M_FADD(s1, s2, d);
1350                         } else {
1351                                 if (d == s1 || d == s2) {
1352                                         M_FADDS(s1, s2, REG_FTMP3);
1353                                         M_TRAPB;
1354                                         M_FMOV(REG_FTMP3, d);
1355                                 } else {
1356                                         M_FADDS(s1, s2, d);
1357                                         M_TRAPB;
1358                                 }
1359                         }
1360                         emit_store(jd, iptr, iptr->dst, d);
1361                         break;
1362
1363                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1364
1365                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1366                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1367                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1368                         if (opt_noieee) {
1369                                 M_DADD(s1, s2, d);
1370                         } else {
1371                                 if (d == s1 || d == s2) {
1372                                         M_DADDS(s1, s2, REG_FTMP3);
1373                                         M_TRAPB;
1374                                         M_FMOV(REG_FTMP3, d);
1375                                 } else {
1376                                         M_DADDS(s1, s2, d);
1377                                         M_TRAPB;
1378                                 }
1379                         }
1380                         emit_store(jd, iptr, iptr->dst, d);
1381                         break;
1382
1383                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1384
1385                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1386                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1387                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1388                         if (opt_noieee) {
1389                                 M_FSUB(s1, s2, d);
1390                         } else {
1391                                 if (d == s1 || d == s2) {
1392                                         M_FSUBS(s1, s2, REG_FTMP3);
1393                                         M_TRAPB;
1394                                         M_FMOV(REG_FTMP3, d);
1395                                 } else {
1396                                         M_FSUBS(s1, s2, d);
1397                                         M_TRAPB;
1398                                 }
1399                         }
1400                         emit_store(jd, iptr, iptr->dst, d);
1401                         break;
1402
1403                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1404
1405                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1406                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1407                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1408                         if (opt_noieee) {
1409                                 M_DSUB(s1, s2, d);
1410                         } else {
1411                                 if (d == s1 || d == s2) {
1412                                         M_DSUBS(s1, s2, REG_FTMP3);
1413                                         M_TRAPB;
1414                                         M_FMOV(REG_FTMP3, d);
1415                                 } else {
1416                                         M_DSUBS(s1, s2, d);
1417                                         M_TRAPB;
1418                                 }
1419                         }
1420                         emit_store(jd, iptr, iptr->dst, d);
1421                         break;
1422
1423                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1424
1425                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1426                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1427                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1428                         if (opt_noieee) {
1429                                 M_FMUL(s1, s2, d);
1430                         } else {
1431                                 if (d == s1 || d == s2) {
1432                                         M_FMULS(s1, s2, REG_FTMP3);
1433                                         M_TRAPB;
1434                                         M_FMOV(REG_FTMP3, d);
1435                                 } else {
1436                                         M_FMULS(s1, s2, d);
1437                                         M_TRAPB;
1438                                 }
1439                         }
1440                         emit_store(jd, iptr, iptr->dst, d);
1441                         break;
1442
1443                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2      */
1444
1445                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1446                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1447                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1448                         if (opt_noieee) {
1449                                 M_DMUL(s1, s2, d);
1450                         } else {
1451                                 if (d == s1 || d == s2) {
1452                                         M_DMULS(s1, s2, REG_FTMP3);
1453                                         M_TRAPB;
1454                                         M_FMOV(REG_FTMP3, d);
1455                                 } else {
1456                                         M_DMULS(s1, s2, d);
1457                                         M_TRAPB;
1458                                 }
1459                         }
1460                         emit_store(jd, iptr, iptr->dst, d);
1461                         break;
1462
1463                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1464
1465                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1466                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1467                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1468                         if (opt_noieee) {
1469                                 M_FDIV(s1, s2, d);
1470                         } else {
1471                                 if (d == s1 || d == s2) {
1472                                         M_FDIVS(s1, s2, REG_FTMP3);
1473                                         M_TRAPB;
1474                                         M_FMOV(REG_FTMP3, d);
1475                                 } else {
1476                                         M_FDIVS(s1, s2, d);
1477                                         M_TRAPB;
1478                                 }
1479                         }
1480                         emit_store(jd, iptr, iptr->dst, d);
1481                         break;
1482
1483                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1484
1485                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1486                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1487                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1488                         if (opt_noieee) {
1489                                 M_DDIV(s1, s2, d);
1490                         } else {
1491                                 if (d == s1 || d == s2) {
1492                                         M_DDIVS(s1, s2, REG_FTMP3);
1493                                         M_TRAPB;
1494                                         M_FMOV(REG_FTMP3, d);
1495                                 } else {
1496                                         M_DDIVS(s1, s2, d);
1497                                         M_TRAPB;
1498                                 }
1499                         }
1500                         emit_store(jd, iptr, iptr->dst, d);
1501                         break;
1502
1503                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1504                 case ICMD_L2F:
1505                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1506                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1507                         disp = dseg_adddouble(cd, 0.0);
1508                         M_LST(s1, REG_PV, disp);
1509                         M_DLD(d, REG_PV, disp);
1510                         M_CVTLF(d, d);
1511                         emit_store(jd, iptr, iptr->dst, d);
1512                         break;
1513
1514                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1515                 case ICMD_L2D:
1516                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1517                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1518                         disp = dseg_adddouble(cd, 0.0);
1519                         M_LST(s1, REG_PV, disp);
1520                         M_DLD(d, REG_PV, disp);
1521                         M_CVTLD(d, d);
1522                         emit_store(jd, iptr, iptr->dst, d);
1523                         break;
1524
1525                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1526                 case ICMD_D2I:
1527                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1528                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3);
1529                         disp = dseg_adddouble(cd, 0.0);
1530                         M_CVTDL_C(s1, REG_FTMP2);
1531                         M_CVTLI(REG_FTMP2, REG_FTMP3);
1532                         M_DST(REG_FTMP3, REG_PV, disp);
1533                         M_ILD(d, REG_PV, disp);
1534                         emit_store(jd, iptr, iptr->dst, d);
1535                         break;
1536
1537                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1538                 case ICMD_D2L:
1539                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1540                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3);
1541                         disp = dseg_adddouble(cd, 0.0);
1542                         M_CVTDL_C(s1, REG_FTMP2);
1543                         M_DST(REG_FTMP2, REG_PV, disp);
1544                         M_LLD(d, REG_PV, disp);
1545                         emit_store(jd, iptr, iptr->dst, d);
1546                         break;
1547
1548                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1549
1550                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1551                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1552                         M_CVTFDS(s1, d);
1553                         M_TRAPB;
1554                         emit_store(jd, iptr, iptr->dst, d);
1555                         break;
1556
1557                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1558
1559                         s1 = emit_load_s1(jd, iptr, src, REG_FTMP1);
1560                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP3);
1561                         if (opt_noieee) {
1562                                 M_CVTDF(s1, d);
1563                         } else {
1564                                 M_CVTDFS(s1, d);
1565                                 M_TRAPB;
1566                         }
1567                         emit_store(jd, iptr, iptr->dst, d);
1568                         break;
1569
1570                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1571                 case ICMD_DCMPL:
1572                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1573                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1574                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3);
1575                         if (opt_noieee) {
1576                                 M_LSUB_IMM(REG_ZERO, 1, d);
1577                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1578                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1579                                 M_CLR   (d);
1580                                 M_FCMPLT(s2, s1, REG_FTMP3);
1581                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1582                                 M_LADD_IMM(REG_ZERO, 1, d);
1583                         } else {
1584                                 M_LSUB_IMM(REG_ZERO, 1, d);
1585                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1586                                 M_TRAPB;
1587                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1588                                 M_CLR   (d);
1589                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1590                                 M_TRAPB;
1591                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1592                                 M_LADD_IMM(REG_ZERO, 1, d);
1593                         }
1594                         emit_store(jd, iptr, iptr->dst, d);
1595                         break;
1596
1597                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1598                 case ICMD_DCMPG:
1599                         s1 = emit_load_s1(jd, iptr, src->prev, REG_FTMP1);
1600                         s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
1601                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP3);
1602                         if (opt_noieee) {
1603                                 M_LADD_IMM(REG_ZERO, 1, d);
1604                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1605                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1606                                 M_CLR   (d);
1607                                 M_FCMPLT(s1, s2, REG_FTMP3);
1608                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1609                                 M_LSUB_IMM(REG_ZERO, 1, d);
1610                         } else {
1611                                 M_LADD_IMM(REG_ZERO, 1, d);
1612                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1613                                 M_TRAPB;
1614                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1615                                 M_CLR   (d);
1616                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1617                                 M_TRAPB;
1618                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1619                                 M_LSUB_IMM(REG_ZERO, 1, d);
1620                         }
1621                         emit_store(jd, iptr, iptr->dst, d);
1622                         break;
1623
1624
1625                 /* memory operations **************************************************/
1626
1627                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1628
1629                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
1630                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1631                         gen_nullptr_check(s1);
1632                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1633                         emit_store(jd, iptr, iptr->dst, d);
1634                         break;
1635
1636                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1637
1638                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1639                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1640                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1641                         if (iptr->op1 == 0) {
1642                                 gen_nullptr_check(s1);
1643                                 gen_bound_check;
1644                         }
1645                         if (has_ext_instr_set) {
1646                                 M_LADD   (s2, s1, REG_ITMP1);
1647                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
1648                                 M_BSEXT  (d, d);
1649                         } else {
1650                                 M_LADD(s2, s1, REG_ITMP1);
1651                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1652                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
1653                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1654                                 M_SRA_IMM(d, 56, d);
1655                         }
1656                         emit_store(jd, iptr, iptr->dst, d);
1657                         break;
1658
1659                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1660
1661                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1662                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1663                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1664                         if (iptr->op1 == 0) {
1665                                 gen_nullptr_check(s1);
1666                                 gen_bound_check;
1667                         }
1668                         if (has_ext_instr_set) {
1669                                 M_LADD(s2, s1, REG_ITMP1);
1670                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1671                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1672                         } else {
1673                                 M_LADD (s2, s1, REG_ITMP1);
1674                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1675                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1676                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1677                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
1678                         }
1679                         emit_store(jd, iptr, iptr->dst, d);
1680                         break;
1681
1682                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1683
1684                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1685                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1686                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1687                         if (iptr->op1 == 0) {
1688                                 gen_nullptr_check(s1);
1689                                 gen_bound_check;
1690                         }
1691                         if (has_ext_instr_set) {
1692                                 M_LADD(s2, s1, REG_ITMP1);
1693                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1694                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
1695                                 M_SSEXT(d, d);
1696                         } else {
1697                                 M_LADD(s2, s1, REG_ITMP1);
1698                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1699                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1700                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
1701                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1702                                 M_SRA_IMM(d, 48, d);
1703                         }
1704                         emit_store(jd, iptr, iptr->dst, d);
1705                         break;
1706
1707                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1708
1709                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1710                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1711                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1712                         if (iptr->op1 == 0) {
1713                                 gen_nullptr_check(s1);
1714                                 gen_bound_check;
1715                         }
1716                         M_S4ADDQ(s2, s1, REG_ITMP1);
1717                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1718                         emit_store(jd, iptr, iptr->dst, d);
1719                         break;
1720
1721                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1722
1723                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1724                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1725                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1726                         if (iptr->op1 == 0) {
1727                                 gen_nullptr_check(s1);
1728                                 gen_bound_check;
1729                         }
1730                         M_S8ADDQ(s2, s1, REG_ITMP1);
1731                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1732                         emit_store(jd, iptr, iptr->dst, d);
1733                         break;
1734
1735                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1736
1737                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1738                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1739                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP2);
1740                         if (iptr->op1 == 0) {
1741                                 gen_nullptr_check(s1);
1742                                 gen_bound_check;
1743                         }
1744                         M_S4ADDQ(s2, s1, REG_ITMP1);
1745                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1746                         emit_store(jd, iptr, iptr->dst, d);
1747                         break;
1748
1749                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1750
1751                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1752                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1753                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP2);
1754                         if (iptr->op1 == 0) {
1755                                 gen_nullptr_check(s1);
1756                                 gen_bound_check;
1757                         }
1758                         M_S8ADDQ(s2, s1, REG_ITMP1);
1759                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1760                         emit_store(jd, iptr, iptr->dst, d);
1761                         break;
1762
1763                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1764
1765                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1766                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1767                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
1768                         if (iptr->op1 == 0) {
1769                                 gen_nullptr_check(s1);
1770                                 gen_bound_check;
1771                         }
1772                         M_SAADDQ(s2, s1, REG_ITMP1);
1773                         M_ALD(d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1774                         emit_store(jd, iptr, iptr->dst, d);
1775                         break;
1776
1777
1778                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1779
1780                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1781                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1782                         if (iptr->op1 == 0) {
1783                                 gen_nullptr_check(s1);
1784                                 gen_bound_check;
1785                         }
1786                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1787                         if (has_ext_instr_set) {
1788                                 M_LADD(s2, s1, REG_ITMP1);
1789                                 M_BST(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1790                         } else {
1791                                 M_LADD(s2, s1, REG_ITMP1);
1792                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1793                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1794                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
1795                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1796                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1797                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1798                         }
1799                         break;
1800
1801                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1802
1803                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1804                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1805                         if (iptr->op1 == 0) {
1806                                 gen_nullptr_check(s1);
1807                                 gen_bound_check;
1808                         }
1809                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1810                         if (has_ext_instr_set) {
1811                                 M_LADD(s2, s1, REG_ITMP1);
1812                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1813                                 M_SST(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1814                         } else {
1815                                 M_LADD(s2, s1, REG_ITMP1);
1816                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1817                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1818                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1819                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1820                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1821                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1822                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1823                         }
1824                         break;
1825
1826                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1827
1828                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1829                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1830                         if (iptr->op1 == 0) {
1831                                 gen_nullptr_check(s1);
1832                                 gen_bound_check;
1833                         }
1834                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1835                         if (has_ext_instr_set) {
1836                                 M_LADD(s2, s1, REG_ITMP1);
1837                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1838                                 M_SST(s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1839                         } else {
1840                                 M_LADD(s2, s1, REG_ITMP1);
1841                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1842                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1843                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1844                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1845                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1846                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1847                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1848                         }
1849                         break;
1850
1851                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1852
1853                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1854                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1855                         if (iptr->op1 == 0) {
1856                                 gen_nullptr_check(s1);
1857                                 gen_bound_check;
1858                         }
1859                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1860                         M_S4ADDQ(s2, s1, REG_ITMP1);
1861                         M_IST(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1862                         break;
1863
1864                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1865
1866                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1867                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1868                         if (iptr->op1 == 0) {
1869                                 gen_nullptr_check(s1);
1870                                 gen_bound_check;
1871                         }
1872                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1873                         M_S8ADDQ(s2, s1, REG_ITMP1);
1874                         M_LST(s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1875                         break;
1876
1877                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1878
1879                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1880                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1881                         if (iptr->op1 == 0) {
1882                                 gen_nullptr_check(s1);
1883                                 gen_bound_check;
1884                         }
1885                         s3 = emit_load_s3(jd, iptr, src, REG_FTMP3);
1886                         M_S4ADDQ(s2, s1, REG_ITMP1);
1887                         M_FST(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1888                         break;
1889
1890                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1891
1892                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1893                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1894                         if (iptr->op1 == 0) {
1895                                 gen_nullptr_check(s1);
1896                                 gen_bound_check;
1897                         }
1898                         s3 = emit_load_s3(jd, iptr, src, REG_FTMP3);
1899                         M_S8ADDQ(s2, s1, REG_ITMP1);
1900                         M_DST(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1901                         break;
1902
1903                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1904
1905                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1906                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1907                         if (iptr->op1 == 0) {
1908                                 gen_nullptr_check(s1);
1909                                 gen_bound_check;
1910                         }
1911                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1912
1913                         M_MOV(s1, rd->argintregs[0]);
1914                         M_MOV(s3, rd->argintregs[1]);
1915                         disp = dseg_addaddress(cd, BUILTIN_canstore);
1916                         M_ALD(REG_PV, REG_PV, disp);
1917                         M_JSR(REG_RA, REG_PV);
1918                         disp = (s4) (cd->mcodeptr - cd->mcodebase);
1919                         M_LDA(REG_PV, REG_RA, -disp);
1920
1921                         M_BEQZ(REG_RESULT, 0);
1922                         codegen_add_arraystoreexception_ref(cd);
1923
1924                         s1 = emit_load_s1(jd, iptr, src->prev->prev, REG_ITMP1);
1925                         s2 = emit_load_s2(jd, iptr, src->prev, REG_ITMP2);
1926                         s3 = emit_load_s3(jd, iptr, src, REG_ITMP3);
1927                         M_SAADDQ(s2, s1, REG_ITMP1);
1928                         M_AST(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1929                         break;
1930
1931
1932                 case ICMD_IASTORECONST:   /* ..., arrayref, index  ==> ...            */
1933
1934                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1935                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1936                         if (iptr->op1 == 0) {
1937                                 gen_nullptr_check(s1);
1938                                 gen_bound_check;
1939                         }
1940                         M_S4ADDQ(s2, s1, REG_ITMP1);
1941                         M_IST(REG_ZERO, REG_ITMP1, OFFSET(java_intarray, data[0]));
1942                         break;
1943
1944                 case ICMD_LASTORECONST:   /* ..., arrayref, index  ==> ...            */
1945
1946                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1947                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1948                         if (iptr->op1 == 0) {
1949                                 gen_nullptr_check(s1);
1950                                 gen_bound_check;
1951                         }
1952                         M_S8ADDQ(s2, s1, REG_ITMP1);
1953                         M_LST(REG_ZERO, REG_ITMP1, OFFSET(java_longarray, data[0]));
1954                         break;
1955
1956                 case ICMD_AASTORECONST:   /* ..., arrayref, index  ==> ...            */
1957
1958                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1959                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1960                         if (iptr->op1 == 0) {
1961                                 gen_nullptr_check(s1);
1962                                 gen_bound_check;
1963                         }
1964                         M_SAADDQ(s2, s1, REG_ITMP1);
1965                         M_AST(REG_ZERO, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1966                         break;
1967
1968                 case ICMD_BASTORECONST:   /* ..., arrayref, index  ==> ...            */
1969
1970                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1971                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1972                         if (iptr->op1 == 0) {
1973                                 gen_nullptr_check(s1);
1974                                 gen_bound_check;
1975                         }
1976                         if (has_ext_instr_set) {
1977                                 M_LADD(s2, s1, REG_ITMP1);
1978                                 M_BST(REG_ZERO, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1979
1980                         } else {
1981                                 M_LADD(s2, s1, REG_ITMP1);
1982                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1983                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1984                                 M_INSBL(REG_ZERO, REG_ITMP1, REG_ITMP3);
1985                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1986                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1987                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1988                         }
1989                         break;
1990
1991                 case ICMD_CASTORECONST:   /* ..., arrayref, index  ==> ...            */
1992
1993                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
1994                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
1995                         if (iptr->op1 == 0) {
1996                                 gen_nullptr_check(s1);
1997                                 gen_bound_check;
1998                         }
1999                         if (has_ext_instr_set) {
2000                                 M_LADD(s2, s1, REG_ITMP1);
2001                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2002                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_chararray, data[0]));
2003
2004                         } else {
2005                                 M_LADD(s2, s1, REG_ITMP1);
2006                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2007                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2008                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2009                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2010                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2011                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2012                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2013                         }
2014                         break;
2015
2016                 case ICMD_SASTORECONST:   /* ..., arrayref, index  ==> ...            */
2017
2018                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2019                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2020                         if (iptr->op1 == 0) {
2021                                 gen_nullptr_check(s1);
2022                                 gen_bound_check;
2023                         }
2024                         if (has_ext_instr_set) {
2025                                 M_LADD(s2, s1, REG_ITMP1);
2026                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2027                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2028
2029                         } else {
2030                                 M_LADD(s2, s1, REG_ITMP1);
2031                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2032                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2033                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2034                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2035                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2036                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2037                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2038                         }
2039                         break;
2040
2041
2042                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2043                                       /* op1 = type, val.a = field address            */
2044
2045                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2046                                 disp = dseg_addaddress(cd, 0);
2047
2048                                 codegen_addpatchref(cd, PATCHER_get_putstatic,
2049                                                                         INSTRUCTION_UNRESOLVED_FIELD(iptr), disp);
2050
2051                                 if (opt_showdisassemble)
2052                                         M_NOP;
2053
2054
2055                         } else {
2056                                 fieldinfo *fi = INSTRUCTION_RESOLVED_FIELDINFO(iptr);
2057
2058                                 disp = dseg_addaddress(cd, &(fi->value));
2059
2060                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
2061                                         codegen_addpatchref(cd, PATCHER_clinit, fi->class, 0);
2062
2063                                         if (opt_showdisassemble)
2064                                                 M_NOP;
2065                                 }
2066                         }
2067
2068                         M_ALD(REG_ITMP1, REG_PV, disp);
2069                         switch (iptr->op1) {
2070                         case TYPE_INT:
2071                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2072                                 M_ILD(d, REG_ITMP1, 0);
2073                                 break;
2074                         case TYPE_LNG:
2075                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2076                                 M_LLD(d, REG_ITMP1, 0);
2077                                 break;
2078                         case TYPE_ADR:
2079                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2080                                 M_ALD(d, REG_ITMP1, 0);
2081                                 break;
2082                         case TYPE_FLT:
2083                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
2084                                 M_FLD(d, REG_ITMP1, 0);
2085                                 break;
2086                         case TYPE_DBL:
2087                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
2088                                 M_DLD(d, REG_ITMP1, 0);
2089                                 break;
2090                         }
2091                         emit_store(jd, iptr, iptr->dst, d);
2092                         break;
2093
2094                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2095                                       /* op1 = type, val.a = field address            */
2096
2097                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2098                                 disp = dseg_addaddress(cd, 0);
2099
2100                                 codegen_addpatchref(cd, PATCHER_get_putstatic,
2101                                                                         INSTRUCTION_UNRESOLVED_FIELD(iptr), disp);
2102
2103                                 if (opt_showdisassemble)
2104                                         M_NOP;
2105
2106                         } else {
2107                                 fieldinfo *fi = INSTRUCTION_RESOLVED_FIELDINFO(iptr);
2108
2109                                 disp = dseg_addaddress(cd, &(fi->value));
2110
2111                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
2112                                         codegen_addpatchref(cd, PATCHER_clinit, fi->class, 0);
2113
2114                                         if (opt_showdisassemble)
2115                                                 M_NOP;
2116                                 }
2117                         }
2118
2119                         M_ALD(REG_ITMP1, REG_PV, disp);
2120                         switch (iptr->op1) {
2121                         case TYPE_INT:
2122                                 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2123                                 M_IST(s2, REG_ITMP1, 0);
2124                                 break;
2125                         case TYPE_LNG:
2126                                 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2127                                 M_LST(s2, REG_ITMP1, 0);
2128                                 break;
2129                         case TYPE_ADR:
2130                                 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2131                                 M_AST(s2, REG_ITMP1, 0);
2132                                 break;
2133                         case TYPE_FLT:
2134                                 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
2135                                 M_FST(s2, REG_ITMP1, 0);
2136                                 break;
2137                         case TYPE_DBL:
2138                                 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
2139                                 M_DST(s2, REG_ITMP1, 0);
2140                                 break;
2141                         }
2142                         break;
2143
2144                 case ICMD_PUTSTATICCONST: /* ...  ==> ...                             */
2145                                           /* val = value (in current instruction)     */
2146                                           /* op1 = type, val.a = field address (in    */
2147                                           /* following NOP)                           */
2148
2149                         if (INSTRUCTION_IS_UNRESOLVED(iptr + 1)) {
2150                                 disp = dseg_addaddress(cd, 0);
2151
2152                                 codegen_addpatchref(cd, PATCHER_get_putstatic,
2153                                                                         INSTRUCTION_UNRESOLVED_FIELD(iptr + 1), disp);
2154
2155                                 if (opt_showdisassemble)
2156                                         M_NOP;
2157
2158                         } else {
2159                                 fieldinfo *fi = INSTRUCTION_RESOLVED_FIELDINFO(iptr + 1);
2160
2161                                 disp = dseg_addaddress(cd, &(fi->value));
2162
2163                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
2164                                         codegen_addpatchref(cd, PATCHER_clinit, fi->class, 0);
2165
2166                                         if (opt_showdisassemble)
2167                                                 M_NOP;
2168                                 }
2169                         }
2170
2171                         M_ALD(REG_ITMP1, REG_PV, disp);
2172                         switch (iptr->op1) {
2173                         case TYPE_INT:
2174                                 M_IST(REG_ZERO, REG_ITMP1, 0);
2175                                 break;
2176                         case TYPE_LNG:
2177                                 M_LST(REG_ZERO, REG_ITMP1, 0);
2178                                 break;
2179                         case TYPE_ADR:
2180                                 M_AST(REG_ZERO, REG_ITMP1, 0);
2181                                 break;
2182                         case TYPE_FLT:
2183                                 M_FST(REG_ZERO, REG_ITMP1, 0);
2184                                 break;
2185                         case TYPE_DBL:
2186                                 M_DST(REG_ZERO, REG_ITMP1, 0);
2187                                 break;
2188                         }
2189                         break;
2190
2191
2192                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2193                                       /* op1 = type, val.i = field offset             */
2194
2195                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2196                         gen_nullptr_check(s1);
2197
2198                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2199                                 codegen_addpatchref(cd, PATCHER_get_putfield,
2200                                                                         INSTRUCTION_UNRESOLVED_FIELD(iptr), 0);
2201
2202                                 if (opt_showdisassemble)
2203                                         M_NOP;
2204
2205                                 disp = 0;
2206
2207                         } else {
2208                                 disp = INSTRUCTION_RESOLVED_FIELDINFO(iptr)->offset;
2209                         }
2210
2211                         switch (iptr->op1) {
2212                         case TYPE_INT:
2213                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2214                                 M_ILD(d, s1, disp);
2215                                 break;
2216                         case TYPE_LNG:
2217                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2218                                 M_LLD(d, s1, disp);
2219                                 break;
2220                         case TYPE_ADR:
2221                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
2222                                 M_ALD(d, s1, disp);
2223                                 break;
2224                         case TYPE_FLT:
2225                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
2226                                 M_FLD(d, s1, disp);
2227                                 break;
2228                         case TYPE_DBL:
2229                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FTMP1);
2230                                 M_DLD(d, s1, disp);
2231                                 break;
2232                         }
2233                         emit_store(jd, iptr, iptr->dst, d);
2234                         break;
2235
2236                 case ICMD_PUTFIELD:   /* ..., objectref, value  ==> ...               */
2237                                       /* op1 = type, val.a = field address            */
2238
2239                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2240                         gen_nullptr_check(s1);
2241
2242                         if (!IS_FLT_DBL_TYPE(iptr->op1)) {
2243                                 s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2244                         } else {
2245                                 s2 = emit_load_s2(jd, iptr, src, REG_FTMP2);
2246                         }
2247
2248                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2249                                 codegen_addpatchref(cd, PATCHER_get_putfield,
2250                                                                         INSTRUCTION_UNRESOLVED_FIELD(iptr), 0);
2251
2252                                 if (opt_showdisassemble)
2253                                         M_NOP;
2254
2255                                 disp = 0;
2256
2257                         } else {
2258                                 disp = INSTRUCTION_RESOLVED_FIELDINFO(iptr)->offset;
2259                         }
2260
2261                         switch (iptr->op1) {
2262                         case TYPE_INT:
2263                                 M_IST(s2, s1, disp);
2264                                 break;
2265                         case TYPE_LNG:
2266                                 M_LST(s2, s1, disp);
2267                                 break;
2268                         case TYPE_ADR:
2269                                 M_AST(s2, s1, disp);
2270                                 break;
2271                         case TYPE_FLT:
2272                                 M_FST(s2, s1, disp);
2273                                 break;
2274                         case TYPE_DBL:
2275                                 M_DST(s2, s1, disp);
2276                                 break;
2277                         }
2278                         break;
2279
2280                 case ICMD_PUTFIELDCONST:  /* ..., objectref  ==> ...                  */
2281                                           /* val = value (in current instruction)     */
2282                                           /* op1 = type, val.a = field address (in    */
2283                                           /* following NOP)                           */
2284
2285                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2286                         gen_nullptr_check(s1);
2287
2288                         if (INSTRUCTION_IS_UNRESOLVED(iptr + 1)) {
2289                                 codegen_addpatchref(cd, PATCHER_get_putfield,
2290                                                                         INSTRUCTION_UNRESOLVED_FIELD(iptr + 1), 0);
2291
2292                                 if (opt_showdisassemble)
2293                                         M_NOP;
2294
2295                                 disp = 0;
2296
2297                         } else {
2298                                 disp = INSTRUCTION_RESOLVED_FIELDINFO(iptr + 1)->offset;
2299                         }
2300
2301                         switch (iptr[1].op1) {
2302                         case TYPE_INT:
2303                                 M_IST(REG_ZERO, s1, disp);
2304                                 break;
2305                         case TYPE_LNG:
2306                                 M_LST(REG_ZERO, s1, disp);
2307                                 break;
2308                         case TYPE_ADR:
2309                                 M_AST(REG_ZERO, s1, disp);
2310                                 break;
2311                         case TYPE_FLT:
2312                                 M_FST(REG_ZERO, s1, disp);
2313                                 break;
2314                         case TYPE_DBL:
2315                                 M_DST(REG_ZERO, s1, disp);
2316                                 break;
2317                         }
2318                         break;
2319
2320
2321                 /* branch operations **************************************************/
2322
2323                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2324
2325                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2326                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2327
2328 #ifdef ENABLE_VERIFIER
2329                         if (iptr->val.a) {
2330                                 codegen_addpatchref(cd, PATCHER_athrow_areturn,
2331                                                                         (unresolved_class *) iptr->val.a, 0);
2332
2333                                 if (opt_showdisassemble)
2334                                         M_NOP;
2335                         }
2336 #endif /* ENABLE_VERIFIER */
2337
2338                         disp = dseg_addaddress(cd, asm_handle_exception);
2339                         M_ALD(REG_ITMP2, REG_PV, disp);
2340                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2341                         M_NOP;              /* nop ensures that XPC is less than the end */
2342                                             /* of basic block                            */
2343                         ALIGNCODENOP;
2344                         break;
2345
2346                 case ICMD_GOTO:         /* ... ==> ...                                */
2347                                         /* op1 = target JavaVM pc                     */
2348                         M_BR(0);
2349                         codegen_addreference(cd, (basicblock *) iptr->target);
2350                         ALIGNCODENOP;
2351                         break;
2352
2353                 case ICMD_JSR:          /* ... ==> ...                                */
2354                                         /* op1 = target JavaVM pc                     */
2355
2356                         M_BSR(REG_ITMP1, 0);
2357                         codegen_addreference(cd, (basicblock *) iptr->target);
2358                         break;
2359
2360                 case ICMD_RET:          /* ... ==> ...                                */
2361                                         /* op1 = local variable                       */
2362
2363                         var = &(rd->locals[iptr->op1][TYPE_ADR]);
2364                         if (var->flags & INMEMORY) {
2365                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2366                                 M_RET(REG_ZERO, REG_ITMP1);
2367                                 }
2368                         else
2369                                 M_RET(REG_ZERO, var->regoff);
2370                         ALIGNCODENOP;
2371                         break;
2372
2373                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2374                                         /* op1 = target JavaVM pc                     */
2375
2376                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2377                         M_BEQZ(s1, 0);
2378                         codegen_addreference(cd, (basicblock *) iptr->target);
2379                         break;
2380
2381                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2382                                         /* op1 = target JavaVM pc                     */
2383
2384                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2385                         M_BNEZ(s1, 0);
2386                         codegen_addreference(cd, (basicblock *) iptr->target);
2387                         break;
2388
2389                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2390                                         /* op1 = target JavaVM pc, val.i = constant   */
2391
2392                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2393                         if (iptr->val.i == 0) {
2394                                 M_BEQZ(s1, 0);
2395                                 }
2396                         else {
2397                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2398                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2399                                         }
2400                                 else {
2401                                         ICONST(REG_ITMP2, iptr->val.i);
2402                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2403                                         }
2404                                 M_BNEZ(REG_ITMP1, 0);
2405                                 }
2406                         codegen_addreference(cd, (basicblock *) iptr->target);
2407                         break;
2408
2409                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2410                                         /* op1 = target JavaVM pc, val.i = constant   */
2411
2412                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2413                         if (iptr->val.i == 0) {
2414                                 M_BLTZ(s1, 0);
2415                                 }
2416                         else {
2417                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2418                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2419                                         }
2420                                 else {
2421                                         ICONST(REG_ITMP2, iptr->val.i);
2422                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2423                                         }
2424                                 M_BNEZ(REG_ITMP1, 0);
2425                                 }
2426                         codegen_addreference(cd, (basicblock *) iptr->target);
2427                         break;
2428
2429                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2430                                         /* op1 = target JavaVM pc, val.i = constant   */
2431
2432                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2433                         if (iptr->val.i == 0) {
2434                                 M_BLEZ(s1, 0);
2435                                 }
2436                         else {
2437                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2438                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2439                                         }
2440                                 else {
2441                                         ICONST(REG_ITMP2, iptr->val.i);
2442                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2443                                         }
2444                                 M_BNEZ(REG_ITMP1, 0);
2445                                 }
2446                         codegen_addreference(cd, (basicblock *) iptr->target);
2447                         break;
2448
2449                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2450                                         /* op1 = target JavaVM pc, val.i = constant   */
2451
2452                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2453                         if (iptr->val.i == 0) {
2454                                 M_BNEZ(s1, 0);
2455                                 }
2456                         else {
2457                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2458                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2459                                         }
2460                                 else {
2461                                         ICONST(REG_ITMP2, iptr->val.i);
2462                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2463                                         }
2464                                 M_BEQZ(REG_ITMP1, 0);
2465                                 }
2466                         codegen_addreference(cd, (basicblock *) iptr->target);
2467                         break;
2468
2469                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2470                                         /* op1 = target JavaVM pc, val.i = constant   */
2471
2472                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2473                         if (iptr->val.i == 0) {
2474                                 M_BGTZ(s1, 0);
2475                                 }
2476                         else {
2477                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2478                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2479                                         }
2480                                 else {
2481                                         ICONST(REG_ITMP2, iptr->val.i);
2482                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2483                                         }
2484                                 M_BEQZ(REG_ITMP1, 0);
2485                                 }
2486                         codegen_addreference(cd, (basicblock *) iptr->target);
2487                         break;
2488
2489                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2490                                         /* op1 = target JavaVM pc, val.i = constant   */
2491
2492                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2493                         if (iptr->val.i == 0) {
2494                                 M_BGEZ(s1, 0);
2495                                 }
2496                         else {
2497                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2498                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2499                                         }
2500                                 else {
2501                                         ICONST(REG_ITMP2, iptr->val.i);
2502                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2503                                         }
2504                                 M_BEQZ(REG_ITMP1, 0);
2505                                 }
2506                         codegen_addreference(cd, (basicblock *) iptr->target);
2507                         break;
2508
2509                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2510                                         /* op1 = target JavaVM pc, val.l = constant   */
2511
2512                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2513                         if (iptr->val.l == 0) {
2514                                 M_BEQZ(s1, 0);
2515                                 }
2516                         else {
2517                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2518                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2519                                         }
2520                                 else {
2521                                         LCONST(REG_ITMP2, iptr->val.l);
2522                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2523                                         }
2524                                 M_BNEZ(REG_ITMP1, 0);
2525                                 }
2526                         codegen_addreference(cd, (basicblock *) iptr->target);
2527                         break;
2528
2529                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2530                                         /* op1 = target JavaVM pc, val.l = constant   */
2531
2532                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2533                         if (iptr->val.l == 0) {
2534                                 M_BLTZ(s1, 0);
2535                                 }
2536                         else {
2537                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2538                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2539                                         }
2540                                 else {
2541                                         LCONST(REG_ITMP2, iptr->val.l);
2542                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2543                                         }
2544                                 M_BNEZ(REG_ITMP1, 0);
2545                                 }
2546                         codegen_addreference(cd, (basicblock *) iptr->target);
2547                         break;
2548
2549                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2550                                         /* op1 = target JavaVM pc, val.l = constant   */
2551
2552                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2553                         if (iptr->val.l == 0) {
2554                                 M_BLEZ(s1, 0);
2555                                 }
2556                         else {
2557                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2558                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2559                                         }
2560                                 else {
2561                                         LCONST(REG_ITMP2, iptr->val.l);
2562                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2563                                         }
2564                                 M_BNEZ(REG_ITMP1, 0);
2565                                 }
2566                         codegen_addreference(cd, (basicblock *) iptr->target);
2567                         break;
2568
2569                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2570                                         /* op1 = target JavaVM pc, val.l = constant   */
2571
2572                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2573                         if (iptr->val.l == 0) {
2574                                 M_BNEZ(s1, 0);
2575                                 }
2576                         else {
2577                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2578                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2579                                         }
2580                                 else {
2581                                         LCONST(REG_ITMP2, iptr->val.l);
2582                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2583                                         }
2584                                 M_BEQZ(REG_ITMP1, 0);
2585                                 }
2586                         codegen_addreference(cd, (basicblock *) iptr->target);
2587                         break;
2588
2589                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2590                                         /* op1 = target JavaVM pc, val.l = constant   */
2591
2592                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2593                         if (iptr->val.l == 0) {
2594                                 M_BGTZ(s1, 0);
2595                                 }
2596                         else {
2597                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2598                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2599                                         }
2600                                 else {
2601                                         LCONST(REG_ITMP2, iptr->val.l);
2602                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2603                                         }
2604                                 M_BEQZ(REG_ITMP1, 0);
2605                                 }
2606                         codegen_addreference(cd, (basicblock *) iptr->target);
2607                         break;
2608
2609                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2610                                         /* op1 = target JavaVM pc, val.l = constant   */
2611
2612                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2613                         if (iptr->val.l == 0) {
2614                                 M_BGEZ(s1, 0);
2615                                 }
2616                         else {
2617                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2618                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2619                                         }
2620                                 else {
2621                                         LCONST(REG_ITMP2, iptr->val.l);
2622                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2623                                         }
2624                                 M_BEQZ(REG_ITMP1, 0);
2625                                 }
2626                         codegen_addreference(cd, (basicblock *) iptr->target);
2627                         break;
2628
2629                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2630                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2631                 case ICMD_IF_ACMPEQ:
2632
2633                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2634                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2635                         M_CMPEQ(s1, s2, REG_ITMP1);
2636                         M_BNEZ(REG_ITMP1, 0);
2637                         codegen_addreference(cd, (basicblock *) iptr->target);
2638                         break;
2639
2640                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2641                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2642                 case ICMD_IF_ACMPNE:
2643
2644                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2645                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2646                         M_CMPEQ(s1, s2, REG_ITMP1);
2647                         M_BEQZ(REG_ITMP1, 0);
2648                         codegen_addreference(cd, (basicblock *) iptr->target);
2649                         break;
2650
2651                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2652                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2653
2654                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2655                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2656                         M_CMPLT(s1, s2, REG_ITMP1);
2657                         M_BNEZ(REG_ITMP1, 0);
2658                         codegen_addreference(cd, (basicblock *) iptr->target);
2659                         break;
2660
2661                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2662                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2663
2664                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2665                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2666                         M_CMPLE(s1, s2, REG_ITMP1);
2667                         M_BEQZ(REG_ITMP1, 0);
2668                         codegen_addreference(cd, (basicblock *) iptr->target);
2669                         break;
2670
2671                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2672                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2673
2674                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2675                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2676                         M_CMPLE(s1, s2, REG_ITMP1);
2677                         M_BNEZ(REG_ITMP1, 0);
2678                         codegen_addreference(cd, (basicblock *) iptr->target);
2679                         break;
2680
2681                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2682                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2683
2684                         s1 = emit_load_s1(jd, iptr, src->prev, REG_ITMP1);
2685                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP2);
2686                         M_CMPLT(s1, s2, REG_ITMP1);
2687                         M_BEQZ(REG_ITMP1, 0);
2688                         codegen_addreference(cd, (basicblock *) iptr->target);
2689                         break;
2690
2691
2692                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2693                 case ICMD_LRETURN:
2694
2695                         s1 = emit_load_s1(jd, iptr, src, REG_RESULT);
2696                         M_INTMOVE(s1, REG_RESULT);
2697                         goto nowperformreturn;
2698
2699                 case ICMD_ARETURN:      /* ..., retvalue ==> ...                      */
2700
2701                         s1 = emit_load_s1(jd, iptr, src, REG_RESULT);
2702                         M_INTMOVE(s1, REG_RESULT);
2703
2704 #ifdef ENABLE_VERIFIER
2705                         if (iptr->val.a) {
2706                                 codegen_addpatchref(cd, PATCHER_athrow_areturn,
2707                                                                         (unresolved_class *) iptr->val.a, 0);
2708
2709                                 if (opt_showdisassemble)
2710                                         M_NOP;
2711                         }
2712 #endif /* ENABLE_VERIFIER */
2713                         goto nowperformreturn;
2714
2715                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2716                 case ICMD_DRETURN:
2717
2718                         s1 = emit_load_s1(jd, iptr, src, REG_FRESULT);
2719                         M_FLTMOVE(s1, REG_FRESULT);
2720                         goto nowperformreturn;
2721
2722                 case ICMD_RETURN:       /* ...  ==> ...                               */
2723
2724 nowperformreturn:
2725                         {
2726                         s4 i, p;
2727
2728                         p = stackframesize;
2729
2730                         /* call trace function */
2731
2732 #if !defined(NDEBUG)
2733                         if (opt_verbosecall) {
2734                                 M_LDA(REG_SP, REG_SP, -3 * 8);
2735                                 M_AST(REG_RA, REG_SP, 0 * 8);
2736                                 M_LST(REG_RESULT, REG_SP, 1 * 8);
2737                                 M_DST(REG_FRESULT, REG_SP, 2 * 8);
2738
2739                                 disp = dseg_addaddress(cd, m);
2740                                 M_ALD(rd->argintregs[0], REG_PV, disp);
2741                                 M_MOV(REG_RESULT, rd->argintregs[1]);
2742                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[2]);
2743                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[3]);
2744
2745                                 disp = dseg_addaddress(cd, (void *) builtin_displaymethodstop);
2746                                 M_ALD(REG_PV, REG_PV, disp);
2747                                 M_JSR(REG_RA, REG_PV);
2748                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2749                                 M_LDA(REG_PV, REG_RA, -disp);
2750
2751                                 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
2752                                 M_LLD(REG_RESULT, REG_SP, 1 * 8);
2753                                 M_ALD(REG_RA, REG_SP, 0 * 8);
2754                                 M_LDA(REG_SP, REG_SP, 3 * 8);
2755                         }
2756 #endif
2757
2758 #if defined(ENABLE_THREADS)
2759                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2760                                 M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 8);
2761
2762                                 switch (iptr->opc) {
2763                                 case ICMD_IRETURN:
2764                                 case ICMD_LRETURN:
2765                                 case ICMD_ARETURN:
2766                                         M_LST(REG_RESULT, REG_SP, rd->memuse * 8);
2767                                         break;
2768                                 case ICMD_FRETURN:
2769                                 case ICMD_DRETURN:
2770                                         M_DST(REG_FRESULT, REG_SP, rd->memuse * 8);
2771                                         break;
2772                                 }
2773
2774                                 disp = dseg_addaddress(cd, LOCK_monitor_exit);
2775                                 M_ALD(REG_PV, REG_PV, disp);
2776                                 M_JSR(REG_RA, REG_PV);
2777                                 disp = -(s4) (cd->mcodeptr - cd->mcodebase);
2778                                 M_LDA(REG_PV, REG_RA, disp);
2779
2780                                 switch (iptr->opc) {
2781                                 case ICMD_IRETURN:
2782                                 case ICMD_LRETURN:
2783                                 case ICMD_ARETURN:
2784                                         M_LLD(REG_RESULT, REG_SP, rd->memuse * 8);
2785                                         break;
2786                                 case ICMD_FRETURN:
2787                                 case ICMD_DRETURN:
2788                                         M_DLD(REG_FRESULT, REG_SP, rd->memuse * 8);
2789                                         break;
2790                                 }
2791                         }
2792 #endif
2793
2794                         /* restore return address                                         */
2795
2796                         if (!jd->isleafmethod) {
2797                                 p--; M_LLD(REG_RA, REG_SP, p * 8);
2798                         }
2799
2800                         /* restore saved registers                                        */
2801
2802                         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
2803                                 p--; M_LLD(rd->savintregs[i], REG_SP, p * 8);
2804                         }
2805                         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
2806                                 p--; M_DLD(rd->savfltregs[i], REG_SP, p * 8);
2807                         }
2808
2809                         /* deallocate stack                                               */
2810
2811                         if (stackframesize)
2812                                 M_LDA(REG_SP, REG_SP, stackframesize * 8);
2813
2814                         M_RET(REG_ZERO, REG_RA);
2815                         ALIGNCODENOP;
2816                         }
2817                         break;
2818
2819
2820                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2821                         {
2822                         s4 i, l, *s4ptr;
2823                         void **tptr;
2824
2825                         tptr = (void **) iptr->target;
2826
2827                         s4ptr = iptr->val.a;
2828                         l = s4ptr[1];                          /* low     */
2829                         i = s4ptr[2];                          /* high    */
2830
2831                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2832                         if (l == 0) {
2833                                 M_INTMOVE(s1, REG_ITMP1);
2834                         } else if (l <= 32768) {
2835                                 M_LDA(REG_ITMP1, s1, -l);
2836                         } else {
2837                                 ICONST(REG_ITMP2, l);
2838                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
2839                         }
2840                         i = i - l + 1;
2841
2842                         /* range check */
2843
2844                         if (i <= 256)
2845                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
2846                         else {
2847                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
2848                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
2849                         }
2850                         M_BEQZ(REG_ITMP2, 0);
2851                         codegen_addreference(cd, (basicblock *) tptr[0]);
2852
2853                         /* build jump table top down and use address of lowest entry */
2854
2855                         /* s4ptr += 3 + i; */
2856                         tptr += i;
2857
2858                         while (--i >= 0) {
2859                                 dseg_addtarget(cd, (basicblock *) tptr[0]);
2860                                 --tptr;
2861                         }
2862                         }
2863
2864                         /* length of dataseg after last dseg_addtarget is used by load */
2865
2866                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
2867                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
2868                         M_JMP(REG_ZERO, REG_ITMP2);
2869                         ALIGNCODENOP;
2870                         break;
2871
2872
2873                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2874                         {
2875                         s4 i, l, val, *s4ptr;
2876                         void **tptr;
2877
2878                         tptr = (void **) iptr->target;
2879
2880                         s4ptr = iptr->val.a;
2881                         l = s4ptr[0];                          /* default  */
2882                         i = s4ptr[1];                          /* count    */
2883
2884                         MCODECHECK((i<<2)+8);
2885                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
2886                         while (--i >= 0) {
2887                                 s4ptr += 2;
2888                                 ++tptr;
2889
2890                                 val = s4ptr[0];
2891                                 if ((val >= 0) && (val <= 255)) {
2892                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
2893                                 } else {
2894                                         if ((val >= -32768) && (val <= 32767)) {
2895                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
2896                                         } else {
2897                                                 disp = dseg_adds4(cd, val);
2898                                                 M_ILD(REG_ITMP2, REG_PV, disp);
2899                                         }
2900                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
2901                                 }
2902                                 M_BNEZ(REG_ITMP2, 0);
2903                                 codegen_addreference(cd, (basicblock *) tptr[0]);
2904                         }
2905
2906                         M_BR(0);
2907
2908                         tptr = (void **) iptr->target;
2909                         codegen_addreference(cd, (basicblock *) tptr[0]);
2910
2911                         ALIGNCODENOP;
2912                         break;
2913                         }
2914
2915
2916                 case ICMD_BUILTIN:      /* ..., arg1, arg2, arg3 ==> ...              */
2917                                         /* op1 = arg count val.a = builtintable entry */
2918
2919                         bte = iptr->val.a;
2920                         md = bte->md;
2921                         goto gen_method;
2922
2923                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
2924                                         /* op1 = arg count, val.a = method pointer    */
2925
2926                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2927                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
2928                 case ICMD_INVOKEINTERFACE:
2929
2930                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2931                                 md = INSTRUCTION_UNRESOLVED_METHOD(iptr)->methodref->parseddesc.md;
2932                                 lm = NULL;
2933                         }
2934                         else {
2935                                 lm = INSTRUCTION_RESOLVED_METHODINFO(iptr);
2936                                 md = lm->parseddesc;
2937                         }
2938
2939 gen_method:
2940                         s3 = md->paramcount;
2941
2942                         MCODECHECK((s3 << 1) + 64);
2943
2944                         /* copy arguments to registers or stack location                  */
2945
2946                         for (s3 = s3 - 1; s3 >= 0; s3--, src = src->prev) {
2947                                 if (src->varkind == ARGVAR)
2948                                         continue;
2949                                 if (IS_INT_LNG_TYPE(src->type)) {
2950                                         if (!md->params[s3].inmemory) {
2951                                                 s1 = rd->argintregs[md->params[s3].regoff];
2952                                                 d = emit_load_s1(jd, iptr, src, s1);
2953                                                 M_INTMOVE(d, s1);
2954                                         } else {
2955                                                 d = emit_load_s1(jd, iptr, src, REG_ITMP1);
2956                                                 M_LST(d, REG_SP, md->params[s3].regoff * 8);
2957                                         }
2958
2959                                 } else {
2960                                         if (!md->params[s3].inmemory) {
2961                                                 s1 = rd->argfltregs[md->params[s3].regoff];
2962                                                 d = emit_load_s1(jd, iptr, src, s1);
2963                                                 M_FLTMOVE(d, s1);
2964                                         } else {
2965                                                 d = emit_load_s1(jd, iptr, src, REG_FTMP1);
2966                                                 M_DST(d, REG_SP, md->params[s3].regoff * 8);
2967                                         }
2968                                 }
2969                         }
2970
2971                         switch (iptr->opc) {
2972                         case ICMD_BUILTIN:
2973                                 disp = dseg_addaddress(cd, bte->fp);
2974                                 d = md->returntype.type;
2975
2976                                 M_ALD(REG_PV, REG_PV, disp);  /* Pointer to built-in-function */
2977                                 M_JSR(REG_RA, REG_PV);
2978                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
2979                                 M_LDA(REG_PV, REG_RA, -disp);
2980
2981                                 /* if op1 == true, we need to check for an exception */
2982
2983                                 if (iptr->op1 == true) {
2984                                         M_BEQZ(REG_RESULT, 0);
2985                                         codegen_add_fillinstacktrace_ref(cd);
2986                                 }
2987                                 break;
2988
2989                         case ICMD_INVOKESPECIAL:
2990                                 M_BEQZ(rd->argintregs[0], 0);
2991                                 codegen_add_nullpointerexception_ref(cd);
2992                                 /* fall through */
2993
2994                         case ICMD_INVOKESTATIC:
2995                                 if (!lm) {
2996                                         unresolved_method *um = INSTRUCTION_UNRESOLVED_METHOD(iptr);
2997
2998                                         disp = dseg_addaddress(cd, NULL);
2999
3000                                         codegen_addpatchref(cd, PATCHER_invokestatic_special,
3001                                                                                 um, disp);
3002
3003                                         if (opt_showdisassemble)
3004                                                 M_NOP;
3005
3006                                         d = um->methodref->parseddesc.md->returntype.type;
3007
3008                                 } else {
3009                                         disp = dseg_addaddress(cd, lm->stubroutine);
3010                                         d = lm->parseddesc->returntype.type;
3011                                 }
3012
3013                                 M_ALD(REG_PV, REG_PV, disp);         /* method pointer in r27 */
3014                                 M_JSR(REG_RA, REG_PV);
3015                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
3016                                 M_LDA(REG_PV, REG_RA, -disp);
3017                                 break;
3018
3019                         case ICMD_INVOKEVIRTUAL:
3020                                 gen_nullptr_check(rd->argintregs[0]);
3021
3022                                 if (!lm) {
3023                                         unresolved_method *um = INSTRUCTION_UNRESOLVED_METHOD(iptr);
3024
3025                                         codegen_addpatchref(cd, PATCHER_invokevirtual, um, 0);
3026
3027                                         if (opt_showdisassemble)
3028                                                 M_NOP;
3029
3030                                         s1 = 0;
3031                                         d = um->methodref->parseddesc.md->returntype.type;
3032
3033                                 } else {
3034                                         s1 = OFFSET(vftbl_t, table[0]) +
3035                                                 sizeof(methodptr) * lm->vftblindex;
3036                                         d = lm->parseddesc->returntype.type;
3037                                 }
3038
3039                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
3040                                           OFFSET(java_objectheader, vftbl));
3041                                 M_ALD(REG_PV, REG_METHODPTR, s1);
3042                                 M_JSR(REG_RA, REG_PV);
3043                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
3044                                 M_LDA(REG_PV, REG_RA, -disp);
3045                                 break;
3046
3047                         case ICMD_INVOKEINTERFACE:
3048                                 gen_nullptr_check(rd->argintregs[0]);
3049
3050                                 if (!lm) {
3051                                         unresolved_method *um = INSTRUCTION_UNRESOLVED_METHOD(iptr);
3052
3053                                         codegen_addpatchref(cd, PATCHER_invokeinterface, um, 0);
3054
3055                                         if (opt_showdisassemble)
3056                                                 M_NOP;
3057
3058                                         s1 = 0;
3059                                         s2 = 0;
3060                                         d = um->methodref->parseddesc.md->returntype.type;
3061
3062                                 } else {
3063                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
3064                                                 sizeof(methodptr*) * lm->class->index;
3065
3066                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
3067
3068                                         d = lm->parseddesc->returntype.type;
3069                                 }
3070
3071                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
3072                                           OFFSET(java_objectheader, vftbl));
3073                                 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
3074                                 M_ALD(REG_PV, REG_METHODPTR, s2);
3075                                 M_JSR(REG_RA, REG_PV);
3076                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
3077                                 M_LDA(REG_PV, REG_RA, -disp);
3078                                 break;
3079                         }
3080
3081                         /* d contains return type */
3082
3083                         if (d != TYPE_VOID) {
3084                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3085                                         s1 = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_RESULT);
3086                                         M_INTMOVE(REG_RESULT, s1);
3087 /*                                      emit_store(jd, iptr, iptr->dst, s1); */
3088                                 } else {
3089                                         s1 = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_FRESULT);
3090                                         M_FLTMOVE(REG_FRESULT, s1);
3091 /*                                      emit_store(jd, iptr, iptr->dst, s1); */
3092                                 }
3093                                 emit_store(jd, iptr, iptr->dst, s1);
3094                         }
3095                         break;
3096
3097
3098                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3099
3100                                       /* op1:   0 == array, 1 == class                */
3101                                       /* val.a: (classinfo*) superclass               */
3102
3103                         /*  superclass is an interface:
3104                          *
3105                          *  OK if ((sub == NULL) ||
3106                          *         (sub->vftbl->interfacetablelength > super->index) &&
3107                          *         (sub->vftbl->interfacetable[-super->index] != NULL));
3108                          *
3109                          *  superclass is a class:
3110                          *
3111                          *  OK if ((sub == NULL) || (0
3112                          *         <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3113                          *         super->vftbl->diffval));
3114                          */
3115
3116                         if (iptr->op1 == 1) {
3117                                 /* object type cast-check */
3118
3119                                 classinfo *super;
3120                                 vftbl_t   *supervftbl;
3121                                 s4         superindex;
3122
3123                                 super = (classinfo *) iptr->val.a;
3124
3125                                 if (super == NULL) {
3126                                         superindex = 0;
3127                                         supervftbl = NULL;
3128                                 }
3129                                 else {
3130                                         superindex = super->index;
3131                                         supervftbl = super->vftbl;
3132                                 }
3133
3134 #if defined(ENABLE_THREADS)
3135                                 codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
3136 #endif
3137                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3138
3139                                 /* calculate interface checkcast code size */
3140
3141                                 s2 = 6;
3142                                 if (super == NULL)
3143                                         s2 += opt_showdisassemble ? 1 : 0;
3144
3145                                 /* calculate class checkcast code size */
3146
3147                                 s3 = 9 /* 8 + (s1 == REG_ITMP1) */;
3148                                 if (super == NULL)
3149                                         s3 += opt_showdisassemble ? 1 : 0;
3150
3151                                 /* if class is not resolved, check which code to call */
3152
3153                                 if (super == NULL) {
3154                                         M_BEQZ(s1, 4 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3155
3156                                         disp = dseg_adds4(cd, 0);                 /* super->flags */
3157
3158                                         codegen_addpatchref(cd, PATCHER_checkcast_instanceof_flags,
3159                                                                                 (constant_classref *) iptr->target,
3160                                                                                 disp);
3161
3162                                         if (opt_showdisassemble)
3163                                                 M_NOP;
3164
3165                                         M_ILD(REG_ITMP2, REG_PV, disp);
3166                                         disp = dseg_adds4(cd, ACC_INTERFACE);
3167                                         M_ILD(REG_ITMP3, REG_PV, disp);
3168                                         M_AND(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3169                                         M_BEQZ(REG_ITMP2, s2 + 1);
3170                                 }
3171
3172                                 /* interface checkcast code */
3173
3174                                 if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
3175                                         if (super != NULL) {
3176                                                 M_BEQZ(s1, s2);
3177                                         }
3178                                         else {
3179                                                 codegen_addpatchref(cd,
3180                                                                                         PATCHER_checkcast_instanceof_interface,
3181                                                                                         (constant_classref *) iptr->target,
3182                                                                                         0);
3183
3184                                                 if (opt_showdisassemble)
3185                                                         M_NOP;
3186                                         }
3187
3188                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3189                                         M_ILD(REG_ITMP3, REG_ITMP2,
3190                                                   OFFSET(vftbl_t, interfacetablelength));
3191                                         M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3192                                         M_BLEZ(REG_ITMP3, 0);
3193                                         codegen_add_classcastexception_ref(cd, s1);
3194                                         M_ALD(REG_ITMP3, REG_ITMP2,
3195                                                   (s4) (OFFSET(vftbl_t, interfacetable[0]) -
3196                                                                 superindex * sizeof(methodptr*)));
3197                                         M_BEQZ(REG_ITMP3, 0);
3198                                         codegen_add_classcastexception_ref(cd, s1);
3199
3200                                         if (super == NULL)
3201                                                 M_BR(s3);
3202                                 }
3203
3204                                 /* class checkcast code */
3205
3206                                 if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
3207                                         disp = dseg_addaddress(cd, supervftbl);
3208
3209                                         if (super != NULL) {
3210                                                 M_BEQZ(s1, s3);
3211                                         }
3212                                         else {
3213                                                 codegen_addpatchref(cd,
3214                                                                                         PATCHER_checkcast_instanceof_class,
3215                                                                                         (constant_classref *) iptr->target,
3216                                                                                         disp);
3217
3218                                                 if (opt_showdisassemble)
3219                                                         M_NOP;
3220                                         }
3221
3222                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3223                                         M_ALD(REG_ITMP3, REG_PV, disp);
3224 #if defined(ENABLE_THREADS)
3225                                         codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
3226 #endif
3227                                         M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3228                                         /*                              if (s1 != REG_ITMP1) { */
3229                                         /*                                      M_ILD(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, baseval)); */
3230                                         /*                                      M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval)); */
3231                                         /*  #if defined(ENABLE_THREADS) */
3232                                         /*                                      codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase); */
3233                                         /*  #endif */
3234                                         /*                                      M_ISUB(REG_ITMP2, REG_ITMP1, REG_ITMP2); */
3235
3236                                         /*                              } else { */
3237                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, baseval));
3238                                         M_ISUB(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3239                                         M_ALD(REG_ITMP3, REG_PV, disp);
3240                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval));
3241 #if defined(ENABLE_THREADS)
3242                                         codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
3243 #endif
3244                                         /*                              } */
3245                                         M_CMPULE(REG_ITMP2, REG_ITMP3, REG_ITMP3);
3246                                         M_BEQZ(REG_ITMP3, 0);
3247                                         codegen_add_classcastexception_ref(cd, s1);
3248                                 }
3249
3250                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, s1);
3251                         }
3252                         else {
3253                                 /* array type cast-check */
3254
3255                                 s1 = emit_load_s1(jd, iptr, src, rd->argintregs[0]);
3256                                 M_INTMOVE(s1, rd->argintregs[0]);
3257
3258                                 disp = dseg_addaddress(cd, iptr->val.a);
3259
3260                                 if (iptr->val.a == NULL) {
3261                                         codegen_addpatchref(cd, PATCHER_builtin_arraycheckcast,
3262                                                                                 (constant_classref *) iptr->target,
3263                                                                                 disp);
3264
3265                                         if (opt_showdisassemble)
3266                                                 M_NOP;
3267                                 }
3268
3269                                 M_ALD(rd->argintregs[1], REG_PV, disp);
3270                                 disp = dseg_addaddress(cd, BUILTIN_arraycheckcast);
3271                                 M_ALD(REG_PV, REG_PV, disp);
3272                                 M_JSR(REG_RA, REG_PV);
3273                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
3274                                 M_LDA(REG_PV, REG_RA, -disp);
3275
3276                                 s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3277                                 M_BEQZ(REG_RESULT, 0);
3278                                 codegen_add_classcastexception_ref(cd, s1);
3279
3280                                 d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, s1);
3281                         }
3282
3283                         M_INTMOVE(s1, d);
3284                         emit_store(jd, iptr, iptr->dst, d);
3285                         break;
3286
3287                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3288
3289                                       /* op1:   0 == array, 1 == class                */
3290                                       /* val.a: (classinfo*) superclass               */
3291
3292                         /*  superclass is an interface:
3293                          *
3294                          *  return (sub != NULL) &&
3295                          *         (sub->vftbl->interfacetablelength > super->index) &&
3296                          *         (sub->vftbl->interfacetable[-super->index] != NULL);
3297                          *
3298                          *  superclass is a class:
3299                          *
3300                          *  return ((sub != NULL) && (0
3301                          *          <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3302                          *          super->vftbl->diffvall));
3303                          */
3304
3305                         {
3306                         classinfo *super;
3307                         vftbl_t   *supervftbl;
3308                         s4         superindex;
3309
3310                         super = (classinfo *) iptr->val.a;
3311
3312                         if (super == NULL) {
3313                                 superindex = 0;
3314                                 supervftbl = NULL;
3315                         }
3316                         else {
3317                                 superindex = super->index;
3318                                 supervftbl = super->vftbl;
3319                         }
3320
3321 #if defined(ENABLE_THREADS)
3322                         codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
3323 #endif
3324                         s1 = emit_load_s1(jd, iptr, src, REG_ITMP1);
3325                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_ITMP2);
3326                         if (s1 == d) {
3327                                 M_MOV(s1, REG_ITMP1);
3328                                 s1 = REG_ITMP1;
3329                         }
3330
3331                         /* calculate interface instanceof code size */
3332
3333                         s2 = 6;
3334                         if (super == NULL)
3335                                 s2 += (d == REG_ITMP2 ? 1 : 0) + (opt_showdisassemble ? 1 : 0);
3336
3337                         /* calculate class instanceof code size */
3338
3339                         s3 = 7;
3340                         if (super == NULL)
3341                                 s3 += (opt_showdisassemble ? 1 : 0);
3342
3343                         /* if class is not resolved, check which code to call */
3344
3345                         if (super == NULL) {
3346                                 M_CLR(d);
3347                                 M_BEQZ(s1, 4 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3348
3349                                 disp = dseg_adds4(cd, 0);                     /* super->flags */
3350
3351                                 codegen_addpatchref(cd, PATCHER_checkcast_instanceof_flags,
3352                                                                         (constant_classref *) iptr->target, disp);
3353
3354                                 if (opt_showdisassemble)
3355                                         M_NOP;
3356
3357                                 M_ILD(REG_ITMP3, REG_PV, disp);
3358
3359                                 disp = dseg_adds4(cd, ACC_INTERFACE);
3360                                 M_ILD(REG_ITMP2, REG_PV, disp);
3361                                 M_AND(REG_ITMP3, REG_ITMP2, REG_ITMP3);
3362                                 M_BEQZ(REG_ITMP3, s2 + 1);
3363                         }
3364
3365                         /* interface instanceof code */
3366
3367                         if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
3368                                 if (super != NULL) {
3369                                         M_CLR(d);
3370                                         M_BEQZ(s1, s2);
3371                                 }
3372                                 else {
3373                                         /* If d == REG_ITMP2, then it's destroyed in check
3374                                            code above. */
3375                                         if (d == REG_ITMP2)
3376                                                 M_CLR(d);
3377
3378                                         codegen_addpatchref(cd,
3379                                                                                 PATCHER_checkcast_instanceof_interface,
3380                                                                                 (constant_classref *) iptr->target, 0);
3381
3382                                         if (opt_showdisassemble)
3383                                                 M_NOP;
3384                                 }
3385
3386                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3387                                 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3388                                 M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3389                                 M_BLEZ(REG_ITMP3, 2);
3390                                 M_ALD(REG_ITMP1, REG_ITMP1,
3391                                           (s4) (OFFSET(vftbl_t, interfacetable[0]) -
3392                                                         superindex * sizeof(methodptr*)));
3393                                 M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3394
3395                                 if (super == NULL)
3396                                         M_BR(s3);
3397                         }
3398
3399                         /* class instanceof code */
3400
3401                         if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
3402                                 disp = dseg_addaddress(cd, supervftbl);
3403
3404                                 if (super != NULL) {
3405                                         M_CLR(d);
3406                                         M_BEQZ(s1, s3);
3407                                 }
3408                                 else {
3409                                         codegen_addpatchref(cd, PATCHER_checkcast_instanceof_class,
3410                                                                                 (constant_classref *) iptr->target,
3411                                                                                 disp);
3412
3413                                         if (opt_showdisassemble)
3414                                                 M_NOP;
3415                                 }
3416
3417                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3418                                 M_ALD(REG_ITMP2, REG_PV, disp);
3419 #if defined(ENABLE_THREADS)
3420                                 codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
3421 #endif
3422                                 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3423                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3424                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3425 #if defined(ENABLE_THREADS)
3426                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
3427 #endif
3428                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3429                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3430                         }
3431                         emit_store(jd, iptr, iptr->dst, d);
3432                         }
3433                         break;
3434
3435                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3436                                       /* op1 = dimension, val.a = class               */
3437
3438                         /* check for negative sizes and copy sizes to stack if necessary  */
3439
3440                         MCODECHECK((iptr->op1 << 1) + 64);
3441
3442                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3443                                 /* copy SAVEDVAR sizes to stack */
3444
3445                                 if (src->varkind != ARGVAR) {
3446                                         s2 = emit_load_s2(jd, iptr, src, REG_ITMP1);
3447                                         M_LST(s2, REG_SP, s1 * 8);
3448                                 }
3449                         }
3450
3451                         /* a0 = dimension count */
3452
3453                         ICONST(rd->argintregs[0], iptr->op1);
3454
3455                         /* is patcher function set? */
3456
3457                         if (iptr->val.a == NULL) {
3458                                 disp = dseg_addaddress(cd, 0);
3459
3460                                 codegen_addpatchref(cd, PATCHER_builtin_multianewarray,
3461                                                                         (constant_classref *) iptr->target,
3462                                                                         disp);
3463
3464                                 if (opt_showdisassemble)
3465                                         M_NOP;
3466
3467                         } else {
3468                                 disp = dseg_addaddress(cd, iptr->val.a);
3469                         }
3470
3471                         /* a1 = arraydescriptor */
3472
3473                         M_ALD(rd->argintregs[1], REG_PV, disp);
3474
3475                         /* a2 = pointer to dimensions = stack pointer */
3476
3477                         M_INTMOVE(REG_SP, rd->argintregs[2]);
3478
3479                         disp = dseg_addaddress(cd, BUILTIN_multianewarray);
3480                         M_ALD(REG_PV, REG_PV, disp);
3481                         M_JSR(REG_RA, REG_PV);
3482                         disp = (s4) (cd->mcodeptr - cd->mcodebase);
3483                         M_LDA(REG_PV, REG_RA, -disp);
3484
3485                         /* check for exception before result assignment */
3486
3487                         M_BEQZ(REG_RESULT, 0);
3488                         codegen_add_fillinstacktrace_ref(cd);
3489
3490                         d = codegen_reg_of_var(rd, iptr->opc, iptr->dst, REG_RESULT);
3491                         M_INTMOVE(REG_RESULT, d);
3492                         emit_store(jd, iptr, iptr->dst, d);
3493                         break;
3494
3495                 default:
3496                         *exceptionptr =
3497                                 new_internalerror("Unknown ICMD %d", iptr->opc);
3498                         return false;
3499         } /* switch */
3500
3501         } /* for instruction */
3502
3503         /* copy values to interface registers */
3504
3505         src = bptr->outstack;
3506         len = bptr->outdepth;
3507         MCODECHECK(64+len);
3508 #if defined(ENABLE_LSRA)
3509         if (!opt_lsra)
3510 #endif
3511         while (src) {
3512                 len--;
3513                 if ((src->varkind != STACKVAR)) {
3514                         s2 = src->type;
3515                         if (IS_FLT_DBL_TYPE(s2)) {
3516                                 /* XXX can be one call */
3517                                 s1 = emit_load_s1(jd, NULL, src, REG_FTMP1);
3518                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3519                                         M_FLTMOVE(s1,rd->interfaces[len][s2].regoff);
3520                                         }
3521                                 else {
3522                                         M_DST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3523                                         }
3524                                 }
3525                         else {
3526                                 /* XXX can be one call */
3527                                 s1 = emit_load_s1(jd, NULL, src, REG_ITMP1);
3528                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3529                                         M_INTMOVE(s1,rd->interfaces[len][s2].regoff);
3530                                         }
3531                                 else {
3532                                         M_LST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3533                                         }
3534                                 }
3535                         }
3536                 src = src->prev;
3537                 }
3538         } /* if (bptr -> flags >= BBREACHED) */
3539         } /* for basic block */
3540
3541         dseg_createlinenumbertable(cd);
3542
3543
3544         /* generate exception and patcher stubs */
3545
3546         {
3547                 exceptionref *eref;
3548                 patchref     *pref;
3549                 u4            mcode;
3550                 u1           *savedmcodeptr;
3551                 u1           *tmpmcodeptr;
3552
3553                 savedmcodeptr = NULL;
3554
3555                 /* generate exception stubs */
3556
3557                 for (eref = cd->exceptionrefs; eref != NULL; eref = eref->next) {
3558                         gen_resolvebranch(cd->mcodebase + eref->branchpos,
3559                                                           eref->branchpos, cd->mcodeptr - cd->mcodebase);
3560
3561                         MCODECHECK(100);
3562
3563                         /* move index register into REG_ITMP1 */
3564
3565                         /* Check if the exception is an
3566                            ArrayIndexOutOfBoundsException.  If so, move index register
3567                            into a4. */
3568
3569                         if (eref->reg != -1)
3570                                 M_MOV(eref->reg, rd->argintregs[4]);
3571
3572                         /* calcuate exception address */
3573
3574                         M_LDA(rd->argintregs[3], REG_PV, eref->branchpos - 4);
3575
3576                         /* move function to call into REG_ITMP3 */
3577
3578                         disp = dseg_addaddress(cd, eref->function);
3579                         M_ALD(REG_ITMP3, REG_PV, disp);
3580
3581                         if (savedmcodeptr != NULL) {
3582                                 disp = ((u4 *) savedmcodeptr) - (((u4 *) cd->mcodeptr) + 1);
3583                                 M_BR(disp);
3584
3585                         } else {
3586                                 savedmcodeptr = cd->mcodeptr;
3587
3588                                 M_MOV(REG_PV, rd->argintregs[0]);
3589                                 M_MOV(REG_SP, rd->argintregs[1]);
3590
3591                                 if (jd->isleafmethod)
3592                                         M_MOV(REG_RA, rd->argintregs[2]);
3593                                 else
3594                                         M_ALD(rd->argintregs[2],
3595                                                   REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
3596
3597                                 M_LDA(REG_SP, REG_SP, -2 * 8);
3598                                 M_AST(rd->argintregs[3], REG_SP, 0 * 8);         /* store XPC */
3599
3600                                 if (jd->isleafmethod)
3601                                         M_AST(REG_RA, REG_SP, 1 * 8);
3602
3603                                 M_MOV(REG_ITMP3, REG_PV);
3604                                 M_JSR(REG_RA, REG_PV);
3605                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
3606                                 M_LDA(REG_PV, REG_RA, -disp);
3607
3608                                 M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3609
3610                                 if (jd->isleafmethod)
3611                                         M_ALD(REG_RA, REG_SP, 1 * 8);
3612
3613                                 M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3614                                 M_LDA(REG_SP, REG_SP, 2 * 8);
3615
3616                                 disp = dseg_addaddress(cd, asm_handle_exception);
3617                                 M_ALD(REG_ITMP3, REG_PV, disp);
3618                                 M_JMP(REG_ZERO, REG_ITMP3);
3619                         }
3620                 }
3621
3622
3623                 /* generate code patching stub call code */
3624
3625                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
3626                         /* check code segment size */
3627
3628                         MCODECHECK(100);
3629
3630                         /* Get machine code which is patched back in later. The
3631                            call is 1 instruction word long. */
3632
3633                         tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
3634
3635                         mcode = *((u4 *) tmpmcodeptr);
3636
3637                         /* Patch in the call to call the following code (done at
3638                            compile time). */
3639
3640                         savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr          */
3641                         cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position */
3642
3643                         disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
3644                         M_BSR(REG_ITMP3, disp);
3645
3646                         cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr   */
3647
3648                         /* create stack frame */
3649
3650                         M_LSUB_IMM(REG_SP, 6 * 8, REG_SP);
3651
3652                         /* move return address onto stack */
3653
3654                         M_AST(REG_ITMP3, REG_SP, 5 * 8);
3655
3656                         /* move pointer to java_objectheader onto stack */
3657
3658 #if defined(ENABLE_THREADS)
3659                         /* create a virtual java_objectheader */
3660
3661                         (void) dseg_addaddress(cd, NULL);                         /* flcword    */
3662                         (void) dseg_addaddress(cd, lock_get_initial_lock_word()); /* monitorPtr */
3663                         disp = dseg_addaddress(cd, NULL);                         /* vftbl      */
3664
3665                         M_LDA(REG_ITMP3, REG_PV, disp);
3666                         M_AST(REG_ITMP3, REG_SP, 4 * 8);
3667 #else
3668                         /* do nothing */
3669 #endif
3670
3671                         /* move machine code onto stack */
3672
3673                         disp = dseg_adds4(cd, mcode);
3674                         M_ILD(REG_ITMP3, REG_PV, disp);
3675                         M_IST(REG_ITMP3, REG_SP, 3 * 8);
3676
3677                         /* move class/method/field reference onto stack */
3678
3679                         disp = dseg_addaddress(cd, pref->ref);
3680                         M_ALD(REG_ITMP3, REG_PV, disp);
3681                         M_AST(REG_ITMP3, REG_SP, 2 * 8);
3682
3683                         /* move data segment displacement onto stack */
3684
3685                         disp = dseg_adds4(cd, pref->disp);
3686                         M_ILD(REG_ITMP3, REG_PV, disp);
3687                         M_IST(REG_ITMP3, REG_SP, 1 * 8);
3688
3689                         /* move patcher function pointer onto stack */
3690
3691                         disp = dseg_addaddress(cd, pref->patcher);
3692                         M_ALD(REG_ITMP3, REG_PV, disp);
3693                         M_AST(REG_ITMP3, REG_SP, 0 * 8);
3694
3695                         disp = dseg_addaddress(cd, asm_patcher_wrapper);
3696                         M_ALD(REG_ITMP3, REG_PV, disp);
3697                         M_JMP(REG_ZERO, REG_ITMP3);
3698                 }
3699
3700                 /* generate replacement-out stubs */
3701
3702                 {
3703                         int i;
3704
3705                         replacementpoint = jd->code->rplpoints;
3706
3707                         for (i = 0; i < jd->code->rplpointcount; ++i, ++replacementpoint) {
3708                                 /* check code segment size */
3709
3710                                 MCODECHECK(100);
3711
3712                                 /* note start of stub code */
3713
3714                                 replacementpoint->outcode = (u1 *) (ptrint) (cd->mcodeptr - cd->mcodebase);
3715
3716                                 /* make machine code for patching */
3717
3718                                 savedmcodeptr  = cd->mcodeptr;
3719                                 cd->mcodeptr = (u1 *) &(replacementpoint->mcode);
3720
3721                                 disp = (ptrint)((s4*)replacementpoint->outcode - (s4*)replacementpoint->pc) - 1;
3722                                 M_BR(disp);
3723
3724                                 cd->mcodeptr = savedmcodeptr;
3725
3726                                 /* create stack frame - 16-byte aligned */
3727
3728                                 M_LSUB_IMM(REG_SP, 2 * 8, REG_SP);
3729
3730                                 /* push address of `rplpoint` struct */
3731
3732                                 disp = dseg_addaddress(cd, replacementpoint);
3733                                 M_ALD(REG_ITMP3, REG_PV, disp);
3734                                 M_AST(REG_ITMP3, REG_SP, 0 * 8);
3735
3736                                 /* jump to replacement function */
3737
3738                                 disp = dseg_addaddress(cd, asm_replacement_out);
3739                                 M_ALD(REG_ITMP3, REG_PV, disp);
3740                                 M_JMP(REG_ZERO, REG_ITMP3);
3741                         }
3742                 }
3743         }
3744
3745         codegen_finish(jd);
3746
3747         /* everything's ok */
3748
3749         return true;
3750 }
3751
3752
3753 /* createcompilerstub **********************************************************
3754
3755    Creates a stub routine which calls the compiler.
3756
3757 *******************************************************************************/
3758
3759 #define COMPILERSTUB_DATASIZE    3 * SIZEOF_VOID_P
3760 #define COMPILERSTUB_CODESIZE    3 * 4
3761
3762 #define COMPILERSTUB_SIZE        COMPILERSTUB_DATASIZE + COMPILERSTUB_CODESIZE
3763
3764
3765 u1 *createcompilerstub(methodinfo *m)
3766 {
3767         u1          *s;                     /* memory to hold the stub            */
3768         ptrint      *d;
3769         codeinfo    *code;
3770         codegendata *cd;
3771         s4           dumpsize;              /* code generation pointer            */
3772
3773         s = CNEW(u1, COMPILERSTUB_SIZE);
3774
3775         /* set data pointer and code pointer */
3776
3777         d = (ptrint *) s;
3778         s = s + COMPILERSTUB_DATASIZE;
3779
3780         /* mark start of dump memory area */
3781
3782         dumpsize = dump_size();
3783
3784         cd = DNEW(codegendata);
3785         cd->mcodeptr = s;
3786
3787         /* Store the codeinfo pointer in the same place as in the
3788            methodheader for compiled methods. */
3789
3790         code = code_codeinfo_new(m);
3791
3792         d[0] = (ptrint) asm_call_jit_compiler;
3793         d[1] = (ptrint) m;
3794         d[2] = (ptrint) code;
3795
3796         /* code for the stub */
3797
3798         M_ALD(REG_ITMP1, REG_PV, -2 * 8);   /* load codeinfo pointer              */
3799         M_ALD(REG_PV, REG_PV, -3 * 8);      /* load pointer to the compiler       */
3800         M_JMP(REG_ZERO, REG_PV);            /* jump to the compiler               */
3801
3802 #if defined(ENABLE_STATISTICS)
3803         if (opt_stat)
3804                 count_cstub_len += COMPILERSTUB_SIZE;
3805 #endif
3806
3807         /* release dump area */
3808
3809         dump_release(dumpsize);
3810
3811         return s;
3812 }
3813
3814
3815 /* createnativestub ************************************************************
3816
3817    Creates a stub routine which calls a native method.
3818
3819 *******************************************************************************/
3820
3821 u1 *createnativestub(functionptr f, jitdata *jd, methoddesc *nmd)
3822 {
3823         methodinfo   *m;
3824         codeinfo     *code;
3825         codegendata  *cd;
3826         registerdata *rd;
3827         s4            stackframesize;       /* size of stackframe if needed       */
3828         methoddesc   *md;
3829         s4            nativeparams;
3830         s4            i, j;                 /* count variables                    */
3831         s4            t;
3832         s4            s1, s2, disp;
3833         s4            funcdisp;             /* displacement of the function       */
3834
3835         /* get required compiler data */
3836
3837         m    = jd->m;
3838         code = jd->code;
3839         cd   = jd->cd;
3840         rd   = jd->rd;
3841
3842         /* initialize variables */
3843
3844         md = m->parseddesc;
3845         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
3846
3847         /* calculate stack frame size */
3848
3849         stackframesize =
3850                 1 +                             /* return address                     */
3851                 sizeof(stackframeinfo) / SIZEOF_VOID_P +
3852                 sizeof(localref_table) / SIZEOF_VOID_P +
3853                 1 +                             /* methodinfo for call trace          */
3854                 (md->paramcount > INT_ARG_CNT ? INT_ARG_CNT : md->paramcount) +
3855                 nmd->memuse;
3856
3857         /* create method header */
3858
3859         (void) dseg_addaddress(cd, code);                      /* CodeinfoPointer */
3860         (void) dseg_adds4(cd, stackframesize * 8);             /* FrameSize       */
3861         (void) dseg_adds4(cd, 0);                              /* IsSync          */
3862         (void) dseg_adds4(cd, 0);                              /* IsLeaf          */
3863         (void) dseg_adds4(cd, 0);                              /* IntSave         */
3864         (void) dseg_adds4(cd, 0);                              /* FltSave         */
3865         (void) dseg_addlinenumbertablesize(cd);
3866         (void) dseg_adds4(cd, 0);                              /* ExTableSize     */
3867
3868         /* generate stub code */
3869
3870         M_LDA(REG_SP, REG_SP, -stackframesize * 8);
3871         M_AST(REG_RA, REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
3872
3873         /* call trace function */
3874
3875 #if !defined(NDEBUG)
3876         if (opt_verbosecall) {
3877                 /* save integer argument registers */
3878
3879                 for (i = 0, j = 1; i < md->paramcount && i < INT_ARG_CNT; i++) {
3880                         if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
3881                                 M_LST(rd->argintregs[i], REG_SP, j * 8);
3882                                 j++;
3883                         }
3884                 }
3885
3886                 /* save and copy float arguments into integer registers */
3887
3888                 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
3889                         t = md->paramtypes[i].type;
3890
3891                         if (IS_FLT_DBL_TYPE(t)) {
3892                                 if (IS_2_WORD_TYPE(t)) {
3893                                         M_DST(rd->argfltregs[i], REG_SP, j * 8);
3894                                         M_LLD(rd->argintregs[i], REG_SP, j * 8);
3895                                 } else {
3896                                         M_FST(rd->argfltregs[i], REG_SP, j * 8);
3897                                         M_ILD(rd->argintregs[i], REG_SP, j * 8);
3898                                 }
3899                                 j++;
3900                         }
3901                 }
3902
3903                 disp = dseg_addaddress(cd, m);
3904                 M_ALD(REG_ITMP1, REG_PV, disp);
3905                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
3906                 disp = dseg_addaddress(cd, builtin_trace_args);
3907                 M_ALD(REG_PV, REG_PV, disp);
3908                 M_JSR(REG_RA, REG_PV);
3909                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
3910                 M_LDA(REG_PV, REG_RA, -disp);
3911
3912                 for (i = 0, j = 1; i < md->paramcount && i < INT_ARG_CNT; i++) {
3913                         if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
3914                                 M_LLD(rd->argintregs[i], REG_SP, j * 8);
3915                                 j++;
3916                         }
3917                 }
3918
3919                 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
3920                         t = md->paramtypes[i].type;
3921
3922                         if (IS_FLT_DBL_TYPE(t)) {
3923                                 if (IS_2_WORD_TYPE(t)) {
3924                                         M_DLD(rd->argfltregs[i], REG_SP, j * 8);
3925                                 } else {
3926                                         M_FLD(rd->argfltregs[i], REG_SP, j * 8);
3927                                 }
3928                                 j++;
3929                         }
3930                 }
3931         }
3932 #endif /* !defined(NDEBUG) */
3933
3934         /* get function address (this must happen before the stackframeinfo) */
3935
3936         funcdisp = dseg_addaddress(cd, f);
3937
3938 #if !defined(WITH_STATIC_CLASSPATH)
3939         if (f == NULL) {
3940                 codegen_addpatchref(cd, PATCHER_resolve_native, m, funcdisp);
3941
3942                 if (opt_showdisassemble)
3943                         M_NOP;
3944         }
3945 #endif
3946
3947         /* save integer and float argument registers */
3948
3949         for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
3950                 if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
3951                         M_LST(rd->argintregs[i], REG_SP, j * 8);
3952                         j++;
3953                 }
3954         }
3955
3956         for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
3957                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3958                         M_DST(rd->argfltregs[i], REG_SP, j * 8);
3959                         j++;
3960                 }
3961         }
3962
3963         /* prepare data structures for native function call */
3964
3965         M_LDA(rd->argintregs[0], REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
3966         M_MOV(REG_PV, rd->argintregs[1]);
3967         M_LDA(rd->argintregs[2], REG_SP, stackframesize * 8);
3968         M_ALD(rd->argintregs[3], REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
3969         disp = dseg_addaddress(cd, codegen_start_native_call);
3970         M_ALD(REG_PV, REG_PV, disp);
3971         M_JSR(REG_RA, REG_PV);
3972         disp = (s4) (cd->mcodeptr - cd->mcodebase);
3973         M_LDA(REG_PV, REG_RA, -disp);
3974
3975         /* restore integer and float argument registers */
3976
3977         for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
3978                 if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
3979                         M_LLD(rd->argintregs[i], REG_SP, j * 8);
3980                         j++;
3981                 }
3982         }
3983
3984         for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
3985                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3986                         M_DLD(rd->argfltregs[i], REG_SP, j * 8);
3987                         j++;
3988                 }
3989         }
3990
3991         /* copy or spill arguments to new locations */
3992
3993         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
3994                 t = md->paramtypes[i].type;
3995
3996                 if (IS_INT_LNG_TYPE(t)) {
3997                         if (!md->params[i].inmemory) {
3998                                 s1 = rd->argintregs[md->params[i].regoff];
3999
4000                                 if (!nmd->params[j].inmemory) {
4001                                         s2 = rd->argintregs[nmd->params[j].regoff];
4002                                         M_INTMOVE(s1, s2);
4003
4004                                 } else {
4005                                         s2 = nmd->params[j].regoff;
4006                                         M_LST(s1, REG_SP, s2 * 8);
4007                                 }
4008
4009                         } else {
4010                                 s1 = md->params[i].regoff + stackframesize;
4011                                 s2 = nmd->params[j].regoff;
4012                                 M_LLD(REG_ITMP1, REG_SP, s1 * 8);
4013                                 M_LST(REG_ITMP1, REG_SP, s2 * 8);
4014                         }
4015
4016                 } else {
4017                         if (!md->params[i].inmemory) {
4018                                 s1 = rd->argfltregs[md->params[i].regoff];
4019
4020                                 if (!nmd->params[j].inmemory) {
4021                                         s2 = rd->argfltregs[nmd->params[j].regoff];
4022                                         M_FLTMOVE(s1, s2);
4023
4024                                 } else {
4025                                         s2 = nmd->params[j].regoff;
4026                                         if (IS_2_WORD_TYPE(t))
4027                                                 M_DST(s1, REG_SP, s2 * 8);
4028                                         else
4029                                                 M_FST(s1, REG_SP, s2 * 8);
4030                                 }
4031
4032                         } else {
4033                                 s1 = md->params[i].regoff + stackframesize;
4034                                 s2 = nmd->params[j].regoff;
4035                                 M_DLD(REG_FTMP1, REG_SP, s1 * 8);
4036                                 if (IS_2_WORD_TYPE(t))
4037                                         M_DST(REG_FTMP1, REG_SP, s2 * 8);
4038                                 else
4039                                         M_FST(REG_FTMP1, REG_SP, s2 * 8);
4040                         }
4041                 }
4042         }
4043
4044         /* put class into second argument register */
4045
4046         if (m->flags & ACC_STATIC) {
4047                 disp = dseg_addaddress(cd, m->class);
4048                 M_ALD(rd->argintregs[1], REG_PV, disp);
4049         }
4050
4051         /* put env into first argument register */
4052
4053         disp = dseg_addaddress(cd, _Jv_env);
4054         M_ALD(rd->argintregs[0], REG_PV, disp);
4055
4056         /* do the native function call */
4057
4058         M_ALD(REG_PV, REG_PV, funcdisp);
4059         M_JSR(REG_RA, REG_PV);              /* call native method                 */
4060         disp = (s4) (cd->mcodeptr - cd->mcodebase);
4061         M_LDA(REG_PV, REG_RA, -disp);       /* recompute pv from ra               */
4062
4063         /* save return value */
4064
4065         if (md->returntype.type != TYPE_VOID) {
4066                 if (IS_INT_LNG_TYPE(md->returntype.type))
4067                         M_LST(REG_RESULT, REG_SP, 0 * 8);
4068                 else
4069                         M_DST(REG_FRESULT, REG_SP, 0 * 8);
4070         }
4071
4072         /* call finished trace */
4073
4074 #if !defined(NDEBUG)
4075         if (opt_verbosecall) {
4076                 /* just restore the value we need, don't care about the other */
4077
4078                 if (md->returntype.type != TYPE_VOID) {
4079                         if (IS_INT_LNG_TYPE(md->returntype.type))
4080                                 M_LLD(REG_RESULT, REG_SP, 0 * 8);
4081                         else
4082                                 M_DLD(REG_FRESULT, REG_SP, 0 * 8);
4083                 }
4084
4085                 disp = dseg_addaddress(cd, m);
4086                 M_ALD(rd->argintregs[0], REG_PV, disp);
4087
4088                 M_MOV(REG_RESULT, rd->argintregs[1]);
4089                 M_FMOV(REG_FRESULT, rd->argfltregs[2]);
4090                 M_FMOV(REG_FRESULT, rd->argfltregs[3]);
4091
4092                 disp = dseg_addaddress(cd, builtin_displaymethodstop);
4093                 M_ALD(REG_PV, REG_PV, disp);
4094                 M_JSR(REG_RA, REG_PV);
4095                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
4096                 M_LDA(REG_PV, REG_RA, -disp);
4097         }
4098 #endif /* !defined(NDEBUG) */
4099
4100         /* remove native stackframe info */
4101
4102         M_LDA(rd->argintregs[0], REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
4103         disp = dseg_addaddress(cd, codegen_finish_native_call);
4104         M_ALD(REG_PV, REG_PV, disp);
4105         M_JSR(REG_RA, REG_PV);
4106         disp = (s4) (cd->mcodeptr - cd->mcodebase);
4107         M_LDA(REG_PV, REG_RA, -disp);
4108         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
4109
4110         /* restore return value */
4111
4112         if (md->returntype.type != TYPE_VOID) {
4113                 if (IS_INT_LNG_TYPE(md->returntype.type))
4114                         M_LLD(REG_RESULT, REG_SP, 0 * 8);
4115                 else
4116                         M_DLD(REG_FRESULT, REG_SP, 0 * 8);
4117         }
4118
4119         M_ALD(REG_RA, REG_SP, (stackframesize - 1) * 8); /* load return address   */
4120         M_LDA(REG_SP, REG_SP, stackframesize * 8);
4121
4122         /* check for exception */
4123
4124         M_BNEZ(REG_ITMP1_XPTR, 1);          /* if no exception then return        */
4125         M_RET(REG_ZERO, REG_RA);            /* return to caller                   */
4126
4127         /* handle exception */
4128
4129         M_ASUB_IMM(REG_RA, 4, REG_ITMP2_XPC); /* get exception address            */
4130
4131         disp = dseg_addaddress(cd, asm_handle_nat_exception);
4132         M_ALD(REG_ITMP3, REG_PV, disp);     /* load asm exception handler address */
4133         M_JMP(REG_ZERO, REG_ITMP3);         /* jump to asm exception handler      */
4134
4135
4136         /* process patcher calls **************************************************/
4137
4138         {
4139                 patchref *pref;
4140                 u4        mcode;
4141                 u1       *savedmcodeptr;
4142                 u1       *tmpmcodeptr;
4143
4144                 /* there can only be one <clinit> ref entry */
4145
4146                 pref = cd->patchrefs;
4147
4148                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4149                         /* Get machine code which is patched back in later. The
4150                            call is 1 instruction word long. */
4151
4152                         tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
4153
4154                         mcode = *((u4 *) tmpmcodeptr);
4155
4156                         /* Patch in the call to call the following code (done at
4157                            compile time). */
4158
4159                         savedmcodeptr = cd->mcodeptr;   /* save current mcodeptr          */
4160                         cd->mcodeptr  = tmpmcodeptr;    /* set mcodeptr to patch position */
4161
4162                         disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
4163                         M_BSR(REG_ITMP3, disp);
4164
4165                         cd->mcodeptr = savedmcodeptr;   /* restore the current mcodeptr   */
4166
4167                         /* create stack frame */
4168
4169                         M_LSUB_IMM(REG_SP, 6 * 8, REG_SP);
4170
4171                         /* move return address onto stack */
4172
4173                         M_AST(REG_ITMP3, REG_SP, 5 * 8);
4174
4175                         /* move pointer to java_objectheader onto stack */
4176
4177 #if defined(ENABLE_THREADS)
4178                         /* create a virtual java_objectheader */
4179
4180                         (void) dseg_addaddress(cd, NULL);                         /* flcword    */
4181                         (void) dseg_addaddress(cd, lock_get_initial_lock_word()); /* monitorPtr */
4182                         disp = dseg_addaddress(cd, NULL);                         /* vftbl      */
4183
4184                         M_LDA(REG_ITMP3, REG_PV, disp);
4185                         M_AST(REG_ITMP3, REG_SP, 4 * 8);
4186 #else
4187                         M_AST(REG_ZERO, REG_SP, 4 * 8);
4188 #endif
4189
4190                         /* move machine code onto stack */
4191
4192                         disp = dseg_adds4(cd, mcode);
4193                         M_ILD(REG_ITMP3, REG_PV, disp);
4194                         M_IST(REG_ITMP3, REG_SP, 3 * 8);
4195
4196                         /* move class/method/field reference onto stack */
4197
4198                         disp = dseg_addaddress(cd, pref->ref);
4199                         M_ALD(REG_ITMP3, REG_PV, disp);
4200                         M_AST(REG_ITMP3, REG_SP, 2 * 8);
4201
4202                         /* move data segment displacement onto stack */
4203
4204                         disp = dseg_adds4(cd, pref->disp);
4205                         M_ILD(REG_ITMP3, REG_PV, disp);
4206                         M_IST(REG_ITMP3, REG_SP, 1 * 8);
4207
4208                         /* move patcher function pointer onto stack */
4209
4210                         disp = dseg_addaddress(cd, pref->patcher);
4211                         M_ALD(REG_ITMP3, REG_PV, disp);
4212                         M_AST(REG_ITMP3, REG_SP, 0 * 8);
4213
4214                         disp = dseg_addaddress(cd, asm_patcher_wrapper);
4215                         M_ALD(REG_ITMP3, REG_PV, disp);
4216                         M_JMP(REG_ZERO, REG_ITMP3);
4217                 }
4218         }
4219
4220         codegen_finish(jd);
4221
4222         return code->entrypoint;
4223 }
4224
4225
4226 /*
4227  * These are local overrides for various environment variables in Emacs.
4228  * Please do not remove this and leave it at the end of the file, where
4229  * Emacs will automagically detect them.
4230  * ---------------------------------------------------------------------
4231  * Local variables:
4232  * mode: c
4233  * indent-tabs-mode: t
4234  * c-basic-offset: 4
4235  * tab-width: 4
4236  * End:
4237  * vim:noexpandtab:sw=4:ts=4:
4238  */