src/vm/jit/alpha/codegen.c

   1 /* jit/alpha/codegen.c - machine code generator for alpha
   2
   3    Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
   4    Institut f. Computersprachen, TU Wien
   5    R. Grafl, A. Krall, C. Kruegel, C. Oates, R. Obermaisser, M. Probst,
   6    S. Ring, E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich,
   7    J. Wenninger
   8
   9    This file is part of CACAO.
  10
  11    This program is free software; you can redistribute it and/or
  12    modify it under the terms of the GNU General Public License as
  13    published by the Free Software Foundation; either version 2, or (at
  14    your option) any later version.
  15
  16    This program is distributed in the hope that it will be useful, but
  17    WITHOUT ANY WARRANTY; without even the implied warranty of
  18    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19    General Public License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software
  23    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  24    02111-1307, USA.
  25
  26    Contact: cacao@complang.tuwien.ac.at
  27
  28    Authors: Andreas Krall
  29             Reinhard Grafl
  30
  31    $Id: codegen.c 594 2003-11-09 19:54:50Z twisti $
  32
  33 */
  34
  35
  36 #include <stdio.h>
  37 #include <signal.h>
  38 #include "types.h"
  39 #include "codegen.h"
  40 #include "jit.h"
  41 #include "reg.h"
  42 #include "builtin.h"
  43 #include "asmpart.h"
  44 #include "jni.h"
  45 #include "loader.h"
  46 #include "tables.h"
  47 #include "native.h"
  48
  49 /* include independent code generation stuff */
  50 #include "codegen.inc"
  51 #include "reg.inc"
  52
  53
  54 /* *****************************************************************************
  55
  56 Datatypes and Register Allocations:
  57 -----------------------------------
  58
  59 On 64-bit-machines (like the Alpha) all operands are stored in the
  60 registers in a 64-bit form, even when the correspondig JavaVM  operands
  61 only need 32 bits. This is done by a canonical representation:
  62
  63 32-bit integers are allways stored as sign-extended 64-bit values (this
  64 approach is directly supported by the Alpha architecture and is very easy
  65 to implement).
  66
  67 32-bit-floats are stored in a 64-bit doubleprecision register by simply
  68 expanding the exponent and mantissa with zeroes. (also supported by the
  69 architecture)
  70
  71
  72 Stackframes:
  73
  74 The calling conventions and the layout of the stack is  explained in detail
  75 in the documention file: calling.doc
  76
  77 *******************************************************************************/
  78
  79
  80 /* register descripton - array ************************************************/
  81
  82 /* #define REG_RES   0         reserved register for OS or code generator     */
  83 /* #define REG_RET   1         return value register                          */
  84 /* #define REG_EXC   2         exception value register (only old jit)        */
  85 /* #define REG_SAV   3         (callee) saved register                        */
  86 /* #define REG_TMP   4         scratch temporary register (caller saved)      */
  87 /* #define REG_ARG   5         argument register (caller saved)               */
  88
  89 /* #define REG_END   -1        last entry in tables */
  90
  91 int nregdescint[] = {
  92         REG_RET, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
  93         REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
  94         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP,
  95         REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES,
  96         REG_END };
  97
  98 /* for use of reserved registers, see comment above */
  99
 100 int nregdescfloat[] = {
 101         REG_RET, REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
 102         REG_SAV, REG_SAV, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
 103         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP,
 104         REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES,
 105         REG_END };
 106
 107 /* for use of reserved registers, see comment above */
 108
 109
 110 /* parameter allocation mode */
 111
 112 int nreg_parammode = PARAMMODE_NUMBERED;
 113
 114    /* parameter-registers will be allocated by assigning the
 115       1. parameter:   int/float-reg 16
 116       2. parameter:   int/float-reg 17
 117       3. parameter:   int/float-reg 18 ....
 118    */
 119
 120
 121 /* stackframe-infos ***********************************************************/
 122
 123 int parentargs_base; /* offset in stackframe for the parameter from the caller*/
 124
 125 /* -> see file 'calling.doc' */
 126
 127
 128 /* additional functions and macros to generate code ***************************/
 129
 130 /* #define BlockPtrOfPC(pc)        block+block_index[pc] */
 131 #define BlockPtrOfPC(pc)  ((basicblock *) iptr->target)
 132
 133
 134 #ifdef STATISTICS
 135 #define COUNT_SPILLS count_spills++
 136 #else
 137 #define COUNT_SPILLS
 138 #endif
 139
 140
 141 /* gen_nullptr_check(objreg) */
 142
 143 #ifdef SOFTNULLPTRCHECK
 144 #define gen_nullptr_check(objreg) \
 145         if (checknull) {\
 146             M_BEQZ((objreg), 0);\
 147             codegen_addxnullrefs(mcodeptr);\
 148         }
 149 #else
 150 #define gen_nullptr_check(objreg)
 151 #endif
 152
 153
 154 /* MCODECHECK(icnt) */
 155
 156 #define MCODECHECK(icnt) \
 157         if((mcodeptr + (icnt)) > mcodeend) mcodeptr = codegen_increase((u1*) mcodeptr)
 158
 159 /* M_INTMOVE:
 160      generates an integer-move from register a to b.
 161      if a and b are the same int-register, no code will be generated.
 162 */
 163
 164 #define M_INTMOVE(a,b) if(a!=b){M_MOV(a,b);}
 165
 166
 167 /* M_FLTMOVE:
 168     generates a floating-point-move from register a to b.
 169     if a and b are the same float-register, no code will be generated
 170 */
 171
 172 #define M_FLTMOVE(a,b) if(a!=b){M_FMOV(a,b);}
 173
 174
 175 /* var_to_reg_xxx:
 176     this function generates code to fetch data from a pseudo-register
 177     into a real register.
 178     If the pseudo-register has actually been assigned to a real
 179     register, no code will be emitted, since following operations
 180     can use this register directly.
 181
 182     v: pseudoregister to be fetched from
 183     tempregnum: temporary register to be used if v is actually spilled to ram
 184
 185     return: the register number, where the operand can be found after
 186             fetching (this wil be either tempregnum or the register
 187             number allready given to v)
 188 */
 189
 190 #define var_to_reg_int(regnr,v,tempnr) { \
 191         if ((v)->flags & INMEMORY) \
 192                 {COUNT_SPILLS;M_LLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 193         else regnr=(v)->regoff; \
 194 }
 195
 196
 197 #define var_to_reg_flt(regnr,v,tempnr) { \
 198         if ((v)->flags & INMEMORY) \
 199                 {COUNT_SPILLS;M_DLD(tempnr,REG_SP,8*(v)->regoff);regnr=tempnr;} \
 200         else regnr=(v)->regoff; \
 201 }
 202
 203
 204 /* reg_of_var:
 205     This function determines a register, to which the result of an operation
 206     should go, when it is ultimatively intended to store the result in
 207     pseudoregister v.
 208     If v is assigned to an actual register, this register will be returned.
 209     Otherwise (when v is spilled) this function returns tempregnum.
 210     If not already done, regoff and flags are set in the stack location.
 211 */
 212
 213 static int reg_of_var(stackptr v, int tempregnum)
 214 {
 215         varinfo      *var;
 216
 217         switch (v->varkind) {
 218                 case TEMPVAR:
 219                         if (!(v->flags & INMEMORY))
 220                                 return(v->regoff);
 221                         break;
 222                 case STACKVAR:
 223                         var = &(interfaces[v->varnum][v->type]);
 224                         v->regoff = var->regoff;
 225                         if (!(var->flags & INMEMORY))
 226                                 return(var->regoff);
 227                         break;
 228                 case LOCALVAR:
 229                         var = &(locals[v->varnum][v->type]);
 230                         v->regoff = var->regoff;
 231                         if (!(var->flags & INMEMORY))
 232                                 return(var->regoff);
 233                         break;
 234                 case ARGVAR:
 235                         v->regoff = v->varnum;
 236                         if (IS_FLT_DBL_TYPE(v->type)) {
 237                                 if (v->varnum < fltreg_argnum) {
 238                                         v->regoff = argfltregs[v->varnum];
 239                                         return(argfltregs[v->varnum]);
 240                                         }
 241                                 }
 242                         else
 243                                 if (v->varnum < intreg_argnum) {
 244                                         v->regoff = argintregs[v->varnum];
 245                                         return(argintregs[v->varnum]);
 246                                         }
 247                         v->regoff -= intreg_argnum;
 248                         break;
 249                 }
 250         v->flags |= INMEMORY;
 251         return tempregnum;
 252 }
 253
 254
 255 /* store_reg_to_var_xxx:
 256     This function generates the code to store the result of an operation
 257     back into a spilled pseudo-variable.
 258     If the pseudo-variable has not been spilled in the first place, this
 259     function will generate nothing.
 260
 261     v ............ Pseudovariable
 262     tempregnum ... Number of the temporary registers as returned by
 263                    reg_of_var.
 264 */
 265
 266 #define store_reg_to_var_int(sptr, tempregnum) {       \
 267         if ((sptr)->flags & INMEMORY) {                    \
 268                 COUNT_SPILLS;                                  \
 269                 M_LST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 270                 }                                              \
 271         }
 272
 273 #define store_reg_to_var_flt(sptr, tempregnum) {       \
 274         if ((sptr)->flags & INMEMORY) {                    \
 275                 COUNT_SPILLS;                                  \
 276                 M_DST(tempregnum, REG_SP, 8 * (sptr)->regoff); \
 277                 }                                              \
 278         }
 279
 280
 281 /* NullPointerException handlers and exception handling initialisation        */
 282
 283 typedef struct sigctx_struct {
 284
 285         long          sc_onstack;           /* sigstack state to restore          */
 286         long          sc_mask;              /* signal mask to restore             */
 287         long          sc_pc;                /* pc at time of signal               */
 288         long          sc_ps;                /* psl to retore                      */
 289         long          sc_regs[32];          /* processor regs 0 to 31             */
 290         long          sc_ownedfp;           /* fp has been used                   */
 291         long          sc_fpregs[32];        /* fp regs 0 to 31                    */
 292         unsigned long sc_fpcr;              /* floating point control register    */
 293         unsigned long sc_fp_control;        /* software fpcr                      */
 294                                             /* rest is unused                     */
 295         unsigned long sc_reserved1, sc_reserved2;
 296         unsigned long sc_ssize;
 297         char          *sc_sbase;
 298         unsigned long sc_traparg_a0;
 299         unsigned long sc_traparg_a1;
 300         unsigned long sc_traparg_a2;
 301         unsigned long sc_fp_trap_pc;
 302         unsigned long sc_fp_trigger_sum;
 303         unsigned long sc_fp_trigger_inst;
 304         unsigned long sc_retcode[2];
 305 } sigctx_struct;
 306
 307
 308 /* NullPointerException signal handler for hardware null pointer check */
 309
 310 void catch_NullPointerException(int sig, int code, sigctx_struct *sigctx)
 311 {
 312         sigset_t nsig;
 313         int      instr;
 314         long     faultaddr;
 315
 316         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 317
 318         instr = *((int*)(sigctx->sc_pc));
 319         faultaddr = sigctx->sc_regs[(instr >> 16) & 0x1f];
 320
 321         if (faultaddr == 0) {
 322                 signal(sig, (void*) catch_NullPointerException); /* reinstall handler */
 323                 sigemptyset(&nsig);
 324                 sigaddset(&nsig, sig);
 325                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 326                 sigctx->sc_regs[REG_ITMP1_XPTR] =
 327                                             (long) proto_java_lang_NullPointerException;
 328                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 329                 sigctx->sc_pc = (long) asm_handle_exception;
 330                 return;
 331                 }
 332         else {
 333                 faultaddr += (long) ((instr << 16) >> 16);
 334                 fprintf(stderr, "faulting address: 0x%16lx\n", faultaddr);
 335                 panic("Stack overflow");
 336                 }
 337 }
 338
 339
 340 #ifdef __osf__
 341
 342 void init_exceptions(void)
 343 {
 344
 345 #else /* Linux */
 346
 347 /* Linux on Digital Alpha needs an initialisation of the ieee floating point
 348         control for IEEE compliant arithmetic (option -mieee of GCC). Under
 349         Digital Unix this is done automatically.
 350 */
 351
 352 #include <asm/fpu.h>
 353
 354 extern unsigned long ieee_get_fp_control();
 355 extern void ieee_set_fp_control(unsigned long fp_control);
 356
 357 void init_exceptions(void)
 358 {
 359 /* initialize floating point control */
 360
 361 ieee_set_fp_control(ieee_get_fp_control()
 362                     & ~IEEE_TRAP_ENABLE_INV
 363                     & ~IEEE_TRAP_ENABLE_DZE
 364 /*                  & ~IEEE_TRAP_ENABLE_UNF   we dont want underflow */
 365                     & ~IEEE_TRAP_ENABLE_OVF);
 366 #endif
 367
 368         /* install signal handlers we need to convert to exceptions */
 369
 370         if (!checknull) {
 371
 372 #if defined(SIGSEGV)
 373                 signal(SIGSEGV, (void*) catch_NullPointerException);
 374 #endif
 375
 376 #if defined(SIGBUS)
 377                 signal(SIGBUS, (void*) catch_NullPointerException);
 378 #endif
 379                 }
 380 }
 381
 382
 383 /* function gen_mcode **********************************************************
 384
 385         generates machine code
 386
 387 *******************************************************************************/
 388
 389 #define         MethodPointer   -8
 390 #define         FrameSize       -12
 391 #define     IsSync          -16
 392 #define     IsLeaf          -20
 393 #define     IntSave         -24
 394 #define     FltSave         -28
 395 #define     ExTableSize     -32
 396 #define     ExTableStart    -32
 397
 398 #define     ExEntrySize     -32
 399 #define     ExStartPC       -8
 400 #define     ExEndPC         -16
 401 #define     ExHandlerPC     -24
 402 #define     ExCatchType     -32
 403
 404 void codegen()
 405 {
 406         int  len, s1, s2, s3, d, bbs;
 407         s4   a;
 408         s4          *mcodeptr;
 409         stackptr    src;
 410         varinfo     *var;
 411         basicblock  *bptr;
 412         instruction *iptr;
 413         xtable *ex;
 414
 415         {
 416         int p, pa, t, l, r;
 417
 418         savedregs_num = (isleafmethod) ? 0 : 1;           /* space to save the RA */
 419
 420         /* space to save used callee saved registers */
 421
 422         savedregs_num += (savintregcnt - maxsavintreguse);
 423         savedregs_num += (savfltregcnt - maxsavfltreguse);
 424
 425         parentargs_base = maxmemuse + savedregs_num;
 426
 427 #ifdef USE_THREADS                 /* space to save argument of monitor_enter */
 428
 429         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 430                 parentargs_base++;
 431
 432 #endif
 433
 434         /* create method header */
 435
 436         (void) dseg_addaddress(method);                         /* MethodPointer  */
 437         (void) dseg_adds4(parentargs_base * 8);                 /* FrameSize      */
 438
 439 #ifdef USE_THREADS
 440
 441         /* IsSync contains the offset relative to the stack pointer for the
 442            argument of monitor_exit used in the exception handler. Since the
 443            offset could be zero and give a wrong meaning of the flag it is
 444            offset by one.
 445         */
 446
 447         if (checksync && (method->flags & ACC_SYNCHRONIZED))
 448                 (void) dseg_adds4((maxmemuse + 1) * 8);             /* IsSync         */
 449         else
 450
 451 #endif
 452
 453         (void) dseg_adds4(0);                                   /* IsSync         */
 454
 455         (void) dseg_adds4(isleafmethod);                        /* IsLeaf         */
 456         (void) dseg_adds4(savintregcnt - maxsavintreguse);      /* IntSave        */
 457         (void) dseg_adds4(savfltregcnt - maxsavfltreguse);      /* FltSave        */
 458         (void) dseg_adds4(exceptiontablelength);                /* ExTableSize    */
 459
 460         /* create exception table */
 461
 462         for (ex = extable; ex != NULL; ex = ex->down) {
 463
 464 #ifdef LOOP_DEBUG
 465                 if (ex->start != NULL)
 466                         printf("adding start - %d - ", ex->start->debug_nr);
 467                 else {
 468                         printf("PANIC - start is NULL");
 469                         exit(-1);
 470                 }
 471 #endif
 472
 473                 dseg_addtarget(ex->start);
 474
 475 #ifdef LOOP_DEBUG
 476                 if (ex->end != NULL)
 477                         printf("adding end - %d - ", ex->end->debug_nr);
 478                 else {
 479                         printf("PANIC - end is NULL");
 480                         exit(-1);
 481                 }
 482 #endif
 483
 484                 dseg_addtarget(ex->end);
 485
 486 #ifdef LOOP_DEBUG
 487                 if (ex->handler != NULL)
 488                         printf("adding handler - %d\n", ex->handler->debug_nr);
 489                 else {
 490                         printf("PANIC - handler is NULL");
 491                         exit(-1);
 492                 }
 493 #endif
 494
 495                 dseg_addtarget(ex->handler);
 496
 497                 (void) dseg_addaddress(ex->catchtype);
 498                 }
 499
 500         /* initialize mcode variables */
 501
 502         mcodeptr = (s4*) mcodebase;
 503         mcodeend = (s4*) (mcodebase + mcodesize);
 504         MCODECHECK(128 + mparamcount);
 505
 506         /* create stack frame (if necessary) */
 507
 508         if (parentargs_base)
 509                 {M_LDA (REG_SP, REG_SP, -parentargs_base * 8);}
 510
 511         /* save return address and used callee saved registers */
 512
 513         p = parentargs_base;
 514         if (!isleafmethod)
 515                 {p--;  M_AST (REG_RA, REG_SP, 8*p);}
 516         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
 517                 {p--; M_LST (savintregs[r], REG_SP, 8 * p);}
 518         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
 519                 {p--; M_DST (savfltregs[r], REG_SP, 8 * p);}
 520
 521         /* save monitorenter argument */
 522
 523 #ifdef USE_THREADS
 524         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 525                 if (method->flags & ACC_STATIC) {
 526                         p = dseg_addaddress (class);
 527                         M_ALD(REG_ITMP1, REG_PV, p);
 528                         M_AST(REG_ITMP1, REG_SP, 8 * maxmemuse);
 529                         }
 530                 else {
 531                         M_AST (argintregs[0], REG_SP, 8 * maxmemuse);
 532                         }
 533                 }
 534 #endif
 535
 536         /* copy argument registers to stack and call trace function with pointer
 537            to arguments on stack. ToDo: save floating point registers !!!!!!!!!
 538         */
 539
 540         if (runverbose) {
 541                 M_LDA (REG_SP, REG_SP, -(14*8));
 542                 M_AST(REG_RA, REG_SP, 1*8);
 543
 544                 M_LST(argintregs[0], REG_SP,  2*8);
 545                 M_LST(argintregs[1], REG_SP,  3*8);
 546                 M_LST(argintregs[2], REG_SP,  4*8);
 547                 M_LST(argintregs[3], REG_SP,  5*8);
 548                 M_LST(argintregs[4], REG_SP,  6*8);
 549                 M_LST(argintregs[5], REG_SP,  7*8);
 550
 551                 M_DST(argfltregs[0], REG_SP,  8*8);
 552                 M_DST(argfltregs[1], REG_SP,  9*8);
 553                 M_DST(argfltregs[2], REG_SP, 10*8);
 554                 M_DST(argfltregs[3], REG_SP, 11*8);
 555                 M_DST(argfltregs[4], REG_SP, 12*8);
 556                 M_DST(argfltregs[5], REG_SP, 13*8);
 557
 558                 p = dseg_addaddress (method);
 559                 M_ALD(REG_ITMP1, REG_PV, p);
 560                 M_AST(REG_ITMP1, REG_SP, 0);
 561                 p = dseg_addaddress ((void*) (builtin_trace_args));
 562                 M_ALD(REG_PV, REG_PV, p);
 563                 M_JSR(REG_RA, REG_PV);
 564                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
 565                 M_ALD(REG_RA, REG_SP, 1*8);
 566
 567                 M_LLD(argintregs[0], REG_SP,  2*8);
 568                 M_LLD(argintregs[1], REG_SP,  3*8);
 569                 M_LLD(argintregs[2], REG_SP,  4*8);
 570                 M_LLD(argintregs[3], REG_SP,  5*8);
 571                 M_LLD(argintregs[4], REG_SP,  6*8);
 572                 M_LLD(argintregs[5], REG_SP,  7*8);
 573
 574                 M_DLD(argfltregs[0], REG_SP,  8*8);
 575                 M_DLD(argfltregs[1], REG_SP,  9*8);
 576                 M_DLD(argfltregs[2], REG_SP, 10*8);
 577                 M_DLD(argfltregs[3], REG_SP, 11*8);
 578                 M_DLD(argfltregs[4], REG_SP, 12*8);
 579                 M_DLD(argfltregs[5], REG_SP, 13*8);
 580
 581                 M_LDA (REG_SP, REG_SP, 14*8);
 582                 }
 583
 584         /* take arguments out of register or stack frame */
 585
 586         for (p = 0, l = 0; p < mparamcount; p++) {
 587                 t = mparamtypes[p];
 588                 var = &(locals[l][t]);
 589                 l++;
 590                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 591                         l++;
 592                 if (var->type < 0)
 593                         continue;
 594                 r = var->regoff;
 595                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 596                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 597                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 598                                         {M_INTMOVE (argintregs[p], r);}
 599                                 else                                 /* reg arg -> spilled    */
 600                                         M_LST (argintregs[p], REG_SP, 8 * r);
 601                                 }
 602                         else {                                   /* stack arguments       */
 603                                 pa = p - INT_ARG_CNT;
 604                                 if (!(var->flags & INMEMORY))        /* stack arg -> register */
 605                                         M_LLD (r, REG_SP, 8 * (parentargs_base + pa));
 606                                 else {                               /* stack arg -> spilled  */
 607                                         M_LLD (REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 608                                         M_LST (REG_ITMP1, REG_SP, 8 * r);
 609                                         }
 610                                 }
 611                         }
 612                 else {                                       /* floating args         */
 613                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 614                                 if (!(var->flags & INMEMORY))        /* reg arg -> register   */
 615                                         {M_FLTMOVE (argfltregs[p], r);}
 616                                 else                                             /* reg arg -> spilled    */
 617                                         M_DST (argfltregs[p], REG_SP, 8 * r);
 618                                 }
 619                         else {                                   /* stack arguments       */
 620                                 pa = p - FLT_ARG_CNT;
 621                                 if (!(var->flags & INMEMORY))        /* stack-arg -> register */
 622                                         M_DLD (r, REG_SP, 8 * (parentargs_base + pa) );
 623                                 else {                               /* stack-arg -> spilled  */
 624                                         M_DLD (REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 625                                         M_DST (REG_FTMP1, REG_SP, 8 * r);
 626                                         }
 627                                 }
 628                         }
 629                 }  /* end for */
 630
 631         /* call trace function */
 632
 633 #if 0
 634         if (runverbose && !isleafmethod) {
 635                 M_LDA (REG_SP, REG_SP, -8);
 636                 p = dseg_addaddress (method);
 637                 M_ALD(REG_ITMP1, REG_PV, p);
 638                 M_AST(REG_ITMP1, REG_SP, 0);
 639                 p = dseg_addaddress ((void*) (builtin_trace_args));
 640                 M_ALD(REG_PV, REG_PV, p);
 641                 M_JSR(REG_RA, REG_PV);
 642                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
 643                 M_LDA(REG_SP, REG_SP, 8);
 644                 }
 645 #endif
 646
 647         /* call monitorenter function */
 648
 649 #ifdef USE_THREADS
 650         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
 651                 p = dseg_addaddress ((void*) (builtin_monitorenter));
 652                 M_ALD(REG_PV, REG_PV, p);
 653                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
 654                 M_JSR(REG_RA, REG_PV);
 655                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
 656                 }
 657 #endif
 658         }
 659
 660         /* end of header generation */
 661
 662         /* walk through all basic blocks */
 663         for (/* bbs = block_count, */ bptr = block; /* --bbs >= 0 */ bptr != NULL; bptr = bptr->next) {
 664
 665                 bptr -> mpc = (int)((u1*) mcodeptr - mcodebase);
 666
 667                 if (bptr->flags >= BBREACHED) {
 668
 669                 /* branch resolving */
 670
 671                 {
 672                 branchref *brefs;
 673                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 674                         gen_resolvebranch((u1*) mcodebase + brefs->branchpos,
 675                                           brefs->branchpos, bptr->mpc);
 676                         }
 677                 }
 678
 679                 /* copy interface registers to their destination */
 680
 681                 src = bptr->instack;
 682                 len = bptr->indepth;
 683                 MCODECHECK(64+len);
 684                 while (src != NULL) {
 685                         len--;
 686                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 687                                 d = reg_of_var(src, REG_ITMP1);
 688                                 M_INTMOVE(REG_ITMP1, d);
 689                                 store_reg_to_var_int(src, d);
 690                                 }
 691                         else {
 692                                 d = reg_of_var(src, REG_IFTMP);
 693                                 if ((src->varkind != STACKVAR)) {
 694                                         s2 = src->type;
 695                                         if (IS_FLT_DBL_TYPE(s2)) {
 696                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 697                                                         s1 = interfaces[len][s2].regoff;
 698                                                         M_FLTMOVE(s1,d);
 699                                                         }
 700                                                 else {
 701                                                         M_DLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 702                                                         }
 703                                                 store_reg_to_var_flt(src, d);
 704                                                 }
 705                                         else {
 706                                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
 707                                                         s1 = interfaces[len][s2].regoff;
 708                                                         M_INTMOVE(s1,d);
 709                                                         }
 710                                                 else {
 711                                                         M_LLD(d, REG_SP, 8 * interfaces[len][s2].regoff);
 712                                                         }
 713                                                 store_reg_to_var_int(src, d);
 714                                                 }
 715                                         }
 716                                 }
 717                         src = src->prev;
 718                         }
 719
 720                 /* walk through all instructions */
 721
 722                 src = bptr->instack;
 723                 len = bptr->icount;
 724                 for (iptr = bptr->iinstr;
 725                     len > 0;
 726                     src = iptr->dst, len--, iptr++) {
 727
 728         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 729         switch (iptr->opc) {
 730
 731                 case ICMD_NOP:        /* ...  ==> ...                                 */
 732                         break;
 733
 734                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 735
 736                         var_to_reg_int(s1, src, REG_ITMP1);
 737                         M_BEQZ(s1, 0);
 738                         codegen_addxnullrefs(mcodeptr);
 739                         break;
 740
 741                 /* constant operations ************************************************/
 742
 743 #define ICONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 744                     else{a=dseg_adds4(c);M_ILD(r,REG_PV,a);}
 745
 746 #define LCONST(r,c) if(((c)>=-32768)&&((c)<= 32767)){M_LDA(r,REG_ZERO,c);} \
 747                     else{a=dseg_adds8(c);M_LLD(r,REG_PV,a);}
 748
 749                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 750                                       /* op1 = 0, val.i = constant                    */
 751
 752                         d = reg_of_var(iptr->dst, REG_ITMP1);
 753                         ICONST(d, iptr->val.i);
 754                         store_reg_to_var_int(iptr->dst, d);
 755                         break;
 756
 757                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 758                                       /* op1 = 0, val.l = constant                    */
 759
 760                         d = reg_of_var(iptr->dst, REG_ITMP1);
 761                         LCONST(d, iptr->val.l);
 762                         store_reg_to_var_int(iptr->dst, d);
 763                         break;
 764
 765                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 766                                       /* op1 = 0, val.f = constant                    */
 767
 768                         d = reg_of_var (iptr->dst, REG_FTMP1);
 769                         a = dseg_addfloat (iptr->val.f);
 770                         M_FLD(d, REG_PV, a);
 771                         store_reg_to_var_flt (iptr->dst, d);
 772                         break;
 773
 774                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 775                                       /* op1 = 0, val.d = constant                    */
 776
 777                         d = reg_of_var (iptr->dst, REG_FTMP1);
 778                         a = dseg_adddouble (iptr->val.d);
 779                         M_DLD(d, REG_PV, a);
 780                         store_reg_to_var_flt (iptr->dst, d);
 781                         break;
 782
 783                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 784                                       /* op1 = 0, val.a = constant                    */
 785
 786                         d = reg_of_var(iptr->dst, REG_ITMP1);
 787                         if (iptr->val.a) {
 788                                 a = dseg_addaddress (iptr->val.a);
 789                                 M_ALD(d, REG_PV, a);
 790                                 }
 791                         else {
 792                                 M_INTMOVE(REG_ZERO, d);
 793                                 }
 794                         store_reg_to_var_int(iptr->dst, d);
 795                         break;
 796
 797
 798                 /* load/store operations **********************************************/
 799
 800                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 801                 case ICMD_LLOAD:      /* op1 = local variable                         */
 802                 case ICMD_ALOAD:
 803
 804                         d = reg_of_var(iptr->dst, REG_ITMP1);
 805                         if ((iptr->dst->varkind == LOCALVAR) &&
 806                             (iptr->dst->varnum == iptr->op1))
 807                                 break;
 808                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 809                         if (var->flags & INMEMORY)
 810                                 M_LLD(d, REG_SP, 8 * var->regoff);
 811                         else
 812                                 {M_INTMOVE(var->regoff,d);}
 813                         store_reg_to_var_int(iptr->dst, d);
 814                         break;
 815
 816                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 817                 case ICMD_DLOAD:      /* op1 = local variable                         */
 818
 819                         d = reg_of_var(iptr->dst, REG_FTMP1);
 820                         if ((iptr->dst->varkind == LOCALVAR) &&
 821                             (iptr->dst->varnum == iptr->op1))
 822                                 break;
 823                         var = &(locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 824                         if (var->flags & INMEMORY)
 825                                 M_DLD(d, REG_SP, 8 * var->regoff);
 826                         else
 827                                 {M_FLTMOVE(var->regoff,d);}
 828                         store_reg_to_var_flt(iptr->dst, d);
 829                         break;
 830
 831
 832                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 833                 case ICMD_LSTORE:     /* op1 = local variable                         */
 834                 case ICMD_ASTORE:
 835
 836                         if ((src->varkind == LOCALVAR) &&
 837                             (src->varnum == iptr->op1))
 838                                 break;
 839                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 840                         if (var->flags & INMEMORY) {
 841                                 var_to_reg_int(s1, src, REG_ITMP1);
 842                                 M_LST(s1, REG_SP, 8 * var->regoff);
 843                                 }
 844                         else {
 845                                 var_to_reg_int(s1, src, var->regoff);
 846                                 M_INTMOVE(s1, var->regoff);
 847                                 }
 848                         break;
 849
 850                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 851                 case ICMD_DSTORE:     /* op1 = local variable                         */
 852
 853                         if ((src->varkind == LOCALVAR) &&
 854                             (src->varnum == iptr->op1))
 855                                 break;
 856                         var = &(locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 857                         if (var->flags & INMEMORY) {
 858                                 var_to_reg_flt(s1, src, REG_FTMP1);
 859                                 M_DST(s1, REG_SP, 8 * var->regoff);
 860                                 }
 861                         else {
 862                                 var_to_reg_flt(s1, src, var->regoff);
 863                                 M_FLTMOVE(s1, var->regoff);
 864                                 }
 865                         break;
 866
 867
 868                 /* pop/dup/swap operations ********************************************/
 869
 870                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 871
 872                 case ICMD_POP:        /* ..., value  ==> ...                          */
 873                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 874                         break;
 875
 876 #define M_COPY(from,to) \
 877                         d = reg_of_var(to, REG_IFTMP); \
 878                         if ((from->regoff != to->regoff) || \
 879                             ((from->flags ^ to->flags) & INMEMORY)) { \
 880                                 if (IS_FLT_DBL_TYPE(from->type)) { \
 881                                         var_to_reg_flt(s1, from, d); \
 882                                         M_FLTMOVE(s1,d); \
 883                                         store_reg_to_var_flt(to, d); \
 884                                         }\
 885                                 else { \
 886                                         var_to_reg_int(s1, from, d); \
 887                                         M_INTMOVE(s1,d); \
 888                                         store_reg_to_var_int(to, d); \
 889                                         }\
 890                                 }
 891
 892                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 893                         M_COPY(src, iptr->dst);
 894                         break;
 895
 896                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 897
 898                         M_COPY(src,       iptr->dst->prev->prev);
 899
 900                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 901
 902                         M_COPY(src,       iptr->dst);
 903                         M_COPY(src->prev, iptr->dst->prev);
 904                         break;
 905
 906                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 907
 908                         M_COPY(src->prev,       iptr->dst->prev->prev->prev);
 909
 910                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 911
 912                         M_COPY(src,             iptr->dst);
 913                         M_COPY(src->prev,       iptr->dst->prev);
 914                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 915                         M_COPY(src, iptr->dst->prev->prev->prev);
 916                         break;
 917
 918                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 919
 920                         M_COPY(src,                   iptr->dst);
 921                         M_COPY(src->prev,             iptr->dst->prev);
 922                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 923                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 924                         M_COPY(src,       iptr->dst->prev->prev->prev->prev);
 925                         M_COPY(src->prev, iptr->dst->prev->prev->prev->prev->prev);
 926                         break;
 927
 928                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 929
 930                         M_COPY(src, iptr->dst->prev);
 931                         M_COPY(src->prev, iptr->dst);
 932                         break;
 933
 934
 935                 /* integer operations *************************************************/
 936
 937                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 938
 939                         var_to_reg_int(s1, src, REG_ITMP1);
 940                         d = reg_of_var(iptr->dst, REG_ITMP3);
 941                         M_ISUB(REG_ZERO, s1, d);
 942                         store_reg_to_var_int(iptr->dst, d);
 943                         break;
 944
 945                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 946
 947                         var_to_reg_int(s1, src, REG_ITMP1);
 948                         d = reg_of_var(iptr->dst, REG_ITMP3);
 949                         M_LSUB(REG_ZERO, s1, d);
 950                         store_reg_to_var_int(iptr->dst, d);
 951                         break;
 952
 953                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 954
 955                         var_to_reg_int(s1, src, REG_ITMP1);
 956                         d = reg_of_var(iptr->dst, REG_ITMP3);
 957                         M_INTMOVE(s1, d);
 958                         store_reg_to_var_int(iptr->dst, d);
 959                         break;
 960
 961                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 962
 963                         var_to_reg_int(s1, src, REG_ITMP1);
 964                         d = reg_of_var(iptr->dst, REG_ITMP3);
 965                         M_IADD(s1, REG_ZERO, d );
 966                         store_reg_to_var_int(iptr->dst, d);
 967                         break;
 968
 969                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 970
 971                         var_to_reg_int(s1, src, REG_ITMP1);
 972                         d = reg_of_var(iptr->dst, REG_ITMP3);
 973                         if (has_ext_instr_set) {
 974                                 M_BSEXT(s1, d);
 975                                 }
 976                         else {
 977                                 M_SLL_IMM(s1, 56, d);
 978                                 M_SRA_IMM( d, 56, d);
 979                                 }
 980                         store_reg_to_var_int(iptr->dst, d);
 981                         break;
 982
 983                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 984
 985                         var_to_reg_int(s1, src, REG_ITMP1);
 986                         d = reg_of_var(iptr->dst, REG_ITMP3);
 987             M_CZEXT(s1, d);
 988                         store_reg_to_var_int(iptr->dst, d);
 989                         break;
 990
 991                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 992
 993                         var_to_reg_int(s1, src, REG_ITMP1);
 994                         d = reg_of_var(iptr->dst, REG_ITMP3);
 995                         if (has_ext_instr_set) {
 996                                 M_SSEXT(s1, d);
 997                                 }
 998                         else {
 999                                 M_SLL_IMM(s1, 48, d);
1000                                 M_SRA_IMM( d, 48, d);
1001                                 }
1002                         store_reg_to_var_int(iptr->dst, d);
1003                         break;
1004
1005
1006                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1007
1008                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1009                         var_to_reg_int(s2, src, REG_ITMP2);
1010                         d = reg_of_var(iptr->dst, REG_ITMP3);
1011                         M_IADD(s1, s2, d);
1012                         store_reg_to_var_int(iptr->dst, d);
1013                         break;
1014
1015                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
1016                                       /* val.i = constant                             */
1017
1018                         var_to_reg_int(s1, src, REG_ITMP1);
1019                         d = reg_of_var(iptr->dst, REG_ITMP3);
1020                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1021                                 M_IADD_IMM(s1, iptr->val.i, d);
1022                                 }
1023                         else {
1024                                 ICONST(REG_ITMP2, iptr->val.i);
1025                                 M_IADD(s1, REG_ITMP2, d);
1026                                 }
1027                         store_reg_to_var_int(iptr->dst, d);
1028                         break;
1029
1030                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1031
1032                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1033                         var_to_reg_int(s2, src, REG_ITMP2);
1034                         d = reg_of_var(iptr->dst, REG_ITMP3);
1035                         M_LADD(s1, s2, d);
1036                         store_reg_to_var_int(iptr->dst, d);
1037                         break;
1038
1039                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
1040                                       /* val.l = constant                             */
1041
1042                         var_to_reg_int(s1, src, REG_ITMP1);
1043                         d = reg_of_var(iptr->dst, REG_ITMP3);
1044                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1045                                 M_LADD_IMM(s1, iptr->val.l, d);
1046                                 }
1047                         else {
1048                                 LCONST(REG_ITMP2, iptr->val.l);
1049                                 M_LADD(s1, REG_ITMP2, d);
1050                                 }
1051                         store_reg_to_var_int(iptr->dst, d);
1052                         break;
1053
1054                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1055
1056                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1057                         var_to_reg_int(s2, src, REG_ITMP2);
1058                         d = reg_of_var(iptr->dst, REG_ITMP3);
1059                         M_ISUB(s1, s2, d);
1060                         store_reg_to_var_int(iptr->dst, d);
1061                         break;
1062
1063                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
1064                                       /* val.i = constant                             */
1065
1066                         var_to_reg_int(s1, src, REG_ITMP1);
1067                         d = reg_of_var(iptr->dst, REG_ITMP3);
1068                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1069                                 M_ISUB_IMM(s1, iptr->val.i, d);
1070                                 }
1071                         else {
1072                                 ICONST(REG_ITMP2, iptr->val.i);
1073                                 M_ISUB(s1, REG_ITMP2, d);
1074                                 }
1075                         store_reg_to_var_int(iptr->dst, d);
1076                         break;
1077
1078                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1079
1080                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1081                         var_to_reg_int(s2, src, REG_ITMP2);
1082                         d = reg_of_var(iptr->dst, REG_ITMP3);
1083                         M_LSUB(s1, s2, d);
1084                         store_reg_to_var_int(iptr->dst, d);
1085                         break;
1086
1087                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
1088                                       /* val.l = constant                             */
1089
1090                         var_to_reg_int(s1, src, REG_ITMP1);
1091                         d = reg_of_var(iptr->dst, REG_ITMP3);
1092                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1093                                 M_LSUB_IMM(s1, iptr->val.l, d);
1094                                 }
1095                         else {
1096                                 LCONST(REG_ITMP2, iptr->val.l);
1097                                 M_LSUB(s1, REG_ITMP2, d);
1098                                 }
1099                         store_reg_to_var_int(iptr->dst, d);
1100                         break;
1101
1102                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1103
1104                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1105                         var_to_reg_int(s2, src, REG_ITMP2);
1106                         d = reg_of_var(iptr->dst, REG_ITMP3);
1107                         M_IMUL(s1, s2, d);
1108                         store_reg_to_var_int(iptr->dst, d);
1109                         break;
1110
1111                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
1112                                       /* val.i = constant                             */
1113
1114                         var_to_reg_int(s1, src, REG_ITMP1);
1115                         d = reg_of_var(iptr->dst, REG_ITMP3);
1116                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1117                                 M_IMUL_IMM(s1, iptr->val.i, d);
1118                                 }
1119                         else {
1120                                 ICONST(REG_ITMP2, iptr->val.i);
1121                                 M_IMUL(s1, REG_ITMP2, d);
1122                                 }
1123                         store_reg_to_var_int(iptr->dst, d);
1124                         break;
1125
1126                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1127
1128                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1129                         var_to_reg_int(s2, src, REG_ITMP2);
1130                         d = reg_of_var(iptr->dst, REG_ITMP3);
1131                         M_LMUL (s1, s2, d);
1132                         store_reg_to_var_int(iptr->dst, d);
1133                         break;
1134
1135                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
1136                                       /* val.l = constant                             */
1137
1138                         var_to_reg_int(s1, src, REG_ITMP1);
1139                         d = reg_of_var(iptr->dst, REG_ITMP3);
1140                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1141                                 M_LMUL_IMM(s1, iptr->val.l, d);
1142                                 }
1143                         else {
1144                                 LCONST(REG_ITMP2, iptr->val.l);
1145                                 M_LMUL(s1, REG_ITMP2, d);
1146                                 }
1147                         store_reg_to_var_int(iptr->dst, d);
1148                         break;
1149
1150                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
1151                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
1152
1153                         var_to_reg_int(s1, src, REG_ITMP1);
1154                         d = reg_of_var(iptr->dst, REG_ITMP3);
1155                         if (iptr->val.i <= 15) {
1156                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
1157                                 M_CMOVGE(s1, s1, REG_ITMP2);
1158                                 }
1159                         else {
1160                                 M_SRA_IMM(s1, 63, REG_ITMP2);
1161                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
1162                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
1163                                 }
1164                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
1165                         store_reg_to_var_int(iptr->dst, d);
1166                         break;
1167
1168                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1169
1170                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1171                         var_to_reg_int(s2, src, REG_ITMP2);
1172                         d = reg_of_var(iptr->dst, REG_ITMP3);
1173                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1174                         M_SLL(s1, REG_ITMP3, d);
1175                         M_IADD(d, REG_ZERO, d);
1176                         store_reg_to_var_int(iptr->dst, d);
1177                         break;
1178
1179                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
1180                                       /* val.i = constant                             */
1181
1182                         var_to_reg_int(s1, src, REG_ITMP1);
1183                         d = reg_of_var(iptr->dst, REG_ITMP3);
1184                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
1185                         M_IADD(d, REG_ZERO, d);
1186                         store_reg_to_var_int(iptr->dst, d);
1187                         break;
1188
1189                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1190
1191                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1192                         var_to_reg_int(s2, src, REG_ITMP2);
1193                         d = reg_of_var(iptr->dst, REG_ITMP3);
1194                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1195                         M_SRA(s1, REG_ITMP3, d);
1196                         store_reg_to_var_int(iptr->dst, d);
1197                         break;
1198
1199                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1200                                       /* val.i = constant                             */
1201
1202                         var_to_reg_int(s1, src, REG_ITMP1);
1203                         d = reg_of_var(iptr->dst, REG_ITMP3);
1204                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1205                         store_reg_to_var_int(iptr->dst, d);
1206                         break;
1207
1208                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1209
1210                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1211                         var_to_reg_int(s2, src, REG_ITMP2);
1212                         d = reg_of_var(iptr->dst, REG_ITMP3);
1213                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1214             M_IZEXT(s1, d);
1215                         M_SRL(d, REG_ITMP2, d);
1216                         M_IADD(d, REG_ZERO, d);
1217                         store_reg_to_var_int(iptr->dst, d);
1218                         break;
1219
1220                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1221                                       /* val.i = constant                             */
1222
1223                         var_to_reg_int(s1, src, REG_ITMP1);
1224                         d = reg_of_var(iptr->dst, REG_ITMP3);
1225             M_IZEXT(s1, d);
1226                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
1227                         M_IADD(d, REG_ZERO, d);
1228                         store_reg_to_var_int(iptr->dst, d);
1229                         break;
1230
1231                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1232
1233                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1234                         var_to_reg_int(s2, src, REG_ITMP2);
1235                         d = reg_of_var(iptr->dst, REG_ITMP3);
1236                         M_SLL(s1, s2, d);
1237                         store_reg_to_var_int(iptr->dst, d);
1238                         break;
1239
1240                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1241                                       /* val.i = constant                             */
1242
1243                         var_to_reg_int(s1, src, REG_ITMP1);
1244                         d = reg_of_var(iptr->dst, REG_ITMP3);
1245                         M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
1246                         store_reg_to_var_int(iptr->dst, d);
1247                         break;
1248
1249                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1250
1251                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1252                         var_to_reg_int(s2, src, REG_ITMP2);
1253                         d = reg_of_var(iptr->dst, REG_ITMP3);
1254                         M_SRA(s1, s2, d);
1255                         store_reg_to_var_int(iptr->dst, d);
1256                         break;
1257
1258                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1259                                       /* val.i = constant                             */
1260
1261                         var_to_reg_int(s1, src, REG_ITMP1);
1262                         d = reg_of_var(iptr->dst, REG_ITMP3);
1263                         M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
1264                         store_reg_to_var_int(iptr->dst, d);
1265                         break;
1266
1267                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1268
1269                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1270                         var_to_reg_int(s2, src, REG_ITMP2);
1271                         d = reg_of_var(iptr->dst, REG_ITMP3);
1272                         M_SRL(s1, s2, d);
1273                         store_reg_to_var_int(iptr->dst, d);
1274                         break;
1275
1276                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1277                                       /* val.i = constant                             */
1278
1279                         var_to_reg_int(s1, src, REG_ITMP1);
1280                         d = reg_of_var(iptr->dst, REG_ITMP3);
1281                         M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
1282                         store_reg_to_var_int(iptr->dst, d);
1283                         break;
1284
1285                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1286                 case ICMD_LAND:
1287
1288                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1289                         var_to_reg_int(s2, src, REG_ITMP2);
1290                         d = reg_of_var(iptr->dst, REG_ITMP3);
1291                         M_AND(s1, s2, d);
1292                         store_reg_to_var_int(iptr->dst, d);
1293                         break;
1294
1295                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1296                                       /* val.i = constant                             */
1297
1298                         var_to_reg_int(s1, src, REG_ITMP1);
1299                         d = reg_of_var(iptr->dst, REG_ITMP3);
1300                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1301                                 M_AND_IMM(s1, iptr->val.i, d);
1302                                 }
1303                         else if (iptr->val.i == 0xffff) {
1304                                 M_CZEXT(s1, d);
1305                                 }
1306                         else if (iptr->val.i == 0xffffff) {
1307                                 M_ZAPNOT_IMM(s1, 0x07, d);
1308                                 }
1309                         else {
1310                                 ICONST(REG_ITMP2, iptr->val.i);
1311                                 M_AND(s1, REG_ITMP2, d);
1312                                 }
1313                         store_reg_to_var_int(iptr->dst, d);
1314                         break;
1315
1316                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1317                                       /* val.i = constant                             */
1318
1319                         var_to_reg_int(s1, src, REG_ITMP1);
1320                         d = reg_of_var(iptr->dst, REG_ITMP3);
1321                         if (s1 == d) {
1322                                 M_MOV(s1, REG_ITMP1);
1323                                 s1 = REG_ITMP1;
1324                                 }
1325                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1326                                 M_AND_IMM(s1, iptr->val.i, d);
1327                                 M_BGEZ(s1, 3);
1328                                 M_ISUB(REG_ZERO, s1, d);
1329                                 M_AND_IMM(d, iptr->val.i, d);
1330                                 }
1331                         else if (iptr->val.i == 0xffff) {
1332                                 M_CZEXT(s1, d);
1333                                 M_BGEZ(s1, 3);
1334                                 M_ISUB(REG_ZERO, s1, d);
1335                                 M_CZEXT(d, d);
1336                                 }
1337                         else if (iptr->val.i == 0xffffff) {
1338                                 M_ZAPNOT_IMM(s1, 0x07, d);
1339                                 M_BGEZ(s1, 3);
1340                                 M_ISUB(REG_ZERO, s1, d);
1341                                 M_ZAPNOT_IMM(d, 0x07, d);
1342                                 }
1343                         else {
1344                                 ICONST(REG_ITMP2, iptr->val.i);
1345                                 M_AND(s1, REG_ITMP2, d);
1346                                 M_BGEZ(s1, 3);
1347                                 M_ISUB(REG_ZERO, s1, d);
1348                                 M_AND(d, REG_ITMP2, d);
1349                                 }
1350                         M_ISUB(REG_ZERO, d, d);
1351                         store_reg_to_var_int(iptr->dst, d);
1352                         break;
1353
1354                 case ICMD_IREM0X10001:  /* ..., value  ==> ..., value % 0x100001      */
1355
1356 /*          b = value & 0xffff;
1357                         a = value >> 16;
1358                         a = ((b - a) & 0xffff) + (b < a);
1359 */
1360                         var_to_reg_int(s1, src, REG_ITMP1);
1361                         d = reg_of_var(iptr->dst, REG_ITMP3);
1362                         if (s1 == d) {
1363                                 M_MOV(s1, REG_ITMP3);
1364                                 s1 = REG_ITMP3;
1365                                 }
1366                         M_BLTZ(s1, 7);
1367             M_CZEXT(s1, REG_ITMP2);
1368                         M_SRA_IMM(s1, 16, d);
1369                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1370                         M_ISUB(REG_ITMP2, d, d);
1371             M_CZEXT(d, d);
1372                         M_IADD(d, REG_ITMP1, d);
1373                         M_BR(11 + (s1 == REG_ITMP1));
1374                         M_ISUB(REG_ZERO, s1, REG_ITMP1);
1375             M_CZEXT(REG_ITMP1, REG_ITMP2);
1376                         M_SRA_IMM(REG_ITMP1, 16, d);
1377                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1378                         M_ISUB(REG_ITMP2, d, d);
1379             M_CZEXT(d, d);
1380                         M_IADD(d, REG_ITMP1, d);
1381                         M_ISUB(REG_ZERO, d, d);
1382                         if (s1 == REG_ITMP1) {
1383                                 var_to_reg_int(s1, src, REG_ITMP1);
1384                                 }
1385                         M_SLL_IMM(s1, 33, REG_ITMP2);
1386                         M_CMPEQ(REG_ITMP2, REG_ZERO, REG_ITMP2);
1387                         M_ISUB(d, REG_ITMP2, d);
1388                         store_reg_to_var_int(iptr->dst, d);
1389                         break;
1390
1391                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1392                                       /* val.l = constant                             */
1393
1394                         var_to_reg_int(s1, src, REG_ITMP1);
1395                         d = reg_of_var(iptr->dst, REG_ITMP3);
1396                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1397                                 M_AND_IMM(s1, iptr->val.l, d);
1398                                 }
1399                         else if (iptr->val.l == 0xffffL) {
1400                                 M_CZEXT(s1, d);
1401                                 }
1402                         else if (iptr->val.l == 0xffffffL) {
1403                                 M_ZAPNOT_IMM(s1, 0x07, d);
1404                                 }
1405                         else if (iptr->val.l == 0xffffffffL) {
1406                                 M_IZEXT(s1, d);
1407                                 }
1408                         else if (iptr->val.l == 0xffffffffffL) {
1409                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1410                                 }
1411                         else if (iptr->val.l == 0xffffffffffffL) {
1412                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1413                                 }
1414                         else if (iptr->val.l == 0xffffffffffffffL) {
1415                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1416                                 }
1417                         else {
1418                                 LCONST(REG_ITMP2, iptr->val.l);
1419                                 M_AND(s1, REG_ITMP2, d);
1420                                 }
1421                         store_reg_to_var_int(iptr->dst, d);
1422                         break;
1423
1424                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1425                                       /* val.l = constant                             */
1426
1427                         var_to_reg_int(s1, src, REG_ITMP1);
1428                         d = reg_of_var(iptr->dst, REG_ITMP3);
1429                         if (s1 == d) {
1430                                 M_MOV(s1, REG_ITMP1);
1431                                 s1 = REG_ITMP1;
1432                                 }
1433                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1434                                 M_AND_IMM(s1, iptr->val.l, d);
1435                                 M_BGEZ(s1, 3);
1436                                 M_LSUB(REG_ZERO, s1, d);
1437                                 M_AND_IMM(d, iptr->val.l, d);
1438                                 }
1439                         else if (iptr->val.l == 0xffffL) {
1440                                 M_CZEXT(s1, d);
1441                                 M_BGEZ(s1, 3);
1442                                 M_LSUB(REG_ZERO, s1, d);
1443                                 M_CZEXT(d, d);
1444                                 }
1445                         else if (iptr->val.l == 0xffffffL) {
1446                                 M_ZAPNOT_IMM(s1, 0x07, d);
1447                                 M_BGEZ(s1, 3);
1448                                 M_LSUB(REG_ZERO, s1, d);
1449                                 M_ZAPNOT_IMM(d, 0x07, d);
1450                                 }
1451                         else if (iptr->val.l == 0xffffffffL) {
1452                                 M_IZEXT(s1, d);
1453                                 M_BGEZ(s1, 3);
1454                                 M_LSUB(REG_ZERO, s1, d);
1455                                 M_IZEXT(d, d);
1456                                 }
1457                         else if (iptr->val.l == 0xffffffffffL) {
1458                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1459                                 M_BGEZ(s1, 3);
1460                                 M_LSUB(REG_ZERO, s1, d);
1461                                 M_ZAPNOT_IMM(d, 0x1f, d);
1462                                 }
1463                         else if (iptr->val.l == 0xffffffffffffL) {
1464                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1465                                 M_BGEZ(s1, 3);
1466                                 M_LSUB(REG_ZERO, s1, d);
1467                                 M_ZAPNOT_IMM(d, 0x3f, d);
1468                                 }
1469                         else if (iptr->val.l == 0xffffffffffffffL) {
1470                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1471                                 M_BGEZ(s1, 3);
1472                                 M_LSUB(REG_ZERO, s1, d);
1473                                 M_ZAPNOT_IMM(d, 0x7f, d);
1474                                 }
1475                         else {
1476                                 LCONST(REG_ITMP2, iptr->val.l);
1477                                 M_AND(s1, REG_ITMP2, d);
1478                                 M_BGEZ(s1, 3);
1479                                 M_LSUB(REG_ZERO, s1, d);
1480                                 M_AND(d, REG_ITMP2, d);
1481                                 }
1482                         M_LSUB(REG_ZERO, d, d);
1483                         store_reg_to_var_int(iptr->dst, d);
1484                         break;
1485
1486                 case ICMD_LREM0X10001:/* ..., value  ==> ..., value % 0x10001         */
1487
1488                         var_to_reg_int(s1, src, REG_ITMP1);
1489                         d = reg_of_var(iptr->dst, REG_ITMP3);
1490                         if (s1 == d) {
1491                                 M_MOV(s1, REG_ITMP3);
1492                                 s1 = REG_ITMP3;
1493                                 }
1494                         M_CZEXT(s1, REG_ITMP2);
1495                         M_SRA_IMM(s1, 16, d);
1496                         M_CMPLT(REG_ITMP2, d, REG_ITMP1);
1497                         M_LSUB(REG_ITMP2, d, d);
1498             M_CZEXT(d, d);
1499                         M_LADD(d, REG_ITMP1, d);
1500                         M_LDA(REG_ITMP2, REG_ZERO, -1);
1501                         M_SRL_IMM(REG_ITMP2, 33, REG_ITMP2);
1502                         if (s1 == REG_ITMP1) {
1503                                 var_to_reg_int(s1, src, REG_ITMP1);
1504                                 }
1505                         M_CMPULT(s1, REG_ITMP2, REG_ITMP2);
1506                         M_BNEZ(REG_ITMP2, 11);
1507                         M_LDA(d, REG_ZERO, -257);
1508                         M_ZAPNOT_IMM(d, 0xcd, d);
1509                         M_LSUB(REG_ZERO, s1, REG_ITMP2);
1510                         M_CMOVGE(s1, s1, REG_ITMP2);
1511                         M_UMULH(REG_ITMP2, d, REG_ITMP2);
1512                         M_SRL_IMM(REG_ITMP2, 16, REG_ITMP2);
1513                         M_LSUB(REG_ZERO, REG_ITMP2, d);
1514                         M_CMOVGE(s1, REG_ITMP2, d);
1515                         M_SLL_IMM(d, 16, REG_ITMP2);
1516                         M_LADD(d, REG_ITMP2, d);
1517                         M_LSUB(s1, d, d);
1518                         store_reg_to_var_int(iptr->dst, d);
1519                         break;
1520
1521                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1522                 case ICMD_LOR:
1523
1524                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1525                         var_to_reg_int(s2, src, REG_ITMP2);
1526                         d = reg_of_var(iptr->dst, REG_ITMP3);
1527                         M_OR( s1,s2, d);
1528                         store_reg_to_var_int(iptr->dst, d);
1529                         break;
1530
1531                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1532                                       /* val.i = constant                             */
1533
1534                         var_to_reg_int(s1, src, REG_ITMP1);
1535                         d = reg_of_var(iptr->dst, REG_ITMP3);
1536                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1537                                 M_OR_IMM(s1, iptr->val.i, d);
1538                                 }
1539                         else {
1540                                 ICONST(REG_ITMP2, iptr->val.i);
1541                                 M_OR(s1, REG_ITMP2, d);
1542                                 }
1543                         store_reg_to_var_int(iptr->dst, d);
1544                         break;
1545
1546                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1547                                       /* val.l = constant                             */
1548
1549                         var_to_reg_int(s1, src, REG_ITMP1);
1550                         d = reg_of_var(iptr->dst, REG_ITMP3);
1551                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1552                                 M_OR_IMM(s1, iptr->val.l, d);
1553                                 }
1554                         else {
1555                                 LCONST(REG_ITMP2, iptr->val.l);
1556                                 M_OR(s1, REG_ITMP2, d);
1557                                 }
1558                         store_reg_to_var_int(iptr->dst, d);
1559                         break;
1560
1561                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1562                 case ICMD_LXOR:
1563
1564                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1565                         var_to_reg_int(s2, src, REG_ITMP2);
1566                         d = reg_of_var(iptr->dst, REG_ITMP3);
1567                         M_XOR(s1, s2, d);
1568                         store_reg_to_var_int(iptr->dst, d);
1569                         break;
1570
1571                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1572                                       /* val.i = constant                             */
1573
1574                         var_to_reg_int(s1, src, REG_ITMP1);
1575                         d = reg_of_var(iptr->dst, REG_ITMP3);
1576                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1577                                 M_XOR_IMM(s1, iptr->val.i, d);
1578                                 }
1579                         else {
1580                                 ICONST(REG_ITMP2, iptr->val.i);
1581                                 M_XOR(s1, REG_ITMP2, d);
1582                                 }
1583                         store_reg_to_var_int(iptr->dst, d);
1584                         break;
1585
1586                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1587                                       /* val.l = constant                             */
1588
1589                         var_to_reg_int(s1, src, REG_ITMP1);
1590                         d = reg_of_var(iptr->dst, REG_ITMP3);
1591                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1592                                 M_XOR_IMM(s1, iptr->val.l, d);
1593                                 }
1594                         else {
1595                                 LCONST(REG_ITMP2, iptr->val.l);
1596                                 M_XOR(s1, REG_ITMP2, d);
1597                                 }
1598                         store_reg_to_var_int(iptr->dst, d);
1599                         break;
1600
1601
1602                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1603
1604                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1605                         var_to_reg_int(s2, src, REG_ITMP2);
1606                         d = reg_of_var(iptr->dst, REG_ITMP3);
1607                         M_CMPLT(s1, s2, REG_ITMP3);
1608                         M_CMPLT(s2, s1, REG_ITMP1);
1609                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1610                         store_reg_to_var_int(iptr->dst, d);
1611                         break;
1612
1613
1614                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1615                                       /* op1 = variable, val.i = constant             */
1616
1617                         var = &(locals[iptr->op1][TYPE_INT]);
1618                         if (var->flags & INMEMORY) {
1619                                 s1 = REG_ITMP1;
1620                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1621                                 }
1622                         else
1623                                 s1 = var->regoff;
1624                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1625                                 M_IADD_IMM(s1, iptr->val.i, s1);
1626                                 }
1627                         else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1628                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1629                                 }
1630                         else {
1631                                 M_LDA (s1, s1, iptr->val.i);
1632                                 M_IADD(s1, REG_ZERO, s1);
1633                                 }
1634                         if (var->flags & INMEMORY)
1635                                 M_LST(s1, REG_SP, 8 * var->regoff);
1636                         break;
1637
1638
1639                 /* floating operations ************************************************/
1640
1641                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1642
1643                         var_to_reg_flt(s1, src, REG_FTMP1);
1644                         d = reg_of_var(iptr->dst, REG_FTMP3);
1645                         M_FMOVN(s1, d);
1646                         store_reg_to_var_flt(iptr->dst, d);
1647                         break;
1648
1649                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1650
1651                         var_to_reg_flt(s1, src, REG_FTMP1);
1652                         d = reg_of_var(iptr->dst, REG_FTMP3);
1653                         M_FMOVN(s1, d);
1654                         store_reg_to_var_flt(iptr->dst, d);
1655                         break;
1656
1657                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1658
1659                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1660                         var_to_reg_flt(s2, src, REG_FTMP2);
1661                         d = reg_of_var(iptr->dst, REG_FTMP3);
1662                         if (opt_noieee) {
1663                                 M_FADD(s1, s2, d);
1664                                 }
1665                         else {
1666                                 M_FADDS(s1, s2, d);
1667                                 M_TRAPB;
1668                                 }
1669                         store_reg_to_var_flt(iptr->dst, d);
1670                         break;
1671
1672                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1673
1674                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1675                         var_to_reg_flt(s2, src, REG_FTMP2);
1676                         d = reg_of_var(iptr->dst, REG_FTMP3);
1677                         if (opt_noieee) {
1678                                 M_DADD(s1, s2, d);
1679                                 }
1680                         else {
1681                                 M_DADDS(s1, s2, d);
1682                                 M_TRAPB;
1683                                 }
1684                         store_reg_to_var_flt(iptr->dst, d);
1685                         break;
1686
1687                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1688
1689                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1690                         var_to_reg_flt(s2, src, REG_FTMP2);
1691                         d = reg_of_var(iptr->dst, REG_FTMP3);
1692                         if (opt_noieee) {
1693                                 M_FSUB(s1, s2, d);
1694                                 }
1695                         else {
1696                                 M_FSUBS(s1, s2, d);
1697                                 M_TRAPB;
1698                                 }
1699                         store_reg_to_var_flt(iptr->dst, d);
1700                         break;
1701
1702                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1703
1704                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1705                         var_to_reg_flt(s2, src, REG_FTMP2);
1706                         d = reg_of_var(iptr->dst, REG_FTMP3);
1707                         if (opt_noieee) {
1708                                 M_DSUB(s1, s2, d);
1709                                 }
1710                         else {
1711                                 M_DSUBS(s1, s2, d);
1712                                 M_TRAPB;
1713                                 }
1714                         store_reg_to_var_flt(iptr->dst, d);
1715                         break;
1716
1717                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1718
1719                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1720                         var_to_reg_flt(s2, src, REG_FTMP2);
1721                         d = reg_of_var(iptr->dst, REG_FTMP3);
1722                         if (opt_noieee) {
1723                                 M_FMUL(s1, s2, d);
1724                                 }
1725                         else {
1726                                 M_FMULS(s1, s2, d);
1727                                 M_TRAPB;
1728                                 }
1729                         store_reg_to_var_flt(iptr->dst, d);
1730                         break;
1731
1732                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1733
1734                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1735                         var_to_reg_flt(s2, src, REG_FTMP2);
1736                         d = reg_of_var(iptr->dst, REG_FTMP3);
1737                         if (opt_noieee) {
1738                                 M_DMUL(s1, s2, d);
1739                                 }
1740                         else {
1741                                 M_DMULS(s1, s2, d);
1742                                 M_TRAPB;
1743                                 }
1744                         store_reg_to_var_flt(iptr->dst, d);
1745                         break;
1746
1747                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1748
1749                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1750                         var_to_reg_flt(s2, src, REG_FTMP2);
1751                         d = reg_of_var(iptr->dst, REG_FTMP3);
1752                         if (opt_noieee) {
1753                                 M_FDIV(s1, s2, d);
1754                                 }
1755                         else {
1756                                 M_FDIVS(s1, s2, d);
1757                                 M_TRAPB;
1758                                 }
1759                         store_reg_to_var_flt(iptr->dst, d);
1760                         break;
1761
1762                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1763
1764                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1765                         var_to_reg_flt(s2, src, REG_FTMP2);
1766                         d = reg_of_var(iptr->dst, REG_FTMP3);
1767                         if (opt_noieee) {
1768                                 M_DDIV(s1, s2, d);
1769                                 }
1770                         else {
1771                                 M_DDIVS(s1, s2, d);
1772                                 M_TRAPB;
1773                                 }
1774                         store_reg_to_var_flt(iptr->dst, d);
1775                         break;
1776
1777                 case ICMD_FREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1778
1779                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1780                         var_to_reg_flt(s2, src, REG_FTMP2);
1781                         d = reg_of_var(iptr->dst, REG_FTMP3);
1782                         if (opt_noieee) {
1783                                 M_FDIV(s1,s2, REG_FTMP3);
1784                                 M_CVTDL_C(REG_FTMP3, REG_FTMP3); /* round to integer */
1785                                 M_CVTLF(REG_FTMP3, REG_FTMP3);
1786                                 M_FMUL(REG_FTMP3, s2, REG_FTMP3);
1787                                 M_FSUB(s1, REG_FTMP3, d);
1788                                 }
1789                         else {
1790                                 M_FDIVS(s1,s2, REG_FTMP3);
1791                                 M_TRAPB;
1792                                 M_CVTDL_CS(REG_FTMP3, REG_FTMP3); /* round to integer */
1793                                 M_TRAPB;
1794                                 M_CVTLF(REG_FTMP3, REG_FTMP3);
1795                                 M_FMULS(REG_FTMP3, s2, REG_FTMP3);
1796                                 M_TRAPB;
1797                                 M_FSUBS(s1, REG_FTMP3, d);
1798                                 M_TRAPB;
1799                                 }
1800                         store_reg_to_var_flt(iptr->dst, d);
1801                     break;
1802
1803                 case ICMD_DREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
1804
1805                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1806                         var_to_reg_flt(s2, src, REG_FTMP2);
1807                         d = reg_of_var(iptr->dst, REG_FTMP3);
1808                         if (opt_noieee) {
1809                                 M_DDIV(s1,s2, REG_FTMP3);
1810                                 M_CVTDL_C(REG_FTMP3, REG_FTMP3); /* round to integer */
1811                                 M_CVTLD(REG_FTMP3, REG_FTMP3);
1812                                 M_DMUL(REG_FTMP3, s2, REG_FTMP3);
1813                                 M_DSUB(s1, REG_FTMP3, d);
1814                                 }
1815                         else {
1816                                 M_DDIVS(s1,s2, REG_FTMP3);
1817                                 M_TRAPB;
1818                                 M_CVTDL_CS(REG_FTMP3, REG_FTMP3); /* round to integer */
1819                                 M_TRAPB;
1820                                 M_CVTLD(REG_FTMP3, REG_FTMP3);
1821                                 M_DMULS(REG_FTMP3, s2, REG_FTMP3);
1822                                 M_TRAPB;
1823                                 M_DSUBS(s1, REG_FTMP3, d);
1824                                 M_TRAPB;
1825                                 }
1826                         store_reg_to_var_flt(iptr->dst, d);
1827                     break;
1828
1829                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1830                 case ICMD_L2F:
1831                         var_to_reg_int(s1, src, REG_ITMP1);
1832                         d = reg_of_var(iptr->dst, REG_FTMP3);
1833                         a = dseg_adddouble(0.0);
1834                         M_LST (s1, REG_PV, a);
1835                         M_DLD (d, REG_PV, a);
1836                         M_CVTLF(d, d);
1837                         store_reg_to_var_flt(iptr->dst, d);
1838                         break;
1839
1840                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1841                 case ICMD_L2D:
1842                         var_to_reg_int(s1, src, REG_ITMP1);
1843                         d = reg_of_var(iptr->dst, REG_FTMP3);
1844                         a = dseg_adddouble(0.0);
1845                         M_LST (s1, REG_PV, a);
1846                         M_DLD (d, REG_PV, a);
1847                         M_CVTLD(d, d);
1848                         store_reg_to_var_flt(iptr->dst, d);
1849                         break;
1850
1851                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1852                 case ICMD_D2I:
1853                         var_to_reg_flt(s1, src, REG_FTMP1);
1854                         d = reg_of_var(iptr->dst, REG_ITMP3);
1855                         a = dseg_adddouble(0.0);
1856                         if (opt_noieee) {
1857                                 M_CVTDL_C(s1, REG_FTMP1);
1858                                 M_CVTLI(REG_FTMP1, REG_FTMP2);
1859                                 }
1860                         else {
1861                                 M_CVTDL_CS(s1, REG_FTMP1);
1862                                 M_TRAPB;
1863                                 M_CVTLIS(REG_FTMP1, REG_FTMP2);
1864                                 M_TRAPB;
1865                                 }
1866                         M_DST (REG_FTMP1, REG_PV, a);
1867                         M_ILD (d, REG_PV, a);
1868                         store_reg_to_var_int(iptr->dst, d);
1869                         break;
1870
1871                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1872                 case ICMD_D2L:
1873                         var_to_reg_flt(s1, src, REG_FTMP1);
1874                         d = reg_of_var(iptr->dst, REG_ITMP3);
1875                         a = dseg_adddouble(0.0);
1876                         if (opt_noieee) {
1877                                 M_CVTDL_C(s1, REG_FTMP1);
1878                                 }
1879                         else {
1880                                 M_CVTDL_CS(s1, REG_FTMP1);
1881                                 M_TRAPB;
1882                                 }
1883                         M_DST (REG_FTMP1, REG_PV, a);
1884                         M_LLD (d, REG_PV, a);
1885                         store_reg_to_var_int(iptr->dst, d);
1886                         break;
1887
1888                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1889
1890                         var_to_reg_flt(s1, src, REG_FTMP1);
1891                         d = reg_of_var(iptr->dst, REG_FTMP3);
1892                         M_FLTMOVE(s1, d);
1893                         store_reg_to_var_flt(iptr->dst, d);
1894                         break;
1895
1896                 case ICMD_D2F:       /* ..., value  ==> ..., (double) value           */
1897
1898                         var_to_reg_flt(s1, src, REG_FTMP1);
1899                         d = reg_of_var(iptr->dst, REG_FTMP3);
1900                         if (opt_noieee) {
1901                                 M_CVTDF(s1, d);
1902                                 }
1903                         else {
1904                                 M_CVTDFS(s1, d);
1905                                 M_TRAPB;
1906                                 }
1907                         store_reg_to_var_flt(iptr->dst, d);
1908                         break;
1909
1910                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1911                 case ICMD_DCMPL:
1912                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1913                         var_to_reg_flt(s2, src, REG_FTMP2);
1914                         d = reg_of_var(iptr->dst, REG_ITMP3);
1915                         if (opt_noieee) {
1916                                 M_LSUB_IMM(REG_ZERO, 1, d);
1917                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1918                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1919                                 M_CLR   (d);
1920                                 M_FCMPLT(s2, s1, REG_FTMP3);
1921                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1922                                 M_LADD_IMM(REG_ZERO, 1, d);
1923                                 }
1924                         else {
1925                                 M_LSUB_IMM(REG_ZERO, 1, d);
1926                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1927                                 M_TRAPB;
1928                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1929                                 M_CLR   (d);
1930                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1931                                 M_TRAPB;
1932                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1933                                 M_LADD_IMM(REG_ZERO, 1, d);
1934                                 }
1935                         store_reg_to_var_int(iptr->dst, d);
1936                         break;
1937
1938                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1939                 case ICMD_DCMPG:
1940                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1941                         var_to_reg_flt(s2, src, REG_FTMP2);
1942                         d = reg_of_var(iptr->dst, REG_ITMP3);
1943                         if (opt_noieee) {
1944                                 M_LADD_IMM(REG_ZERO, 1, d);
1945                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1946                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1947                                 M_CLR   (d);
1948                                 M_FCMPLT(s1, s2, REG_FTMP3);
1949                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1950                                 M_LSUB_IMM(REG_ZERO, 1, d);
1951                                 }
1952                         else {
1953                                 M_LADD_IMM(REG_ZERO, 1, d);
1954                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1955                                 M_TRAPB;
1956                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1957                                 M_CLR   (d);
1958                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1959                                 M_TRAPB;
1960                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1961                                 M_LSUB_IMM(REG_ZERO, 1, d);
1962                                 }
1963                         store_reg_to_var_int(iptr->dst, d);
1964                         break;
1965
1966
1967                 /* memory operations **************************************************/
1968
1969                         /* #define gen_bound_check \
1970                         if (checkbounds) {\
1971                                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1972                                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
1973                                 M_BEQZ(REG_ITMP3, 0);\
1974                                 codegen_addxboundrefs(mcodeptr);\
1975                                 }
1976                         */
1977
1978 #define gen_bound_check \
1979             if (checkbounds) { \
1980                                 M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));\
1981                                 M_CMPULT(s2, REG_ITMP3, REG_ITMP3);\
1982                                 M_BEQZ(REG_ITMP3, 0);\
1983                                 codegen_addxboundrefs(mcodeptr); \
1984                 }
1985
1986                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1987
1988                         var_to_reg_int(s1, src, REG_ITMP1);
1989                         d = reg_of_var(iptr->dst, REG_ITMP3);
1990                         gen_nullptr_check(s1);
1991                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1992                         store_reg_to_var_int(iptr->dst, d);
1993                         break;
1994
1995                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1996
1997                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1998                         var_to_reg_int(s2, src, REG_ITMP2);
1999                         d = reg_of_var(iptr->dst, REG_ITMP3);
2000                         if (iptr->op1 == 0) {
2001                                 gen_nullptr_check(s1);
2002                                 gen_bound_check;
2003                                 }
2004                         M_SAADDQ(s2, s1, REG_ITMP1);
2005                         M_ALD( d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2006                         store_reg_to_var_int(iptr->dst, d);
2007                         break;
2008
2009                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
2010
2011                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2012                         var_to_reg_int(s2, src, REG_ITMP2);
2013                         d = reg_of_var(iptr->dst, REG_ITMP3);
2014                         if (iptr->op1 == 0) {
2015                                 gen_nullptr_check(s1);
2016                                 gen_bound_check;
2017                                 }
2018                         M_S8ADDQ(s2, s1, REG_ITMP1);
2019                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
2020                         store_reg_to_var_int(iptr->dst, d);
2021                         break;
2022
2023                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
2024
2025                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2026                         var_to_reg_int(s2, src, REG_ITMP2);
2027                         d = reg_of_var(iptr->dst, REG_ITMP3);
2028                         if (iptr->op1 == 0) {
2029                                 gen_nullptr_check(s1);
2030                                 gen_bound_check;
2031                                 }
2032
2033                         M_S4ADDQ(s2, s1, REG_ITMP1);
2034                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
2035                         store_reg_to_var_int(iptr->dst, d);
2036                         break;
2037
2038                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
2039
2040                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2041                         var_to_reg_int(s2, src, REG_ITMP2);
2042                         d = reg_of_var(iptr->dst, REG_FTMP3);
2043                         if (iptr->op1 == 0) {
2044                                 gen_nullptr_check(s1);
2045                                 gen_bound_check;
2046                                 }
2047                         M_S4ADDQ(s2, s1, REG_ITMP1);
2048                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2049                         store_reg_to_var_flt(iptr->dst, d);
2050                         break;
2051
2052                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
2053
2054                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2055                         var_to_reg_int(s2, src, REG_ITMP2);
2056                         d = reg_of_var(iptr->dst, REG_FTMP3);
2057                         if (iptr->op1 == 0) {
2058                                 gen_nullptr_check(s1);
2059                                 gen_bound_check;
2060                                 }
2061                         M_S8ADDQ(s2, s1, REG_ITMP1);
2062                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2063                         store_reg_to_var_flt(iptr->dst, d);
2064                         break;
2065
2066                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
2067
2068                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2069                         var_to_reg_int(s2, src, REG_ITMP2);
2070                         d = reg_of_var(iptr->dst, REG_ITMP3);
2071                         if (iptr->op1 == 0) {
2072                                 gen_nullptr_check(s1);
2073                                 gen_bound_check;
2074                                 }
2075                         if (has_ext_instr_set) {
2076                                 M_LADD(s2, s1, REG_ITMP1);
2077                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2078                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
2079                                 }
2080                         else {
2081                                 M_LADD (s2, s1, REG_ITMP1);
2082                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2083                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2084                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2085                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
2086                                 }
2087                         store_reg_to_var_int(iptr->dst, d);
2088                         break;
2089
2090                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
2091
2092                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2093                         var_to_reg_int(s2, src, REG_ITMP2);
2094                         d = reg_of_var(iptr->dst, REG_ITMP3);
2095                         if (iptr->op1 == 0) {
2096                                 gen_nullptr_check(s1);
2097                                 gen_bound_check;
2098                                 }
2099                         if (has_ext_instr_set) {
2100                                 M_LADD(s2, s1, REG_ITMP1);
2101                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2102                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
2103                                 M_SSEXT(d, d);
2104                                 }
2105                         else {
2106                                 M_LADD(s2, s1, REG_ITMP1);
2107                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2108                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2109                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
2110                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
2111                                 M_SRA_IMM(d, 48, d);
2112                                 }
2113                         store_reg_to_var_int(iptr->dst, d);
2114                         break;
2115
2116                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
2117
2118                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2119                         var_to_reg_int(s2, src, REG_ITMP2);
2120                         d = reg_of_var(iptr->dst, REG_ITMP3);
2121                         if (iptr->op1 == 0) {
2122                                 gen_nullptr_check(s1);
2123                                 gen_bound_check;
2124                                 }
2125                         if (has_ext_instr_set) {
2126                                 M_LADD   (s2, s1, REG_ITMP1);
2127                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
2128                                 M_BSEXT  (d, d);
2129                                 }
2130                         else {
2131                                 M_LADD(s2, s1, REG_ITMP1);
2132                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2133                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
2134                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
2135                                 M_SRA_IMM(d, 56, d);
2136                                 }
2137                         store_reg_to_var_int(iptr->dst, d);
2138                         break;
2139
2140
2141                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
2142
2143                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2144                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2145                         if (iptr->op1 == 0) {
2146                                 gen_nullptr_check(s1);
2147                                 gen_bound_check;
2148                                 }
2149                         var_to_reg_int(s3, src, REG_ITMP3);
2150                         M_SAADDQ(s2, s1, REG_ITMP1);
2151                         M_AST   (s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2152                         break;
2153
2154                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
2155
2156                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2157                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2158                         if (iptr->op1 == 0) {
2159                                 gen_nullptr_check(s1);
2160                                 gen_bound_check;
2161                                 }
2162                         var_to_reg_int(s3, src, REG_ITMP3);
2163                         M_S8ADDQ(s2, s1, REG_ITMP1);
2164                         M_LST   (s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
2165                         break;
2166
2167                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
2168
2169                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2170                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2171                         if (iptr->op1 == 0) {
2172                                 gen_nullptr_check(s1);
2173                                 gen_bound_check;
2174                                 }
2175
2176                         var_to_reg_int(s3, src, REG_ITMP3);
2177                         M_S4ADDQ(s2, s1, REG_ITMP1);
2178                         M_IST   (s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
2179                         break;
2180
2181                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
2182
2183                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2184                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2185                         if (iptr->op1 == 0) {
2186                                 gen_nullptr_check(s1);
2187                                 gen_bound_check;
2188                                 }
2189                         var_to_reg_flt(s3, src, REG_FTMP3);
2190                         M_S4ADDQ(s2, s1, REG_ITMP1);
2191                         M_FST   (s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
2192                         break;
2193
2194                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
2195
2196                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2197                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2198                         if (iptr->op1 == 0) {
2199                                 gen_nullptr_check(s1);
2200                                 gen_bound_check;
2201                                 }
2202                         var_to_reg_flt(s3, src, REG_FTMP3);
2203                         M_S8ADDQ(s2, s1, REG_ITMP1);
2204                         M_DST   (s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
2205                         break;
2206
2207                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
2208
2209                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2210                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2211                         if (iptr->op1 == 0) {
2212                                 gen_nullptr_check(s1);
2213                                 gen_bound_check;
2214                                 }
2215                         var_to_reg_int(s3, src, REG_ITMP3);
2216                         if (has_ext_instr_set) {
2217                                 M_LADD(s2, s1, REG_ITMP1);
2218                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2219                                 M_SST (s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
2220                                 }
2221                         else {
2222                                 M_LADD (s2, s1, REG_ITMP1);
2223                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2224                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2225                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2226                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
2227                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2228                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2229                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2230                                 }
2231                         break;
2232
2233                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
2234
2235                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2236                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2237                         if (iptr->op1 == 0) {
2238                                 gen_nullptr_check(s1);
2239                                 gen_bound_check;
2240                                 }
2241                         var_to_reg_int(s3, src, REG_ITMP3);
2242                         if (has_ext_instr_set) {
2243                                 M_LADD(s2, s1, REG_ITMP1);
2244                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2245                                 M_SST (s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2246                                 }
2247                         else {
2248                                 M_LADD (s2, s1, REG_ITMP1);
2249                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
2250                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2251                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2252                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
2253                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2254                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2255                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2256                                 }
2257                         break;
2258
2259                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
2260
2261                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
2262                         var_to_reg_int(s2, src->prev, REG_ITMP2);
2263                         if (iptr->op1 == 0) {
2264                                 gen_nullptr_check(s1);
2265                                 gen_bound_check;
2266                                 }
2267                         var_to_reg_int(s3, src, REG_ITMP3);
2268                         if (has_ext_instr_set) {
2269                                 M_LADD(s2, s1, REG_ITMP1);
2270                                 M_BST (s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2271                                 }
2272                         else {
2273                                 M_LADD (s2, s1, REG_ITMP1);
2274                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2275                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2276                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
2277                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2278                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
2279                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2280                                 }
2281                         break;
2282
2283
2284                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2285                                       /* op1 = type, val.a = field address            */
2286
2287                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2288                         M_ALD(REG_ITMP1, REG_PV, a);
2289                         switch (iptr->op1) {
2290                                 case TYPE_INT:
2291                                         var_to_reg_int(s2, src, REG_ITMP2);
2292                                         M_IST(s2, REG_ITMP1, 0);
2293                                         break;
2294                                 case TYPE_LNG:
2295                                         var_to_reg_int(s2, src, REG_ITMP2);
2296                                         M_LST(s2, REG_ITMP1, 0);
2297                                         break;
2298                                 case TYPE_ADR:
2299                                         var_to_reg_int(s2, src, REG_ITMP2);
2300                                         M_AST(s2, REG_ITMP1, 0);
2301                                         break;
2302                                 case TYPE_FLT:
2303                                         var_to_reg_flt(s2, src, REG_FTMP2);
2304                                         M_FST(s2, REG_ITMP1, 0);
2305                                         break;
2306                                 case TYPE_DBL:
2307                                         var_to_reg_flt(s2, src, REG_FTMP2);
2308                                         M_DST(s2, REG_ITMP1, 0);
2309                                         break;
2310                                 default: panic ("internal error");
2311                                 }
2312                         break;
2313
2314                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2315                                       /* op1 = type, val.a = field address            */
2316
2317                         a = dseg_addaddress (&(((fieldinfo *)(iptr->val.a))->value));
2318                         M_ALD(REG_ITMP1, REG_PV, a);
2319                         switch (iptr->op1) {
2320                                 case TYPE_INT:
2321                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2322                                         M_ILD(d, REG_ITMP1, 0);
2323                                         store_reg_to_var_int(iptr->dst, d);
2324                                         break;
2325                                 case TYPE_LNG:
2326                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2327                                         M_LLD(d, REG_ITMP1, 0);
2328                                         store_reg_to_var_int(iptr->dst, d);
2329                                         break;
2330                                 case TYPE_ADR:
2331                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2332                                         M_ALD(d, REG_ITMP1, 0);
2333                                         store_reg_to_var_int(iptr->dst, d);
2334                                         break;
2335                                 case TYPE_FLT:
2336                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2337                                         M_FLD(d, REG_ITMP1, 0);
2338                                         store_reg_to_var_flt(iptr->dst, d);
2339                                         break;
2340                                 case TYPE_DBL:
2341                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2342                                         M_DLD(d, REG_ITMP1, 0);
2343                                         store_reg_to_var_flt(iptr->dst, d);
2344                                         break;
2345                                 default: panic ("internal error");
2346                                 }
2347                         break;
2348
2349
2350                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2351                                       /* op1 = type, val.i = field offset             */
2352
2353                         a = ((fieldinfo *)(iptr->val.a))->offset;
2354                         switch (iptr->op1) {
2355                                 case TYPE_INT:
2356                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2357                                         var_to_reg_int(s2, src, REG_ITMP2);
2358                                         gen_nullptr_check(s1);
2359                                         M_IST(s2, s1, a);
2360                                         break;
2361                                 case TYPE_LNG:
2362                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2363                                         var_to_reg_int(s2, src, REG_ITMP2);
2364                                         gen_nullptr_check(s1);
2365                                         M_LST(s2, s1, a);
2366                                         break;
2367                                 case TYPE_ADR:
2368                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2369                                         var_to_reg_int(s2, src, REG_ITMP2);
2370                                         gen_nullptr_check(s1);
2371                                         M_AST(s2, s1, a);
2372                                         break;
2373                                 case TYPE_FLT:
2374                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2375                                         var_to_reg_flt(s2, src, REG_FTMP2);
2376                                         gen_nullptr_check(s1);
2377                                         M_FST(s2, s1, a);
2378                                         break;
2379                                 case TYPE_DBL:
2380                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2381                                         var_to_reg_flt(s2, src, REG_FTMP2);
2382                                         gen_nullptr_check(s1);
2383                                         M_DST(s2, s1, a);
2384                                         break;
2385                                 default: panic ("internal error");
2386                                 }
2387                         break;
2388
2389                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2390                                       /* op1 = type, val.i = field offset             */
2391
2392                         a = ((fieldinfo *)(iptr->val.a))->offset;
2393                         switch (iptr->op1) {
2394                                 case TYPE_INT:
2395                                         var_to_reg_int(s1, src, REG_ITMP1);
2396                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2397                                         gen_nullptr_check(s1);
2398                                         M_ILD(d, s1, a);
2399                                         store_reg_to_var_int(iptr->dst, d);
2400                                         break;
2401                                 case TYPE_LNG:
2402                                         var_to_reg_int(s1, src, REG_ITMP1);
2403                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2404                                         gen_nullptr_check(s1);
2405                                         M_LLD(d, s1, a);
2406                                         store_reg_to_var_int(iptr->dst, d);
2407                                         break;
2408                                 case TYPE_ADR:
2409                                         var_to_reg_int(s1, src, REG_ITMP1);
2410                                         d = reg_of_var(iptr->dst, REG_ITMP3);
2411                                         gen_nullptr_check(s1);
2412                                         M_ALD(d, s1, a);
2413                                         store_reg_to_var_int(iptr->dst, d);
2414                                         break;
2415                                 case TYPE_FLT:
2416                                         var_to_reg_int(s1, src, REG_ITMP1);
2417                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2418                                         gen_nullptr_check(s1);
2419                                         M_FLD(d, s1, a);
2420                                         store_reg_to_var_flt(iptr->dst, d);
2421                                         break;
2422                                 case TYPE_DBL:
2423                                         var_to_reg_int(s1, src, REG_ITMP1);
2424                                         d = reg_of_var(iptr->dst, REG_FTMP1);
2425                                         gen_nullptr_check(s1);
2426                                         M_DLD(d, s1, a);
2427                                         store_reg_to_var_flt(iptr->dst, d);
2428                                         break;
2429                                 default: panic ("internal error");
2430                                 }
2431                         break;
2432
2433
2434                 /* branch operations **************************************************/
2435
2436 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2437
2438                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2439
2440                         var_to_reg_int(s1, src, REG_ITMP1);
2441                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2442                         a = dseg_addaddress(asm_handle_exception);
2443                         M_ALD(REG_ITMP2, REG_PV, a);
2444                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2445                         M_NOP;              /* nop ensures that XPC is less than the end */
2446                                             /* of basic block                            */
2447                         ALIGNCODENOP;
2448                         break;
2449
2450                 case ICMD_GOTO:         /* ... ==> ...                                */
2451                                         /* op1 = target JavaVM pc                     */
2452                         M_BR(0);
2453                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2454                         ALIGNCODENOP;
2455                         break;
2456
2457                 case ICMD_JSR:          /* ... ==> ...                                */
2458                                         /* op1 = target JavaVM pc                     */
2459
2460                         M_BSR(REG_ITMP1, 0);
2461                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2462                         break;
2463
2464                 case ICMD_RET:          /* ... ==> ...                                */
2465                                         /* op1 = local variable                       */
2466
2467                         var = &(locals[iptr->op1][TYPE_ADR]);
2468                         if (var->flags & INMEMORY) {
2469                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2470                                 M_RET(REG_ZERO, REG_ITMP1);
2471                                 }
2472                         else
2473                                 M_RET(REG_ZERO, var->regoff);
2474                         ALIGNCODENOP;
2475                         break;
2476
2477                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2478                                         /* op1 = target JavaVM pc                     */
2479
2480                         var_to_reg_int(s1, src, REG_ITMP1);
2481                         M_BEQZ(s1, 0);
2482                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2483                         break;
2484
2485                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2486                                         /* op1 = target JavaVM pc                     */
2487
2488                         var_to_reg_int(s1, src, REG_ITMP1);
2489                         M_BNEZ(s1, 0);
2490                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2491                         break;
2492
2493                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2494                                         /* op1 = target JavaVM pc, val.i = constant   */
2495
2496                         var_to_reg_int(s1, src, REG_ITMP1);
2497                         if (iptr->val.i == 0) {
2498                                 M_BEQZ(s1, 0);
2499                                 }
2500                         else {
2501                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2502                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2503                                         }
2504                                 else {
2505                                         ICONST(REG_ITMP2, iptr->val.i);
2506                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2507                                         }
2508                                 M_BNEZ(REG_ITMP1, 0);
2509                                 }
2510                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2511                         break;
2512
2513                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2514                                         /* op1 = target JavaVM pc, val.i = constant   */
2515
2516                         var_to_reg_int(s1, src, REG_ITMP1);
2517                         if (iptr->val.i == 0) {
2518                                 M_BLTZ(s1, 0);
2519                                 }
2520                         else {
2521                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2522                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2523                                         }
2524                                 else {
2525                                         ICONST(REG_ITMP2, iptr->val.i);
2526                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2527                                         }
2528                                 M_BNEZ(REG_ITMP1, 0);
2529                                 }
2530                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2531                         break;
2532
2533                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2534                                         /* op1 = target JavaVM pc, val.i = constant   */
2535
2536                         var_to_reg_int(s1, src, REG_ITMP1);
2537                         if (iptr->val.i == 0) {
2538                                 M_BLEZ(s1, 0);
2539                                 }
2540                         else {
2541                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2542                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2543                                         }
2544                                 else {
2545                                         ICONST(REG_ITMP2, iptr->val.i);
2546                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2547                                         }
2548                                 M_BNEZ(REG_ITMP1, 0);
2549                                 }
2550                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2551                         break;
2552
2553                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2554                                         /* op1 = target JavaVM pc, val.i = constant   */
2555
2556                         var_to_reg_int(s1, src, REG_ITMP1);
2557                         if (iptr->val.i == 0) {
2558                                 M_BNEZ(s1, 0);
2559                                 }
2560                         else {
2561                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2562                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2563                                         }
2564                                 else {
2565                                         ICONST(REG_ITMP2, iptr->val.i);
2566                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2567                                         }
2568                                 M_BEQZ(REG_ITMP1, 0);
2569                                 }
2570                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2571                         break;
2572
2573                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2574                                         /* op1 = target JavaVM pc, val.i = constant   */
2575
2576                         var_to_reg_int(s1, src, REG_ITMP1);
2577                         if (iptr->val.i == 0) {
2578                                 M_BGTZ(s1, 0);
2579                                 }
2580                         else {
2581                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2582                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2583                                         }
2584                                 else {
2585                                         ICONST(REG_ITMP2, iptr->val.i);
2586                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2587                                         }
2588                                 M_BEQZ(REG_ITMP1, 0);
2589                                 }
2590                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2591                         break;
2592
2593                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2594                                         /* op1 = target JavaVM pc, val.i = constant   */
2595
2596                         var_to_reg_int(s1, src, REG_ITMP1);
2597                         if (iptr->val.i == 0) {
2598                                 M_BGEZ(s1, 0);
2599                                 }
2600                         else {
2601                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2602                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2603                                         }
2604                                 else {
2605                                         ICONST(REG_ITMP2, iptr->val.i);
2606                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2607                                         }
2608                                 M_BEQZ(REG_ITMP1, 0);
2609                                 }
2610                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2611                         break;
2612
2613                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2614                                         /* op1 = target JavaVM pc, val.l = constant   */
2615
2616                         var_to_reg_int(s1, src, REG_ITMP1);
2617                         if (iptr->val.l == 0) {
2618                                 M_BEQZ(s1, 0);
2619                                 }
2620                         else {
2621                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2622                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2623                                         }
2624                                 else {
2625                                         LCONST(REG_ITMP2, iptr->val.l);
2626                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2627                                         }
2628                                 M_BNEZ(REG_ITMP1, 0);
2629                                 }
2630                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2631                         break;
2632
2633                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2634                                         /* op1 = target JavaVM pc, val.l = constant   */
2635
2636                         var_to_reg_int(s1, src, REG_ITMP1);
2637                         if (iptr->val.l == 0) {
2638                                 M_BLTZ(s1, 0);
2639                                 }
2640                         else {
2641                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2642                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2643                                         }
2644                                 else {
2645                                         LCONST(REG_ITMP2, iptr->val.l);
2646                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2647                                         }
2648                                 M_BNEZ(REG_ITMP1, 0);
2649                                 }
2650                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2651                         break;
2652
2653                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2654                                         /* op1 = target JavaVM pc, val.l = constant   */
2655
2656                         var_to_reg_int(s1, src, REG_ITMP1);
2657                         if (iptr->val.l == 0) {
2658                                 M_BLEZ(s1, 0);
2659                                 }
2660                         else {
2661                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2662                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2663                                         }
2664                                 else {
2665                                         LCONST(REG_ITMP2, iptr->val.l);
2666                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2667                                         }
2668                                 M_BNEZ(REG_ITMP1, 0);
2669                                 }
2670                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2671                         break;
2672
2673                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2674                                         /* op1 = target JavaVM pc, val.l = constant   */
2675
2676                         var_to_reg_int(s1, src, REG_ITMP1);
2677                         if (iptr->val.l == 0) {
2678                                 M_BNEZ(s1, 0);
2679                                 }
2680                         else {
2681                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2682                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2683                                         }
2684                                 else {
2685                                         LCONST(REG_ITMP2, iptr->val.l);
2686                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2687                                         }
2688                                 M_BEQZ(REG_ITMP1, 0);
2689                                 }
2690                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2691                         break;
2692
2693                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2694                                         /* op1 = target JavaVM pc, val.l = constant   */
2695
2696                         var_to_reg_int(s1, src, REG_ITMP1);
2697                         if (iptr->val.l == 0) {
2698                                 M_BGTZ(s1, 0);
2699                                 }
2700                         else {
2701                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2702                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2703                                         }
2704                                 else {
2705                                         LCONST(REG_ITMP2, iptr->val.l);
2706                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2707                                         }
2708                                 M_BEQZ(REG_ITMP1, 0);
2709                                 }
2710                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2711                         break;
2712
2713                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2714                                         /* op1 = target JavaVM pc, val.l = constant   */
2715
2716                         var_to_reg_int(s1, src, REG_ITMP1);
2717                         if (iptr->val.l == 0) {
2718                                 M_BGEZ(s1, 0);
2719                                 }
2720                         else {
2721                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2722                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2723                                         }
2724                                 else {
2725                                         LCONST(REG_ITMP2, iptr->val.l);
2726                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2727                                         }
2728                                 M_BEQZ(REG_ITMP1, 0);
2729                                 }
2730                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2731                         break;
2732
2733                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2734                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2735                 case ICMD_IF_ACMPEQ:
2736
2737                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2738                         var_to_reg_int(s2, src, REG_ITMP2);
2739                         M_CMPEQ(s1, s2, REG_ITMP1);
2740                         M_BNEZ(REG_ITMP1, 0);
2741                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2742                         break;
2743
2744                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2745                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2746                 case ICMD_IF_ACMPNE:
2747
2748                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2749                         var_to_reg_int(s2, src, REG_ITMP2);
2750                         M_CMPEQ(s1, s2, REG_ITMP1);
2751                         M_BEQZ(REG_ITMP1, 0);
2752                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2753                         break;
2754
2755                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2756                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2757
2758                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2759                         var_to_reg_int(s2, src, REG_ITMP2);
2760                         M_CMPLT(s1, s2, REG_ITMP1);
2761                         M_BNEZ(REG_ITMP1, 0);
2762                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2763                         break;
2764
2765                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2766                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2767
2768                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2769                         var_to_reg_int(s2, src, REG_ITMP2);
2770                         M_CMPLE(s1, s2, REG_ITMP1);
2771                         M_BEQZ(REG_ITMP1, 0);
2772                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2773                         break;
2774
2775                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2776                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2777
2778                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2779                         var_to_reg_int(s2, src, REG_ITMP2);
2780                         M_CMPLE(s1, s2, REG_ITMP1);
2781                         M_BNEZ(REG_ITMP1, 0);
2782                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2783                         break;
2784
2785                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2786                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2787
2788                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2789                         var_to_reg_int(s2, src, REG_ITMP2);
2790                         M_CMPLT(s1, s2, REG_ITMP1);
2791                         M_BEQZ(REG_ITMP1, 0);
2792                         codegen_addreference(BlockPtrOfPC(iptr->op1), mcodeptr);
2793                         break;
2794
2795                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2796
2797                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2798                         break;
2799
2800                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2801                                         /* val.i = constant                           */
2802
2803                         var_to_reg_int(s1, src, REG_ITMP1);
2804                         d = reg_of_var(iptr->dst, REG_ITMP3);
2805                         s3 = iptr->val.i;
2806                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2807                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2808                                         M_CMPEQ(s1, REG_ZERO, d);
2809                                         store_reg_to_var_int(iptr->dst, d);
2810                                         break;
2811                                         }
2812                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2813                                         M_CMPEQ(s1, REG_ZERO, d);
2814                                         M_XOR_IMM(d, 1, d);
2815                                         store_reg_to_var_int(iptr->dst, d);
2816                                         break;
2817                                         }
2818                                 if (s1 == d) {
2819                                         M_MOV(s1, REG_ITMP1);
2820                                         s1 = REG_ITMP1;
2821                                         }
2822                                 ICONST(d, iptr[1].val.i);
2823                                 }
2824                         if ((s3 >= 0) && (s3 <= 255)) {
2825                                 M_CMOVEQ_IMM(s1, s3, d);
2826                                 }
2827                         else {
2828                                 ICONST(REG_ITMP2, s3);
2829                                 M_CMOVEQ(s1, REG_ITMP2, d);
2830                                 }
2831                         store_reg_to_var_int(iptr->dst, d);
2832                         break;
2833
2834                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2835                                         /* val.i = constant                           */
2836
2837                         var_to_reg_int(s1, src, REG_ITMP1);
2838                         d = reg_of_var(iptr->dst, REG_ITMP3);
2839                         s3 = iptr->val.i;
2840                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2841                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2842                                         M_CMPEQ(s1, REG_ZERO, d);
2843                                         store_reg_to_var_int(iptr->dst, d);
2844                                         break;
2845                                         }
2846                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2847                                         M_CMPEQ(s1, REG_ZERO, d);
2848                                         M_XOR_IMM(d, 1, d);
2849                                         store_reg_to_var_int(iptr->dst, d);
2850                                         break;
2851                                         }
2852                                 if (s1 == d) {
2853                                         M_MOV(s1, REG_ITMP1);
2854                                         s1 = REG_ITMP1;
2855                                         }
2856                                 ICONST(d, iptr[1].val.i);
2857                                 }
2858                         if ((s3 >= 0) && (s3 <= 255)) {
2859                                 M_CMOVNE_IMM(s1, s3, d);
2860                                 }
2861                         else {
2862                                 ICONST(REG_ITMP2, s3);
2863                                 M_CMOVNE(s1, REG_ITMP2, d);
2864                                 }
2865                         store_reg_to_var_int(iptr->dst, d);
2866                         break;
2867
2868                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2869                                         /* val.i = constant                           */
2870
2871                         var_to_reg_int(s1, src, REG_ITMP1);
2872                         d = reg_of_var(iptr->dst, REG_ITMP3);
2873                         s3 = iptr->val.i;
2874                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2875                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2876                                         M_CMPLT(s1, REG_ZERO, d);
2877                                         store_reg_to_var_int(iptr->dst, d);
2878                                         break;
2879                                         }
2880                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2881                                         M_CMPLE(REG_ZERO, s1, d);
2882                                         store_reg_to_var_int(iptr->dst, d);
2883                                         break;
2884                                         }
2885                                 if (s1 == d) {
2886                                         M_MOV(s1, REG_ITMP1);
2887                                         s1 = REG_ITMP1;
2888                                         }
2889                                 ICONST(d, iptr[1].val.i);
2890                                 }
2891                         if ((s3 >= 0) && (s3 <= 255)) {
2892                                 M_CMOVLT_IMM(s1, s3, d);
2893                                 }
2894                         else {
2895                                 ICONST(REG_ITMP2, s3);
2896                                 M_CMOVLT(s1, REG_ITMP2, d);
2897                                 }
2898                         store_reg_to_var_int(iptr->dst, d);
2899                         break;
2900
2901                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2902                                         /* val.i = constant                           */
2903
2904                         var_to_reg_int(s1, src, REG_ITMP1);
2905                         d = reg_of_var(iptr->dst, REG_ITMP3);
2906                         s3 = iptr->val.i;
2907                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2908                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2909                                         M_CMPLE(REG_ZERO, s1, d);
2910                                         store_reg_to_var_int(iptr->dst, d);
2911                                         break;
2912                                         }
2913                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2914                                         M_CMPLT(s1, REG_ZERO, d);
2915                                         store_reg_to_var_int(iptr->dst, d);
2916                                         break;
2917                                         }
2918                                 if (s1 == d) {
2919                                         M_MOV(s1, REG_ITMP1);
2920                                         s1 = REG_ITMP1;
2921                                         }
2922                                 ICONST(d, iptr[1].val.i);
2923                                 }
2924                         if ((s3 >= 0) && (s3 <= 255)) {
2925                                 M_CMOVGE_IMM(s1, s3, d);
2926                                 }
2927                         else {
2928                                 ICONST(REG_ITMP2, s3);
2929                                 M_CMOVGE(s1, REG_ITMP2, d);
2930                                 }
2931                         store_reg_to_var_int(iptr->dst, d);
2932                         break;
2933
2934                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2935                                         /* val.i = constant                           */
2936
2937                         var_to_reg_int(s1, src, REG_ITMP1);
2938                         d = reg_of_var(iptr->dst, REG_ITMP3);
2939                         s3 = iptr->val.i;
2940                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2941                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2942                                         M_CMPLT(REG_ZERO, s1, d);
2943                                         store_reg_to_var_int(iptr->dst, d);
2944                                         break;
2945                                         }
2946                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2947                                         M_CMPLE(s1, REG_ZERO, d);
2948                                         store_reg_to_var_int(iptr->dst, d);
2949                                         break;
2950                                         }
2951                                 if (s1 == d) {
2952                                         M_MOV(s1, REG_ITMP1);
2953                                         s1 = REG_ITMP1;
2954                                         }
2955                                 ICONST(d, iptr[1].val.i);
2956                                 }
2957                         if ((s3 >= 0) && (s3 <= 255)) {
2958                                 M_CMOVGT_IMM(s1, s3, d);
2959                                 }
2960                         else {
2961                                 ICONST(REG_ITMP2, s3);
2962                                 M_CMOVGT(s1, REG_ITMP2, d);
2963                                 }
2964                         store_reg_to_var_int(iptr->dst, d);
2965                         break;
2966
2967                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2968                                         /* val.i = constant                           */
2969
2970                         var_to_reg_int(s1, src, REG_ITMP1);
2971                         d = reg_of_var(iptr->dst, REG_ITMP3);
2972                         s3 = iptr->val.i;
2973                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2974                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2975                                         M_CMPLE(s1, REG_ZERO, d);
2976                                         store_reg_to_var_int(iptr->dst, d);
2977                                         break;
2978                                         }
2979                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2980                                         M_CMPLT(REG_ZERO, s1, d);
2981                                         store_reg_to_var_int(iptr->dst, d);
2982                                         break;
2983                                         }
2984                                 if (s1 == d) {
2985                                         M_MOV(s1, REG_ITMP1);
2986                                         s1 = REG_ITMP1;
2987                                         }
2988                                 ICONST(d, iptr[1].val.i);
2989                                 }
2990                         if ((s3 >= 0) && (s3 <= 255)) {
2991                                 M_CMOVLE_IMM(s1, s3, d);
2992                                 }
2993                         else {
2994                                 ICONST(REG_ITMP2, s3);
2995                                 M_CMOVLE(s1, REG_ITMP2, d);
2996                                 }
2997                         store_reg_to_var_int(iptr->dst, d);
2998                         break;
2999
3000
3001                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
3002                 case ICMD_LRETURN:
3003                 case ICMD_ARETURN:
3004
3005 #ifdef USE_THREADS
3006                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
3007                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
3008                                 M_ALD(REG_PV, REG_PV, a);
3009                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
3010                                 M_JSR(REG_RA, REG_PV);
3011                                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
3012                                 }
3013 #endif
3014                         var_to_reg_int(s1, src, REG_RESULT);
3015                         M_INTMOVE(s1, REG_RESULT);
3016                         goto nowperformreturn;
3017
3018                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
3019                 case ICMD_DRETURN:
3020
3021 #ifdef USE_THREADS
3022                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
3023                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
3024                                 M_ALD(REG_PV, REG_PV, a);
3025                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
3026                                 M_JSR(REG_RA, REG_PV);
3027                                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
3028                                 }
3029 #endif
3030                         var_to_reg_flt(s1, src, REG_FRESULT);
3031                         M_FLTMOVE(s1, REG_FRESULT);
3032                         goto nowperformreturn;
3033
3034                 case ICMD_RETURN:      /* ...  ==> ...                                */
3035
3036 #ifdef USE_THREADS
3037                         if (checksync && (method->flags & ACC_SYNCHRONIZED)) {
3038                                 a = dseg_addaddress ((void*) (builtin_monitorexit));
3039                                 M_ALD(REG_PV, REG_PV, a);
3040                                 M_ALD(argintregs[0], REG_SP, 8 * maxmemuse);
3041                                 M_JSR(REG_RA, REG_PV);
3042                                 M_LDA(REG_PV, REG_RA, -(int)((u1*) mcodeptr - mcodebase));
3043                                 }
3044 #endif
3045
3046 nowperformreturn:
3047                         {
3048                         int r, p;
3049
3050                         p = parentargs_base;
3051
3052                         /* restore return address                                         */
3053
3054                         if (!isleafmethod)
3055                                 {p--;  M_LLD (REG_RA, REG_SP, 8 * p);}
3056
3057                         /* restore saved registers                                        */
3058
3059                         for (r = savintregcnt - 1; r >= maxsavintreguse; r--)
3060                                         {p--; M_LLD(savintregs[r], REG_SP, 8 * p);}
3061                         for (r = savfltregcnt - 1; r >= maxsavfltreguse; r--)
3062                                         {p--; M_DLD(savfltregs[r], REG_SP, 8 * p);}
3063
3064                         /* deallocate stack                                               */
3065
3066                         if (parentargs_base)
3067                                 {M_LDA(REG_SP, REG_SP, parentargs_base*8);}
3068
3069                         /* call trace function */
3070
3071                         if (runverbose) {
3072                                 M_LDA (REG_SP, REG_SP, -24);
3073                                 M_AST(REG_RA, REG_SP, 0);
3074                                 M_LST(REG_RESULT, REG_SP, 8);
3075                                 M_DST(REG_FRESULT, REG_SP,16);
3076                                 a = dseg_addaddress (method);
3077                                 M_ALD(argintregs[0], REG_PV, a);
3078                                 M_MOV(REG_RESULT, argintregs[1]);
3079                                 M_FLTMOVE(REG_FRESULT, argfltregs[2]);
3080                                 M_FLTMOVE(REG_FRESULT, argfltregs[3]);
3081                                 a = dseg_addaddress ((void*) (builtin_displaymethodstop));
3082                                 M_ALD(REG_PV, REG_PV, a);
3083                                 M_JSR (REG_RA, REG_PV);
3084                                 s1 = (int)((u1*) mcodeptr - mcodebase);
3085                                 if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
3086                                 else {
3087                                         s4 ml=-s1, mh=0;
3088                                         while (ml<-32768) { ml+=65536; mh--; }
3089                                         M_LDA (REG_PV, REG_RA, ml );
3090                                         M_LDAH (REG_PV, REG_PV, mh );
3091                                         }
3092                                 M_DLD(REG_FRESULT, REG_SP,16);
3093                                 M_LLD(REG_RESULT, REG_SP, 8);
3094                                 M_ALD(REG_RA, REG_SP, 0);
3095                                 M_LDA (REG_SP, REG_SP, 24);
3096                                 }
3097
3098                         M_RET(REG_ZERO, REG_RA);
3099                         ALIGNCODENOP;
3100                         }
3101                         break;
3102
3103
3104                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
3105                         {
3106                         s4 i, l, *s4ptr;
3107                         void **tptr;
3108
3109                         tptr = (void **) iptr->target;
3110
3111                         s4ptr = iptr->val.a;
3112                         l = s4ptr[1];                          /* low     */
3113                         i = s4ptr[2];                          /* high    */
3114
3115                         var_to_reg_int(s1, src, REG_ITMP1);
3116                         if (l == 0)
3117                                 {M_INTMOVE(s1, REG_ITMP1);}
3118                         else if (l <= 32768) {
3119                                 M_LDA(REG_ITMP1, s1, -l);
3120                                 }
3121                         else {
3122                                 ICONST(REG_ITMP2, l);
3123                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3124                                 }
3125                         i = i - l + 1;
3126
3127                         /* range check */
3128
3129                         if (i <= 256)
3130                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3131                         else {
3132                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3133                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3134                                 }
3135                         M_BEQZ(REG_ITMP2, 0);
3136
3137
3138                         /* codegen_addreference(BlockPtrOfPC(s4ptr[0]), mcodeptr); */
3139                         codegen_addreference((basicblock *) tptr[0], mcodeptr);
3140
3141                         /* build jump table top down and use address of lowest entry */
3142
3143                         /* s4ptr += 3 + i; */
3144                         tptr += i;
3145
3146                         while (--i >= 0) {
3147                                 /* dseg_addtarget(BlockPtrOfPC(*--s4ptr)); */
3148                                 dseg_addtarget((basicblock *) tptr[0]);
3149                                 --tptr;
3150                                 }
3151                         }
3152
3153                         /* length of dataseg after last dseg_addtarget is used by load */
3154
3155                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3156                         M_ALD(REG_ITMP2, REG_ITMP2, -dseglen);
3157                         M_JMP(REG_ZERO, REG_ITMP2);
3158                         ALIGNCODENOP;
3159                         break;
3160
3161
3162                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3163                         {
3164                         s4 i, l, val, *s4ptr;
3165                         void **tptr;
3166
3167                         tptr = (void **) iptr->target;
3168
3169                         s4ptr = iptr->val.a;
3170                         l = s4ptr[0];                          /* default  */
3171                         i = s4ptr[1];                          /* count    */
3172
3173                         MCODECHECK((i<<2)+8);
3174                         var_to_reg_int(s1, src, REG_ITMP1);
3175                         while (--i >= 0) {
3176                                 s4ptr += 2;
3177                                 ++tptr;
3178
3179                                 val = s4ptr[0];
3180                                 if ((val >= 0) && (val <= 255)) {
3181                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
3182                                         }
3183                                 else {
3184                                         if ((val >= -32768) && (val <= 32767)) {
3185                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
3186                                                 }
3187                                         else {
3188                                                 a = dseg_adds4 (val);
3189                                                 M_ILD(REG_ITMP2, REG_PV, a);
3190                                                 }
3191                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3192                                         }
3193                                 M_BNEZ(REG_ITMP2, 0);
3194                                 /* codegen_addreference(BlockPtrOfPC(s4ptr[1]), mcodeptr); */
3195                                 codegen_addreference((basicblock *) tptr[0], mcodeptr);
3196                                 }
3197
3198                         M_BR(0);
3199                         /* codegen_addreference(BlockPtrOfPC(l), mcodeptr); */
3200
3201                         tptr = (void **) iptr->target;
3202                         codegen_addreference((basicblock *) tptr[0], mcodeptr);
3203
3204                         ALIGNCODENOP;
3205                         break;
3206                         }
3207
3208
3209                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
3210                                         /* op1 = return type, val.a = function pointer*/
3211                         s3 = 3;
3212                         goto gen_method;
3213
3214                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
3215                                         /* op1 = return type, val.a = function pointer*/
3216                         s3 = 2;
3217                         goto gen_method;
3218
3219                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
3220                                         /* op1 = return type, val.a = function pointer*/
3221                         s3 = 1;
3222                         goto gen_method;
3223
3224                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3225                                         /* op1 = arg count, val.a = method pointer    */
3226
3227                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3228                                         /* op1 = arg count, val.a = method pointer    */
3229
3230                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3231                                         /* op1 = arg count, val.a = method pointer    */
3232
3233                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
3234                                         /* op1 = arg count, val.a = method pointer    */
3235
3236                         s3 = iptr->op1;
3237
3238 gen_method: {
3239                         methodinfo   *m;
3240                         classinfo    *ci;
3241
3242                         MCODECHECK((s3 << 1) + 64);
3243
3244                         /* copy arguments to registers or stack location                  */
3245
3246                         for (; --s3 >= 0; src = src->prev) {
3247                                 if (src->varkind == ARGVAR)
3248                                         continue;
3249                                 if (IS_INT_LNG_TYPE(src->type)) {
3250                                         if (s3 < INT_ARG_CNT) {
3251                                                 s1 = argintregs[s3];
3252                                                 var_to_reg_int(d, src, s1);
3253                                                 M_INTMOVE(d, s1);
3254                                                 }
3255                                         else  {
3256                                                 var_to_reg_int(d, src, REG_ITMP1);
3257                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
3258                                                 }
3259                                         }
3260                                 else
3261                                         if (s3 < FLT_ARG_CNT) {
3262                                                 s1 = argfltregs[s3];
3263                                                 var_to_reg_flt(d, src, s1);
3264                                                 M_FLTMOVE(d, s1);
3265                                                 }
3266                                         else {
3267                                                 var_to_reg_flt(d, src, REG_FTMP1);
3268                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
3269                                                 }
3270                                 } /* end of for */
3271
3272                         m = iptr->val.a;
3273                         switch (iptr->opc) {
3274                                 case ICMD_BUILTIN3:
3275                                 case ICMD_BUILTIN2:
3276                                 case ICMD_BUILTIN1:
3277                                         a = dseg_addaddress ((void*) (m));
3278
3279                                         M_ALD(REG_PV, REG_PV, a); /* Pointer to built-in-function */
3280                                         d = iptr->op1;
3281                                         goto makeactualcall;
3282
3283                                 case ICMD_INVOKESTATIC:
3284                                 case ICMD_INVOKESPECIAL:
3285                                         a = dseg_addaddress (m->stubroutine);
3286
3287                                         M_ALD(REG_PV, REG_PV, a );       /* method pointer in r27 */
3288
3289                                         d = m->returntype;
3290                                         goto makeactualcall;
3291
3292                                 case ICMD_INVOKEVIRTUAL:
3293
3294                                         gen_nullptr_check(argintregs[0]);
3295                                         M_ALD(REG_METHODPTR, argintregs[0],
3296                                                                  OFFSET(java_objectheader, vftbl));
3297                                         M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl, table[0]) +
3298                                                                 sizeof(methodptr) * m->vftblindex);
3299
3300                                         d = m->returntype;
3301                                         goto makeactualcall;
3302
3303                                 case ICMD_INVOKEINTERFACE:
3304                                         ci = m->class;
3305
3306                                         gen_nullptr_check(argintregs[0]);
3307                                         M_ALD(REG_METHODPTR, argintregs[0],
3308                                                                  OFFSET(java_objectheader, vftbl));
3309                                         M_ALD(REG_METHODPTR, REG_METHODPTR,
3310                                               OFFSET(vftbl, interfacetable[0]) -
3311                                               sizeof(methodptr*) * ci->index);
3312                                         M_ALD(REG_PV, REG_METHODPTR,
3313                                                             sizeof(methodptr) * (m - ci->methods));
3314
3315                                         d = m->returntype;
3316                                         goto makeactualcall;
3317
3318                                 default:
3319                                         d = 0;
3320                                         sprintf (logtext, "Unkown ICMD-Command: %d", iptr->opc);
3321                                         error ();
3322                                 }
3323
3324 makeactualcall:
3325
3326                         M_JSR (REG_RA, REG_PV);
3327
3328                         /* recompute pv */
3329
3330                         s1 = (int)((u1*) mcodeptr - mcodebase);
3331                         if (s1<=32768) M_LDA (REG_PV, REG_RA, -s1);
3332                         else {
3333                                 s4 ml=-s1, mh=0;
3334                                 while (ml<-32768) { ml+=65536; mh--; }
3335                                 M_LDA (REG_PV, REG_RA, ml );
3336                                 M_LDAH (REG_PV, REG_PV, mh );
3337                                 }
3338
3339                         /* d contains return type */
3340
3341                         if (d != TYPE_VOID) {
3342                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3343                                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3344                                         M_INTMOVE(REG_RESULT, s1);
3345                                         store_reg_to_var_int(iptr->dst, s1);
3346                                         }
3347                                 else {
3348                                         s1 = reg_of_var(iptr->dst, REG_FRESULT);
3349                                         M_FLTMOVE(REG_FRESULT, s1);
3350                                         store_reg_to_var_flt(iptr->dst, s1);
3351                                         }
3352                                 }
3353                         }
3354                         break;
3355
3356
3357                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3358
3359                                       /* op1:   0 == array, 1 == class                */
3360                                       /* val.a: (classinfo*) superclass               */
3361
3362 /*          superclass is an interface:
3363  *
3364  *          return (sub != NULL) &&
3365  *                 (sub->vftbl->interfacetablelength > super->index) &&
3366  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
3367  *
3368  *          superclass is a class:
3369  *
3370  *          return ((sub != NULL) && (0
3371  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3372  *                  super->vftbl->diffvall));
3373  */
3374
3375                         {
3376                         classinfo *super = (classinfo*) iptr->val.a;
3377
3378                         var_to_reg_int(s1, src, REG_ITMP1);
3379                         d = reg_of_var(iptr->dst, REG_ITMP3);
3380                         if (s1 == d) {
3381                                 M_MOV(s1, REG_ITMP1);
3382                                 s1 = REG_ITMP1;
3383                                 }
3384                         M_CLR(d);
3385                         if (iptr->op1) {                               /* class/interface */
3386                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3387                                         M_BEQZ(s1, 6);
3388                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3389                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3390                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3391                                         M_BLEZ(REG_ITMP2, 2);
3392                                         M_ALD(REG_ITMP1, REG_ITMP1,
3393                                               OFFSET(vftbl, interfacetable[0]) -
3394                                               super->index * sizeof(methodptr*));
3395                                         M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3396                                         }
3397                                 else {                                     /* class           */
3398 /*
3399                                         s2 = super->vftbl->diffval;
3400                                         M_BEQZ(s1, 4 + (s2 > 255));
3401                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3402                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3403                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3404                                         if (s2 <= 255)
3405                                                 M_CMPULE_IMM(REG_ITMP1, s2, d);
3406                                         else {
3407                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3408                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3409                                                 }
3410 */
3411                                         M_BEQZ(s1, 7);
3412                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3413                                         a = dseg_addaddress ((void*) super->vftbl);
3414                                         M_ALD(REG_ITMP2, REG_PV, a);
3415                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3416                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3417                                         M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3418                                         M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3419                                         M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3420                                         }
3421                                 }
3422                         else
3423                                 panic ("internal error: no inlined array instanceof");
3424                         }
3425                         store_reg_to_var_int(iptr->dst, d);
3426                         break;
3427
3428                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3429
3430                                       /* op1:   0 == array, 1 == class                */
3431                                       /* val.a: (classinfo*) superclass               */
3432
3433 /*          superclass is an interface:
3434  *
3435  *          OK if ((sub == NULL) ||
3436  *                 (sub->vftbl->interfacetablelength > super->index) &&
3437  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3438  *
3439  *          superclass is a class:
3440  *
3441  *          OK if ((sub == NULL) || (0
3442  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3443  *                 super->vftbl->diffvall));
3444  */
3445
3446                         {
3447                         classinfo *super = (classinfo*) iptr->val.a;
3448
3449                         d = reg_of_var(iptr->dst, REG_ITMP3);
3450                         var_to_reg_int(s1, src, d);
3451                         if (iptr->op1) {                               /* class/interface */
3452                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3453                                         M_BEQZ(s1, 6);
3454                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3455                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl, interfacetablelength));
3456                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3457                                         M_BLEZ(REG_ITMP2, 0);
3458                                         codegen_addxcastrefs(mcodeptr);
3459                                         M_ALD(REG_ITMP2, REG_ITMP1,
3460                                               OFFSET(vftbl, interfacetable[0]) -
3461                                               super->index * sizeof(methodptr*));
3462                                         M_BEQZ(REG_ITMP2, 0);
3463                                         codegen_addxcastrefs(mcodeptr);
3464                                         }
3465                                 else {                                     /* class           */
3466 /*
3467                                         s2 = super->vftbl->diffval;
3468                                         M_BEQZ(s1, 4 + (s2 != 0) + (s2 > 255));
3469                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3470                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3471                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3472                                         if (s2 == 0) {
3473                                                 M_BNEZ(REG_ITMP1, 0);
3474                                                 }
3475                                         else if (s2 <= 255) {
3476                                                 M_CMPULE_IMM(REG_ITMP1, s2, REG_ITMP2);
3477                                                 M_BEQZ(REG_ITMP2, 0);
3478                                                 }
3479                                         else {
3480                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3481                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3482                                                 M_BEQZ(REG_ITMP2, 0);
3483                                                 }
3484 */
3485                                         M_BEQZ(s1, 8 + (d == REG_ITMP3));
3486                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3487                                         a = dseg_addaddress ((void*) super->vftbl);
3488                                         M_ALD(REG_ITMP2, REG_PV, a);
3489                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl, baseval));
3490                                         if (d != REG_ITMP3) {
3491                                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl, baseval));
3492                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3493                                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3494                                                 }
3495                                         else {
3496                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, baseval));
3497                                                 M_ISUB(REG_ITMP1, REG_ITMP2, REG_ITMP1);
3498                                                 M_ALD(REG_ITMP2, REG_PV, a);
3499                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl, diffval));
3500                                                 }
3501                                         M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3502                                         M_BEQZ(REG_ITMP2, 0);
3503                                         codegen_addxcastrefs(mcodeptr);
3504                                         }
3505                                 }
3506                         else
3507                                 panic ("internal error: no inlined array checkcast");
3508                         }
3509                         M_INTMOVE(s1, d);
3510                         store_reg_to_var_int(iptr->dst, d);
3511                         break;
3512
3513                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3514
3515                         var_to_reg_int(s1, src, REG_ITMP1);
3516                         M_BLTZ(s1, 0);
3517                         codegen_addxcheckarefs(mcodeptr);
3518                         break;
3519
3520                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3521                                       /* op1 = dimension, val.a = array descriptor    */
3522
3523                         /* check for negative sizes and copy sizes to stack if necessary  */
3524
3525                         MCODECHECK((iptr->op1 << 1) + 64);
3526
3527                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3528                                 var_to_reg_int(s2, src, REG_ITMP1);
3529                                 M_BLTZ(s2, 0);
3530                                 codegen_addxcheckarefs(mcodeptr);
3531
3532                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3533
3534                                 if (src->varkind != ARGVAR) {
3535                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3536                                         }
3537                                 }
3538
3539                         /* a0 = dimension count */
3540
3541                         ICONST(argintregs[0], iptr->op1);
3542
3543                         /* a1 = arraydescriptor */
3544
3545                         a = dseg_addaddress(iptr->val.a);
3546                         M_ALD(argintregs[1], REG_PV, a);
3547
3548                         /* a2 = pointer to dimensions = stack pointer */
3549
3550                         M_INTMOVE(REG_SP, argintregs[2]);
3551
3552                         a = dseg_addaddress((void*) (builtin_nmultianewarray));
3553                         M_ALD(REG_PV, REG_PV, a);
3554                         M_JSR(REG_RA, REG_PV);
3555                         s1 = (int)((u1*) mcodeptr - mcodebase);
3556                         if (s1 <= 32768)
3557                                 M_LDA (REG_PV, REG_RA, -s1);
3558                         else {
3559                                 s4 ml = -s1, mh = 0;
3560                                 while (ml < -32768) {ml += 65536; mh--;}
3561                                 M_LDA(REG_PV, REG_RA, ml);
3562                                 M_LDAH(REG_PV, REG_PV, mh);
3563                             }
3564                         s1 = reg_of_var(iptr->dst, REG_RESULT);
3565                         M_INTMOVE(REG_RESULT, s1);
3566                         store_reg_to_var_int(iptr->dst, s1);
3567                         break;
3568
3569
3570                 default: sprintf (logtext, "Unknown pseudo command: %d", iptr->opc);
3571                          error();
3572
3573
3574
3575         } /* switch */
3576
3577         } /* for instruction */
3578
3579         /* copy values to interface registers */
3580
3581         src = bptr->outstack;
3582         len = bptr->outdepth;
3583         MCODECHECK(64+len);
3584         while (src) {
3585                 len--;
3586                 if ((src->varkind != STACKVAR)) {
3587                         s2 = src->type;
3588                         if (IS_FLT_DBL_TYPE(s2)) {
3589                                 var_to_reg_flt(s1, src, REG_FTMP1);
3590                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3591                                         M_FLTMOVE(s1,interfaces[len][s2].regoff);
3592                                         }
3593                                 else {
3594                                         M_DST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3595                                         }
3596                                 }
3597                         else {
3598                                 var_to_reg_int(s1, src, REG_ITMP1);
3599                                 if (!(interfaces[len][s2].flags & INMEMORY)) {
3600                                         M_INTMOVE(s1,interfaces[len][s2].regoff);
3601                                         }
3602                                 else {
3603                                         M_LST(s1, REG_SP, 8 * interfaces[len][s2].regoff);
3604                                         }
3605                                 }
3606                         }
3607                 src = src->prev;
3608                 }
3609         } /* if (bptr -> flags >= BBREACHED) */
3610         } /* for basic block */
3611
3612         /* bptr -> mpc = (int)((u1*) mcodeptr - mcodebase); */
3613
3614         {
3615         /* generate bound check stubs */
3616
3617         s4 *xcodeptr = NULL;
3618
3619         for (; xboundrefs != NULL; xboundrefs = xboundrefs->next) {
3620                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3621                         gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3622                                 xboundrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3623                         continue;
3624                         }
3625
3626
3627                 gen_resolvebranch((u1*) mcodebase + xboundrefs->branchpos,
3628                                   xboundrefs->branchpos, (u1*) mcodeptr - mcodebase);
3629
3630                 MCODECHECK(8);
3631
3632                 M_LDA(REG_ITMP2_XPC, REG_PV, xboundrefs->branchpos - 4);
3633
3634                 if (xcodeptr != NULL) {
3635                         M_BR((xcodeptr-mcodeptr)-1);
3636                         }
3637                 else {
3638                         xcodeptr = mcodeptr;
3639
3640                         a = dseg_addaddress(proto_java_lang_ArrayIndexOutOfBoundsException);
3641                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3642
3643                         a = dseg_addaddress(asm_handle_exception);
3644                         M_ALD(REG_ITMP3, REG_PV, a);
3645
3646                         M_JMP(REG_ZERO, REG_ITMP3);
3647                         }
3648                 }
3649
3650         /* generate negative array size check stubs */
3651
3652         xcodeptr = NULL;
3653
3654         for (; xcheckarefs != NULL; xcheckarefs = xcheckarefs->next) {
3655                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3656                         gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3657                                 xcheckarefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3658                         continue;
3659                         }
3660
3661                 gen_resolvebranch((u1*) mcodebase + xcheckarefs->branchpos,
3662                                   xcheckarefs->branchpos, (u1*) mcodeptr - mcodebase);
3663
3664                 MCODECHECK(8);
3665
3666                 M_LDA(REG_ITMP2_XPC, REG_PV, xcheckarefs->branchpos - 4);
3667
3668                 if (xcodeptr != NULL) {
3669                         M_BR((xcodeptr-mcodeptr)-1);
3670                         }
3671                 else {
3672                         xcodeptr = mcodeptr;
3673
3674                         a = dseg_addaddress(proto_java_lang_NegativeArraySizeException);
3675                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3676
3677                         a = dseg_addaddress(asm_handle_exception);
3678                         M_ALD(REG_ITMP3, REG_PV, a);
3679
3680                         M_JMP(REG_ZERO, REG_ITMP3);
3681                         }
3682                 }
3683
3684         /* generate cast check stubs */
3685
3686         xcodeptr = NULL;
3687
3688         for (; xcastrefs != NULL; xcastrefs = xcastrefs->next) {
3689                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3690                         gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3691                                 xcastrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3692                         continue;
3693                         }
3694
3695                 gen_resolvebranch((u1*) mcodebase + xcastrefs->branchpos,
3696                                   xcastrefs->branchpos, (u1*) mcodeptr - mcodebase);
3697
3698                 MCODECHECK(8);
3699
3700                 M_LDA(REG_ITMP2_XPC, REG_PV, xcastrefs->branchpos - 4);
3701
3702                 if (xcodeptr != NULL) {
3703                         M_BR((xcodeptr-mcodeptr)-1);
3704                         }
3705                 else {
3706                         xcodeptr = mcodeptr;
3707
3708                         a = dseg_addaddress(proto_java_lang_ClassCastException);
3709                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3710
3711                         a = dseg_addaddress(asm_handle_exception);
3712                         M_ALD(REG_ITMP3, REG_PV, a);
3713
3714                         M_JMP(REG_ZERO, REG_ITMP3);
3715                         }
3716                 }
3717
3718
3719 #ifdef SOFTNULLPTRCHECK
3720
3721         /* generate null pointer check stubs */
3722
3723         xcodeptr = NULL;
3724
3725         for (; xnullrefs != NULL; xnullrefs = xnullrefs->next) {
3726                 if ((exceptiontablelength == 0) && (xcodeptr != NULL)) {
3727                         gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3728                                 xnullrefs->branchpos, (u1*) xcodeptr - (u1*) mcodebase - 4);
3729                         continue;
3730                         }
3731
3732                 gen_resolvebranch((u1*) mcodebase + xnullrefs->branchpos,
3733                                   xnullrefs->branchpos, (u1*) mcodeptr - mcodebase);
3734
3735                 MCODECHECK(8);
3736
3737                 M_LDA(REG_ITMP2_XPC, REG_PV, xnullrefs->branchpos - 4);
3738
3739                 if (xcodeptr != NULL) {
3740                         M_BR((xcodeptr-mcodeptr)-1);
3741                         }
3742                 else {
3743                         xcodeptr = mcodeptr;
3744
3745                         a = dseg_addaddress(proto_java_lang_NullPointerException);
3746                         M_ALD(REG_ITMP1_XPTR, REG_PV, a);
3747
3748                         a = dseg_addaddress(asm_handle_exception);
3749                         M_ALD(REG_ITMP3, REG_PV, a);
3750
3751                         M_JMP(REG_ZERO, REG_ITMP3);
3752                         }
3753                 }
3754
3755 #endif
3756         }
3757
3758         codegen_finish((int)((u1*) mcodeptr - mcodebase));
3759 }
3760
3761
3762 /* redefinition of code generation macros (compiling into array) **************/
3763
3764 /*
3765 These macros are newly defined to allow code generation into an array.
3766 This is necessary, because the original M_.. macros generate code by
3767 calling 'codegen_adds4' that uses an additional data structure to
3768 receive the code.
3769
3770 For a faster (but less flexible) version to generate code, these
3771 macros directly use the (s4* p) - pointer to put the code directly
3772 in a locally defined array.
3773 This makes sense only for the stub-generation-routines below.
3774 */
3775
3776 #undef M_OP3
3777 #define M_OP3(op,fu,a,b,c,const) \
3778         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((b)<<(16-3*(const)))| \
3779         ((const)<<12)|((fu)<<5)|((c)) )
3780 #undef M_FOP3
3781 #define M_FOP3(op,fu,a,b,c) \
3782         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((b)<<16)|((fu)<<5)|(c) )
3783 #undef M_BRA
3784 #define M_BRA(op,a,disp) \
3785         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((disp)&0x1fffff) )
3786 #undef M_MEM
3787 #define M_MEM(op,a,b,disp) \
3788         *(p++) = ( (((s4)(op))<<26)|((a)<<21)|((b)<<16)|((disp)&0xffff) )
3789
3790
3791 /* function createcompilerstub *************************************************
3792
3793         creates a stub routine which calls the compiler
3794
3795 *******************************************************************************/
3796
3797 #define COMPSTUBSIZE 3
3798
3799 u1 *createcompilerstub (methodinfo *m)
3800 {
3801         u8 *s = CNEW (u8, COMPSTUBSIZE);    /* memory to hold the stub            */
3802         s4 *p = (s4*) s;                    /* code generation pointer            */
3803
3804                                             /* code for the stub                  */
3805         M_ALD (REG_PV, REG_PV, 16);         /* load pointer to the compiler       */
3806         M_JMP (0, REG_PV);                  /* jump to the compiler, return address
3807                                                in reg 0 is used as method pointer */
3808         s[1] = (u8) m;                      /* literals to be adressed            */
3809         s[2] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
3810
3811 #ifdef STATISTICS
3812         count_cstub_len += COMPSTUBSIZE * 8;
3813 #endif
3814
3815         return (u1*) s;
3816 }
3817
3818
3819 /* function removecompilerstub *************************************************
3820
3821      deletes a compilerstub from memory  (simply by freeing it)
3822
3823 *******************************************************************************/
3824
3825 void removecompilerstub (u1 *stub)
3826 {
3827         CFREE (stub, COMPSTUBSIZE * 8);
3828 }
3829
3830 /* function: createnativestub **************************************************
3831
3832         creates a stub routine which calls a native method
3833
3834 *******************************************************************************/
3835
3836 #define NATIVESTUBSIZE 34
3837 #define NATIVESTUBOFFSET 8
3838
3839 int runverbosenat = 0;
3840
3841 u1 *createnativestub (functionptr f, methodinfo *m)
3842 {
3843         int disp;
3844         u8 *s = CNEW (u8, NATIVESTUBSIZE);  /* memory to hold the stub            */
3845         u8 *cs = s + NATIVESTUBOFFSET;
3846         s4 *p = (s4*) (cs);                 /* code generation pointer            */
3847
3848         *(cs-1) = (u8) f;                   /* address of native method           */
3849         *(cs-2) = (u8) (&exceptionptr);     /* address of exceptionptr            */
3850         *(cs-3) = (u8) asm_handle_nat_exception; /* addr of asm exception handler */
3851         *(cs-4) = (u8) (&env);              /* addr of jni_environement           */
3852         *(cs-5) = (u8) asm_builtin_trace;
3853         *(cs-6) = (u8) m;
3854         *(cs-7) = (u8) asm_builtin_exittrace;
3855         *(cs-8) = (u8) builtin_trace_exception;
3856
3857 #if 0
3858         printf("stub: ");
3859         utf_display(m->class->name);
3860         printf(".");
3861         utf_display(m->name);
3862         printf(" 0x%p\n", cs);
3863 #endif
3864
3865         M_LDA  (REG_SP, REG_SP, -8);        /* build up stackframe                */
3866         M_AST  (REG_RA, REG_SP, 0);         /* store return address               */
3867
3868 #if 1
3869         if (runverbosenat) {
3870                 M_ALD(REG_ITMP1, REG_PV, -6*8);
3871                 M_ALD(REG_PV, REG_PV, -5*8);
3872
3873                 M_JSR(REG_RA, REG_PV);
3874                 disp = -(int) (p - (s4*) cs)*4;
3875                 M_LDA(REG_PV, REG_RA, disp);
3876         }
3877 #endif
3878
3879         reg_init(m);
3880
3881         M_MOV  (argintregs[4],argintregs[5]);
3882         M_FMOV (argfltregs[4],argfltregs[5]);
3883
3884         M_MOV  (argintregs[3],argintregs[4]);
3885         M_FMOV (argfltregs[3],argfltregs[4]);
3886
3887         M_MOV  (argintregs[2],argintregs[3]);
3888         M_FMOV (argfltregs[2],argfltregs[3]);
3889
3890         M_MOV  (argintregs[1],argintregs[2]);
3891         M_FMOV (argfltregs[1],argfltregs[2]);
3892
3893         M_MOV  (argintregs[0],argintregs[1]);
3894         M_FMOV (argfltregs[0],argfltregs[1]);
3895
3896         M_ALD  (argintregs[0], REG_PV, -4*8);/* load adress of jni_environement   */
3897
3898         M_ALD  (REG_PV, REG_PV, -1*8);      /* load adress of native method       */
3899         M_JSR  (REG_RA, REG_PV);            /* call native method                 */
3900
3901         disp = -(int) (p - (s4*) cs)*4;
3902         M_LDA  (REG_PV, REG_RA, disp);      /* recompute pv from ra               */
3903         M_ALD  (REG_ITMP3, REG_PV, -2*8);   /* get address of exceptionptr        */
3904
3905         M_ALD  (REG_ITMP1, REG_ITMP3, 0);   /* load exception into reg. itmp1     */
3906         M_BNEZ (REG_ITMP1,
3907                         3 + (runverbosenat ? 6 : 0));  /* if no exception then return        */
3908
3909 #if 1
3910         if (runverbosenat) {
3911                 M_ALD(argintregs[0], REG_PV, -6*8);
3912                 M_MOV(REG_RESULT, argintregs[1]);
3913                 M_FMOV(REG_FRESULT, argfltregs[2]);
3914                 M_FMOV(REG_FRESULT, argfltregs[3]);
3915                 M_ALD(REG_PV, REG_PV, -7*8);
3916                 M_JSR(REG_RA, REG_PV);
3917         }
3918 #endif
3919
3920         M_ALD  (REG_RA, REG_SP, 0);         /* load return address                */
3921         M_LDA  (REG_SP, REG_SP, 8);         /* remove stackframe                  */
3922
3923         M_RET  (REG_ZERO, REG_RA);          /* return to caller                   */
3924
3925         M_AST  (REG_ZERO, REG_ITMP3, 0);    /* store NULL into exceptionptr       */
3926
3927 #if 1
3928         if (runverbosenat) {
3929                 M_LDA(REG_SP, REG_SP, -8);
3930                 M_AST(REG_ITMP1, REG_SP, 0);
3931                 M_MOV(REG_ITMP1, argintregs[0]);
3932                 M_ALD(argintregs[1], REG_PV, -6*8);
3933                 M_ALD(argintregs[2], REG_SP, 0);
3934                 M_CLR(argintregs[3]);
3935                 M_ALD(REG_PV, REG_PV, -8*8);
3936                 M_JSR(REG_RA, REG_PV);
3937                 disp = -(int) (p - (s4*) cs)*4;
3938                 M_LDA  (REG_PV, REG_RA, disp);
3939                 M_ALD(REG_ITMP1, REG_SP, 0);
3940                 M_LDA(REG_SP, REG_SP, 8);
3941         }
3942 #endif
3943
3944         M_ALD  (REG_RA, REG_SP, 0);         /* load return address                */
3945         M_LDA  (REG_SP, REG_SP, 8);         /* remove stackframe                  */
3946
3947         M_LDA  (REG_ITMP2, REG_RA, -4);     /* move fault address into reg. itmp2 */
3948
3949         M_ALD  (REG_ITMP3, REG_PV, -3*8);   /* load asm exception handler address */
3950         M_JMP  (REG_ZERO, REG_ITMP3);       /* jump to asm exception handler      */
3951
3952 #if 0
3953         {
3954                 static int stubprinted;
3955                 if (!stubprinted)
3956                         printf("stubsize: %d/2\n", (int) (p - (s4*) s));
3957                 stubprinted = 1;
3958         }
3959 #endif
3960
3961 #ifdef STATISTICS
3962         count_nstub_len += NATIVESTUBSIZE * 8;
3963 #endif
3964
3965         return (u1*) (s + NATIVESTUBOFFSET);
3966 }
3967
3968 /* function: removenativestub **************************************************
3969
3970     removes a previously created native-stub from memory
3971
3972 *******************************************************************************/
3973
3974 void removenativestub (u1 *stub)
3975 {
3976         CFREE ((u8*) stub - NATIVESTUBOFFSET, NATIVESTUBSIZE * 8);
3977 }
3978
3979
3980 /*
3981  * These are local overrides for various environment variables in Emacs.
3982  * Please do not remove this and leave it at the end of the file, where
3983  * Emacs will automagically detect them.
3984  * ---------------------------------------------------------------------
3985  * Local variables:
3986  * mode: c
3987  * indent-tabs-mode: t
3988  * c-basic-offset: 4
3989  * tab-width: 4
3990  * End:
3991  */