src/vm/jit/alpha/codegen.c

   1 /* src/vm/jit/alpha/codegen.c - machine code generator for Alpha
   2
   3    Copyright (C) 1996-2005 R. Grafl, A. Krall, C. Kruegel, C. Oates,
   4    R. Obermaisser, M. Platter, M. Probst, S. Ring, E. Steiner,
   5    C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich, J. Wenninger,
   6    Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  23    02111-1307, USA.
  24
  25    Contact: cacao@complang.tuwien.ac.at
  26
  27    Authors: Andreas Krall
  28             Reinhard Grafl
  29
  30    Changes: Joseph Wenninger
  31             Christian Thalinger
  32             Christian Ullrich
  33
  34    $Id: codegen.c 2992 2005-07-11 21:52:07Z twisti $
  35
  36 */
  37
  38
  39 #include <stdio.h>
  40
  41 #include "config.h"
  42
  43 #include "md.h"
  44 #include "md-abi.h"
  45 #include "md-abi.inc"
  46
  47 #include "vm/jit/alpha/arch.h"
  48 #include "vm/jit/alpha/codegen.h"
  49 #include "vm/jit/alpha/types.h"
  50 #include "vm/jit/alpha/asmoffsets.h"
  51
  52 #include "cacao/cacao.h"
  53 #include "native/native.h"
  54 #include "vm/builtin.h"
  55 #include "vm/global.h"
  56 #include "vm/loader.h"
  57 #include "vm/stringlocal.h"
  58 #include "vm/tables.h"
  59 #include "vm/jit/asmpart.h"
  60 #include "vm/jit/codegen.inc"
  61 #include "vm/jit/jit.h"
  62
  63 #if defined(LSRA)
  64 # include "vm/jit/lsra.h"
  65 # include "vm/jit/lsra.inc"
  66 #endif
  67
  68 #include "vm/jit/parse.h"
  69 #include "vm/jit/patcher.h"
  70 #include "vm/jit/reg.h"
  71 #include "vm/jit/reg.inc"
  72
  73
  74 /* codegen *********************************************************************
  75
  76    Generates machine code.
  77
  78 *******************************************************************************/
  79
  80 void codegen(methodinfo *m, codegendata *cd, registerdata *rd)
  81 {
  82         s4                  len, s1, s2, s3, d, disp;
  83         ptrint              a;
  84         s4                  parentargs_base;
  85         s4                 *mcodeptr;
  86         stackptr            src;
  87         varinfo            *var;
  88         basicblock         *bptr;
  89         instruction        *iptr;
  90         exceptiontable     *ex;
  91         u2                  currentline;
  92         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE*  */
  93         builtintable_entry *bte;
  94         methoddesc         *md;
  95
  96         {
  97         s4 i, p, t, l;
  98         s4 savedregs_num;
  99
 100         savedregs_num = (m->isleafmethod) ? 0 : 1;        /* space to save the RA */
 101
 102         /* space to save used callee saved registers */
 103
 104         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
 105         savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
 106
 107         parentargs_base = rd->memuse + savedregs_num;
 108
 109 #if defined(USE_THREADS)           /* space to save argument of monitor_enter */
 110
 111         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 112                 parentargs_base++;
 113
 114 #endif
 115
 116         /* create method header */
 117
 118         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
 119         (void) dseg_adds4(cd, parentargs_base * 8);             /* FrameSize      */
 120
 121 #if defined(USE_THREADS)
 122
 123         /* IsSync contains the offset relative to the stack pointer for the
 124            argument of monitor_exit used in the exception handler. Since the
 125            offset could be zero and give a wrong meaning of the flag it is
 126            offset by one.
 127         */
 128
 129         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 130                 (void) dseg_adds4(cd, (rd->memuse + 1) * 8);     /* IsSync         */
 131         else
 132
 133 #endif
 134
 135         (void) dseg_adds4(cd, 0);                               /* IsSync         */
 136
 137         (void) dseg_adds4(cd, m->isleafmethod);                 /* IsLeaf         */
 138         (void) dseg_adds4(cd, INT_SAV_CNT - rd->savintreguse);/* IntSave  */
 139         (void) dseg_adds4(cd, FLT_SAV_CNT - rd->savfltreguse);/* FltSave  */
 140
 141         dseg_addlinenumbertablesize(cd);
 142
 143         (void) dseg_adds4(cd, cd->exceptiontablelength);        /* ExTableSize    */
 144
 145         /* create exception table */
 146
 147         for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
 148                 dseg_addtarget(cd, ex->start);
 149                 dseg_addtarget(cd, ex->end);
 150                 dseg_addtarget(cd, ex->handler);
 151                 (void) dseg_addaddress(cd, ex->catchtype.cls);
 152         }
 153
 154         /* initialize mcode variables */
 155
 156         mcodeptr = (s4 *) cd->mcodebase;
 157         cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize);
 158         MCODECHECK(128 + m->paramcount);
 159
 160         /* create stack frame (if necessary) */
 161
 162         if (parentargs_base) {
 163                 M_LDA(REG_SP, REG_SP, -parentargs_base * 8);
 164         }
 165
 166         /* save return address and used callee saved registers */
 167
 168         p = parentargs_base;
 169         if (!m->isleafmethod) {
 170                 p--; M_AST(REG_RA, REG_SP, p * 8);
 171         }
 172         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
 173                 p--; M_LST(rd->savintregs[i], REG_SP, p * 8);
 174         }
 175         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
 176                 p--; M_DST(rd->savfltregs[i], REG_SP, p * 8);
 177         }
 178
 179         /* take arguments out of register or stack frame */
 180
 181         md = m->parseddesc;
 182
 183         for (p = 0, l = 0; p < md->paramcount; p++) {
 184                 t = md->paramtypes[p].type;
 185                 var = &(rd->locals[l][t]);
 186                 l++;
 187                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 188                         l++;
 189                 if (var->type < 0)
 190                         continue;
 191                 s1 = md->params[p].regoff;
 192                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 193                         if (!md->params[p].inmemory) {           /* register arguments    */
 194                                 s2 = rd->argintregs[s1];
 195                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 196                                         M_INTMOVE(s2, var->regoff);
 197
 198                                 } else {                             /* reg arg -> spilled    */
 199                                         M_LST(s2, REG_SP, var->regoff * 8);
 200                                 }
 201
 202                         } else {                                 /* stack arguments       */
 203                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 204                                         M_LLD(var->regoff, REG_SP, (parentargs_base + s1) * 8);
 205
 206                                 } else {                             /* stack arg -> spilled  */
 207                                         var->regoff = parentargs_base + s1;
 208                                 }
 209                         }
 210
 211                 } else {                                     /* floating args         */
 212                         if (!md->params[p].inmemory) {           /* register arguments    */
 213                                 s2 = rd->argfltregs[s1];
 214                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 215                                         M_FLTMOVE(s2, var->regoff);
 216
 217                                 } else {                                         /* reg arg -> spilled    */
 218                                         M_DST(s2, REG_SP, var->regoff * 8);
 219                                 }
 220
 221                         } else {                                 /* stack arguments       */
 222                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 223                                         M_DLD(var->regoff, REG_SP, (parentargs_base + s1) * 8);
 224
 225                                 } else {                             /* stack-arg -> spilled  */
 226                                         var->regoff = parentargs_base + s1;
 227                                 }
 228                         }
 229                 }
 230         } /* end for */
 231
 232         /* call monitorenter function */
 233
 234 #if defined(USE_THREADS)
 235         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 236                 /* stack offset for monitor argument */
 237
 238                 s1 = rd->memuse;
 239
 240                 if (runverbose) {
 241                         M_LDA(REG_SP, REG_SP, -(INT_ARG_CNT + FLT_ARG_CNT) * 8);
 242
 243                         for (p = 0; p < INT_ARG_CNT; p++)
 244                                 M_LST(rd->argintregs[p], REG_SP, p * 8);
 245
 246                         for (p = 0; p < FLT_ARG_CNT; p++)
 247                                 M_DST(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
 248
 249                         s1 += INT_ARG_CNT + FLT_ARG_CNT;
 250                 }
 251
 252                 /* decide which monitor enter function to call */
 253
 254                 if (m->flags & ACC_STATIC) {
 255                         p = dseg_addaddress(cd, m->class);
 256                         M_ALD(REG_ITMP1, REG_PV, p);
 257                         M_AST(REG_ITMP1, REG_SP, s1 * 8);
 258                         M_INTMOVE(REG_ITMP1, rd->argintregs[0]);
 259                         p = dseg_addaddress(cd, BUILTIN_staticmonitorenter);
 260                         M_ALD(REG_PV, REG_PV, p);
 261                         M_JSR(REG_RA, REG_PV);
 262                         d = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 263                         M_LDA(REG_PV, REG_RA, d);
 264
 265                 } else {
 266                         M_BEQZ(rd->argintregs[0], 0);
 267                         codegen_addxnullrefs(cd, mcodeptr);
 268                         M_AST(rd->argintregs[0], REG_SP, s1 * 8);
 269                         p = dseg_addaddress(cd, BUILTIN_monitorenter);
 270                         M_ALD(REG_PV, REG_PV, p);
 271                         M_JSR(REG_RA, REG_PV);
 272                         d = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 273                         M_LDA(REG_PV, REG_RA, d);
 274                 }
 275
 276                 if (runverbose) {
 277                         for (p = 0; p < INT_ARG_CNT; p++)
 278                                 M_LLD(rd->argintregs[p], REG_SP, p * 8);
 279
 280                         for (p = 0; p < FLT_ARG_CNT; p++)
 281                                 M_DLD(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
 282
 283                         M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT) * 8);
 284                 }
 285         }
 286 #endif
 287
 288         /* call trace function */
 289
 290         if (runverbose) {
 291                 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
 292                 M_AST(REG_RA, REG_SP, 1 * 8);
 293
 294                 /* save integer argument registers */
 295
 296                 for (p = 0; p < md->paramcount && p < INT_ARG_CNT; p++)
 297                         M_LST(rd->argintregs[p], REG_SP, (2 + p) * 8);
 298
 299                 /* save and copy float arguments into integer registers */
 300
 301                 for (p = 0; p < md->paramcount && p < FLT_ARG_CNT; p++) {
 302                         t = md->paramtypes[p].type;
 303
 304                         if (IS_FLT_DBL_TYPE(t)) {
 305                                 if (IS_2_WORD_TYPE(t)) {
 306                                         M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 307
 308                                 } else {
 309                                         M_FST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 310                                 }
 311
 312                                 M_LLD(rd->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 313
 314                         } else {
 315                                 M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 316                         }
 317                 }
 318
 319                 p = dseg_addaddress(cd, m);
 320                 M_ALD(REG_ITMP1, REG_PV, p);
 321                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
 322                 p = dseg_addaddress(cd, (void *) builtin_trace_args);
 323                 M_ALD(REG_PV, REG_PV, p);
 324                 M_JSR(REG_RA, REG_PV);
 325                 d = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 326                 M_LDA(REG_PV, REG_RA, d);
 327                 M_ALD(REG_RA, REG_SP, 1 * 8);
 328
 329                 /* restore integer argument registers */
 330
 331                 for (p = 0; p < md->paramcount && p < INT_ARG_CNT; p++)
 332                         M_LLD(rd->argintregs[p], REG_SP, (2 + p) * 8);
 333
 334                 /* restore float argument registers */
 335
 336                 for (p = 0; p < md->paramcount && p < FLT_ARG_CNT; p++) {
 337                         t = md->paramtypes[p].type;
 338
 339                         if (IS_FLT_DBL_TYPE(t)) {
 340                                 if (IS_2_WORD_TYPE(t)) {
 341                                         M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 342
 343                                 } else {
 344                                         M_FLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 345                                 }
 346
 347                         } else {
 348                                 M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 349                         }
 350                 }
 351
 352                 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
 353         }
 354
 355         }
 356
 357         /* end of header generation */
 358
 359         /* walk through all basic blocks */
 360
 361         for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
 362
 363                 bptr->mpc = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 364
 365                 if (bptr->flags >= BBREACHED) {
 366
 367                 /* branch resolving */
 368
 369                 {
 370                 branchref *brefs;
 371                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 372                         gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
 373                                           brefs->branchpos, bptr->mpc);
 374                         }
 375                 }
 376
 377                 /* copy interface registers to their destination */
 378
 379                 src = bptr->instack;
 380                 len = bptr->indepth;
 381                 MCODECHECK(64+len);
 382 #ifdef LSRA
 383                 if (opt_lsra) {
 384                 while (src != NULL) {
 385                         len--;
 386                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 387                                         /*                              d = reg_of_var(m, src, REG_ITMP1); */
 388                                         if (!(src->flags & INMEMORY))
 389                                                 d= src->regoff;
 390                                         else
 391                                                 d=REG_ITMP1;
 392                                         M_INTMOVE(REG_ITMP1, d);
 393                                         store_reg_to_var_int(src, d);
 394                                 }
 395                                 src = src->prev;
 396                         }
 397                 } else {
 398 #endif
 399                         while (src != NULL) {
 400                                 len--;
 401                                 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 402                                 d = reg_of_var(rd, src, REG_ITMP1);
 403                                 M_INTMOVE(REG_ITMP1, d);
 404                                 store_reg_to_var_int(src, d);
 405                                 }
 406                         else {
 407                                 d = reg_of_var(rd, src, REG_IFTMP);
 408                                 if ((src->varkind != STACKVAR)) {
 409                                         s2 = src->type;
 410                                         if (IS_FLT_DBL_TYPE(s2)) {
 411                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 412                                                         s1 = rd->interfaces[len][s2].regoff;
 413                                                         M_FLTMOVE(s1,d);
 414                                                         }
 415                                                 else {
 416                                                         M_DLD(d, REG_SP, 8 * rd->interfaces[len][s2].regoff);
 417                                                         }
 418                                                 store_reg_to_var_flt(src, d);
 419                                                 }
 420                                         else {
 421                                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 422                                                         s1 = rd->interfaces[len][s2].regoff;
 423                                                         M_INTMOVE(s1,d);
 424                                                         }
 425                                                 else {
 426                                                         M_LLD(d, REG_SP, 8 * rd->interfaces[len][s2].regoff);
 427                                                         }
 428                                                 store_reg_to_var_int(src, d);
 429                                                 }
 430                                         }
 431                                 }
 432                         src = src->prev;
 433                         }
 434 #ifdef LSRA
 435                 }
 436 #endif
 437
 438                 /* walk through all instructions */
 439
 440                 src = bptr->instack;
 441                 len = bptr->icount;
 442
 443                 for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) {
 444                         if (iptr->line != currentline) {
 445                                 dseg_addlinenumber(cd, iptr->line, (u1 *) mcodeptr);
 446                                 currentline = iptr->line;
 447                         }
 448
 449                 MCODECHECK(64);       /* an instruction usually needs < 64 words      */
 450                 switch (iptr->opc) {
 451
 452                 case ICMD_INLINE_START:
 453                 case ICMD_INLINE_END:
 454                         break;
 455
 456                 case ICMD_NOP:        /* ...  ==> ...                                 */
 457                         break;
 458
 459                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
 460
 461                         var_to_reg_int(s1, src, REG_ITMP1);
 462                         M_BEQZ(s1, 0);
 463                         codegen_addxnullrefs(cd, mcodeptr);
 464                         break;
 465
 466                 /* constant operations ************************************************/
 467
 468                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 469                                       /* op1 = 0, val.i = constant                    */
 470
 471                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 472                         ICONST(d, iptr->val.i);
 473                         store_reg_to_var_int(iptr->dst, d);
 474                         break;
 475
 476                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 477                                       /* op1 = 0, val.l = constant                    */
 478
 479                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 480                         LCONST(d, iptr->val.l);
 481                         store_reg_to_var_int(iptr->dst, d);
 482                         break;
 483
 484                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 485                                       /* op1 = 0, val.f = constant                    */
 486
 487                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 488                         a = dseg_addfloat(cd, iptr->val.f);
 489                         M_FLD(d, REG_PV, a);
 490                         store_reg_to_var_flt(iptr->dst, d);
 491                         break;
 492
 493                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 494                                       /* op1 = 0, val.d = constant                    */
 495
 496                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 497                         a = dseg_adddouble(cd, iptr->val.d);
 498                         M_DLD(d, REG_PV, a);
 499                         store_reg_to_var_flt(iptr->dst, d);
 500                         break;
 501
 502                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 503                                       /* op1 = 0, val.a = constant                    */
 504
 505                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 506                         if (iptr->val.a) {
 507                                 a = dseg_addaddress(cd, iptr->val.a);
 508                                 M_ALD(d, REG_PV, a);
 509                         } else {
 510                                 M_INTMOVE(REG_ZERO, d);
 511                         }
 512                         store_reg_to_var_int(iptr->dst, d);
 513                         break;
 514
 515
 516                 /* load/store operations **********************************************/
 517
 518                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 519                 case ICMD_LLOAD:      /* op1 = local variable                         */
 520                 case ICMD_ALOAD:
 521
 522                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 523                         if ((iptr->dst->varkind == LOCALVAR) &&
 524                             (iptr->dst->varnum == iptr->op1))
 525                                 break;
 526                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 527                         if (var->flags & INMEMORY)
 528                                 M_LLD(d, REG_SP, 8 * var->regoff);
 529                         else
 530                                 {M_INTMOVE(var->regoff,d);}
 531                         store_reg_to_var_int(iptr->dst, d);
 532                         break;
 533
 534                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 535                 case ICMD_DLOAD:      /* op1 = local variable                         */
 536
 537                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 538                         if ((iptr->dst->varkind == LOCALVAR) &&
 539                             (iptr->dst->varnum == iptr->op1))
 540                                 break;
 541                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 542                         if (var->flags & INMEMORY)
 543                                 M_DLD(d, REG_SP, 8 * var->regoff);
 544                         else
 545                                 {M_FLTMOVE(var->regoff,d);}
 546                         store_reg_to_var_flt(iptr->dst, d);
 547                         break;
 548
 549
 550                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 551                 case ICMD_LSTORE:     /* op1 = local variable                         */
 552                 case ICMD_ASTORE:
 553
 554                         if ((src->varkind == LOCALVAR) &&
 555                             (src->varnum == iptr->op1))
 556                                 break;
 557                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 558                         if (var->flags & INMEMORY) {
 559                                 var_to_reg_int(s1, src, REG_ITMP1);
 560                                 M_LST(s1, REG_SP, 8 * var->regoff);
 561                                 }
 562                         else {
 563                                 var_to_reg_int(s1, src, var->regoff);
 564                                 M_INTMOVE(s1, var->regoff);
 565                                 }
 566                         break;
 567
 568                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 569                 case ICMD_DSTORE:     /* op1 = local variable                         */
 570
 571                         if ((src->varkind == LOCALVAR) &&
 572                             (src->varnum == iptr->op1))
 573                                 break;
 574                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 575                         if (var->flags & INMEMORY) {
 576                                 var_to_reg_flt(s1, src, REG_FTMP1);
 577                                 M_DST(s1, REG_SP, 8 * var->regoff);
 578                                 }
 579                         else {
 580                                 var_to_reg_flt(s1, src, var->regoff);
 581                                 M_FLTMOVE(s1, var->regoff);
 582                                 }
 583                         break;
 584
 585
 586                 /* pop/dup/swap operations ********************************************/
 587
 588                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 589
 590                 case ICMD_POP:        /* ..., value  ==> ...                          */
 591                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 592                         break;
 593
 594                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 595                         M_COPY(src, iptr->dst);
 596                         break;
 597
 598                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 599
 600                         M_COPY(src,       iptr->dst);
 601                         M_COPY(src->prev, iptr->dst->prev);
 602                         M_COPY(iptr->dst, iptr->dst->prev->prev);
 603                         break;
 604
 605                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 606
 607                         M_COPY(src,             iptr->dst);
 608                         M_COPY(src->prev,       iptr->dst->prev);
 609                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 610                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 611                         break;
 612
 613                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 614
 615                         M_COPY(src,       iptr->dst);
 616                         M_COPY(src->prev, iptr->dst->prev);
 617                         break;
 618
 619                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 620
 621                         M_COPY(src,             iptr->dst);
 622                         M_COPY(src->prev,       iptr->dst->prev);
 623                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 624                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 625                         M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
 626                         break;
 627
 628                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 629
 630                         M_COPY(src,                   iptr->dst);
 631                         M_COPY(src->prev,             iptr->dst->prev);
 632                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 633                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 634                         M_COPY(iptr->dst,             iptr->dst->prev->prev->prev->prev);
 635                         M_COPY(iptr->dst->prev,       iptr->dst->prev->prev->prev->prev->prev);
 636                         break;
 637
 638                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 639
 640                         M_COPY(src,       iptr->dst->prev);
 641                         M_COPY(src->prev, iptr->dst);
 642                         break;
 643
 644
 645                 /* integer operations *************************************************/
 646
 647                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 648
 649                         var_to_reg_int(s1, src, REG_ITMP1);
 650                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 651                         M_ISUB(REG_ZERO, s1, d);
 652                         store_reg_to_var_int(iptr->dst, d);
 653                         break;
 654
 655                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 656
 657                         var_to_reg_int(s1, src, REG_ITMP1);
 658                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 659                         M_LSUB(REG_ZERO, s1, d);
 660                         store_reg_to_var_int(iptr->dst, d);
 661                         break;
 662
 663                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 664
 665                         var_to_reg_int(s1, src, REG_ITMP1);
 666                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 667                         M_INTMOVE(s1, d);
 668                         store_reg_to_var_int(iptr->dst, d);
 669                         break;
 670
 671                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 672
 673                         var_to_reg_int(s1, src, REG_ITMP1);
 674                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 675                         M_IADD(s1, REG_ZERO, d );
 676                         store_reg_to_var_int(iptr->dst, d);
 677                         break;
 678
 679                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 680
 681                         var_to_reg_int(s1, src, REG_ITMP1);
 682                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 683                         if (has_ext_instr_set) {
 684                                 M_BSEXT(s1, d);
 685                                 }
 686                         else {
 687                                 M_SLL_IMM(s1, 56, d);
 688                                 M_SRA_IMM( d, 56, d);
 689                                 }
 690                         store_reg_to_var_int(iptr->dst, d);
 691                         break;
 692
 693                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 694
 695                         var_to_reg_int(s1, src, REG_ITMP1);
 696                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 697             M_CZEXT(s1, d);
 698                         store_reg_to_var_int(iptr->dst, d);
 699                         break;
 700
 701                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 702
 703                         var_to_reg_int(s1, src, REG_ITMP1);
 704                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 705                         if (has_ext_instr_set) {
 706                                 M_SSEXT(s1, d);
 707                                 }
 708                         else {
 709                                 M_SLL_IMM(s1, 48, d);
 710                                 M_SRA_IMM( d, 48, d);
 711                                 }
 712                         store_reg_to_var_int(iptr->dst, d);
 713                         break;
 714
 715
 716                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 717
 718                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 719                         var_to_reg_int(s2, src, REG_ITMP2);
 720                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 721                         M_IADD(s1, s2, d);
 722                         store_reg_to_var_int(iptr->dst, d);
 723                         break;
 724
 725                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 726                                       /* val.i = constant                             */
 727
 728                         var_to_reg_int(s1, src, REG_ITMP1);
 729                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 730                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 731                                 M_IADD_IMM(s1, iptr->val.i, d);
 732                                 }
 733                         else {
 734                                 ICONST(REG_ITMP2, iptr->val.i);
 735                                 M_IADD(s1, REG_ITMP2, d);
 736                                 }
 737                         store_reg_to_var_int(iptr->dst, d);
 738                         break;
 739
 740                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 741
 742                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 743                         var_to_reg_int(s2, src, REG_ITMP2);
 744                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 745                         M_LADD(s1, s2, d);
 746                         store_reg_to_var_int(iptr->dst, d);
 747                         break;
 748
 749                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 750                                       /* val.l = constant                             */
 751
 752                         var_to_reg_int(s1, src, REG_ITMP1);
 753                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 754                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 755                                 M_LADD_IMM(s1, iptr->val.l, d);
 756                                 }
 757                         else {
 758                                 LCONST(REG_ITMP2, iptr->val.l);
 759                                 M_LADD(s1, REG_ITMP2, d);
 760                                 }
 761                         store_reg_to_var_int(iptr->dst, d);
 762                         break;
 763
 764                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 765
 766                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 767                         var_to_reg_int(s2, src, REG_ITMP2);
 768                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 769                         M_ISUB(s1, s2, d);
 770                         store_reg_to_var_int(iptr->dst, d);
 771                         break;
 772
 773                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 774                                       /* val.i = constant                             */
 775
 776                         var_to_reg_int(s1, src, REG_ITMP1);
 777                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 778                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 779                                 M_ISUB_IMM(s1, iptr->val.i, d);
 780                                 }
 781                         else {
 782                                 ICONST(REG_ITMP2, iptr->val.i);
 783                                 M_ISUB(s1, REG_ITMP2, d);
 784                                 }
 785                         store_reg_to_var_int(iptr->dst, d);
 786                         break;
 787
 788                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 789
 790                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 791                         var_to_reg_int(s2, src, REG_ITMP2);
 792                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 793                         M_LSUB(s1, s2, d);
 794                         store_reg_to_var_int(iptr->dst, d);
 795                         break;
 796
 797                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 798                                       /* val.l = constant                             */
 799
 800                         var_to_reg_int(s1, src, REG_ITMP1);
 801                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 802                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 803                                 M_LSUB_IMM(s1, iptr->val.l, d);
 804                                 }
 805                         else {
 806                                 LCONST(REG_ITMP2, iptr->val.l);
 807                                 M_LSUB(s1, REG_ITMP2, d);
 808                                 }
 809                         store_reg_to_var_int(iptr->dst, d);
 810                         break;
 811
 812                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 813
 814                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 815                         var_to_reg_int(s2, src, REG_ITMP2);
 816                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 817                         M_IMUL(s1, s2, d);
 818                         store_reg_to_var_int(iptr->dst, d);
 819                         break;
 820
 821                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 822                                       /* val.i = constant                             */
 823
 824                         var_to_reg_int(s1, src, REG_ITMP1);
 825                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 826                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 827                                 M_IMUL_IMM(s1, iptr->val.i, d);
 828                                 }
 829                         else {
 830                                 ICONST(REG_ITMP2, iptr->val.i);
 831                                 M_IMUL(s1, REG_ITMP2, d);
 832                                 }
 833                         store_reg_to_var_int(iptr->dst, d);
 834                         break;
 835
 836                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 837
 838                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 839                         var_to_reg_int(s2, src, REG_ITMP2);
 840                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 841                         M_LMUL (s1, s2, d);
 842                         store_reg_to_var_int(iptr->dst, d);
 843                         break;
 844
 845                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
 846                                       /* val.l = constant                             */
 847
 848                         var_to_reg_int(s1, src, REG_ITMP1);
 849                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 850                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 851                                 M_LMUL_IMM(s1, iptr->val.l, d);
 852                                 }
 853                         else {
 854                                 LCONST(REG_ITMP2, iptr->val.l);
 855                                 M_LMUL(s1, REG_ITMP2, d);
 856                                 }
 857                         store_reg_to_var_int(iptr->dst, d);
 858                         break;
 859
 860                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 861                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 862                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 863                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 864
 865                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 866                         var_to_reg_int(s2, src, REG_ITMP2);
 867                         d = reg_of_var(rd, iptr->dst, REG_RESULT);
 868                         M_BEQZ(s2, 0);
 869                         codegen_addxdivrefs(cd, mcodeptr);
 870
 871                         M_MOV(s1, rd->argintregs[0]);
 872                         M_MOV(s2, rd->argintregs[1]);
 873                         bte = iptr->val.a;
 874                         disp = dseg_addaddress(cd, bte->fp);
 875                         M_ALD(REG_PV, REG_PV, disp);
 876                         M_JSR(REG_RA, REG_PV);
 877
 878                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 879                         if (disp <= 32768)
 880                                 M_LDA(REG_PV, REG_RA, -disp);
 881                         else {
 882                                 s4 ml = -disp, mh = 0;
 883                                 while (ml < -32768) { ml += 65536; mh--; }
 884                                 M_LDA(REG_PV, REG_RA, ml);
 885                                 M_LDAH(REG_PV, REG_PV, mh);
 886                         }
 887
 888                         M_INTMOVE(REG_RESULT, d);
 889                         store_reg_to_var_int(iptr->dst, d);
 890                         break;
 891
 892                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
 893                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
 894
 895                         var_to_reg_int(s1, src, REG_ITMP1);
 896                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 897                         if (iptr->val.i <= 15) {
 898                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
 899                                 M_CMOVGE(s1, s1, REG_ITMP2);
 900                                 }
 901                         else {
 902                                 M_SRA_IMM(s1, 63, REG_ITMP2);
 903                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
 904                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
 905                                 }
 906                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
 907                         store_reg_to_var_int(iptr->dst, d);
 908                         break;
 909
 910                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 911
 912                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 913                         var_to_reg_int(s2, src, REG_ITMP2);
 914                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 915                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 916                         M_SLL(s1, REG_ITMP3, d);
 917                         M_IADD(d, REG_ZERO, d);
 918                         store_reg_to_var_int(iptr->dst, d);
 919                         break;
 920
 921                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
 922                                       /* val.i = constant                             */
 923
 924                         var_to_reg_int(s1, src, REG_ITMP1);
 925                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 926                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
 927                         M_IADD(d, REG_ZERO, d);
 928                         store_reg_to_var_int(iptr->dst, d);
 929                         break;
 930
 931                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
 932
 933                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 934                         var_to_reg_int(s2, src, REG_ITMP2);
 935                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 936                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 937                         M_SRA(s1, REG_ITMP3, d);
 938                         store_reg_to_var_int(iptr->dst, d);
 939                         break;
 940
 941                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
 942                                       /* val.i = constant                             */
 943
 944                         var_to_reg_int(s1, src, REG_ITMP1);
 945                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 946                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
 947                         store_reg_to_var_int(iptr->dst, d);
 948                         break;
 949
 950                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
 951
 952                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 953                         var_to_reg_int(s2, src, REG_ITMP2);
 954                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 955                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
 956             M_IZEXT(s1, d);
 957                         M_SRL(d, REG_ITMP2, d);
 958                         M_IADD(d, REG_ZERO, d);
 959                         store_reg_to_var_int(iptr->dst, d);
 960                         break;
 961
 962                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
 963                                       /* val.i = constant                             */
 964
 965                         var_to_reg_int(s1, src, REG_ITMP1);
 966                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 967             M_IZEXT(s1, d);
 968                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
 969                         M_IADD(d, REG_ZERO, d);
 970                         store_reg_to_var_int(iptr->dst, d);
 971                         break;
 972
 973                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 974
 975                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 976                         var_to_reg_int(s2, src, REG_ITMP2);
 977                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 978                         M_SLL(s1, s2, d);
 979                         store_reg_to_var_int(iptr->dst, d);
 980                         break;
 981
 982                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
 983                                       /* val.i = constant                             */
 984
 985                         var_to_reg_int(s1, src, REG_ITMP1);
 986                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 987                         M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
 988                         store_reg_to_var_int(iptr->dst, d);
 989                         break;
 990
 991                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
 992
 993                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 994                         var_to_reg_int(s2, src, REG_ITMP2);
 995                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
 996                         M_SRA(s1, s2, d);
 997                         store_reg_to_var_int(iptr->dst, d);
 998                         break;
 999
1000                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1001                                       /* val.i = constant                             */
1002
1003                         var_to_reg_int(s1, src, REG_ITMP1);
1004                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1005                         M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
1006                         store_reg_to_var_int(iptr->dst, d);
1007                         break;
1008
1009                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1010
1011                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1012                         var_to_reg_int(s2, src, REG_ITMP2);
1013                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1014                         M_SRL(s1, s2, d);
1015                         store_reg_to_var_int(iptr->dst, d);
1016                         break;
1017
1018                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1019                                       /* val.i = constant                             */
1020
1021                         var_to_reg_int(s1, src, REG_ITMP1);
1022                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1023                         M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
1024                         store_reg_to_var_int(iptr->dst, d);
1025                         break;
1026
1027                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1028                 case ICMD_LAND:
1029
1030                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1031                         var_to_reg_int(s2, src, REG_ITMP2);
1032                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1033                         M_AND(s1, s2, d);
1034                         store_reg_to_var_int(iptr->dst, d);
1035                         break;
1036
1037                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1038                                       /* val.i = constant                             */
1039
1040                         var_to_reg_int(s1, src, REG_ITMP1);
1041                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1042                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1043                                 M_AND_IMM(s1, iptr->val.i, d);
1044                                 }
1045                         else if (iptr->val.i == 0xffff) {
1046                                 M_CZEXT(s1, d);
1047                                 }
1048                         else if (iptr->val.i == 0xffffff) {
1049                                 M_ZAPNOT_IMM(s1, 0x07, d);
1050                                 }
1051                         else {
1052                                 ICONST(REG_ITMP2, iptr->val.i);
1053                                 M_AND(s1, REG_ITMP2, d);
1054                                 }
1055                         store_reg_to_var_int(iptr->dst, d);
1056                         break;
1057
1058                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1059                                       /* val.i = constant                             */
1060
1061                         var_to_reg_int(s1, src, REG_ITMP1);
1062                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1063                         if (s1 == d) {
1064                                 M_MOV(s1, REG_ITMP1);
1065                                 s1 = REG_ITMP1;
1066                                 }
1067                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1068                                 M_AND_IMM(s1, iptr->val.i, d);
1069                                 M_BGEZ(s1, 3);
1070                                 M_ISUB(REG_ZERO, s1, d);
1071                                 M_AND_IMM(d, iptr->val.i, d);
1072                                 }
1073                         else if (iptr->val.i == 0xffff) {
1074                                 M_CZEXT(s1, d);
1075                                 M_BGEZ(s1, 3);
1076                                 M_ISUB(REG_ZERO, s1, d);
1077                                 M_CZEXT(d, d);
1078                                 }
1079                         else if (iptr->val.i == 0xffffff) {
1080                                 M_ZAPNOT_IMM(s1, 0x07, d);
1081                                 M_BGEZ(s1, 3);
1082                                 M_ISUB(REG_ZERO, s1, d);
1083                                 M_ZAPNOT_IMM(d, 0x07, d);
1084                                 }
1085                         else {
1086                                 ICONST(REG_ITMP2, iptr->val.i);
1087                                 M_AND(s1, REG_ITMP2, d);
1088                                 M_BGEZ(s1, 3);
1089                                 M_ISUB(REG_ZERO, s1, d);
1090                                 M_AND(d, REG_ITMP2, d);
1091                                 }
1092                         M_ISUB(REG_ZERO, d, d);
1093                         store_reg_to_var_int(iptr->dst, d);
1094                         break;
1095
1096                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1097                                       /* val.l = constant                             */
1098
1099                         var_to_reg_int(s1, src, REG_ITMP1);
1100                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1101                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1102                                 M_AND_IMM(s1, iptr->val.l, d);
1103                                 }
1104                         else if (iptr->val.l == 0xffffL) {
1105                                 M_CZEXT(s1, d);
1106                                 }
1107                         else if (iptr->val.l == 0xffffffL) {
1108                                 M_ZAPNOT_IMM(s1, 0x07, d);
1109                                 }
1110                         else if (iptr->val.l == 0xffffffffL) {
1111                                 M_IZEXT(s1, d);
1112                                 }
1113                         else if (iptr->val.l == 0xffffffffffL) {
1114                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1115                                 }
1116                         else if (iptr->val.l == 0xffffffffffffL) {
1117                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1118                                 }
1119                         else if (iptr->val.l == 0xffffffffffffffL) {
1120                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1121                                 }
1122                         else {
1123                                 LCONST(REG_ITMP2, iptr->val.l);
1124                                 M_AND(s1, REG_ITMP2, d);
1125                                 }
1126                         store_reg_to_var_int(iptr->dst, d);
1127                         break;
1128
1129                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1130                                       /* val.l = constant                             */
1131
1132                         var_to_reg_int(s1, src, REG_ITMP1);
1133                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1134                         if (s1 == d) {
1135                                 M_MOV(s1, REG_ITMP1);
1136                                 s1 = REG_ITMP1;
1137                                 }
1138                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1139                                 M_AND_IMM(s1, iptr->val.l, d);
1140                                 M_BGEZ(s1, 3);
1141                                 M_LSUB(REG_ZERO, s1, d);
1142                                 M_AND_IMM(d, iptr->val.l, d);
1143                                 }
1144                         else if (iptr->val.l == 0xffffL) {
1145                                 M_CZEXT(s1, d);
1146                                 M_BGEZ(s1, 3);
1147                                 M_LSUB(REG_ZERO, s1, d);
1148                                 M_CZEXT(d, d);
1149                                 }
1150                         else if (iptr->val.l == 0xffffffL) {
1151                                 M_ZAPNOT_IMM(s1, 0x07, d);
1152                                 M_BGEZ(s1, 3);
1153                                 M_LSUB(REG_ZERO, s1, d);
1154                                 M_ZAPNOT_IMM(d, 0x07, d);
1155                                 }
1156                         else if (iptr->val.l == 0xffffffffL) {
1157                                 M_IZEXT(s1, d);
1158                                 M_BGEZ(s1, 3);
1159                                 M_LSUB(REG_ZERO, s1, d);
1160                                 M_IZEXT(d, d);
1161                                 }
1162                         else if (iptr->val.l == 0xffffffffffL) {
1163                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1164                                 M_BGEZ(s1, 3);
1165                                 M_LSUB(REG_ZERO, s1, d);
1166                                 M_ZAPNOT_IMM(d, 0x1f, d);
1167                                 }
1168                         else if (iptr->val.l == 0xffffffffffffL) {
1169                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1170                                 M_BGEZ(s1, 3);
1171                                 M_LSUB(REG_ZERO, s1, d);
1172                                 M_ZAPNOT_IMM(d, 0x3f, d);
1173                                 }
1174                         else if (iptr->val.l == 0xffffffffffffffL) {
1175                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1176                                 M_BGEZ(s1, 3);
1177                                 M_LSUB(REG_ZERO, s1, d);
1178                                 M_ZAPNOT_IMM(d, 0x7f, d);
1179                                 }
1180                         else {
1181                                 LCONST(REG_ITMP2, iptr->val.l);
1182                                 M_AND(s1, REG_ITMP2, d);
1183                                 M_BGEZ(s1, 3);
1184                                 M_LSUB(REG_ZERO, s1, d);
1185                                 M_AND(d, REG_ITMP2, d);
1186                                 }
1187                         M_LSUB(REG_ZERO, d, d);
1188                         store_reg_to_var_int(iptr->dst, d);
1189                         break;
1190
1191                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1192                 case ICMD_LOR:
1193
1194                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1195                         var_to_reg_int(s2, src, REG_ITMP2);
1196                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1197                         M_OR( s1,s2, d);
1198                         store_reg_to_var_int(iptr->dst, d);
1199                         break;
1200
1201                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1202                                       /* val.i = constant                             */
1203
1204                         var_to_reg_int(s1, src, REG_ITMP1);
1205                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1206                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1207                                 M_OR_IMM(s1, iptr->val.i, d);
1208                                 }
1209                         else {
1210                                 ICONST(REG_ITMP2, iptr->val.i);
1211                                 M_OR(s1, REG_ITMP2, d);
1212                                 }
1213                         store_reg_to_var_int(iptr->dst, d);
1214                         break;
1215
1216                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1217                                       /* val.l = constant                             */
1218
1219                         var_to_reg_int(s1, src, REG_ITMP1);
1220                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1221                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1222                                 M_OR_IMM(s1, iptr->val.l, d);
1223                                 }
1224                         else {
1225                                 LCONST(REG_ITMP2, iptr->val.l);
1226                                 M_OR(s1, REG_ITMP2, d);
1227                                 }
1228                         store_reg_to_var_int(iptr->dst, d);
1229                         break;
1230
1231                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1232                 case ICMD_LXOR:
1233
1234                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1235                         var_to_reg_int(s2, src, REG_ITMP2);
1236                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1237                         M_XOR(s1, s2, d);
1238                         store_reg_to_var_int(iptr->dst, d);
1239                         break;
1240
1241                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1242                                       /* val.i = constant                             */
1243
1244                         var_to_reg_int(s1, src, REG_ITMP1);
1245                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1246                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1247                                 M_XOR_IMM(s1, iptr->val.i, d);
1248                                 }
1249                         else {
1250                                 ICONST(REG_ITMP2, iptr->val.i);
1251                                 M_XOR(s1, REG_ITMP2, d);
1252                                 }
1253                         store_reg_to_var_int(iptr->dst, d);
1254                         break;
1255
1256                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1257                                       /* val.l = constant                             */
1258
1259                         var_to_reg_int(s1, src, REG_ITMP1);
1260                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1261                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1262                                 M_XOR_IMM(s1, iptr->val.l, d);
1263                                 }
1264                         else {
1265                                 LCONST(REG_ITMP2, iptr->val.l);
1266                                 M_XOR(s1, REG_ITMP2, d);
1267                                 }
1268                         store_reg_to_var_int(iptr->dst, d);
1269                         break;
1270
1271
1272                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1273
1274                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1275                         var_to_reg_int(s2, src, REG_ITMP2);
1276                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1277                         M_CMPLT(s1, s2, REG_ITMP3);
1278                         M_CMPLT(s2, s1, REG_ITMP1);
1279                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1280                         store_reg_to_var_int(iptr->dst, d);
1281                         break;
1282
1283
1284                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1285                                       /* op1 = variable, val.i = constant             */
1286
1287                         var = &(rd->locals[iptr->op1][TYPE_INT]);
1288                         if (var->flags & INMEMORY) {
1289                                 s1 = REG_ITMP1;
1290                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1291                                 }
1292                         else
1293                                 s1 = var->regoff;
1294                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1295                                 M_IADD_IMM(s1, iptr->val.i, s1);
1296                                 }
1297                         else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1298                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1299                                 }
1300                         else {
1301                                 M_LDA (s1, s1, iptr->val.i);
1302                                 M_IADD(s1, REG_ZERO, s1);
1303                                 }
1304                         if (var->flags & INMEMORY)
1305                                 M_LST(s1, REG_SP, 8 * var->regoff);
1306                         break;
1307
1308
1309                 /* floating operations ************************************************/
1310
1311                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1312
1313                         var_to_reg_flt(s1, src, REG_FTMP1);
1314                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1315                         M_FMOVN(s1, d);
1316                         store_reg_to_var_flt(iptr->dst, d);
1317                         break;
1318
1319                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1320
1321                         var_to_reg_flt(s1, src, REG_FTMP1);
1322                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1323                         M_FMOVN(s1, d);
1324                         store_reg_to_var_flt(iptr->dst, d);
1325                         break;
1326
1327                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1328
1329                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1330                         var_to_reg_flt(s2, src, REG_FTMP2);
1331                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1332                         if (opt_noieee) {
1333                                 M_FADD(s1, s2, d);
1334                                 }
1335                         else {
1336                                 if (d == s1 || d == s2) {
1337                                         M_FADDS(s1, s2, REG_FTMP3);
1338                                         M_TRAPB;
1339                                         M_FMOV(REG_FTMP3, d);
1340                                         }
1341                                 else {
1342                                         M_FADDS(s1, s2, d);
1343                                         M_TRAPB;
1344                                         }
1345                                 }
1346                         store_reg_to_var_flt(iptr->dst, d);
1347                         break;
1348
1349                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1350
1351                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1352                         var_to_reg_flt(s2, src, REG_FTMP2);
1353                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1354                         if (opt_noieee) {
1355                                 M_DADD(s1, s2, d);
1356                                 }
1357                         else {
1358                                 if (d == s1 || d == s2) {
1359                                         M_DADDS(s1, s2, REG_FTMP3);
1360                                         M_TRAPB;
1361                                         M_FMOV(REG_FTMP3, d);
1362                                         }
1363                                 else {
1364                                         M_DADDS(s1, s2, d);
1365                                         M_TRAPB;
1366                                         }
1367                                 }
1368                         store_reg_to_var_flt(iptr->dst, d);
1369                         break;
1370
1371                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1372
1373                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1374                         var_to_reg_flt(s2, src, REG_FTMP2);
1375                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1376                         if (opt_noieee) {
1377                                 M_FSUB(s1, s2, d);
1378                                 }
1379                         else {
1380                                 if (d == s1 || d == s2) {
1381                                         M_FSUBS(s1, s2, REG_FTMP3);
1382                                         M_TRAPB;
1383                                         M_FMOV(REG_FTMP3, d);
1384                                         }
1385                                 else {
1386                                         M_FSUBS(s1, s2, d);
1387                                         M_TRAPB;
1388                                         }
1389                                 }
1390                         store_reg_to_var_flt(iptr->dst, d);
1391                         break;
1392
1393                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1394
1395                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1396                         var_to_reg_flt(s2, src, REG_FTMP2);
1397                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1398                         if (opt_noieee) {
1399                                 M_DSUB(s1, s2, d);
1400                                 }
1401                         else {
1402                                 if (d == s1 || d == s2) {
1403                                         M_DSUBS(s1, s2, REG_FTMP3);
1404                                         M_TRAPB;
1405                                         M_FMOV(REG_FTMP3, d);
1406                                         }
1407                                 else {
1408                                         M_DSUBS(s1, s2, d);
1409                                         M_TRAPB;
1410                                         }
1411                                 }
1412                         store_reg_to_var_flt(iptr->dst, d);
1413                         break;
1414
1415                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1416
1417                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1418                         var_to_reg_flt(s2, src, REG_FTMP2);
1419                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1420                         if (opt_noieee) {
1421                                 M_FMUL(s1, s2, d);
1422                                 }
1423                         else {
1424                                 if (d == s1 || d == s2) {
1425                                         M_FMULS(s1, s2, REG_FTMP3);
1426                                         M_TRAPB;
1427                                         M_FMOV(REG_FTMP3, d);
1428                                         }
1429                                 else {
1430                                         M_FMULS(s1, s2, d);
1431                                         M_TRAPB;
1432                                         }
1433                                 }
1434                         store_reg_to_var_flt(iptr->dst, d);
1435                         break;
1436
1437                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1438
1439                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1440                         var_to_reg_flt(s2, src, REG_FTMP2);
1441                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1442                         if (opt_noieee) {
1443                                 M_DMUL(s1, s2, d);
1444                                 }
1445                         else {
1446                                 if (d == s1 || d == s2) {
1447                                         M_DMULS(s1, s2, REG_FTMP3);
1448                                         M_TRAPB;
1449                                         M_FMOV(REG_FTMP3, d);
1450                                         }
1451                                 else {
1452                                         M_DMULS(s1, s2, d);
1453                                         M_TRAPB;
1454                                         }
1455                                 }
1456                         store_reg_to_var_flt(iptr->dst, d);
1457                         break;
1458
1459                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1460
1461                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1462                         var_to_reg_flt(s2, src, REG_FTMP2);
1463                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1464                         if (opt_noieee) {
1465                                 M_FDIV(s1, s2, d);
1466                                 }
1467                         else {
1468                                 if (d == s1 || d == s2) {
1469                                         M_FDIVS(s1, s2, REG_FTMP3);
1470                                         M_TRAPB;
1471                                         M_FMOV(REG_FTMP3, d);
1472                                         }
1473                                 else {
1474                                         M_FDIVS(s1, s2, d);
1475                                         M_TRAPB;
1476                                         }
1477                                 }
1478                         store_reg_to_var_flt(iptr->dst, d);
1479                         break;
1480
1481                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1482
1483                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1484                         var_to_reg_flt(s2, src, REG_FTMP2);
1485                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1486                         if (opt_noieee) {
1487                                 M_DDIV(s1, s2, d);
1488                                 }
1489                         else {
1490                                 if (d == s1 || d == s2) {
1491                                         M_DDIVS(s1, s2, REG_FTMP3);
1492                                         M_TRAPB;
1493                                         M_FMOV(REG_FTMP3, d);
1494                                         }
1495                                 else {
1496                                         M_DDIVS(s1, s2, d);
1497                                         M_TRAPB;
1498                                         }
1499                                 }
1500                         store_reg_to_var_flt(iptr->dst, d);
1501                         break;
1502
1503                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1504                 case ICMD_L2F:
1505                         var_to_reg_int(s1, src, REG_ITMP1);
1506                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1507                         a = dseg_adddouble(cd, 0.0);
1508                         M_LST (s1, REG_PV, a);
1509                         M_DLD (d, REG_PV, a);
1510                         M_CVTLF(d, d);
1511                         store_reg_to_var_flt(iptr->dst, d);
1512                         break;
1513
1514                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1515                 case ICMD_L2D:
1516                         var_to_reg_int(s1, src, REG_ITMP1);
1517                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1518                         a = dseg_adddouble(cd, 0.0);
1519                         M_LST (s1, REG_PV, a);
1520                         M_DLD (d, REG_PV, a);
1521                         M_CVTLD(d, d);
1522                         store_reg_to_var_flt(iptr->dst, d);
1523                         break;
1524
1525                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1526                 case ICMD_D2I:
1527                         var_to_reg_flt(s1, src, REG_FTMP1);
1528                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1529                         a = dseg_adddouble(cd, 0.0);
1530                         M_CVTDL_C(s1, REG_FTMP2);
1531                         M_CVTLI(REG_FTMP2, REG_FTMP3);
1532                         M_DST (REG_FTMP3, REG_PV, a);
1533                         M_ILD (d, REG_PV, a);
1534                         store_reg_to_var_int(iptr->dst, d);
1535                         break;
1536
1537                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1538                 case ICMD_D2L:
1539                         var_to_reg_flt(s1, src, REG_FTMP1);
1540                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1541                         a = dseg_adddouble(cd, 0.0);
1542                         M_CVTDL_C(s1, REG_FTMP2);
1543                         M_DST (REG_FTMP2, REG_PV, a);
1544                         M_LLD (d, REG_PV, a);
1545                         store_reg_to_var_int(iptr->dst, d);
1546                         break;
1547
1548                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1549
1550                         var_to_reg_flt(s1, src, REG_FTMP1);
1551                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1552                         M_CVTFDS(s1, d);
1553                         M_TRAPB;
1554                         store_reg_to_var_flt(iptr->dst, d);
1555                         break;
1556
1557                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1558
1559                         var_to_reg_flt(s1, src, REG_FTMP1);
1560                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1561                         if (opt_noieee) {
1562                                 M_CVTDF(s1, d);
1563                                 }
1564                         else {
1565                                 M_CVTDFS(s1, d);
1566                                 M_TRAPB;
1567                                 }
1568                         store_reg_to_var_flt(iptr->dst, d);
1569                         break;
1570
1571                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1572                 case ICMD_DCMPL:
1573                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1574                         var_to_reg_flt(s2, src, REG_FTMP2);
1575                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1576                         if (opt_noieee) {
1577                                 M_LSUB_IMM(REG_ZERO, 1, d);
1578                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1579                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1580                                 M_CLR   (d);
1581                                 M_FCMPLT(s2, s1, REG_FTMP3);
1582                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1583                                 M_LADD_IMM(REG_ZERO, 1, d);
1584                                 }
1585                         else {
1586                                 M_LSUB_IMM(REG_ZERO, 1, d);
1587                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1588                                 M_TRAPB;
1589                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1590                                 M_CLR   (d);
1591                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1592                                 M_TRAPB;
1593                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1594                                 M_LADD_IMM(REG_ZERO, 1, d);
1595                                 }
1596                         store_reg_to_var_int(iptr->dst, d);
1597                         break;
1598
1599                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1600                 case ICMD_DCMPG:
1601                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1602                         var_to_reg_flt(s2, src, REG_FTMP2);
1603                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1604                         if (opt_noieee) {
1605                                 M_LADD_IMM(REG_ZERO, 1, d);
1606                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1607                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1608                                 M_CLR   (d);
1609                                 M_FCMPLT(s1, s2, REG_FTMP3);
1610                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1611                                 M_LSUB_IMM(REG_ZERO, 1, d);
1612                                 }
1613                         else {
1614                                 M_LADD_IMM(REG_ZERO, 1, d);
1615                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1616                                 M_TRAPB;
1617                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1618                                 M_CLR   (d);
1619                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1620                                 M_TRAPB;
1621                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1622                                 M_LSUB_IMM(REG_ZERO, 1, d);
1623                                 }
1624                         store_reg_to_var_int(iptr->dst, d);
1625                         break;
1626
1627
1628                 /* memory operations **************************************************/
1629
1630                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1631
1632                         var_to_reg_int(s1, src, REG_ITMP1);
1633                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1634                         gen_nullptr_check(s1);
1635                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1636                         store_reg_to_var_int(iptr->dst, d);
1637                         break;
1638
1639                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1640
1641                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1642                         var_to_reg_int(s2, src, REG_ITMP2);
1643                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1644                         if (iptr->op1 == 0) {
1645                                 gen_nullptr_check(s1);
1646                                 gen_bound_check;
1647                                 }
1648                         M_SAADDQ(s2, s1, REG_ITMP1);
1649                         M_ALD( d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1650                         store_reg_to_var_int(iptr->dst, d);
1651                         break;
1652
1653                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1654
1655                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1656                         var_to_reg_int(s2, src, REG_ITMP2);
1657                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1658                         if (iptr->op1 == 0) {
1659                                 gen_nullptr_check(s1);
1660                                 gen_bound_check;
1661                                 }
1662                         M_S8ADDQ(s2, s1, REG_ITMP1);
1663                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1664                         store_reg_to_var_int(iptr->dst, d);
1665                         break;
1666
1667                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1668
1669                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1670                         var_to_reg_int(s2, src, REG_ITMP2);
1671                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1672                         if (iptr->op1 == 0) {
1673                                 gen_nullptr_check(s1);
1674                                 gen_bound_check;
1675                                 }
1676
1677                         M_S4ADDQ(s2, s1, REG_ITMP1);
1678                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1679                         store_reg_to_var_int(iptr->dst, d);
1680                         break;
1681
1682                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1683
1684                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1685                         var_to_reg_int(s2, src, REG_ITMP2);
1686                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1687                         if (iptr->op1 == 0) {
1688                                 gen_nullptr_check(s1);
1689                                 gen_bound_check;
1690                                 }
1691                         M_S4ADDQ(s2, s1, REG_ITMP1);
1692                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1693                         store_reg_to_var_flt(iptr->dst, d);
1694                         break;
1695
1696                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1697
1698                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1699                         var_to_reg_int(s2, src, REG_ITMP2);
1700                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1701                         if (iptr->op1 == 0) {
1702                                 gen_nullptr_check(s1);
1703                                 gen_bound_check;
1704                                 }
1705                         M_S8ADDQ(s2, s1, REG_ITMP1);
1706                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1707                         store_reg_to_var_flt(iptr->dst, d);
1708                         break;
1709
1710                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1711
1712                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1713                         var_to_reg_int(s2, src, REG_ITMP2);
1714                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1715                         if (iptr->op1 == 0) {
1716                                 gen_nullptr_check(s1);
1717                                 gen_bound_check;
1718                                 }
1719                         if (has_ext_instr_set) {
1720                                 M_LADD(s2, s1, REG_ITMP1);
1721                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1722                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1723                                 }
1724                         else {
1725                                 M_LADD (s2, s1, REG_ITMP1);
1726                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1727                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1728                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1729                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
1730                                 }
1731                         store_reg_to_var_int(iptr->dst, d);
1732                         break;
1733
1734                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1735
1736                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1737                         var_to_reg_int(s2, src, REG_ITMP2);
1738                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1739                         if (iptr->op1 == 0) {
1740                                 gen_nullptr_check(s1);
1741                                 gen_bound_check;
1742                                 }
1743                         if (has_ext_instr_set) {
1744                                 M_LADD(s2, s1, REG_ITMP1);
1745                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1746                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
1747                                 M_SSEXT(d, d);
1748                                 }
1749                         else {
1750                                 M_LADD(s2, s1, REG_ITMP1);
1751                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1752                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1753                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
1754                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1755                                 M_SRA_IMM(d, 48, d);
1756                                 }
1757                         store_reg_to_var_int(iptr->dst, d);
1758                         break;
1759
1760                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1761
1762                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1763                         var_to_reg_int(s2, src, REG_ITMP2);
1764                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1765                         if (iptr->op1 == 0) {
1766                                 gen_nullptr_check(s1);
1767                                 gen_bound_check;
1768                                 }
1769                         if (has_ext_instr_set) {
1770                                 M_LADD   (s2, s1, REG_ITMP1);
1771                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
1772                                 M_BSEXT  (d, d);
1773                                 }
1774                         else {
1775                                 M_LADD(s2, s1, REG_ITMP1);
1776                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1777                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
1778                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1779                                 M_SRA_IMM(d, 56, d);
1780                                 }
1781                         store_reg_to_var_int(iptr->dst, d);
1782                         break;
1783
1784
1785                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1786
1787                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1788                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1789                         if (iptr->op1 == 0) {
1790                                 gen_nullptr_check(s1);
1791                                 gen_bound_check;
1792                         }
1793                         var_to_reg_int(s3, src, REG_ITMP3);
1794                         M_S8ADDQ(s2, s1, REG_ITMP1);
1795                         M_LST(s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1796                         break;
1797
1798                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1799
1800                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1801                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1802                         if (iptr->op1 == 0) {
1803                                 gen_nullptr_check(s1);
1804                                 gen_bound_check;
1805                         }
1806                         var_to_reg_int(s3, src, REG_ITMP3);
1807                         M_S4ADDQ(s2, s1, REG_ITMP1);
1808                         M_IST(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1809                         break;
1810
1811                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1812
1813                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1814                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1815                         if (iptr->op1 == 0) {
1816                                 gen_nullptr_check(s1);
1817                                 gen_bound_check;
1818                         }
1819                         var_to_reg_flt(s3, src, REG_FTMP3);
1820                         M_S4ADDQ(s2, s1, REG_ITMP1);
1821                         M_FST(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1822                         break;
1823
1824                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1825
1826                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1827                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1828                         if (iptr->op1 == 0) {
1829                                 gen_nullptr_check(s1);
1830                                 gen_bound_check;
1831                         }
1832                         var_to_reg_flt(s3, src, REG_FTMP3);
1833                         M_S8ADDQ(s2, s1, REG_ITMP1);
1834                         M_DST(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1835                         break;
1836
1837                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1838
1839                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1840                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1841                         if (iptr->op1 == 0) {
1842                                 gen_nullptr_check(s1);
1843                                 gen_bound_check;
1844                         }
1845                         var_to_reg_int(s3, src, REG_ITMP3);
1846                         if (has_ext_instr_set) {
1847                                 M_LADD(s2, s1, REG_ITMP1);
1848                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1849                                 M_SST(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1850                         } else {
1851                                 M_LADD(s2, s1, REG_ITMP1);
1852                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1853                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1854                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1855                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1856                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1857                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1858                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1859                         }
1860                         break;
1861
1862                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1863
1864                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1865                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1866                         if (iptr->op1 == 0) {
1867                                 gen_nullptr_check(s1);
1868                                 gen_bound_check;
1869                         }
1870                         var_to_reg_int(s3, src, REG_ITMP3);
1871                         if (has_ext_instr_set) {
1872                                 M_LADD(s2, s1, REG_ITMP1);
1873                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1874                                 M_SST(s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1875                         } else {
1876                                 M_LADD(s2, s1, REG_ITMP1);
1877                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1878                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1879                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1880                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1881                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1882                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1883                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1884                         }
1885                         break;
1886
1887                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1888
1889                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1890                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1891                         if (iptr->op1 == 0) {
1892                                 gen_nullptr_check(s1);
1893                                 gen_bound_check;
1894                         }
1895                         var_to_reg_int(s3, src, REG_ITMP3);
1896                         if (has_ext_instr_set) {
1897                                 M_LADD(s2, s1, REG_ITMP1);
1898                                 M_BST(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1899                         } else {
1900                                 M_LADD(s2, s1, REG_ITMP1);
1901                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1902                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1903                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
1904                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1905                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1906                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1907                         }
1908                         break;
1909
1910                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1911
1912                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1913                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1914 /*                      if (iptr->op1 == 0) { */
1915                                 gen_nullptr_check(s1);
1916                                 gen_bound_check;
1917 /*                      } */
1918                         var_to_reg_int(s3, src, REG_ITMP3);
1919
1920                         M_MOV(s1, rd->argintregs[0]);
1921                         M_MOV(s3, rd->argintregs[1]);
1922                         bte = iptr->val.a;
1923                         disp = dseg_addaddress(cd, bte->fp);
1924                         M_ALD(REG_PV, REG_PV, disp);
1925                         M_JSR(REG_RA, REG_PV);
1926
1927                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
1928                         if (disp <= 32768)
1929                                 M_LDA(REG_PV, REG_RA, -disp);
1930                         else {
1931                                 s4 ml = -disp, mh = 0;
1932                                 while (ml < -32768) { ml += 65536; mh--; }
1933                                 M_LDA(REG_PV, REG_RA, ml);
1934                                 M_LDAH(REG_PV, REG_PV, mh);
1935                         }
1936
1937                         M_BEQZ(REG_RESULT, 0);
1938                         codegen_addxstorerefs(cd, mcodeptr);
1939
1940                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1941                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1942                         var_to_reg_int(s3, src, REG_ITMP3);
1943                         M_SAADDQ(s2, s1, REG_ITMP1);
1944                         M_AST(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1945                         break;
1946
1947
1948                 case ICMD_IASTORECONST:   /* ..., arrayref, index  ==> ...            */
1949
1950                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1951                         var_to_reg_int(s2, src, REG_ITMP2);
1952                         if (iptr->op1 == 0) {
1953                                 gen_nullptr_check(s1);
1954                                 gen_bound_check;
1955                         }
1956                         M_S4ADDQ(s2, s1, REG_ITMP1);
1957                         M_IST(REG_ZERO, REG_ITMP1, OFFSET(java_intarray, data[0]));
1958                         break;
1959
1960                 case ICMD_LASTORECONST:   /* ..., arrayref, index  ==> ...            */
1961
1962                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1963                         var_to_reg_int(s2, src, REG_ITMP2);
1964                         if (iptr->op1 == 0) {
1965                                 gen_nullptr_check(s1);
1966                                 gen_bound_check;
1967                         }
1968                         M_S8ADDQ(s2, s1, REG_ITMP1);
1969                         M_LST(REG_ZERO, REG_ITMP1, OFFSET(java_longarray, data[0]));
1970                         break;
1971
1972                 case ICMD_AASTORECONST:   /* ..., arrayref, index  ==> ...            */
1973
1974                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1975                         var_to_reg_int(s2, src, REG_ITMP2);
1976                         if (iptr->op1 == 0) {
1977                                 gen_nullptr_check(s1);
1978                                 gen_bound_check;
1979                         }
1980                         M_SAADDQ(s2, s1, REG_ITMP1);
1981                         M_AST(REG_ZERO, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1982                         break;
1983
1984                 case ICMD_BASTORECONST:   /* ..., arrayref, index  ==> ...            */
1985
1986                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1987                         var_to_reg_int(s2, src, REG_ITMP2);
1988                         if (iptr->op1 == 0) {
1989                                 gen_nullptr_check(s1);
1990                                 gen_bound_check;
1991                         }
1992                         if (has_ext_instr_set) {
1993                                 M_LADD(s2, s1, REG_ITMP1);
1994                                 M_BST(REG_ZERO, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1995
1996                         } else {
1997                                 M_LADD(s2, s1, REG_ITMP1);
1998                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1999                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2000                                 M_INSBL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2001                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2002                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2003                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2004                         }
2005                         break;
2006
2007                 case ICMD_CASTORECONST:   /* ..., arrayref, index  ==> ...            */
2008
2009                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2010                         var_to_reg_int(s2, src, REG_ITMP2);
2011                         if (iptr->op1 == 0) {
2012                                 gen_nullptr_check(s1);
2013                                 gen_bound_check;
2014                         }
2015                         if (has_ext_instr_set) {
2016                                 M_LADD(s2, s1, REG_ITMP1);
2017                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2018                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_chararray, data[0]));
2019
2020                         } else {
2021                                 M_LADD(s2, s1, REG_ITMP1);
2022                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2023                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2024                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2025                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2026                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2027                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2028                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2029                         }
2030                         break;
2031
2032                 case ICMD_SASTORECONST:   /* ..., arrayref, index  ==> ...            */
2033
2034                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2035                         var_to_reg_int(s2, src, REG_ITMP2);
2036                         if (iptr->op1 == 0) {
2037                                 gen_nullptr_check(s1);
2038                                 gen_bound_check;
2039                         }
2040                         if (has_ext_instr_set) {
2041                                 M_LADD(s2, s1, REG_ITMP1);
2042                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2043                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2044
2045                         } else {
2046                                 M_LADD(s2, s1, REG_ITMP1);
2047                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2048                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2049                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2050                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2051                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2052                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2053                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2054                         }
2055                         break;
2056
2057
2058                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2059                                       /* op1 = type, val.a = field address            */
2060
2061                         if (!iptr->val.a) {
2062                                 codegen_addpatchref(cd, mcodeptr,
2063                                                                         PATCHER_get_putstatic,
2064                                                                         (unresolved_field *) iptr->target);
2065
2066                                 if (opt_showdisassemble)
2067                                         M_NOP;
2068
2069                                 a = 0;
2070
2071                         } else {
2072                                 fieldinfo *fi = iptr->val.a;
2073
2074                                 if (!fi->class->initialized) {
2075                                         codegen_addpatchref(cd, mcodeptr,
2076                                                                                 PATCHER_clinit, fi->class);
2077
2078                                         if (opt_showdisassemble)
2079                                                 M_NOP;
2080                                 }
2081
2082                                 a = (ptrint) &(fi->value);
2083                         }
2084
2085                         a = dseg_addaddress(cd, a);
2086                         M_ALD(REG_ITMP1, REG_PV, a);
2087                         switch (iptr->op1) {
2088                         case TYPE_INT:
2089                                 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2090                                 M_ILD(d, REG_ITMP1, 0);
2091                                 store_reg_to_var_int(iptr->dst, d);
2092                                 break;
2093                         case TYPE_LNG:
2094                                 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2095                                 M_LLD(d, REG_ITMP1, 0);
2096                                 store_reg_to_var_int(iptr->dst, d);
2097                                 break;
2098                         case TYPE_ADR:
2099                                 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2100                                 M_ALD(d, REG_ITMP1, 0);
2101                                 store_reg_to_var_int(iptr->dst, d);
2102                                 break;
2103                         case TYPE_FLT:
2104                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2105                                 M_FLD(d, REG_ITMP1, 0);
2106                                 store_reg_to_var_flt(iptr->dst, d);
2107                                 break;
2108                         case TYPE_DBL:
2109                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2110                                 M_DLD(d, REG_ITMP1, 0);
2111                                 store_reg_to_var_flt(iptr->dst, d);
2112                                 break;
2113                         }
2114                         break;
2115
2116                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2117                                       /* op1 = type, val.a = field address            */
2118
2119                         if (!iptr->val.a) {
2120                                 codegen_addpatchref(cd, mcodeptr,
2121                                                                         PATCHER_get_putstatic,
2122                                                                         (unresolved_field *) iptr->target);
2123
2124                                 if (opt_showdisassemble)
2125                                         M_NOP;
2126
2127                                 a = 0;
2128
2129                         } else {
2130                                 fieldinfo *fi = iptr->val.a;
2131
2132                                 if (!fi->class->initialized) {
2133                                         codegen_addpatchref(cd, mcodeptr,
2134                                                                                 PATCHER_clinit, fi->class);
2135
2136                                         if (opt_showdisassemble)
2137                                                 M_NOP;
2138                                 }
2139
2140                                 a = (ptrint) &(fi->value);
2141                         }
2142
2143                         a = dseg_addaddress(cd, a);
2144                         M_ALD(REG_ITMP1, REG_PV, a);
2145                         switch (iptr->op1) {
2146                         case TYPE_INT:
2147                                 var_to_reg_int(s2, src, REG_ITMP2);
2148                                 M_IST(s2, REG_ITMP1, 0);
2149                                 break;
2150                         case TYPE_LNG:
2151                                 var_to_reg_int(s2, src, REG_ITMP2);
2152                                 M_LST(s2, REG_ITMP1, 0);
2153                                 break;
2154                         case TYPE_ADR:
2155                                 var_to_reg_int(s2, src, REG_ITMP2);
2156                                 M_AST(s2, REG_ITMP1, 0);
2157                                 break;
2158                         case TYPE_FLT:
2159                                 var_to_reg_flt(s2, src, REG_FTMP2);
2160                                 M_FST(s2, REG_ITMP1, 0);
2161                                 break;
2162                         case TYPE_DBL:
2163                                 var_to_reg_flt(s2, src, REG_FTMP2);
2164                                 M_DST(s2, REG_ITMP1, 0);
2165                                 break;
2166                         }
2167                         break;
2168
2169                 case ICMD_PUTSTATICCONST: /* ...  ==> ...                             */
2170                                           /* val = value (in current instruction)     */
2171                                           /* op1 = type, val.a = field address (in    */
2172                                           /* following NOP)                           */
2173
2174                         if (!iptr[1].val.a) {
2175                                 codegen_addpatchref(cd, mcodeptr,
2176                                                                         PATCHER_get_putstatic,
2177                                                                         (unresolved_field *) iptr[1].target);
2178
2179                                 if (opt_showdisassemble)
2180                                         M_NOP;
2181
2182                                 a = 0;
2183
2184                         } else {
2185                                 fieldinfo *fi = iptr[1].val.a;
2186
2187                                 if (!fi->class->initialized) {
2188                                         codegen_addpatchref(cd, mcodeptr,
2189                                                                                 PATCHER_clinit, fi->class);
2190
2191                                         if (opt_showdisassemble)
2192                                                 M_NOP;
2193                                 }
2194
2195                                 a = (ptrint) &(fi->value);
2196                         }
2197
2198                         a = dseg_addaddress(cd, a);
2199                         M_ALD(REG_ITMP1, REG_PV, a);
2200                         switch (iptr->op1) {
2201                         case TYPE_INT:
2202                                 M_IST(REG_ZERO, REG_ITMP1, 0);
2203                                 break;
2204                         case TYPE_LNG:
2205                                 M_LST(REG_ZERO, REG_ITMP1, 0);
2206                                 break;
2207                         case TYPE_ADR:
2208                                 M_AST(REG_ZERO, REG_ITMP1, 0);
2209                                 break;
2210                         case TYPE_FLT:
2211                                 M_FST(REG_ZERO, REG_ITMP1, 0);
2212                                 break;
2213                         case TYPE_DBL:
2214                                 M_DST(REG_ZERO, REG_ITMP1, 0);
2215                                 break;
2216                         }
2217                         break;
2218
2219
2220                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2221                                       /* op1 = type, val.i = field offset             */
2222
2223                         var_to_reg_int(s1, src, REG_ITMP1);
2224                         gen_nullptr_check(s1);
2225
2226                         if (!iptr->val.a) {
2227                                 codegen_addpatchref(cd, mcodeptr,
2228                                                                         PATCHER_get_putfield,
2229                                                                         (unresolved_field *) iptr->target);
2230
2231                                 if (opt_showdisassemble)
2232                                         M_NOP;
2233
2234                                 a = 0;
2235
2236                         } else {
2237                                 a = ((fieldinfo *) (iptr->val.a))->offset;
2238                         }
2239
2240                         switch (iptr->op1) {
2241                         case TYPE_INT:
2242                                 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2243                                 M_ILD(d, s1, a);
2244                                 store_reg_to_var_int(iptr->dst, d);
2245                                 break;
2246                         case TYPE_LNG:
2247                                 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2248                                 M_LLD(d, s1, a);
2249                                 store_reg_to_var_int(iptr->dst, d);
2250                                 break;
2251                         case TYPE_ADR:
2252                                 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2253                                 M_ALD(d, s1, a);
2254                                 store_reg_to_var_int(iptr->dst, d);
2255                                 break;
2256                         case TYPE_FLT:
2257                                 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
2258                                 M_FLD(d, s1, a);
2259                                 store_reg_to_var_flt(iptr->dst, d);
2260                                 break;
2261                         case TYPE_DBL:
2262                                 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
2263                                 M_DLD(d, s1, a);
2264                                 store_reg_to_var_flt(iptr->dst, d);
2265                                 break;
2266                         }
2267                         break;
2268
2269                 case ICMD_PUTFIELD:   /* ..., objectref, value  ==> ...               */
2270                                       /* op1 = type, val.a = field address            */
2271
2272                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2273                         gen_nullptr_check(s1);
2274
2275                         if (!IS_FLT_DBL_TYPE(iptr->op1)) {
2276                                 var_to_reg_int(s2, src, REG_ITMP2);
2277                         } else {
2278                                 var_to_reg_flt(s2, src, REG_FTMP2);
2279                         }
2280
2281                         if (!iptr->val.a) {
2282                                 codegen_addpatchref(cd, mcodeptr,
2283                                                                         PATCHER_get_putfield,
2284                                                                         (unresolved_field *) iptr->target);
2285
2286                                 if (opt_showdisassemble)
2287                                         M_NOP;
2288
2289                                 a = 0;
2290
2291                         } else {
2292                                 a = ((fieldinfo *) (iptr->val.a))->offset;
2293                         }
2294
2295                         switch (iptr->op1) {
2296                         case TYPE_INT:
2297                                 M_IST(s2, s1, a);
2298                                 break;
2299                         case TYPE_LNG:
2300                                 M_LST(s2, s1, a);
2301                                 break;
2302                         case TYPE_ADR:
2303                                 M_AST(s2, s1, a);
2304                                 break;
2305                         case TYPE_FLT:
2306                                 M_FST(s2, s1, a);
2307                                 break;
2308                         case TYPE_DBL:
2309                                 M_DST(s2, s1, a);
2310                                 break;
2311                         }
2312                         break;
2313
2314                 case ICMD_PUTFIELDCONST:  /* ..., objectref  ==> ...                  */
2315                                           /* val = value (in current instruction)     */
2316                                           /* op1 = type, val.a = field address (in    */
2317                                           /* following NOP)                           */
2318
2319                         var_to_reg_int(s1, src, REG_ITMP1);
2320                         gen_nullptr_check(s1);
2321
2322                         if (!iptr[1].val.a) {
2323                                 codegen_addpatchref(cd, mcodeptr,
2324                                                                         PATCHER_get_putfield,
2325                                                                         (unresolved_field *) iptr[1].target);
2326
2327                                 if (opt_showdisassemble)
2328                                         M_NOP;
2329
2330                                 a = 0;
2331
2332                         } else {
2333                                 a = ((fieldinfo *) (iptr[1].val.a))->offset;
2334                         }
2335
2336                         switch (iptr[1].op1) {
2337                         case TYPE_INT:
2338                                 M_IST(REG_ZERO, s1, a);
2339                                 break;
2340                         case TYPE_LNG:
2341                                 M_LST(REG_ZERO, s1, a);
2342                                 break;
2343                         case TYPE_ADR:
2344                                 M_AST(REG_ZERO, s1, a);
2345                                 break;
2346                         case TYPE_FLT:
2347                                 M_FST(REG_ZERO, s1, a);
2348                                 break;
2349                         case TYPE_DBL:
2350                                 M_DST(REG_ZERO, s1, a);
2351                                 break;
2352                         }
2353                         break;
2354
2355
2356                 /* branch operations **************************************************/
2357
2358                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2359
2360                         var_to_reg_int(s1, src, REG_ITMP1);
2361                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2362                         a = dseg_addaddress(cd, asm_handle_exception);
2363                         M_ALD(REG_ITMP2, REG_PV, a);
2364                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2365                         M_NOP;              /* nop ensures that XPC is less than the end */
2366                                             /* of basic block                            */
2367                         ALIGNCODENOP;
2368                         break;
2369
2370                 case ICMD_GOTO:         /* ... ==> ...                                */
2371                                         /* op1 = target JavaVM pc                     */
2372                         M_BR(0);
2373                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2374                         ALIGNCODENOP;
2375                         break;
2376
2377                 case ICMD_JSR:          /* ... ==> ...                                */
2378                                         /* op1 = target JavaVM pc                     */
2379
2380                         M_BSR(REG_ITMP1, 0);
2381                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2382                         break;
2383
2384                 case ICMD_RET:          /* ... ==> ...                                */
2385                                         /* op1 = local variable                       */
2386
2387                         var = &(rd->locals[iptr->op1][TYPE_ADR]);
2388                         if (var->flags & INMEMORY) {
2389                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2390                                 M_RET(REG_ZERO, REG_ITMP1);
2391                                 }
2392                         else
2393                                 M_RET(REG_ZERO, var->regoff);
2394                         ALIGNCODENOP;
2395                         break;
2396
2397                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2398                                         /* op1 = target JavaVM pc                     */
2399
2400                         var_to_reg_int(s1, src, REG_ITMP1);
2401                         M_BEQZ(s1, 0);
2402                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2403                         break;
2404
2405                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2406                                         /* op1 = target JavaVM pc                     */
2407
2408                         var_to_reg_int(s1, src, REG_ITMP1);
2409                         M_BNEZ(s1, 0);
2410                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2411                         break;
2412
2413                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2414                                         /* op1 = target JavaVM pc, val.i = constant   */
2415
2416                         var_to_reg_int(s1, src, REG_ITMP1);
2417                         if (iptr->val.i == 0) {
2418                                 M_BEQZ(s1, 0);
2419                                 }
2420                         else {
2421                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2422                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2423                                         }
2424                                 else {
2425                                         ICONST(REG_ITMP2, iptr->val.i);
2426                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2427                                         }
2428                                 M_BNEZ(REG_ITMP1, 0);
2429                                 }
2430                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2431                         break;
2432
2433                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2434                                         /* op1 = target JavaVM pc, val.i = constant   */
2435
2436                         var_to_reg_int(s1, src, REG_ITMP1);
2437                         if (iptr->val.i == 0) {
2438                                 M_BLTZ(s1, 0);
2439                                 }
2440                         else {
2441                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2442                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2443                                         }
2444                                 else {
2445                                         ICONST(REG_ITMP2, iptr->val.i);
2446                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2447                                         }
2448                                 M_BNEZ(REG_ITMP1, 0);
2449                                 }
2450                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2451                         break;
2452
2453                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2454                                         /* op1 = target JavaVM pc, val.i = constant   */
2455
2456                         var_to_reg_int(s1, src, REG_ITMP1);
2457                         if (iptr->val.i == 0) {
2458                                 M_BLEZ(s1, 0);
2459                                 }
2460                         else {
2461                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2462                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2463                                         }
2464                                 else {
2465                                         ICONST(REG_ITMP2, iptr->val.i);
2466                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2467                                         }
2468                                 M_BNEZ(REG_ITMP1, 0);
2469                                 }
2470                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2471                         break;
2472
2473                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2474                                         /* op1 = target JavaVM pc, val.i = constant   */
2475
2476                         var_to_reg_int(s1, src, REG_ITMP1);
2477                         if (iptr->val.i == 0) {
2478                                 M_BNEZ(s1, 0);
2479                                 }
2480                         else {
2481                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2482                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2483                                         }
2484                                 else {
2485                                         ICONST(REG_ITMP2, iptr->val.i);
2486                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2487                                         }
2488                                 M_BEQZ(REG_ITMP1, 0);
2489                                 }
2490                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2491                         break;
2492
2493                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2494                                         /* op1 = target JavaVM pc, val.i = constant   */
2495
2496                         var_to_reg_int(s1, src, REG_ITMP1);
2497                         if (iptr->val.i == 0) {
2498                                 M_BGTZ(s1, 0);
2499                                 }
2500                         else {
2501                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2502                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2503                                         }
2504                                 else {
2505                                         ICONST(REG_ITMP2, iptr->val.i);
2506                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2507                                         }
2508                                 M_BEQZ(REG_ITMP1, 0);
2509                                 }
2510                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2511                         break;
2512
2513                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2514                                         /* op1 = target JavaVM pc, val.i = constant   */
2515
2516                         var_to_reg_int(s1, src, REG_ITMP1);
2517                         if (iptr->val.i == 0) {
2518                                 M_BGEZ(s1, 0);
2519                                 }
2520                         else {
2521                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2522                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2523                                         }
2524                                 else {
2525                                         ICONST(REG_ITMP2, iptr->val.i);
2526                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2527                                         }
2528                                 M_BEQZ(REG_ITMP1, 0);
2529                                 }
2530                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2531                         break;
2532
2533                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2534                                         /* op1 = target JavaVM pc, val.l = constant   */
2535
2536                         var_to_reg_int(s1, src, REG_ITMP1);
2537                         if (iptr->val.l == 0) {
2538                                 M_BEQZ(s1, 0);
2539                                 }
2540                         else {
2541                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2542                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2543                                         }
2544                                 else {
2545                                         LCONST(REG_ITMP2, iptr->val.l);
2546                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2547                                         }
2548                                 M_BNEZ(REG_ITMP1, 0);
2549                                 }
2550                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2551                         break;
2552
2553                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2554                                         /* op1 = target JavaVM pc, val.l = constant   */
2555
2556                         var_to_reg_int(s1, src, REG_ITMP1);
2557                         if (iptr->val.l == 0) {
2558                                 M_BLTZ(s1, 0);
2559                                 }
2560                         else {
2561                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2562                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2563                                         }
2564                                 else {
2565                                         LCONST(REG_ITMP2, iptr->val.l);
2566                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2567                                         }
2568                                 M_BNEZ(REG_ITMP1, 0);
2569                                 }
2570                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2571                         break;
2572
2573                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2574                                         /* op1 = target JavaVM pc, val.l = constant   */
2575
2576                         var_to_reg_int(s1, src, REG_ITMP1);
2577                         if (iptr->val.l == 0) {
2578                                 M_BLEZ(s1, 0);
2579                                 }
2580                         else {
2581                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2582                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2583                                         }
2584                                 else {
2585                                         LCONST(REG_ITMP2, iptr->val.l);
2586                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2587                                         }
2588                                 M_BNEZ(REG_ITMP1, 0);
2589                                 }
2590                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2591                         break;
2592
2593                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2594                                         /* op1 = target JavaVM pc, val.l = constant   */
2595
2596                         var_to_reg_int(s1, src, REG_ITMP1);
2597                         if (iptr->val.l == 0) {
2598                                 M_BNEZ(s1, 0);
2599                                 }
2600                         else {
2601                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2602                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2603                                         }
2604                                 else {
2605                                         LCONST(REG_ITMP2, iptr->val.l);
2606                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2607                                         }
2608                                 M_BEQZ(REG_ITMP1, 0);
2609                                 }
2610                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2611                         break;
2612
2613                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2614                                         /* op1 = target JavaVM pc, val.l = constant   */
2615
2616                         var_to_reg_int(s1, src, REG_ITMP1);
2617                         if (iptr->val.l == 0) {
2618                                 M_BGTZ(s1, 0);
2619                                 }
2620                         else {
2621                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2622                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2623                                         }
2624                                 else {
2625                                         LCONST(REG_ITMP2, iptr->val.l);
2626                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2627                                         }
2628                                 M_BEQZ(REG_ITMP1, 0);
2629                                 }
2630                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2631                         break;
2632
2633                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2634                                         /* op1 = target JavaVM pc, val.l = constant   */
2635
2636                         var_to_reg_int(s1, src, REG_ITMP1);
2637                         if (iptr->val.l == 0) {
2638                                 M_BGEZ(s1, 0);
2639                                 }
2640                         else {
2641                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2642                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2643                                         }
2644                                 else {
2645                                         LCONST(REG_ITMP2, iptr->val.l);
2646                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2647                                         }
2648                                 M_BEQZ(REG_ITMP1, 0);
2649                                 }
2650                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2651                         break;
2652
2653                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2654                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2655                 case ICMD_IF_ACMPEQ:
2656
2657                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2658                         var_to_reg_int(s2, src, REG_ITMP2);
2659                         M_CMPEQ(s1, s2, REG_ITMP1);
2660                         M_BNEZ(REG_ITMP1, 0);
2661                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2662                         break;
2663
2664                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2665                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2666                 case ICMD_IF_ACMPNE:
2667
2668                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2669                         var_to_reg_int(s2, src, REG_ITMP2);
2670                         M_CMPEQ(s1, s2, REG_ITMP1);
2671                         M_BEQZ(REG_ITMP1, 0);
2672                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2673                         break;
2674
2675                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2676                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2677
2678                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2679                         var_to_reg_int(s2, src, REG_ITMP2);
2680                         M_CMPLT(s1, s2, REG_ITMP1);
2681                         M_BNEZ(REG_ITMP1, 0);
2682                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2683                         break;
2684
2685                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2686                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2687
2688                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2689                         var_to_reg_int(s2, src, REG_ITMP2);
2690                         M_CMPLE(s1, s2, REG_ITMP1);
2691                         M_BEQZ(REG_ITMP1, 0);
2692                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2693                         break;
2694
2695                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2696                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2697
2698                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2699                         var_to_reg_int(s2, src, REG_ITMP2);
2700                         M_CMPLE(s1, s2, REG_ITMP1);
2701                         M_BNEZ(REG_ITMP1, 0);
2702                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2703                         break;
2704
2705                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2706                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2707
2708                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2709                         var_to_reg_int(s2, src, REG_ITMP2);
2710                         M_CMPLT(s1, s2, REG_ITMP1);
2711                         M_BEQZ(REG_ITMP1, 0);
2712                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2713                         break;
2714
2715                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2716
2717                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2718                         break;
2719
2720                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2721                                         /* val.i = constant                           */
2722
2723                         var_to_reg_int(s1, src, REG_ITMP1);
2724                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2725                         s3 = iptr->val.i;
2726                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2727                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2728                                         M_CMPEQ(s1, REG_ZERO, d);
2729                                         store_reg_to_var_int(iptr->dst, d);
2730                                         break;
2731                                         }
2732                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2733                                         M_CMPEQ(s1, REG_ZERO, d);
2734                                         M_XOR_IMM(d, 1, d);
2735                                         store_reg_to_var_int(iptr->dst, d);
2736                                         break;
2737                                         }
2738                                 if (s1 == d) {
2739                                         M_MOV(s1, REG_ITMP1);
2740                                         s1 = REG_ITMP1;
2741                                         }
2742                                 ICONST(d, iptr[1].val.i);
2743                                 }
2744                         if ((s3 >= 0) && (s3 <= 255)) {
2745                                 M_CMOVEQ_IMM(s1, s3, d);
2746                                 }
2747                         else {
2748                                 ICONST(REG_ITMP2, s3);
2749                                 M_CMOVEQ(s1, REG_ITMP2, d);
2750                                 }
2751                         store_reg_to_var_int(iptr->dst, d);
2752                         break;
2753
2754                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2755                                         /* val.i = constant                           */
2756
2757                         var_to_reg_int(s1, src, REG_ITMP1);
2758                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2759                         s3 = iptr->val.i;
2760                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2761                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2762                                         M_CMPEQ(s1, REG_ZERO, d);
2763                                         store_reg_to_var_int(iptr->dst, d);
2764                                         break;
2765                                         }
2766                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2767                                         M_CMPEQ(s1, REG_ZERO, d);
2768                                         M_XOR_IMM(d, 1, d);
2769                                         store_reg_to_var_int(iptr->dst, d);
2770                                         break;
2771                                         }
2772                                 if (s1 == d) {
2773                                         M_MOV(s1, REG_ITMP1);
2774                                         s1 = REG_ITMP1;
2775                                         }
2776                                 ICONST(d, iptr[1].val.i);
2777                                 }
2778                         if ((s3 >= 0) && (s3 <= 255)) {
2779                                 M_CMOVNE_IMM(s1, s3, d);
2780                                 }
2781                         else {
2782                                 ICONST(REG_ITMP2, s3);
2783                                 M_CMOVNE(s1, REG_ITMP2, d);
2784                                 }
2785                         store_reg_to_var_int(iptr->dst, d);
2786                         break;
2787
2788                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2789                                         /* val.i = constant                           */
2790
2791                         var_to_reg_int(s1, src, REG_ITMP1);
2792                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2793                         s3 = iptr->val.i;
2794                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2795                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2796                                         M_CMPLT(s1, REG_ZERO, d);
2797                                         store_reg_to_var_int(iptr->dst, d);
2798                                         break;
2799                                         }
2800                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2801                                         M_CMPLE(REG_ZERO, s1, d);
2802                                         store_reg_to_var_int(iptr->dst, d);
2803                                         break;
2804                                         }
2805                                 if (s1 == d) {
2806                                         M_MOV(s1, REG_ITMP1);
2807                                         s1 = REG_ITMP1;
2808                                         }
2809                                 ICONST(d, iptr[1].val.i);
2810                                 }
2811                         if ((s3 >= 0) && (s3 <= 255)) {
2812                                 M_CMOVLT_IMM(s1, s3, d);
2813                                 }
2814                         else {
2815                                 ICONST(REG_ITMP2, s3);
2816                                 M_CMOVLT(s1, REG_ITMP2, d);
2817                                 }
2818                         store_reg_to_var_int(iptr->dst, d);
2819                         break;
2820
2821                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2822                                         /* val.i = constant                           */
2823
2824                         var_to_reg_int(s1, src, REG_ITMP1);
2825                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2826                         s3 = iptr->val.i;
2827                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2828                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2829                                         M_CMPLE(REG_ZERO, s1, d);
2830                                         store_reg_to_var_int(iptr->dst, d);
2831                                         break;
2832                                         }
2833                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2834                                         M_CMPLT(s1, REG_ZERO, d);
2835                                         store_reg_to_var_int(iptr->dst, d);
2836                                         break;
2837                                         }
2838                                 if (s1 == d) {
2839                                         M_MOV(s1, REG_ITMP1);
2840                                         s1 = REG_ITMP1;
2841                                         }
2842                                 ICONST(d, iptr[1].val.i);
2843                                 }
2844                         if ((s3 >= 0) && (s3 <= 255)) {
2845                                 M_CMOVGE_IMM(s1, s3, d);
2846                                 }
2847                         else {
2848                                 ICONST(REG_ITMP2, s3);
2849                                 M_CMOVGE(s1, REG_ITMP2, d);
2850                                 }
2851                         store_reg_to_var_int(iptr->dst, d);
2852                         break;
2853
2854                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2855                                         /* val.i = constant                           */
2856
2857                         var_to_reg_int(s1, src, REG_ITMP1);
2858                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2859                         s3 = iptr->val.i;
2860                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2861                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2862                                         M_CMPLT(REG_ZERO, s1, d);
2863                                         store_reg_to_var_int(iptr->dst, d);
2864                                         break;
2865                                         }
2866                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2867                                         M_CMPLE(s1, REG_ZERO, d);
2868                                         store_reg_to_var_int(iptr->dst, d);
2869                                         break;
2870                                         }
2871                                 if (s1 == d) {
2872                                         M_MOV(s1, REG_ITMP1);
2873                                         s1 = REG_ITMP1;
2874                                         }
2875                                 ICONST(d, iptr[1].val.i);
2876                                 }
2877                         if ((s3 >= 0) && (s3 <= 255)) {
2878                                 M_CMOVGT_IMM(s1, s3, d);
2879                                 }
2880                         else {
2881                                 ICONST(REG_ITMP2, s3);
2882                                 M_CMOVGT(s1, REG_ITMP2, d);
2883                                 }
2884                         store_reg_to_var_int(iptr->dst, d);
2885                         break;
2886
2887                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2888                                         /* val.i = constant                           */
2889
2890                         var_to_reg_int(s1, src, REG_ITMP1);
2891                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2892                         s3 = iptr->val.i;
2893                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2894                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2895                                         M_CMPLE(s1, REG_ZERO, d);
2896                                         store_reg_to_var_int(iptr->dst, d);
2897                                         break;
2898                                         }
2899                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2900                                         M_CMPLT(REG_ZERO, s1, d);
2901                                         store_reg_to_var_int(iptr->dst, d);
2902                                         break;
2903                                         }
2904                                 if (s1 == d) {
2905                                         M_MOV(s1, REG_ITMP1);
2906                                         s1 = REG_ITMP1;
2907                                         }
2908                                 ICONST(d, iptr[1].val.i);
2909                                 }
2910                         if ((s3 >= 0) && (s3 <= 255)) {
2911                                 M_CMOVLE_IMM(s1, s3, d);
2912                                 }
2913                         else {
2914                                 ICONST(REG_ITMP2, s3);
2915                                 M_CMOVLE(s1, REG_ITMP2, d);
2916                                 }
2917                         store_reg_to_var_int(iptr->dst, d);
2918                         break;
2919
2920
2921                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2922                 case ICMD_LRETURN:
2923                 case ICMD_ARETURN:
2924
2925                         var_to_reg_int(s1, src, REG_RESULT);
2926                         M_INTMOVE(s1, REG_RESULT);
2927
2928                         goto nowperformreturn;
2929
2930                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2931                 case ICMD_DRETURN:
2932
2933                         var_to_reg_flt(s1, src, REG_FRESULT);
2934                         M_FLTMOVE(s1, REG_FRESULT);
2935
2936                         goto nowperformreturn;
2937
2938                 case ICMD_RETURN:       /* ...  ==> ...                               */
2939
2940 nowperformreturn:
2941                         {
2942                         s4 i, p;
2943
2944                         p = parentargs_base;
2945
2946                         /* call trace function */
2947
2948                         if (runverbose) {
2949                                 M_LDA(REG_SP, REG_SP, -3 * 8);
2950                                 M_AST(REG_RA, REG_SP, 0 * 8);
2951                                 M_LST(REG_RESULT, REG_SP, 1 * 8);
2952                                 M_DST(REG_FRESULT, REG_SP, 2 * 8);
2953                                 a = dseg_addaddress(cd, m);
2954                                 M_ALD(rd->argintregs[0], REG_PV, a);
2955                                 M_MOV(REG_RESULT, rd->argintregs[1]);
2956                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[2]);
2957                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[3]);
2958                                 a = dseg_addaddress(cd, (void *) builtin_displaymethodstop);
2959                                 M_ALD(REG_PV, REG_PV, a);
2960                                 M_JSR(REG_RA, REG_PV);
2961                                 s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2962                                 if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
2963                                 else {
2964                                         s4 ml = -s1, mh = 0;
2965                                         while (ml < -32768) { ml += 65536; mh--; }
2966                                         M_LDA(REG_PV, REG_RA, ml);
2967                                         M_LDAH(REG_PV, REG_PV, mh);
2968                                 }
2969                                 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
2970                                 M_LLD(REG_RESULT, REG_SP, 1 * 8);
2971                                 M_ALD(REG_RA, REG_SP, 0 * 8);
2972                                 M_LDA(REG_SP, REG_SP, 3 * 8);
2973                         }
2974
2975 #if defined(USE_THREADS)
2976                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2977                                 s4 disp;
2978
2979                                 M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 8);
2980
2981                                 switch (iptr->opc) {
2982                                 case ICMD_IRETURN:
2983                                 case ICMD_LRETURN:
2984                                 case ICMD_ARETURN:
2985                                         M_LST(REG_RESULT, REG_SP, rd->memuse * 8);
2986                                         break;
2987                                 case ICMD_FRETURN:
2988                                 case ICMD_DRETURN:
2989                                         M_DST(REG_FRESULT, REG_SP, rd->memuse * 8);
2990                                         break;
2991                                 }
2992
2993                                 a = dseg_addaddress(cd, BUILTIN_monitorexit);
2994                                 M_ALD(REG_PV, REG_PV, a);
2995                                 M_JSR(REG_RA, REG_PV);
2996                                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
2997                                 M_LDA(REG_PV, REG_RA, disp);
2998
2999                                 switch (iptr->opc) {
3000                                 case ICMD_IRETURN:
3001                                 case ICMD_LRETURN:
3002                                 case ICMD_ARETURN:
3003                                         M_LLD(REG_RESULT, REG_SP, rd->memuse * 8);
3004                                         break;
3005                                 case ICMD_FRETURN:
3006                                 case ICMD_DRETURN:
3007                                         M_DLD(REG_FRESULT, REG_SP, rd->memuse * 8);
3008                                         break;
3009                                 }
3010                         }
3011 #endif
3012
3013                         /* restore return address                                         */
3014
3015                         if (!m->isleafmethod) {
3016                                 p--; M_LLD(REG_RA, REG_SP, p * 8);
3017                         }
3018
3019                         /* restore saved registers                                        */
3020
3021                         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
3022                                 p--; M_LLD(rd->savintregs[i], REG_SP, p * 8);
3023                         }
3024                         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
3025                                 p--; M_DLD(rd->savfltregs[i], REG_SP, p * 8);
3026                         }
3027
3028                         /* deallocate stack                                               */
3029
3030                         if (parentargs_base) {
3031                                 M_LDA(REG_SP, REG_SP, parentargs_base * 8);
3032                         }
3033
3034                         M_RET(REG_ZERO, REG_RA);
3035                         ALIGNCODENOP;
3036                         }
3037                         break;
3038
3039
3040                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
3041                         {
3042                         s4 i, l, *s4ptr;
3043                         void **tptr;
3044
3045                         tptr = (void **) iptr->target;
3046
3047                         s4ptr = iptr->val.a;
3048                         l = s4ptr[1];                          /* low     */
3049                         i = s4ptr[2];                          /* high    */
3050
3051                         var_to_reg_int(s1, src, REG_ITMP1);
3052                         if (l == 0)
3053                                 {M_INTMOVE(s1, REG_ITMP1);}
3054                         else if (l <= 32768) {
3055                                 M_LDA(REG_ITMP1, s1, -l);
3056                                 }
3057                         else {
3058                                 ICONST(REG_ITMP2, l);
3059                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3060                                 }
3061                         i = i - l + 1;
3062
3063                         /* range check */
3064
3065                         if (i <= 256)
3066                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3067                         else {
3068                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3069                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3070                                 }
3071                         M_BEQZ(REG_ITMP2, 0);
3072
3073
3074                         /* codegen_addreference(cd, BlockPtrOfPC(s4ptr[0]), mcodeptr); */
3075                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3076
3077                         /* build jump table top down and use address of lowest entry */
3078
3079                         /* s4ptr += 3 + i; */
3080                         tptr += i;
3081
3082                         while (--i >= 0) {
3083                                 /* dseg_addtarget(cd, BlockPtrOfPC(*--s4ptr)); */
3084                                 dseg_addtarget(cd, (basicblock *) tptr[0]);
3085                                 --tptr;
3086                                 }
3087                         }
3088
3089                         /* length of dataseg after last dseg_addtarget is used by load */
3090
3091                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3092                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
3093                         M_JMP(REG_ZERO, REG_ITMP2);
3094                         ALIGNCODENOP;
3095                         break;
3096
3097
3098                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3099                         {
3100                         s4 i, l, val, *s4ptr;
3101                         void **tptr;
3102
3103                         tptr = (void **) iptr->target;
3104
3105                         s4ptr = iptr->val.a;
3106                         l = s4ptr[0];                          /* default  */
3107                         i = s4ptr[1];                          /* count    */
3108
3109                         MCODECHECK((i<<2)+8);
3110                         var_to_reg_int(s1, src, REG_ITMP1);
3111                         while (--i >= 0) {
3112                                 s4ptr += 2;
3113                                 ++tptr;
3114
3115                                 val = s4ptr[0];
3116                                 if ((val >= 0) && (val <= 255)) {
3117                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
3118                                         }
3119                                 else {
3120                                         if ((val >= -32768) && (val <= 32767)) {
3121                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
3122                                                 }
3123                                         else {
3124                                                 a = dseg_adds4(cd, val);
3125                                                 M_ILD(REG_ITMP2, REG_PV, a);
3126                                                 }
3127                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3128                                         }
3129                                 M_BNEZ(REG_ITMP2, 0);
3130                                 /* codegen_addreference(cd, BlockPtrOfPC(s4ptr[1]), mcodeptr); */
3131                                 codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3132                                 }
3133
3134                         M_BR(0);
3135                         /* codegen_addreference(cd, BlockPtrOfPC(l), mcodeptr); */
3136
3137                         tptr = (void **) iptr->target;
3138                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3139
3140                         ALIGNCODENOP;
3141                         break;
3142                         }
3143
3144
3145                 case ICMD_BUILTIN:      /* ..., arg1, arg2, arg3 ==> ...              */
3146                                         /* op1 = arg count val.a = builtintable entry */
3147
3148                         bte = iptr->val.a;
3149                         md = bte->md;
3150                         goto gen_method;
3151
3152                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3153                                         /* op1 = arg count, val.a = method pointer    */
3154
3155                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3156                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
3157                 case ICMD_INVOKEINTERFACE:
3158
3159                         lm = iptr->val.a;
3160
3161                         if (lm)
3162                                 md = lm->parseddesc;
3163                         else {
3164                                 unresolved_method *um = iptr->target;
3165                                 md = um->methodref->parseddesc.md;
3166                         }
3167
3168 gen_method:
3169                         s3 = iptr->op1;
3170
3171                         MCODECHECK((s3 << 1) + 64);
3172
3173                         /* copy arguments to registers or stack location                  */
3174
3175                         for (s3 = s3 - 1; s3 >= 0; s3--, src = src->prev) {
3176                                 if (src->varkind == ARGVAR)
3177                                         continue;
3178                                 if (IS_INT_LNG_TYPE(src->type)) {
3179                                         if (!md->params[s3].inmemory) {
3180                                                 s1 = rd->argintregs[md->params[s3].regoff];
3181                                                 var_to_reg_int(d, src, s1);
3182                                                 M_INTMOVE(d, s1);
3183                                         } else {
3184                                                 var_to_reg_int(d, src, REG_ITMP1);
3185                                                 M_LST(d, REG_SP, md->params[s3].regoff * 8);
3186                                         }
3187
3188                                 } else {
3189                                         if (!md->params[s3].inmemory) {
3190                                                 s1 = rd->argfltregs[md->params[s3].regoff];
3191                                                 var_to_reg_flt(d, src, s1);
3192                                                 M_FLTMOVE(d, s1);
3193                                         } else {
3194                                                 var_to_reg_flt(d, src, REG_FTMP1);
3195                                                 M_DST(d, REG_SP, md->params[s3].regoff * 8);
3196                                         }
3197                                 }
3198                         }
3199
3200                         switch (iptr->opc) {
3201                         case ICMD_BUILTIN:
3202                                 if (iptr->target) {
3203                                         codegen_addpatchref(cd, mcodeptr, bte->fp, iptr->target);
3204
3205                                         if (opt_showdisassemble)
3206                                                 M_NOP;
3207
3208                                         a = 0;
3209
3210                                 } else {
3211                                         a = (ptrint) bte->fp;
3212                                 }
3213
3214                                 a = dseg_addaddress(cd, a);
3215                                 d = md->returntype.type;
3216
3217                                 M_ALD(REG_PV, REG_PV, a);     /* Pointer to built-in-function */
3218                                 break;
3219
3220                         case ICMD_INVOKESPECIAL:
3221                                 M_BEQZ(rd->argintregs[0], 0);
3222                                 codegen_addxnullrefs(cd, mcodeptr);
3223                                 /* fall through */
3224
3225                         case ICMD_INVOKESTATIC:
3226                                 if (!lm) {
3227                                         unresolved_method *um = iptr->target;
3228
3229                                         codegen_addpatchref(cd, mcodeptr,
3230                                                                                 PATCHER_invokestatic_special, um);
3231
3232                                         if (opt_showdisassemble)
3233                                                 M_NOP;
3234
3235                                         a = 0;
3236                                         d = um->methodref->parseddesc.md->returntype.type;
3237
3238                                 } else {
3239                                         a = (ptrint) lm->stubroutine;
3240                                         d = lm->parseddesc->returntype.type;
3241                                 }
3242
3243                                 a = dseg_addaddress(cd, a);
3244                                 M_ALD(REG_PV, REG_PV, a);            /* method pointer in r27 */
3245                                 break;
3246
3247                         case ICMD_INVOKEVIRTUAL:
3248                                 gen_nullptr_check(rd->argintregs[0]);
3249
3250                                 if (!lm) {
3251                                         unresolved_method *um = iptr->target;
3252
3253                                         codegen_addpatchref(cd, mcodeptr,
3254                                                                                 PATCHER_invokevirtual, um);
3255
3256                                         if (opt_showdisassemble)
3257                                                 M_NOP;
3258
3259                                         s1 = 0;
3260                                         d = um->methodref->parseddesc.md->returntype.type;
3261
3262                                 } else {
3263                                         s1 = OFFSET(vftbl_t, table[0]) +
3264                                                 sizeof(methodptr) * lm->vftblindex;
3265                                         d = lm->parseddesc->returntype.type;
3266                                 }
3267
3268                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
3269                                           OFFSET(java_objectheader, vftbl));
3270                                 M_ALD(REG_PV, REG_METHODPTR, s1);
3271                                 break;
3272
3273                         case ICMD_INVOKEINTERFACE:
3274                                 gen_nullptr_check(rd->argintregs[0]);
3275
3276                                 if (!lm) {
3277                                         unresolved_method *um = iptr->target;
3278
3279                                         codegen_addpatchref(cd, mcodeptr,
3280                                                                                 PATCHER_invokeinterface, um);
3281
3282                                         if (opt_showdisassemble)
3283                                                 M_NOP;
3284
3285                                         s1 = 0;
3286                                         s2 = 0;
3287                                         d = um->methodref->parseddesc.md->returntype.type;
3288
3289                                 } else {
3290                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
3291                                                 sizeof(methodptr*) * lm->class->index;
3292
3293                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
3294
3295                                         d = lm->parseddesc->returntype.type;
3296                                 }
3297
3298                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
3299                                           OFFSET(java_objectheader, vftbl));
3300                                 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
3301                                 M_ALD(REG_PV, REG_METHODPTR, s2);
3302                                 break;
3303                         }
3304
3305                         M_JSR(REG_RA, REG_PV);
3306
3307                         /* recompute pv */
3308
3309                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3310                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3311                         else {
3312                                 s4 ml = -s1, mh = 0;
3313                                 while (ml < -32768) { ml += 65536; mh--; }
3314                                 M_LDA(REG_PV, REG_RA, ml);
3315                                 M_LDAH(REG_PV, REG_PV, mh);
3316                         }
3317
3318                         /* d contains return type */
3319
3320                         if (d != TYPE_VOID) {
3321                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3322                                         s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
3323                                         M_INTMOVE(REG_RESULT, s1);
3324                                         store_reg_to_var_int(iptr->dst, s1);
3325                                 } else {
3326                                         s1 = reg_of_var(rd, iptr->dst, REG_FRESULT);
3327                                         M_FLTMOVE(REG_FRESULT, s1);
3328                                         store_reg_to_var_flt(iptr->dst, s1);
3329                                 }
3330                         }
3331                         break;
3332
3333
3334                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3335
3336                                       /* op1:   0 == array, 1 == class                */
3337                                       /* val.a: (classinfo*) superclass               */
3338
3339                         /*  superclass is an interface:
3340                          *
3341                          *  OK if ((sub == NULL) ||
3342                          *         (sub->vftbl->interfacetablelength > super->index) &&
3343                          *         (sub->vftbl->interfacetable[-super->index] != NULL));
3344                          *
3345                          *  superclass is a class:
3346                          *
3347                          *  OK if ((sub == NULL) || (0
3348                          *         <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3349                          *         super->vftbl->diffval));
3350                          */
3351
3352                         {
3353                         classinfo *super;
3354                         vftbl_t   *supervftbl;
3355                         s4         superindex;
3356
3357                         super = (classinfo *) iptr->val.a;
3358
3359                         if (!super) {
3360                                 superindex = 0;
3361                                 supervftbl = NULL;
3362
3363                         } else {
3364                                 superindex = super->index;
3365                                 supervftbl = super->vftbl;
3366                         }
3367
3368 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3369                         codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
3370 #endif
3371                         var_to_reg_int(s1, src, REG_ITMP1);
3372
3373                         /* calculate interface checkcast code size */
3374
3375                         s2 = 6;
3376                         if (!super)
3377                                 s2 += opt_showdisassemble ? 1 : 0;
3378
3379                         /* calculate class checkcast code size */
3380
3381                         s3 = 9 /* 8 + (s1 == REG_ITMP1) */;
3382                         if (!super)
3383                                 s3 += opt_showdisassemble ? 1 : 0;
3384
3385                         /* if class is not resolved, check which code to call */
3386
3387                         if (!super) {
3388                                 M_BEQZ(s1, 4 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3389
3390                                 codegen_addpatchref(cd, mcodeptr,
3391                                                                         PATCHER_checkcast_instanceof_flags,
3392                                                                         (constant_classref *) iptr->target);
3393
3394                                 if (opt_showdisassemble)
3395                                         M_NOP;
3396
3397                                 a = dseg_adds4(cd, 0); /* super->flags */
3398                                 M_ILD(REG_ITMP2, REG_PV, a);
3399                                 a = dseg_adds4(cd, ACC_INTERFACE);
3400                                 M_ILD(REG_ITMP3, REG_PV, a);
3401                                 M_AND(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3402                                 M_BEQZ(REG_ITMP2, s2 + 1);
3403                         }
3404
3405                         /* interface checkcast code */
3406
3407                         if (!super || (super->flags & ACC_INTERFACE)) {
3408                                 if (super) {
3409                                         M_BEQZ(s1, s2);
3410
3411                                 } else {
3412                                         codegen_addpatchref(cd, mcodeptr,
3413                                                                                 PATCHER_checkcast_instanceof_interface,
3414                                                                                 (constant_classref *) iptr->target);
3415
3416                                         if (opt_showdisassemble)
3417                                                 M_NOP;
3418                                 }
3419
3420                                 M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3421                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
3422                                 M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3423                                 M_BLEZ(REG_ITMP3, 0);
3424                                 codegen_addxcastrefs(cd, mcodeptr);
3425                                 M_ALD(REG_ITMP3, REG_ITMP2,
3426                                           OFFSET(vftbl_t, interfacetable[0]) -
3427                                           superindex * sizeof(methodptr*));
3428                                 M_BEQZ(REG_ITMP3, 0);
3429                                 codegen_addxcastrefs(cd, mcodeptr);
3430
3431                                 if (!super)
3432                                         M_BR(s3);
3433                         }
3434
3435                         /* class checkcast code */
3436
3437                         if (!super || !(super->flags & ACC_INTERFACE)) {
3438                                 if (super) {
3439                                         M_BEQZ(s1, s3);
3440
3441                                 } else {
3442                                         codegen_addpatchref(cd, mcodeptr,
3443                                                                                 PATCHER_checkcast_instanceof_class,
3444                                                                                 (constant_classref *) iptr->target);
3445
3446                                         if (opt_showdisassemble)
3447                                                 M_NOP;
3448                                 }
3449
3450                                 M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3451                                 a = dseg_addaddress(cd, supervftbl);
3452                                 M_ALD(REG_ITMP3, REG_PV, a);
3453 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3454                                 codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3455 #endif
3456                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3457 /*                              if (s1 != REG_ITMP1) { */
3458 /*                                      M_ILD(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, baseval)); */
3459 /*                                      M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval)); */
3460 /*  #if defined(USE_THREADS) && defined(NATIVE_THREADS) */
3461 /*                                      codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase); */
3462 /*  #endif */
3463 /*                                      M_ISUB(REG_ITMP2, REG_ITMP1, REG_ITMP2); */
3464
3465 /*                              } else { */
3466                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, baseval));
3467                                         M_ISUB(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3468                                         M_ALD(REG_ITMP3, REG_PV, a);
3469                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval));
3470 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3471                                         codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3472 #endif
3473 /*                              } */
3474                                 M_CMPULE(REG_ITMP2, REG_ITMP3, REG_ITMP3);
3475                                 M_BEQZ(REG_ITMP3, 0);
3476                                 codegen_addxcastrefs(cd, mcodeptr);
3477                         }
3478                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
3479                         M_INTMOVE(s1, d);
3480                         store_reg_to_var_int(iptr->dst, d);
3481                         }
3482                         break;
3483
3484                 case ICMD_ARRAYCHECKCAST: /* ..., objectref ==> ..., objectref        */
3485                                           /* op1: 1... resolved, 0... not resolved    */
3486
3487                         var_to_reg_int(s1, src, rd->argintregs[0]);
3488                         M_INTMOVE(s1, rd->argintregs[0]);
3489
3490                         bte = iptr->val.a;
3491
3492                         if (!iptr->op1) {
3493                                 codegen_addpatchref(cd, mcodeptr, bte->fp, iptr->target);
3494
3495                                 if (opt_showdisassemble)
3496                                         M_NOP;
3497
3498                                 a = 0;
3499
3500                         } else {
3501                                 a = (ptrint) bte->fp;
3502                         }
3503
3504                         disp = dseg_addaddress(cd, iptr->target);
3505                         M_ALD(rd->argintregs[1], REG_PV, disp);
3506                         disp = dseg_addaddress(cd, a);
3507                         M_ALD(REG_PV, REG_PV, disp);
3508                         M_JSR(REG_RA, REG_PV);
3509
3510                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3511                         if (disp <= 32768)
3512                                 M_LDA(REG_PV, REG_RA, -disp);
3513                         else {
3514                                 s4 ml = -disp, mh = 0;
3515                                 while (ml < -32768) { ml += 65536; mh--; }
3516                                 M_LDA(REG_PV, REG_RA, ml);
3517                                 M_LDAH(REG_PV, REG_PV, mh);
3518                         }
3519
3520                         M_BEQZ(REG_RESULT, 0);
3521                         codegen_addxcastrefs(cd, mcodeptr);
3522
3523                         var_to_reg_int(s1, src, REG_ITMP1);
3524                         d = reg_of_var(rd, iptr->dst, s1);
3525                         M_INTMOVE(s1, d);
3526                         store_reg_to_var_int(iptr->dst, d);
3527                         break;
3528
3529                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3530
3531                                       /* op1:   0 == array, 1 == class                */
3532                                       /* val.a: (classinfo*) superclass               */
3533
3534                         /*  superclass is an interface:
3535                          *
3536                          *  return (sub != NULL) &&
3537                          *         (sub->vftbl->interfacetablelength > super->index) &&
3538                          *         (sub->vftbl->interfacetable[-super->index] != NULL);
3539                          *
3540                          *  superclass is a class:
3541                          *
3542                          *  return ((sub != NULL) && (0
3543                          *          <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3544                          *          super->vftbl->diffvall));
3545                          */
3546
3547                         {
3548                         classinfo *super;
3549                         vftbl_t   *supervftbl;
3550                         s4         superindex;
3551
3552                         super = (classinfo *) iptr->val.a;
3553
3554                         if (!super) {
3555                                 superindex = 0;
3556                                 supervftbl = NULL;
3557
3558                         } else {
3559                                 superindex = super->index;
3560                                 supervftbl = super->vftbl;
3561                         }
3562
3563 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3564                         codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
3565 #endif
3566                         var_to_reg_int(s1, src, REG_ITMP1);
3567                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
3568                         if (s1 == d) {
3569                                 M_MOV(s1, REG_ITMP1);
3570                                 s1 = REG_ITMP1;
3571                         }
3572
3573                         /* calculate interface instanceof code size */
3574
3575                         s2 = 6;
3576                         if (!super)
3577                                 s2 += (d == REG_ITMP2 ? 1 : 0) + (opt_showdisassemble ? 1 : 0);
3578
3579                         /* calculate class instanceof code size */
3580
3581                         s3 = 7;
3582                         if (!super)
3583                                 s3 += (opt_showdisassemble ? 1 : 0);
3584
3585                         /* if class is not resolved, check which code to call */
3586
3587                         if (!super) {
3588                                 M_CLR(d);
3589                                 M_BEQZ(s1, 4 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3590
3591                                 codegen_addpatchref(cd, mcodeptr,
3592                                                                         PATCHER_checkcast_instanceof_flags,
3593                                                                         (constant_classref *) iptr->target);
3594
3595                                 if (opt_showdisassemble)
3596                                         M_NOP;
3597
3598                                 a = dseg_adds4(cd, 0); /* super->flags */
3599                                 M_ILD(REG_ITMP3, REG_PV, a);
3600                                 a = dseg_adds4(cd, ACC_INTERFACE);
3601                                 M_ILD(REG_ITMP2, REG_PV, a);
3602                                 M_AND(REG_ITMP3, REG_ITMP2, REG_ITMP3);
3603                                 M_BEQZ(REG_ITMP3, s2 + 1);
3604                         }
3605
3606                         /* interface instanceof code */
3607
3608                         if (!super || (super->flags & ACC_INTERFACE)) {
3609                                 if (super) {
3610                                         M_CLR(d);
3611                                         M_BEQZ(s1, s2);
3612
3613                                 } else {
3614                                         /* If d == REG_ITMP2, then it's destroyed in check code   */
3615                                         /* above.                                                 */
3616                                         if (d == REG_ITMP2)
3617                                                 M_CLR(d);
3618
3619                                         codegen_addpatchref(cd, mcodeptr,
3620                                                                                 PATCHER_checkcast_instanceof_interface,
3621                                                                                 (constant_classref *) iptr->target);
3622
3623                                         if (opt_showdisassemble)
3624                                                 M_NOP;
3625                                 }
3626
3627                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3628                                 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3629                                 M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3630                                 M_BLEZ(REG_ITMP3, 2);
3631                                 M_ALD(REG_ITMP1, REG_ITMP1,
3632                                           OFFSET(vftbl_t, interfacetable[0]) -
3633                                           superindex * sizeof(methodptr*));
3634                                 M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3635
3636                                 if (!super)
3637                                         M_BR(s3);
3638                         }
3639
3640                         /* class instanceof code */
3641
3642                         if (!super || !(super->flags & ACC_INTERFACE)) {
3643                                 if (super) {
3644                                         M_CLR(d);
3645                                         M_BEQZ(s1, s3);
3646
3647                                 } else {
3648                                         codegen_addpatchref(cd, mcodeptr,
3649                                                                                 PATCHER_checkcast_instanceof_class,
3650                                                                                 (constant_classref *) iptr->target);
3651
3652                                         if (opt_showdisassemble)
3653                                                 M_NOP;
3654                                 }
3655
3656                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3657                                 a = dseg_addaddress(cd, supervftbl);
3658                                 M_ALD(REG_ITMP2, REG_PV, a);
3659 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3660                                 codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3661 #endif
3662                                 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3663                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3664                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3665 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3666                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3667 #endif
3668                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3669                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3670                         }
3671                         store_reg_to_var_int(iptr->dst, d);
3672                         }
3673                         break;
3674
3675
3676                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3677
3678                         var_to_reg_int(s1, src, REG_ITMP1);
3679                         M_BLTZ(s1, 0);
3680                         codegen_addxcheckarefs(cd, mcodeptr);
3681                         break;
3682
3683                 case ICMD_CHECKEXCEPTION:    /* ... ==> ...                           */
3684
3685                         M_BEQZ(REG_RESULT, 0);
3686                         codegen_addxexceptionrefs(cd, mcodeptr);
3687                         break;
3688
3689                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3690                                       /* op1 = dimension, val.a = array descriptor    */
3691
3692                         /* check for negative sizes and copy sizes to stack if necessary  */
3693
3694                         MCODECHECK((iptr->op1 << 1) + 64);
3695
3696                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3697                                 var_to_reg_int(s2, src, REG_ITMP1);
3698                                 M_BLTZ(s2, 0);
3699                                 codegen_addxcheckarefs(cd, mcodeptr);
3700
3701                                 /* copy SAVEDVAR sizes to stack */
3702
3703                                 if (src->varkind != ARGVAR) {
3704                                         M_LST(s2, REG_SP, s1 * 8);
3705                                 }
3706                         }
3707
3708                         /* is patcher function set? */
3709
3710                         if (iptr->target) {
3711                                 codegen_addpatchref(cd, mcodeptr,
3712                                                                         (functionptr) iptr->target, iptr->val.a);
3713
3714                                 if (opt_showdisassemble)
3715                                         M_NOP;
3716
3717                                 a = 0;
3718
3719                         } else {
3720                                 a = (ptrint) iptr->val.a;
3721                         }
3722
3723                         /* a0 = dimension count */
3724
3725                         ICONST(rd->argintregs[0], iptr->op1);
3726
3727                         /* a1 = arraydescriptor */
3728
3729                         a = dseg_addaddress(cd, a);
3730                         M_ALD(rd->argintregs[1], REG_PV, a);
3731
3732                         /* a2 = pointer to dimensions = stack pointer */
3733
3734                         M_INTMOVE(REG_SP, rd->argintregs[2]);
3735
3736                         a = dseg_addaddress(cd, (void *) BUILTIN_multianewarray);
3737                         M_ALD(REG_PV, REG_PV, a);
3738                         M_JSR(REG_RA, REG_PV);
3739                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3740                         if (s1 <= 32768)
3741                                 M_LDA(REG_PV, REG_RA, -s1);
3742                         else {
3743                                 s4 ml = -s1, mh = 0;
3744                                 while (ml < -32768) { ml += 65536; mh--; }
3745                                 M_LDA(REG_PV, REG_RA, ml);
3746                                 M_LDAH(REG_PV, REG_PV, mh);
3747                         }
3748                         s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
3749                         M_INTMOVE(REG_RESULT, s1);
3750                         store_reg_to_var_int(iptr->dst, s1);
3751                         break;
3752
3753                 default:
3754                         throw_cacao_exception_exit(string_java_lang_InternalError,
3755                                                                            "Unknown ICMD %d", iptr->opc);
3756         } /* switch */
3757
3758         } /* for instruction */
3759
3760         /* copy values to interface registers */
3761
3762         src = bptr->outstack;
3763         len = bptr->outdepth;
3764         MCODECHECK(64+len);
3765 #ifdef LSRA
3766         if (!opt_lsra)
3767 #endif
3768         while (src) {
3769                 len--;
3770                 if ((src->varkind != STACKVAR)) {
3771                         s2 = src->type;
3772                         if (IS_FLT_DBL_TYPE(s2)) {
3773                                 var_to_reg_flt(s1, src, REG_FTMP1);
3774                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3775                                         M_FLTMOVE(s1,rd->interfaces[len][s2].regoff);
3776                                         }
3777                                 else {
3778                                         M_DST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3779                                         }
3780                                 }
3781                         else {
3782                                 var_to_reg_int(s1, src, REG_ITMP1);
3783                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3784                                         M_INTMOVE(s1,rd->interfaces[len][s2].regoff);
3785                                         }
3786                                 else {
3787                                         M_LST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3788                                         }
3789                                 }
3790                         }
3791                 src = src->prev;
3792                 }
3793         } /* if (bptr -> flags >= BBREACHED) */
3794         } /* for basic block */
3795
3796         codegen_createlinenumbertable(cd);
3797
3798         {
3799
3800         s4 *xcodeptr = NULL;
3801         branchref *bref;
3802
3803         /* generate ArithmeticException stubs */
3804
3805         for (bref = cd->xdivrefs; bref != NULL; bref = bref->next) {
3806                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3807                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3808                                                           bref->branchpos,
3809                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3810                         continue;
3811                 }
3812
3813                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3814                                   bref->branchpos,
3815                                                   (u1 *) mcodeptr - cd->mcodebase);
3816
3817                 MCODECHECK(16);
3818
3819                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3820
3821                 if (xcodeptr != NULL) {
3822                         M_BR(xcodeptr - mcodeptr - 1);
3823
3824                 } else {
3825                         xcodeptr = mcodeptr;
3826
3827                         M_MOV(REG_PV, rd->argintregs[0]);
3828                         M_MOV(REG_SP, rd->argintregs[1]);
3829                         M_ALD(rd->argintregs[2],
3830                                   REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
3831                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3832
3833                         M_LDA(REG_SP, REG_SP, -1 * 8);
3834                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3835
3836                         disp = dseg_addaddress(cd, stacktrace_inline_arithmeticexception);
3837                         M_ALD(REG_PV, REG_PV, disp);
3838                         M_JSR(REG_RA, REG_PV);
3839
3840                         /* recompute pv */
3841                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3842                         if (disp <= 32768) M_LDA(REG_PV, REG_RA, -disp);
3843                         else {
3844                                 s4 ml = -disp, mh = 0;
3845                                 while (ml < -32768) { ml += 65536; mh--; }
3846                                 M_LDA(REG_PV, REG_RA, ml);
3847                                 M_LDAH(REG_PV, REG_PV, mh);
3848                         }
3849
3850                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3851
3852                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3853                         M_LDA(REG_SP, REG_SP, 1 * 8);
3854
3855                         disp = dseg_addaddress(cd, asm_handle_exception);
3856                         M_ALD(REG_ITMP3, REG_PV, disp);
3857                         M_JMP(REG_ZERO, REG_ITMP3);
3858                 }
3859         }
3860
3861         /* generate ArrayIndexOutOfBoundsException stubs */
3862
3863         xcodeptr = NULL;
3864
3865         for (bref = cd->xboundrefs; bref != NULL; bref = bref->next) {
3866                 gen_resolvebranch((u1*) cd->mcodebase + bref->branchpos,
3867                                   bref->branchpos,
3868                                                   (u1*) mcodeptr - cd->mcodebase);
3869
3870                 MCODECHECK(18);
3871
3872                 /* move index register into REG_ITMP1 */
3873
3874                 M_MOV(bref->reg, REG_ITMP1);
3875                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3876
3877                 if (xcodeptr != NULL) {
3878                         M_BR(xcodeptr - mcodeptr - 1);
3879
3880                 } else {
3881                         xcodeptr = mcodeptr;
3882
3883                         M_MOV(REG_PV, rd->argintregs[0]);
3884                         M_MOV(REG_SP, rd->argintregs[1]);
3885
3886                         if (m->isleafmethod)
3887                                 M_MOV(REG_RA, rd->argintregs[2]);
3888                         else
3889                                 M_ALD(rd->argintregs[2],
3890                                           REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
3891
3892                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3893                         M_MOV(REG_ITMP1, rd->argintregs[4]);
3894
3895                         M_LDA(REG_SP, REG_SP, -2 * 8);
3896                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3897
3898                         if (m->isleafmethod)
3899                                 M_AST(REG_RA, REG_SP, 1 * 8);
3900
3901                         disp = dseg_addaddress(cd, stacktrace_inline_arrayindexoutofboundsexception);
3902                         M_ALD(REG_PV, REG_PV, disp);
3903                         M_JSR(REG_RA, REG_PV);
3904
3905                         /* recompute pv */
3906                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3907                         if (disp <= 32768) M_LDA(REG_PV, REG_RA, -disp);
3908                         else {
3909                                 s4 ml = -disp, mh = 0;
3910                                 while (ml < -32768) { ml += 65536; mh--; }
3911                                 M_LDA(REG_PV, REG_RA, ml);
3912                                 M_LDAH(REG_PV, REG_PV, mh);
3913                         }
3914
3915                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3916
3917                         if (m->isleafmethod)
3918                                 M_ALD(REG_RA, REG_SP, 1 * 8);
3919
3920                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3921                         M_LDA(REG_SP, REG_SP, 2 * 8);
3922
3923                         disp = dseg_addaddress(cd, asm_handle_exception);
3924                         M_ALD(REG_ITMP3, REG_PV, disp);
3925                         M_JMP(REG_ZERO, REG_ITMP3);
3926                 }
3927         }
3928
3929         /* generate ArrayStoreException stubs */
3930
3931         xcodeptr = NULL;
3932
3933         for (bref = cd->xstorerefs; bref != NULL; bref = bref->next) {
3934                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3935                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3936                                                           bref->branchpos,
3937                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3938                         continue;
3939                 }
3940
3941                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3942                                   bref->branchpos,
3943                                                   (u1 *) mcodeptr - cd->mcodebase);
3944
3945                 MCODECHECK(16);
3946
3947                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3948
3949                 if (xcodeptr != NULL) {
3950                         M_BR(xcodeptr - mcodeptr - 1);
3951
3952                 } else {
3953                         xcodeptr = mcodeptr;
3954
3955                         M_MOV(REG_PV, rd->argintregs[0]);
3956                         M_MOV(REG_SP, rd->argintregs[1]);
3957                         M_ALD(rd->argintregs[2],
3958                                   REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
3959                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3960
3961                         M_LDA(REG_SP, REG_SP, -1 * 8);
3962                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3963
3964                         disp = dseg_addaddress(cd, stacktrace_inline_arraystoreexception);
3965                         M_ALD(REG_PV, REG_PV, disp);
3966                         M_JSR(REG_RA, REG_PV);
3967
3968                         /* recompute pv */
3969                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3970                         if (disp <= 32768) M_LDA(REG_PV, REG_RA, -disp);
3971                         else {
3972                                 s4 ml = -disp, mh = 0;
3973                                 while (ml < -32768) { ml += 65536; mh--; }
3974                                 M_LDA(REG_PV, REG_RA, ml);
3975                                 M_LDAH(REG_PV, REG_PV, mh);
3976                         }
3977
3978                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3979
3980                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3981                         M_LDA(REG_SP, REG_SP, 1 * 8);
3982
3983                         disp = dseg_addaddress(cd, asm_handle_exception);
3984                         M_ALD(REG_ITMP3, REG_PV, disp);
3985                         M_JMP(REG_ZERO, REG_ITMP3);
3986                 }
3987         }
3988
3989         /* generate ClassCastException stubs */
3990
3991         xcodeptr = NULL;
3992
3993         for (bref = cd->xcastrefs; bref != NULL; bref = bref->next) {
3994                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3995                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3996                                                           bref->branchpos,
3997                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3998                         continue;
3999                 }
4000
4001                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
4002                                   bref->branchpos,
4003                                                   (u1 *) mcodeptr - cd->mcodebase);
4004
4005                 MCODECHECK(18);
4006
4007                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
4008
4009                 if (xcodeptr != NULL) {
4010                         M_BR(xcodeptr - mcodeptr - 1);
4011
4012                 } else {
4013                         xcodeptr = mcodeptr;
4014
4015                         M_MOV(REG_PV, rd->argintregs[0]);
4016                         M_MOV(REG_SP, rd->argintregs[1]);
4017
4018                         if (m->isleafmethod)
4019                                 M_MOV(REG_RA, rd->argintregs[2]);
4020                         else
4021                                 M_ALD(rd->argintregs[2],
4022                                           REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
4023
4024                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
4025
4026                         M_LDA(REG_SP, REG_SP, -2 * 8);
4027                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
4028
4029                         if (m->isleafmethod)
4030                                 M_AST(REG_RA, REG_SP, 1 * 8);
4031
4032                         disp = dseg_addaddress(cd, stacktrace_inline_classcastexception);
4033                         M_ALD(REG_PV, REG_PV, disp);
4034                         M_JSR(REG_RA, REG_PV);
4035
4036                         /* recompute pv */
4037                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4038                         if (disp <= 32768) M_LDA(REG_PV, REG_RA, -disp);
4039                         else {
4040                                 s4 ml = -disp, mh = 0;
4041                                 while (ml < -32768) { ml += 65536; mh--; }
4042                                 M_LDA(REG_PV, REG_RA, ml);
4043                                 M_LDAH(REG_PV, REG_PV, mh);
4044                         }
4045
4046                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
4047
4048                         if (m->isleafmethod)
4049                                 M_ALD(REG_RA, REG_SP, 1 * 8);
4050
4051                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
4052                         M_LDA(REG_SP, REG_SP, 2 * 8);
4053
4054                         disp = dseg_addaddress(cd, asm_handle_exception);
4055                         M_ALD(REG_ITMP3, REG_PV, disp);
4056                         M_JMP(REG_ZERO, REG_ITMP3);
4057                 }
4058         }
4059
4060         /* generate NegativeArraySizeException stubs */
4061
4062         xcodeptr = NULL;
4063
4064         for (bref = cd->xcheckarefs; bref != NULL; bref = bref->next) {
4065                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
4066                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
4067                                                           bref->branchpos,
4068                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
4069                         continue;
4070                 }
4071
4072                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
4073                                   bref->branchpos,
4074                                                   (u1 *) mcodeptr - cd->mcodebase);
4075
4076                 MCODECHECK(16);
4077
4078                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
4079
4080                 if (xcodeptr != NULL) {
4081                         M_BR(xcodeptr - mcodeptr - 1);
4082
4083                 } else {
4084                         xcodeptr = mcodeptr;
4085
4086                         M_MOV(REG_PV, rd->argintregs[0]);
4087                         M_MOV(REG_SP, rd->argintregs[1]);
4088                         M_ALD(rd->argintregs[2],
4089                                   REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
4090                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
4091
4092                         M_LDA(REG_SP, REG_SP, -2 * 8);
4093                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
4094
4095                         disp = dseg_addaddress(cd, stacktrace_inline_negativearraysizeexception);
4096                         M_ALD(REG_PV, REG_PV, disp);
4097                         M_JSR(REG_RA, REG_PV);
4098
4099                         /* recompute pv */
4100                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4101                         if (disp <= 32768) M_LDA(REG_PV, REG_RA, -disp);
4102                         else {
4103                                 s4 ml = -disp, mh = 0;
4104                                 while (ml < -32768) { ml += 65536; mh--; }
4105                                 M_LDA(REG_PV, REG_RA, ml);
4106                                 M_LDAH(REG_PV, REG_PV, mh);
4107                         }
4108
4109                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
4110
4111                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
4112                         M_LDA(REG_SP, REG_SP, 2 * 8);
4113
4114                         disp = dseg_addaddress(cd, asm_handle_exception);
4115                         M_ALD(REG_ITMP3, REG_PV, disp);
4116                         M_JMP(REG_ZERO, REG_ITMP3);
4117                 }
4118         }
4119
4120         /* generate NullPointerException stubs */
4121
4122         xcodeptr = NULL;
4123
4124         for (bref = cd->xnullrefs; bref != NULL; bref = bref->next) {
4125                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
4126                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
4127                                                           bref->branchpos,
4128                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
4129                         continue;
4130                 }
4131
4132                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
4133                                   bref->branchpos,
4134                                                   (u1 *) mcodeptr - cd->mcodebase);
4135
4136                 MCODECHECK(18);
4137
4138                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
4139
4140                 if (xcodeptr != NULL) {
4141                         M_BR(xcodeptr - mcodeptr - 1);
4142
4143                 } else {
4144                         xcodeptr = mcodeptr;
4145
4146                         M_MOV(REG_PV, rd->argintregs[0]);
4147                         M_MOV(REG_SP, rd->argintregs[1]);
4148
4149                         if (m->isleafmethod)
4150                                 M_MOV(REG_RA, rd->argintregs[2]);
4151                         else
4152                                 M_ALD(rd->argintregs[2],
4153                                           REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
4154
4155                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
4156
4157                         M_LDA(REG_SP, REG_SP, -2 * 8);
4158                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
4159
4160                         if (m->isleafmethod)
4161                                 M_AST(REG_RA, REG_SP, 1 * 8);
4162
4163                         disp = dseg_addaddress(cd, stacktrace_inline_nullpointerexception);
4164                         M_ALD(REG_PV, REG_PV, disp);
4165                         M_JSR(REG_RA, REG_PV);
4166
4167                         /* recompute pv */
4168                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4169                         if (disp <= 32768) M_LDA(REG_PV, REG_RA, -disp);
4170                         else {
4171                                 s4 ml = -disp, mh = 0;
4172                                 while (ml < -32768) { ml += 65536; mh--; }
4173                                 M_LDA(REG_PV, REG_RA, ml);
4174                                 M_LDAH(REG_PV, REG_PV, mh);
4175                         }
4176
4177                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
4178
4179                         if (m->isleafmethod)
4180                                 M_ALD(REG_RA, REG_SP, 1 * 8);
4181
4182                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
4183                         M_LDA(REG_SP, REG_SP, 2 * 8);
4184
4185                         disp = dseg_addaddress(cd, asm_handle_exception);
4186                         M_ALD(REG_ITMP3, REG_PV, disp);
4187                         M_JMP(REG_ZERO, REG_ITMP3);
4188                 }
4189         }
4190
4191         /* generate ICMD_CHECKEXCEPTION stubs */
4192
4193         xcodeptr = NULL;
4194
4195         for (bref = cd->xexceptionrefs; bref != NULL; bref = bref->next) {
4196                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
4197                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
4198                                                           bref->branchpos,
4199                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
4200                         continue;
4201                 }
4202
4203                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
4204                                   bref->branchpos,
4205                                                   (u1 *) mcodeptr - cd->mcodebase);
4206
4207                 MCODECHECK(16);
4208
4209                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
4210
4211                 if (xcodeptr != NULL) {
4212                         M_BR(xcodeptr - mcodeptr - 1);
4213
4214                 } else {
4215                         xcodeptr = mcodeptr;
4216
4217                         M_MOV(REG_PV, rd->argintregs[0]);
4218                         M_MOV(REG_SP, rd->argintregs[1]);
4219                         M_ALD(rd->argintregs[2],
4220                                   REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
4221                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
4222
4223                         M_LDA(REG_SP, REG_SP, -1 * 8);
4224                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
4225
4226                         disp = dseg_addaddress(cd, stacktrace_inline_fillInStackTrace);
4227                         M_ALD(REG_PV, REG_PV, disp);
4228                         M_JSR(REG_RA, REG_PV);
4229
4230                         /* recompute pv */
4231                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4232                         if (disp <= 32768) M_LDA(REG_PV, REG_RA, -disp);
4233                         else {
4234                                 s4 ml = -disp, mh = 0;
4235                                 while (ml < -32768) { ml += 65536; mh--; }
4236                                 M_LDA(REG_PV, REG_RA, ml);
4237                                 M_LDAH(REG_PV, REG_PV, mh);
4238                         }
4239
4240                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
4241
4242                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
4243                         M_LDA(REG_SP, REG_SP, 1 * 8);
4244
4245                         disp = dseg_addaddress(cd, asm_handle_exception);
4246                         M_ALD(REG_ITMP3, REG_PV, disp);
4247                         M_JMP(REG_ZERO, REG_ITMP3);
4248                 }
4249         }
4250
4251         /* generate patcher stub call code */
4252
4253         {
4254                 patchref *pref;
4255                 u4        mcode;
4256                 s4       *tmpmcodeptr;
4257
4258                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4259                         /* check code segment size */
4260
4261                         MCODECHECK(13 + 4 + 1);
4262
4263                         /* Get machine code which is patched back in later. The call is   */
4264                         /* 1 instruction word long.                                       */
4265
4266                         xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
4267                         mcode = *xcodeptr;
4268
4269                         /* patch in the call to call the following code (done at compile  */
4270                         /* time)                                                          */
4271
4272                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
4273                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
4274
4275                         M_BSR(REG_ITMP3, tmpmcodeptr - (xcodeptr + 1));
4276
4277                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
4278
4279                         /* create stack frame */
4280
4281                         M_LSUB_IMM(REG_SP, 5 * 8, REG_SP);
4282
4283                         /* move return address onto stack */
4284
4285                         M_AST(REG_ITMP3, REG_SP, 4 * 8);
4286
4287                         /* move pointer to java_objectheader onto stack */
4288
4289 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4290                         /* create a virtual java_objectheader */
4291
4292                         (void) dseg_addaddress(cd, get_dummyLR());          /* monitorPtr */
4293                         a = dseg_addaddress(cd, NULL);                      /* vftbl      */
4294
4295                         if (a >= -32768) {
4296                                 M_LDA(REG_ITMP3, REG_PV, a);
4297                         } else {
4298                                 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4299                                 M_LDA(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4300                         }
4301                         M_AST(REG_ITMP3, REG_SP, 3 * 8);
4302 #else
4303                         M_AST(REG_ZERO, REG_SP, 3 * 8);
4304 #endif
4305
4306                         /* move machine code onto stack */
4307
4308                         a = dseg_adds4(cd, mcode);
4309                         if (a >= -32768) {
4310                                 M_ILD(REG_ITMP3, REG_PV, a);
4311                         } else {
4312                                 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4313                                 M_ILD(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4314                         }
4315                         M_IST(REG_ITMP3, REG_SP, 2 * 8);
4316
4317                         /* move class/method/field reference onto stack */
4318
4319                         a = dseg_addaddress(cd, pref->ref);
4320                         if (a >= -32768) {
4321                                 M_ALD(REG_ITMP3, REG_PV, a);
4322                         } else {
4323                                 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4324                                 M_ALD(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4325                         }
4326                         M_AST(REG_ITMP3, REG_SP, 1 * 8);
4327
4328                         /* move patcher function pointer onto stack */
4329
4330                         a = dseg_addaddress(cd, pref->patcher);
4331                         if (a >= -32768) {
4332                                 M_ALD(REG_ITMP3, REG_PV, a);
4333                         } else {
4334                                 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4335                                 M_ALD(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4336                         }
4337                         M_AST(REG_ITMP3, REG_SP, 0 * 8);
4338
4339                         a = dseg_addaddress(cd, asm_wrapper_patcher);
4340                         if (a >= -32768) {
4341                                 M_ALD(REG_ITMP3, REG_PV, a);
4342                         } else {
4343                                 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4344                                 M_ALD(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4345                         }
4346                         M_JMP(REG_ZERO, REG_ITMP3);
4347                 }
4348         }
4349         }
4350
4351         codegen_finish(m, cd, (s4) ((u1 *) mcodeptr - cd->mcodebase));
4352 }
4353
4354
4355 /* createcompilerstub **********************************************************
4356
4357    Creates a stub routine which calls the compiler.
4358
4359 *******************************************************************************/
4360
4361 #define COMPSTUBSIZE    3
4362
4363 functionptr createcompilerstub(methodinfo *m)
4364 {
4365         u8 *s = CNEW(u8, COMPSTUBSIZE);     /* memory to hold the stub            */
4366         s4 *mcodeptr = (s4 *) s;            /* code generation pointer            */
4367
4368                                             /* code for the stub                  */
4369         M_ALD(REG_PV, REG_PV, 16);          /* load pointer to the compiler       */
4370         M_JMP(0, REG_PV);                   /* jump to the compiler, return address
4371                                                in reg 0 is used as method pointer */
4372         s[1] = (ptrint) m;                  /* literals to be adressed            */
4373         s[2] = (ptrint) asm_call_jit_compiler; /* jump directly via PV from above */
4374
4375 #if defined(STATISTICS)
4376         if (opt_stat)
4377                 count_cstub_len += COMPSTUBSIZE * 8;
4378 #endif
4379
4380         return (functionptr) s;
4381 }
4382
4383
4384 /* createnativestub ************************************************************
4385
4386    Creates a stub routine which calls a native method.
4387
4388 *******************************************************************************/
4389
4390 functionptr createnativestub(functionptr f, methodinfo *m, codegendata *cd,
4391                                                          registerdata *rd, methoddesc *nmd)
4392 {
4393         s4         *mcodeptr;               /* code generation pointer            */
4394         s4          stackframesize;         /* size of stackframe if needed       */
4395         s4          disp;
4396         methoddesc *md;
4397         s4          nativeparams;
4398         s4          i, j;                   /* count variables                    */
4399         s4          t;
4400         s4          s1, s2, off;
4401
4402         /* initialize variables */
4403
4404         md = m->parseddesc;
4405         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
4406
4407
4408         /* calculate stack frame size */
4409
4410         stackframesize =
4411                 1 +                             /* return address                     */
4412                 sizeof(stackframeinfo) / SIZEOF_VOID_P +
4413                 1 +                             /* methodinfo for call trace          */
4414                 (md->paramcount > INT_ARG_CNT ? INT_ARG_CNT : md->paramcount) +
4415                 nmd->memuse;
4416
4417
4418         /* create method header */
4419
4420         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
4421         (void) dseg_adds4(cd, stackframesize * 8);              /* FrameSize      */
4422         (void) dseg_adds4(cd, 0);                               /* IsSync         */
4423         (void) dseg_adds4(cd, 0);                               /* IsLeaf         */
4424         (void) dseg_adds4(cd, 0);                               /* IntSave        */
4425         (void) dseg_adds4(cd, 0);                               /* FltSave        */
4426         (void) dseg_addlinenumbertablesize(cd);
4427         (void) dseg_adds4(cd, 0);                               /* ExTableSize    */
4428
4429
4430         /* initialize mcode variables */
4431
4432         mcodeptr = (s4 *) cd->mcodebase;
4433         cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize);
4434
4435
4436         /* generate stub code */
4437
4438         M_LDA(REG_SP, REG_SP, -stackframesize * 8);
4439         M_AST(REG_RA, REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
4440
4441
4442         /* if function is static, check for initialized */
4443
4444         if ((m->flags & ACC_STATIC) && !m->class->initialized) {
4445                 codegen_addpatchref(cd, mcodeptr, PATCHER_clinit, m->class);
4446
4447                 if (opt_showdisassemble)
4448                         M_NOP;
4449         }
4450
4451         /* call trace function */
4452
4453         if (runverbose) {
4454                 /* save integer argument registers */
4455
4456                 for (i = 0, j = 1; i < md->paramcount && i < INT_ARG_CNT; i++)
4457                         if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
4458                                 M_LST(rd->argintregs[i], REG_SP, j++ * 8);
4459
4460                 /* save and copy float arguments into integer registers */
4461
4462                 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4463                         t = md->paramtypes[i].type;
4464
4465                         if (IS_FLT_DBL_TYPE(t)) {
4466                                 if (IS_2_WORD_TYPE(t)) {
4467                                         M_DST(rd->argfltregs[i], REG_SP, j * 8);
4468                                         M_LLD(rd->argintregs[i], REG_SP, j * 8);
4469                                 } else {
4470                                         M_FST(rd->argfltregs[i], REG_SP, j * 8);
4471                                         M_ILD(rd->argintregs[i], REG_SP, j * 8);
4472                                 }
4473                                 j++;
4474                         }
4475                 }
4476
4477                 off = dseg_addaddress(cd, m);
4478                 M_ALD(REG_ITMP1, REG_PV, off);
4479                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
4480                 off = dseg_addaddress(cd, builtin_trace_args);
4481                 M_ALD(REG_PV, REG_PV, off);
4482                 M_JSR(REG_RA, REG_PV);
4483                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4484                 M_LDA(REG_PV, REG_RA, -disp);
4485
4486                 for (i = 0, j = 1; i < md->paramcount && i < INT_ARG_CNT; i++)
4487                         if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
4488                                 M_LLD(rd->argintregs[i], REG_SP, j++ * 8);
4489
4490                 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4491                         t = md->paramtypes[i].type;
4492
4493                         if (IS_FLT_DBL_TYPE(t)) {
4494                                 if (IS_2_WORD_TYPE(t)) {
4495                                         M_DLD(rd->argfltregs[i], REG_SP, j * 8);
4496                                 } else {
4497                                         M_FLD(rd->argfltregs[i], REG_SP, j * 8);
4498                                 }
4499                                 j++;
4500                         }
4501                 }
4502         }
4503
4504
4505         /* save integer and float argument registers */
4506
4507         for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++)
4508                 if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
4509                         M_LST(rd->argintregs[i], REG_SP, j++ * 8);
4510
4511         for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++)
4512                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type))
4513                         M_DST(rd->argfltregs[i], REG_SP, j++ * 8);
4514
4515         /* create native stackframe info */
4516
4517         M_AADD_IMM(REG_SP, stackframesize * 8 - sizeof(stackframeinfo),
4518                            rd->argintregs[0]);
4519         M_MOV(REG_PV, rd->argintregs[1]);
4520         M_AADD_IMM(REG_SP, stackframesize * 8, rd->argintregs[2]);
4521         M_ALD(rd->argintregs[3], REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
4522         off = dseg_addaddress(cd, stacktrace_create_native_stackframeinfo);
4523         M_ALD(REG_PV, REG_PV, off);
4524         M_JSR(REG_RA, REG_PV);
4525         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4526         M_LDA(REG_PV, REG_RA, -disp);
4527
4528         /* restore integer and float argument registers */
4529
4530         for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++)
4531                 if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
4532                         M_LLD(rd->argintregs[i], REG_SP, j++ * 8);
4533
4534         for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++)
4535                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type))
4536                         M_DLD(rd->argfltregs[i], REG_SP, j++ * 8);
4537
4538
4539         /* copy or spill arguments to new locations */
4540
4541         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
4542                 t = md->paramtypes[i].type;
4543
4544                 if (IS_INT_LNG_TYPE(t)) {
4545                         if (!md->params[i].inmemory) {
4546                                 s1 = rd->argintregs[md->params[i].regoff];
4547
4548                                 if (!nmd->params[j].inmemory) {
4549                                         s2 = rd->argintregs[nmd->params[j].regoff];
4550                                         M_INTMOVE(s1, s2);
4551
4552                                 } else {
4553                                         s2 = nmd->params[j].regoff;
4554                                         M_LST(s1, REG_SP, s2 * 8);
4555                                 }
4556
4557                         } else {
4558                                 s1 = md->params[i].regoff + stackframesize;
4559                                 s2 = nmd->params[j].regoff;
4560                                 M_LLD(REG_ITMP1, REG_SP, s1 * 8);
4561                                 M_LST(REG_ITMP1, REG_SP, s2 * 8);
4562                         }
4563
4564                 } else {
4565                         if (!md->params[i].inmemory) {
4566                                 s1 = rd->argfltregs[md->params[i].regoff];
4567
4568                                 if (!nmd->params[j].inmemory) {
4569                                         s2 = rd->argfltregs[nmd->params[j].regoff];
4570                                         M_FLTMOVE(s1, s2);
4571
4572                                 } else {
4573                                         s2 = nmd->params[j].regoff;
4574                                         if (IS_2_WORD_TYPE(t))
4575                                                 M_DST(s1, REG_SP, s2 * 8);
4576                                         else
4577                                                 M_FST(s1, REG_SP, s2 * 8);
4578                                 }
4579
4580                         } else {
4581                                 s1 = md->params[i].regoff + stackframesize;
4582                                 s2 = nmd->params[j].regoff;
4583                                 M_DLD(REG_FTMP1, REG_SP, s1 * 8);
4584                                 if (IS_2_WORD_TYPE(t))
4585                                         M_DST(REG_FTMP1, REG_SP, s2 * 8);
4586                                 else
4587                                         M_FST(REG_FTMP1, REG_SP, s2 * 8);
4588                         }
4589                 }
4590         }
4591
4592         /* put class into second argument register */
4593
4594         if (m->flags & ACC_STATIC) {
4595                 off = dseg_addaddress(cd, m->class);
4596                 M_ALD(rd->argintregs[1], REG_PV, off);
4597         }
4598
4599         /* put env into first argument register */
4600
4601         off = dseg_addaddress(cd, &env);
4602         M_ALD(rd->argintregs[0], REG_PV, off);
4603
4604         /* do the native function call */
4605
4606 #if !defined(ENABLE_STATICVM)
4607         if (f == NULL) {
4608                 codegen_addpatchref(cd, mcodeptr, PATCHER_resolve_native, m);
4609
4610                 if (opt_showdisassemble)
4611                         M_NOP;
4612         }
4613 #endif
4614
4615         off = dseg_addaddress(cd, f);
4616         M_ALD(REG_PV, REG_PV, off);         /* load adress of native method       */
4617         M_JSR(REG_RA, REG_PV);              /* call native method                 */
4618         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4619         M_LDA(REG_PV, REG_RA, -disp);       /* recompute pv from ra               */
4620
4621
4622         /* remove native stackframe info */
4623
4624         if (IS_INT_LNG_TYPE(md->returntype.type))
4625                 M_LST(REG_RESULT, REG_SP, 0 * 8);
4626         else
4627                 M_DST(REG_FRESULT, REG_SP, 0 * 8);
4628
4629         M_AADD_IMM(REG_SP, stackframesize * 8 - sizeof(stackframeinfo),
4630                            rd->argintregs[0]);
4631         off = dseg_addaddress(cd, stacktrace_remove_stackframeinfo);
4632         M_ALD(REG_PV, REG_PV, off);
4633         M_JSR(REG_RA, REG_PV);
4634         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4635         M_LDA(REG_PV, REG_RA, -disp);
4636
4637         if (IS_INT_LNG_TYPE(md->returntype.type))
4638                 M_LLD(REG_RESULT, REG_SP, 0 * 8);
4639         else
4640                 M_DLD(REG_FRESULT, REG_SP, 0 * 8);
4641
4642
4643         /* call finished trace */
4644
4645         if (runverbose) {
4646                 M_LST(REG_RESULT, REG_SP, 0 * 8);
4647                 M_DST(REG_FRESULT, REG_SP, 1 * 8);
4648
4649                 off = dseg_addaddress(cd, m);
4650                 M_ALD(rd->argintregs[0], REG_PV, off);
4651
4652                 M_MOV(REG_RESULT, rd->argintregs[1]);
4653                 M_FMOV(REG_FRESULT, rd->argfltregs[2]);
4654                 M_FMOV(REG_FRESULT, rd->argfltregs[3]);
4655
4656                 off = dseg_addaddress(cd, builtin_displaymethodstop);
4657                 M_ALD(REG_PV, REG_PV, off);
4658                 M_JSR(REG_RA, REG_PV);
4659                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4660                 M_LDA(REG_PV, REG_RA, -disp);
4661
4662                 M_LLD(REG_RESULT, REG_SP, 0 * 8);
4663                 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
4664         }
4665
4666
4667         /* check for exception */
4668
4669 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4670         if (IS_FLT_DBL_TYPE(md->returntype.type))
4671                 M_DST(REG_FRESULT, REG_SP, 0 * 8);
4672         else
4673                 M_AST(REG_RESULT, REG_SP, 0 * 8);
4674
4675         off = dseg_addaddress(cd, builtin_get_exceptionptrptr);
4676         M_ALD(REG_PV, REG_PV, off);
4677         M_JSR(REG_RA, REG_PV);
4678         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4679         M_LDA(REG_PV, REG_RA, -disp);
4680         M_MOV(REG_RESULT, REG_ITMP3);
4681
4682         if (IS_FLT_DBL_TYPE(md->returntype.type))
4683                 M_DLD(REG_FRESULT, REG_SP, 0 * 8);
4684         else
4685                 M_ALD(REG_RESULT, REG_SP, 0 * 8);
4686 #else
4687         off = dseg_addaddress(cd, &_exceptionptr);
4688         M_ALD(REG_ITMP3, REG_PV, off);      /* get address of exceptionptr        */
4689 #endif
4690
4691         M_ALD(REG_ITMP1, REG_ITMP3, 0);     /* load exception into reg. itmp1     */
4692         M_BNEZ(REG_ITMP1, 3);               /* if no exception then return        */
4693
4694         M_ALD(REG_RA, REG_SP, (stackframesize - 1) * 8); /* load return address   */
4695
4696         M_LDA(REG_SP, REG_SP, stackframesize * 8);
4697
4698         M_RET(REG_ZERO, REG_RA);            /* return to caller                   */
4699
4700         /* handle exception */
4701
4702         M_AST(REG_ZERO, REG_ITMP3, 0);      /* store NULL into exceptionptr       */
4703
4704         M_ALD(REG_RA, REG_SP, (stackframesize - 1) * 8); /* load return address   */
4705         M_LDA(REG_ITMP2, REG_RA, -4);       /* move fault address into reg. itmp2 */
4706
4707         M_LDA(REG_SP, REG_SP, stackframesize * 8);
4708
4709         off = dseg_addaddress(cd, asm_handle_nat_exception);
4710         M_ALD(REG_ITMP3, REG_PV, off);      /* load asm exception handler address */
4711         M_JMP(REG_ZERO, REG_ITMP3);         /* jump to asm exception handler      */
4712
4713
4714         /* process patcher calls **************************************************/
4715
4716         {
4717                 patchref *pref;
4718                 s4       *xcodeptr;
4719                 u4        mcode;
4720                 s4       *tmpmcodeptr;
4721
4722                 /* there can only be one <clinit> ref entry                           */
4723                 pref = cd->patchrefs;
4724
4725                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4726                         /* Get machine code which is patched back in later. The call is   */
4727                         /* 1 instruction word long.                                       */
4728
4729                         xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
4730                         mcode = (u4) *xcodeptr;
4731
4732                         /* patch in the call to call the following code (done at compile  */
4733                         /* time)                                                          */
4734
4735                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
4736                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
4737
4738                         M_BSR(REG_ITMP3, tmpmcodeptr - (xcodeptr + 1));
4739
4740                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
4741
4742                         /* create stack frame                                             */
4743
4744                         M_LSUB_IMM(REG_SP, 5 * 8, REG_SP);
4745
4746                         /* move return address onto stack */
4747
4748                         M_AST(REG_ITMP3, REG_SP, 4 * 8);
4749
4750                         /* move pointer to java_objectheader onto stack */
4751
4752 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4753                         /* create a virtual java_objectheader */
4754
4755                         (void) dseg_addaddress(cd, get_dummyLR());          /* monitorPtr */
4756                         off = dseg_addaddress(cd, NULL);                    /* vftbl      */
4757
4758                         M_LDA(REG_ITMP3, REG_PV, off);
4759                         M_AST(REG_ITMP3, REG_SP, 3 * 8);
4760 #else
4761                         M_AST(REG_ZERO, REG_SP, 3 * 8);
4762 #endif
4763
4764                         /* move machine code onto stack */
4765
4766                         off = dseg_adds4(cd, mcode);
4767                         M_ILD(REG_ITMP3, REG_PV, off);
4768                         M_IST(REG_ITMP3, REG_SP, 2 * 8);
4769
4770                         /* move class/method/field reference onto stack */
4771
4772                         off = dseg_addaddress(cd, pref->ref);
4773                         M_ALD(REG_ITMP3, REG_PV, off);
4774                         M_AST(REG_ITMP3, REG_SP, 1 * 8);
4775
4776                         /* move patcher function pointer onto stack */
4777
4778                         off = dseg_addaddress(cd, pref->patcher);
4779                         M_ALD(REG_ITMP3, REG_PV, off);
4780                         M_AST(REG_ITMP3, REG_SP, 0 * 8);
4781
4782                         off = dseg_addaddress(cd, asm_wrapper_patcher);
4783                         M_ALD(REG_ITMP3, REG_PV, off);
4784                         M_JMP(REG_ZERO, REG_ITMP3);
4785                 }
4786         }
4787
4788         codegen_finish(m, cd, (s4) ((u1 *) mcodeptr - cd->mcodebase));
4789
4790         return m->entrypoint;
4791 }
4792
4793
4794 /*
4795  * These are local overrides for various environment variables in Emacs.
4796  * Please do not remove this and leave it at the end of the file, where
4797  * Emacs will automagically detect them.
4798  * ---------------------------------------------------------------------
4799  * Local variables:
4800  * mode: c
4801  * indent-tabs-mode: t
4802  * c-basic-offset: 4
4803  * tab-width: 4
4804  * End:
4805  */