1 /* src/vm/jit/alpha/codegen.c - machine code generator for Alpha
3 Copyright (C) 1996-2005 R. Grafl, A. Krall, C. Kruegel, C. Oates,
4 R. Obermaisser, M. Platter, M. Probst, S. Ring, E. Steiner,
5 C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich, J. Wenninger,
6 Institut f. Computersprachen - TU Wien
8 This file is part of CACAO.
10 This program is free software; you can redistribute it and/or
11 modify it under the terms of the GNU General Public License as
12 published by the Free Software Foundation; either version 2, or (at
13 your option) any later version.
15 This program is distributed in the hope that it will be useful, but
16 WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
25 Contact: cacao@complang.tuwien.ac.at
27 Authors: Andreas Krall
30 Changes: Joseph Wenninger
34 $Id: codegen.c 2910 2005-07-05 08:48:07Z twisti $
47 #include "vm/jit/alpha/arch.h"
48 #include "vm/jit/alpha/codegen.h"
49 #include "vm/jit/alpha/types.h"
50 #include "vm/jit/alpha/asmoffsets.h"
52 #include "cacao/cacao.h"
53 #include "native/native.h"
54 #include "vm/builtin.h"
55 #include "vm/global.h"
56 #include "vm/loader.h"
57 #include "vm/stringlocal.h"
58 #include "vm/tables.h"
59 #include "vm/jit/asmpart.h"
60 #include "vm/jit/codegen.inc"
61 #include "vm/jit/jit.h"
64 # include "vm/jit/lsra.h"
65 # include "vm/jit/lsra.inc"
68 #include "vm/jit/parse.h"
69 #include "vm/jit/patcher.h"
70 #include "vm/jit/reg.h"
71 #include "vm/jit/reg.inc"
74 /* codegen *********************************************************************
76 Generates machine code.
78 *******************************************************************************/
80 void codegen(methodinfo *m, codegendata *cd, registerdata *rd)
82 s4 len, s1, s2, s3, d;
92 methodinfo *lm; /* local methodinfo for ICMD_INVOKE* */
93 builtintable_entry *bte;
100 savedregs_num = (m->isleafmethod) ? 0 : 1; /* space to save the RA */
102 /* space to save used callee saved registers */
104 savedregs_num += (INT_SAV_CNT - rd->savintreguse);
105 savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
107 parentargs_base = rd->memuse + savedregs_num;
109 #if defined(USE_THREADS) /* space to save argument of monitor_enter */
111 if (checksync && (m->flags & ACC_SYNCHRONIZED))
116 /* create method header */
118 (void) dseg_addaddress(cd, m); /* MethodPointer */
119 (void) dseg_adds4(cd, parentargs_base * 8); /* FrameSize */
121 #if defined(USE_THREADS)
123 /* IsSync contains the offset relative to the stack pointer for the
124 argument of monitor_exit used in the exception handler. Since the
125 offset could be zero and give a wrong meaning of the flag it is
129 if (checksync && (m->flags & ACC_SYNCHRONIZED))
130 (void) dseg_adds4(cd, (rd->memuse + 1) * 8); /* IsSync */
135 (void) dseg_adds4(cd, 0); /* IsSync */
137 (void) dseg_adds4(cd, m->isleafmethod); /* IsLeaf */
138 (void) dseg_adds4(cd, INT_SAV_CNT - rd->savintreguse);/* IntSave */
139 (void) dseg_adds4(cd, FLT_SAV_CNT - rd->savfltreguse);/* FltSave */
141 dseg_addlinenumbertablesize(cd);
143 (void) dseg_adds4(cd, cd->exceptiontablelength); /* ExTableSize */
145 /* create exception table */
147 for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
148 dseg_addtarget(cd, ex->start);
149 dseg_addtarget(cd, ex->end);
150 dseg_addtarget(cd, ex->handler);
151 (void) dseg_addaddress(cd, ex->catchtype.cls);
154 /* initialize mcode variables */
156 mcodeptr = (s4 *) cd->mcodebase;
157 cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize);
158 MCODECHECK(128 + m->paramcount);
160 /* create stack frame (if necessary) */
162 if (parentargs_base) {
163 M_LDA(REG_SP, REG_SP, -parentargs_base * 8);
166 /* save return address and used callee saved registers */
169 if (!m->isleafmethod) {
170 p--; M_AST(REG_RA, REG_SP, p * 8);
172 for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
173 p--; M_LST(rd->savintregs[i], REG_SP, p * 8);
175 for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
176 p--; M_DST(rd->savfltregs[i], REG_SP, p * 8);
179 /* take arguments out of register or stack frame */
183 for (p = 0, l = 0; p < md->paramcount; p++) {
184 t = md->paramtypes[p].type;
185 var = &(rd->locals[l][t]);
187 if (IS_2_WORD_TYPE(t)) /* increment local counter for 2 word types */
191 s1 = md->params[p].regoff;
192 if (IS_INT_LNG_TYPE(t)) { /* integer args */
193 if (!md->params[p].inmemory) { /* register arguments */
194 s2 = rd->argintregs[s1];
195 if (!(var->flags & INMEMORY)) { /* reg arg -> register */
196 M_INTMOVE(s2, var->regoff);
198 } else { /* reg arg -> spilled */
199 M_LST(s2, REG_SP, var->regoff * 8);
202 } else { /* stack arguments */
203 if (!(var->flags & INMEMORY)) { /* stack arg -> register */
204 M_LLD(var->regoff, REG_SP, (parentargs_base + s1) * 8);
206 } else { /* stack arg -> spilled */
207 var->regoff = parentargs_base + s1;
211 } else { /* floating args */
212 if (!md->params[p].inmemory) { /* register arguments */
213 s2 = rd->argfltregs[s1];
214 if (!(var->flags & INMEMORY)) { /* reg arg -> register */
215 M_FLTMOVE(s2, var->regoff);
217 } else { /* reg arg -> spilled */
218 M_DST(s2, REG_SP, var->regoff * 8);
221 } else { /* stack arguments */
222 if (!(var->flags & INMEMORY)) { /* stack-arg -> register */
223 M_DLD(var->regoff, REG_SP, (parentargs_base + s1) * 8);
225 } else { /* stack-arg -> spilled */
226 var->regoff = parentargs_base + s1;
232 /* call monitorenter function */
234 #if defined(USE_THREADS)
235 if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
236 /* stack offset for monitor argument */
241 M_LDA(REG_SP, REG_SP, -(INT_ARG_CNT + FLT_ARG_CNT) * 8);
243 for (p = 0; p < INT_ARG_CNT; p++)
244 M_LST(rd->argintregs[p], REG_SP, p * 8);
246 for (p = 0; p < FLT_ARG_CNT; p++)
247 M_DST(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
249 s1 += INT_ARG_CNT + FLT_ARG_CNT;
252 /* decide which monitor enter function to call */
254 if (m->flags & ACC_STATIC) {
255 p = dseg_addaddress(cd, m->class);
256 M_ALD(REG_ITMP1, REG_PV, p);
257 M_AST(REG_ITMP1, REG_SP, s1 * 8);
258 M_INTMOVE(REG_ITMP1, rd->argintregs[0]);
259 p = dseg_addaddress(cd, BUILTIN_staticmonitorenter);
260 M_ALD(REG_PV, REG_PV, p);
261 M_JSR(REG_RA, REG_PV);
262 d = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
263 M_LDA(REG_PV, REG_RA, d);
266 M_BEQZ(rd->argintregs[0], 0);
267 codegen_addxnullrefs(cd, mcodeptr);
268 M_AST(rd->argintregs[0], REG_SP, s1 * 8);
269 p = dseg_addaddress(cd, BUILTIN_monitorenter);
270 M_ALD(REG_PV, REG_PV, p);
271 M_JSR(REG_RA, REG_PV);
272 d = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
273 M_LDA(REG_PV, REG_RA, d);
277 for (p = 0; p < INT_ARG_CNT; p++)
278 M_LLD(rd->argintregs[p], REG_SP, p * 8);
280 for (p = 0; p < FLT_ARG_CNT; p++)
281 M_DLD(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
283 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT) * 8);
288 /* call trace function */
291 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
292 M_AST(REG_RA, REG_SP, 1 * 8);
294 /* save integer argument registers */
296 for (p = 0; p < md->paramcount && p < INT_ARG_CNT; p++)
297 M_LST(rd->argintregs[p], REG_SP, (2 + p) * 8);
299 /* save and copy float arguments into integer registers */
301 for (p = 0; p < md->paramcount && p < FLT_ARG_CNT; p++) {
302 t = md->paramtypes[p].type;
304 if (IS_FLT_DBL_TYPE(t)) {
305 if (IS_2_WORD_TYPE(t)) {
306 M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
309 M_FST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
312 M_LLD(rd->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
315 M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
319 p = dseg_addaddress(cd, m);
320 M_ALD(REG_ITMP1, REG_PV, p);
321 M_AST(REG_ITMP1, REG_SP, 0 * 8);
322 p = dseg_addaddress(cd, (void *) builtin_trace_args);
323 M_ALD(REG_PV, REG_PV, p);
324 M_JSR(REG_RA, REG_PV);
325 d = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
326 M_LDA(REG_PV, REG_RA, d);
327 M_ALD(REG_RA, REG_SP, 1 * 8);
329 /* restore integer argument registers */
331 for (p = 0; p < md->paramcount && p < INT_ARG_CNT; p++)
332 M_LLD(rd->argintregs[p], REG_SP, (2 + p) * 8);
334 /* restore float argument registers */
336 for (p = 0; p < md->paramcount && p < FLT_ARG_CNT; p++) {
337 t = md->paramtypes[p].type;
339 if (IS_FLT_DBL_TYPE(t)) {
340 if (IS_2_WORD_TYPE(t)) {
341 M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
344 M_FLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
348 M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
352 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
357 /* end of header generation */
359 /* walk through all basic blocks */
361 for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
363 bptr->mpc = (s4) ((u1 *) mcodeptr - cd->mcodebase);
365 if (bptr->flags >= BBREACHED) {
367 /* branch resolving */
371 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
372 gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
373 brefs->branchpos, bptr->mpc);
377 /* copy interface registers to their destination */
384 while (src != NULL) {
386 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
387 /* d = reg_of_var(m, src, REG_ITMP1); */
388 if (!(src->flags & INMEMORY))
392 M_INTMOVE(REG_ITMP1, d);
393 store_reg_to_var_int(src, d);
399 while (src != NULL) {
401 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
402 d = reg_of_var(rd, src, REG_ITMP1);
403 M_INTMOVE(REG_ITMP1, d);
404 store_reg_to_var_int(src, d);
407 d = reg_of_var(rd, src, REG_IFTMP);
408 if ((src->varkind != STACKVAR)) {
410 if (IS_FLT_DBL_TYPE(s2)) {
411 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
412 s1 = rd->interfaces[len][s2].regoff;
416 M_DLD(d, REG_SP, 8 * rd->interfaces[len][s2].regoff);
418 store_reg_to_var_flt(src, d);
421 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
422 s1 = rd->interfaces[len][s2].regoff;
426 M_LLD(d, REG_SP, 8 * rd->interfaces[len][s2].regoff);
428 store_reg_to_var_int(src, d);
438 /* walk through all instructions */
443 for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) {
444 if (iptr->line != currentline) {
445 dseg_addlinenumber(cd, iptr->line, mcodeptr);
446 currentline = iptr->line;
449 MCODECHECK(64); /* an instruction usually needs < 64 words */
452 case ICMD_INLINE_START:
453 case ICMD_INLINE_END:
456 case ICMD_NOP: /* ... ==> ... */
459 case ICMD_CHECKNULL: /* ..., objectref ==> ..., objectref */
461 var_to_reg_int(s1, src, REG_ITMP1);
463 codegen_addxnullrefs(cd, mcodeptr);
466 /* constant operations ************************************************/
468 case ICMD_ICONST: /* ... ==> ..., constant */
469 /* op1 = 0, val.i = constant */
471 d = reg_of_var(rd, iptr->dst, REG_ITMP1);
472 ICONST(d, iptr->val.i);
473 store_reg_to_var_int(iptr->dst, d);
476 case ICMD_LCONST: /* ... ==> ..., constant */
477 /* op1 = 0, val.l = constant */
479 d = reg_of_var(rd, iptr->dst, REG_ITMP1);
480 LCONST(d, iptr->val.l);
481 store_reg_to_var_int(iptr->dst, d);
484 case ICMD_FCONST: /* ... ==> ..., constant */
485 /* op1 = 0, val.f = constant */
487 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
488 a = dseg_addfloat(cd, iptr->val.f);
490 store_reg_to_var_flt(iptr->dst, d);
493 case ICMD_DCONST: /* ... ==> ..., constant */
494 /* op1 = 0, val.d = constant */
496 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
497 a = dseg_adddouble(cd, iptr->val.d);
499 store_reg_to_var_flt(iptr->dst, d);
502 case ICMD_ACONST: /* ... ==> ..., constant */
503 /* op1 = 0, val.a = constant */
505 d = reg_of_var(rd, iptr->dst, REG_ITMP1);
507 a = dseg_addaddress(cd, iptr->val.a);
510 M_INTMOVE(REG_ZERO, d);
512 store_reg_to_var_int(iptr->dst, d);
516 /* load/store operations **********************************************/
518 case ICMD_ILOAD: /* ... ==> ..., content of local variable */
519 case ICMD_LLOAD: /* op1 = local variable */
522 d = reg_of_var(rd, iptr->dst, REG_ITMP1);
523 if ((iptr->dst->varkind == LOCALVAR) &&
524 (iptr->dst->varnum == iptr->op1))
526 var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
527 if (var->flags & INMEMORY)
528 M_LLD(d, REG_SP, 8 * var->regoff);
530 {M_INTMOVE(var->regoff,d);}
531 store_reg_to_var_int(iptr->dst, d);
534 case ICMD_FLOAD: /* ... ==> ..., content of local variable */
535 case ICMD_DLOAD: /* op1 = local variable */
537 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
538 if ((iptr->dst->varkind == LOCALVAR) &&
539 (iptr->dst->varnum == iptr->op1))
541 var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
542 if (var->flags & INMEMORY)
543 M_DLD(d, REG_SP, 8 * var->regoff);
545 {M_FLTMOVE(var->regoff,d);}
546 store_reg_to_var_flt(iptr->dst, d);
550 case ICMD_ISTORE: /* ..., value ==> ... */
551 case ICMD_LSTORE: /* op1 = local variable */
554 if ((src->varkind == LOCALVAR) &&
555 (src->varnum == iptr->op1))
557 var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
558 if (var->flags & INMEMORY) {
559 var_to_reg_int(s1, src, REG_ITMP1);
560 M_LST(s1, REG_SP, 8 * var->regoff);
563 var_to_reg_int(s1, src, var->regoff);
564 M_INTMOVE(s1, var->regoff);
568 case ICMD_FSTORE: /* ..., value ==> ... */
569 case ICMD_DSTORE: /* op1 = local variable */
571 if ((src->varkind == LOCALVAR) &&
572 (src->varnum == iptr->op1))
574 var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
575 if (var->flags & INMEMORY) {
576 var_to_reg_flt(s1, src, REG_FTMP1);
577 M_DST(s1, REG_SP, 8 * var->regoff);
580 var_to_reg_flt(s1, src, var->regoff);
581 M_FLTMOVE(s1, var->regoff);
586 /* pop/dup/swap operations ********************************************/
588 /* attention: double and longs are only one entry in CACAO ICMDs */
590 case ICMD_POP: /* ..., value ==> ... */
591 case ICMD_POP2: /* ..., value, value ==> ... */
594 case ICMD_DUP: /* ..., a ==> ..., a, a */
595 M_COPY(src, iptr->dst);
598 case ICMD_DUP_X1: /* ..., a, b ==> ..., b, a, b */
600 M_COPY(src, iptr->dst);
601 M_COPY(src->prev, iptr->dst->prev);
602 M_COPY(iptr->dst, iptr->dst->prev->prev);
605 case ICMD_DUP_X2: /* ..., a, b, c ==> ..., c, a, b, c */
607 M_COPY(src, iptr->dst);
608 M_COPY(src->prev, iptr->dst->prev);
609 M_COPY(src->prev->prev, iptr->dst->prev->prev);
610 M_COPY(iptr->dst, iptr->dst->prev->prev->prev);
613 case ICMD_DUP2: /* ..., a, b ==> ..., a, b, a, b */
615 M_COPY(src, iptr->dst);
616 M_COPY(src->prev, iptr->dst->prev);
619 case ICMD_DUP2_X1: /* ..., a, b, c ==> ..., b, c, a, b, c */
621 M_COPY(src, iptr->dst);
622 M_COPY(src->prev, iptr->dst->prev);
623 M_COPY(src->prev->prev, iptr->dst->prev->prev);
624 M_COPY(iptr->dst, iptr->dst->prev->prev->prev);
625 M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
628 case ICMD_DUP2_X2: /* ..., a, b, c, d ==> ..., c, d, a, b, c, d */
630 M_COPY(src, iptr->dst);
631 M_COPY(src->prev, iptr->dst->prev);
632 M_COPY(src->prev->prev, iptr->dst->prev->prev);
633 M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
634 M_COPY(iptr->dst, iptr->dst->prev->prev->prev->prev);
635 M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev->prev);
638 case ICMD_SWAP: /* ..., a, b ==> ..., b, a */
640 M_COPY(src, iptr->dst->prev);
641 M_COPY(src->prev, iptr->dst);
645 /* integer operations *************************************************/
647 case ICMD_INEG: /* ..., value ==> ..., - value */
649 var_to_reg_int(s1, src, REG_ITMP1);
650 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
651 M_ISUB(REG_ZERO, s1, d);
652 store_reg_to_var_int(iptr->dst, d);
655 case ICMD_LNEG: /* ..., value ==> ..., - value */
657 var_to_reg_int(s1, src, REG_ITMP1);
658 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
659 M_LSUB(REG_ZERO, s1, d);
660 store_reg_to_var_int(iptr->dst, d);
663 case ICMD_I2L: /* ..., value ==> ..., value */
665 var_to_reg_int(s1, src, REG_ITMP1);
666 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
668 store_reg_to_var_int(iptr->dst, d);
671 case ICMD_L2I: /* ..., value ==> ..., value */
673 var_to_reg_int(s1, src, REG_ITMP1);
674 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
675 M_IADD(s1, REG_ZERO, d );
676 store_reg_to_var_int(iptr->dst, d);
679 case ICMD_INT2BYTE: /* ..., value ==> ..., value */
681 var_to_reg_int(s1, src, REG_ITMP1);
682 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
683 if (has_ext_instr_set) {
687 M_SLL_IMM(s1, 56, d);
688 M_SRA_IMM( d, 56, d);
690 store_reg_to_var_int(iptr->dst, d);
693 case ICMD_INT2CHAR: /* ..., value ==> ..., value */
695 var_to_reg_int(s1, src, REG_ITMP1);
696 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
698 store_reg_to_var_int(iptr->dst, d);
701 case ICMD_INT2SHORT: /* ..., value ==> ..., value */
703 var_to_reg_int(s1, src, REG_ITMP1);
704 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
705 if (has_ext_instr_set) {
709 M_SLL_IMM(s1, 48, d);
710 M_SRA_IMM( d, 48, d);
712 store_reg_to_var_int(iptr->dst, d);
716 case ICMD_IADD: /* ..., val1, val2 ==> ..., val1 + val2 */
718 var_to_reg_int(s1, src->prev, REG_ITMP1);
719 var_to_reg_int(s2, src, REG_ITMP2);
720 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
722 store_reg_to_var_int(iptr->dst, d);
725 case ICMD_IADDCONST: /* ..., value ==> ..., value + constant */
726 /* val.i = constant */
728 var_to_reg_int(s1, src, REG_ITMP1);
729 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
730 if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
731 M_IADD_IMM(s1, iptr->val.i, d);
734 ICONST(REG_ITMP2, iptr->val.i);
735 M_IADD(s1, REG_ITMP2, d);
737 store_reg_to_var_int(iptr->dst, d);
740 case ICMD_LADD: /* ..., val1, val2 ==> ..., val1 + val2 */
742 var_to_reg_int(s1, src->prev, REG_ITMP1);
743 var_to_reg_int(s2, src, REG_ITMP2);
744 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
746 store_reg_to_var_int(iptr->dst, d);
749 case ICMD_LADDCONST: /* ..., value ==> ..., value + constant */
750 /* val.l = constant */
752 var_to_reg_int(s1, src, REG_ITMP1);
753 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
754 if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
755 M_LADD_IMM(s1, iptr->val.l, d);
758 LCONST(REG_ITMP2, iptr->val.l);
759 M_LADD(s1, REG_ITMP2, d);
761 store_reg_to_var_int(iptr->dst, d);
764 case ICMD_ISUB: /* ..., val1, val2 ==> ..., val1 - val2 */
766 var_to_reg_int(s1, src->prev, REG_ITMP1);
767 var_to_reg_int(s2, src, REG_ITMP2);
768 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
770 store_reg_to_var_int(iptr->dst, d);
773 case ICMD_ISUBCONST: /* ..., value ==> ..., value + constant */
774 /* val.i = constant */
776 var_to_reg_int(s1, src, REG_ITMP1);
777 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
778 if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
779 M_ISUB_IMM(s1, iptr->val.i, d);
782 ICONST(REG_ITMP2, iptr->val.i);
783 M_ISUB(s1, REG_ITMP2, d);
785 store_reg_to_var_int(iptr->dst, d);
788 case ICMD_LSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
790 var_to_reg_int(s1, src->prev, REG_ITMP1);
791 var_to_reg_int(s2, src, REG_ITMP2);
792 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
794 store_reg_to_var_int(iptr->dst, d);
797 case ICMD_LSUBCONST: /* ..., value ==> ..., value - constant */
798 /* val.l = constant */
800 var_to_reg_int(s1, src, REG_ITMP1);
801 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
802 if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
803 M_LSUB_IMM(s1, iptr->val.l, d);
806 LCONST(REG_ITMP2, iptr->val.l);
807 M_LSUB(s1, REG_ITMP2, d);
809 store_reg_to_var_int(iptr->dst, d);
812 case ICMD_IMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
814 var_to_reg_int(s1, src->prev, REG_ITMP1);
815 var_to_reg_int(s2, src, REG_ITMP2);
816 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
818 store_reg_to_var_int(iptr->dst, d);
821 case ICMD_IMULCONST: /* ..., value ==> ..., value * constant */
822 /* val.i = constant */
824 var_to_reg_int(s1, src, REG_ITMP1);
825 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
826 if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
827 M_IMUL_IMM(s1, iptr->val.i, d);
830 ICONST(REG_ITMP2, iptr->val.i);
831 M_IMUL(s1, REG_ITMP2, d);
833 store_reg_to_var_int(iptr->dst, d);
836 case ICMD_LMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
838 var_to_reg_int(s1, src->prev, REG_ITMP1);
839 var_to_reg_int(s2, src, REG_ITMP2);
840 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
842 store_reg_to_var_int(iptr->dst, d);
845 case ICMD_LMULCONST: /* ..., value ==> ..., value * constant */
846 /* val.l = constant */
848 var_to_reg_int(s1, src, REG_ITMP1);
849 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
850 if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
851 M_LMUL_IMM(s1, iptr->val.l, d);
854 LCONST(REG_ITMP2, iptr->val.l);
855 M_LMUL(s1, REG_ITMP2, d);
857 store_reg_to_var_int(iptr->dst, d);
860 case ICMD_IDIVPOW2: /* ..., value ==> ..., value << constant */
861 case ICMD_LDIVPOW2: /* val.i = constant */
863 var_to_reg_int(s1, src, REG_ITMP1);
864 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
865 if (iptr->val.i <= 15) {
866 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
867 M_CMOVGE(s1, s1, REG_ITMP2);
870 M_SRA_IMM(s1, 63, REG_ITMP2);
871 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
872 M_LADD(s1, REG_ITMP2, REG_ITMP2);
874 M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
875 store_reg_to_var_int(iptr->dst, d);
878 case ICMD_ISHL: /* ..., val1, val2 ==> ..., val1 << val2 */
880 var_to_reg_int(s1, src->prev, REG_ITMP1);
881 var_to_reg_int(s2, src, REG_ITMP2);
882 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
883 M_AND_IMM(s2, 0x1f, REG_ITMP3);
884 M_SLL(s1, REG_ITMP3, d);
885 M_IADD(d, REG_ZERO, d);
886 store_reg_to_var_int(iptr->dst, d);
889 case ICMD_ISHLCONST: /* ..., value ==> ..., value << constant */
890 /* val.i = constant */
892 var_to_reg_int(s1, src, REG_ITMP1);
893 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
894 M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
895 M_IADD(d, REG_ZERO, d);
896 store_reg_to_var_int(iptr->dst, d);
899 case ICMD_ISHR: /* ..., val1, val2 ==> ..., val1 >> val2 */
901 var_to_reg_int(s1, src->prev, REG_ITMP1);
902 var_to_reg_int(s2, src, REG_ITMP2);
903 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
904 M_AND_IMM(s2, 0x1f, REG_ITMP3);
905 M_SRA(s1, REG_ITMP3, d);
906 store_reg_to_var_int(iptr->dst, d);
909 case ICMD_ISHRCONST: /* ..., value ==> ..., value >> constant */
910 /* val.i = constant */
912 var_to_reg_int(s1, src, REG_ITMP1);
913 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
914 M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
915 store_reg_to_var_int(iptr->dst, d);
918 case ICMD_IUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */
920 var_to_reg_int(s1, src->prev, REG_ITMP1);
921 var_to_reg_int(s2, src, REG_ITMP2);
922 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
923 M_AND_IMM(s2, 0x1f, REG_ITMP2);
925 M_SRL(d, REG_ITMP2, d);
926 M_IADD(d, REG_ZERO, d);
927 store_reg_to_var_int(iptr->dst, d);
930 case ICMD_IUSHRCONST: /* ..., value ==> ..., value >>> constant */
931 /* val.i = constant */
933 var_to_reg_int(s1, src, REG_ITMP1);
934 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
936 M_SRL_IMM(d, iptr->val.i & 0x1f, d);
937 M_IADD(d, REG_ZERO, d);
938 store_reg_to_var_int(iptr->dst, d);
941 case ICMD_LSHL: /* ..., val1, val2 ==> ..., val1 << val2 */
943 var_to_reg_int(s1, src->prev, REG_ITMP1);
944 var_to_reg_int(s2, src, REG_ITMP2);
945 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
947 store_reg_to_var_int(iptr->dst, d);
950 case ICMD_LSHLCONST: /* ..., value ==> ..., value << constant */
951 /* val.i = constant */
953 var_to_reg_int(s1, src, REG_ITMP1);
954 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
955 M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
956 store_reg_to_var_int(iptr->dst, d);
959 case ICMD_LSHR: /* ..., val1, val2 ==> ..., val1 >> val2 */
961 var_to_reg_int(s1, src->prev, REG_ITMP1);
962 var_to_reg_int(s2, src, REG_ITMP2);
963 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
965 store_reg_to_var_int(iptr->dst, d);
968 case ICMD_LSHRCONST: /* ..., value ==> ..., value >> constant */
969 /* val.i = constant */
971 var_to_reg_int(s1, src, REG_ITMP1);
972 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
973 M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
974 store_reg_to_var_int(iptr->dst, d);
977 case ICMD_LUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */
979 var_to_reg_int(s1, src->prev, REG_ITMP1);
980 var_to_reg_int(s2, src, REG_ITMP2);
981 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
983 store_reg_to_var_int(iptr->dst, d);
986 case ICMD_LUSHRCONST: /* ..., value ==> ..., value >>> constant */
987 /* val.i = constant */
989 var_to_reg_int(s1, src, REG_ITMP1);
990 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
991 M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
992 store_reg_to_var_int(iptr->dst, d);
995 case ICMD_IAND: /* ..., val1, val2 ==> ..., val1 & val2 */
998 var_to_reg_int(s1, src->prev, REG_ITMP1);
999 var_to_reg_int(s2, src, REG_ITMP2);
1000 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1002 store_reg_to_var_int(iptr->dst, d);
1005 case ICMD_IANDCONST: /* ..., value ==> ..., value & constant */
1006 /* val.i = constant */
1008 var_to_reg_int(s1, src, REG_ITMP1);
1009 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1010 if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1011 M_AND_IMM(s1, iptr->val.i, d);
1013 else if (iptr->val.i == 0xffff) {
1016 else if (iptr->val.i == 0xffffff) {
1017 M_ZAPNOT_IMM(s1, 0x07, d);
1020 ICONST(REG_ITMP2, iptr->val.i);
1021 M_AND(s1, REG_ITMP2, d);
1023 store_reg_to_var_int(iptr->dst, d);
1026 case ICMD_IREMPOW2: /* ..., value ==> ..., value % constant */
1027 /* val.i = constant */
1029 var_to_reg_int(s1, src, REG_ITMP1);
1030 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1032 M_MOV(s1, REG_ITMP1);
1035 if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1036 M_AND_IMM(s1, iptr->val.i, d);
1038 M_ISUB(REG_ZERO, s1, d);
1039 M_AND_IMM(d, iptr->val.i, d);
1041 else if (iptr->val.i == 0xffff) {
1044 M_ISUB(REG_ZERO, s1, d);
1047 else if (iptr->val.i == 0xffffff) {
1048 M_ZAPNOT_IMM(s1, 0x07, d);
1050 M_ISUB(REG_ZERO, s1, d);
1051 M_ZAPNOT_IMM(d, 0x07, d);
1054 ICONST(REG_ITMP2, iptr->val.i);
1055 M_AND(s1, REG_ITMP2, d);
1057 M_ISUB(REG_ZERO, s1, d);
1058 M_AND(d, REG_ITMP2, d);
1060 M_ISUB(REG_ZERO, d, d);
1061 store_reg_to_var_int(iptr->dst, d);
1064 case ICMD_LANDCONST: /* ..., value ==> ..., value & constant */
1065 /* val.l = constant */
1067 var_to_reg_int(s1, src, REG_ITMP1);
1068 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1069 if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1070 M_AND_IMM(s1, iptr->val.l, d);
1072 else if (iptr->val.l == 0xffffL) {
1075 else if (iptr->val.l == 0xffffffL) {
1076 M_ZAPNOT_IMM(s1, 0x07, d);
1078 else if (iptr->val.l == 0xffffffffL) {
1081 else if (iptr->val.l == 0xffffffffffL) {
1082 M_ZAPNOT_IMM(s1, 0x1f, d);
1084 else if (iptr->val.l == 0xffffffffffffL) {
1085 M_ZAPNOT_IMM(s1, 0x3f, d);
1087 else if (iptr->val.l == 0xffffffffffffffL) {
1088 M_ZAPNOT_IMM(s1, 0x7f, d);
1091 LCONST(REG_ITMP2, iptr->val.l);
1092 M_AND(s1, REG_ITMP2, d);
1094 store_reg_to_var_int(iptr->dst, d);
1097 case ICMD_LREMPOW2: /* ..., value ==> ..., value % constant */
1098 /* val.l = constant */
1100 var_to_reg_int(s1, src, REG_ITMP1);
1101 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1103 M_MOV(s1, REG_ITMP1);
1106 if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1107 M_AND_IMM(s1, iptr->val.l, d);
1109 M_LSUB(REG_ZERO, s1, d);
1110 M_AND_IMM(d, iptr->val.l, d);
1112 else if (iptr->val.l == 0xffffL) {
1115 M_LSUB(REG_ZERO, s1, d);
1118 else if (iptr->val.l == 0xffffffL) {
1119 M_ZAPNOT_IMM(s1, 0x07, d);
1121 M_LSUB(REG_ZERO, s1, d);
1122 M_ZAPNOT_IMM(d, 0x07, d);
1124 else if (iptr->val.l == 0xffffffffL) {
1127 M_LSUB(REG_ZERO, s1, d);
1130 else if (iptr->val.l == 0xffffffffffL) {
1131 M_ZAPNOT_IMM(s1, 0x1f, d);
1133 M_LSUB(REG_ZERO, s1, d);
1134 M_ZAPNOT_IMM(d, 0x1f, d);
1136 else if (iptr->val.l == 0xffffffffffffL) {
1137 M_ZAPNOT_IMM(s1, 0x3f, d);
1139 M_LSUB(REG_ZERO, s1, d);
1140 M_ZAPNOT_IMM(d, 0x3f, d);
1142 else if (iptr->val.l == 0xffffffffffffffL) {
1143 M_ZAPNOT_IMM(s1, 0x7f, d);
1145 M_LSUB(REG_ZERO, s1, d);
1146 M_ZAPNOT_IMM(d, 0x7f, d);
1149 LCONST(REG_ITMP2, iptr->val.l);
1150 M_AND(s1, REG_ITMP2, d);
1152 M_LSUB(REG_ZERO, s1, d);
1153 M_AND(d, REG_ITMP2, d);
1155 M_LSUB(REG_ZERO, d, d);
1156 store_reg_to_var_int(iptr->dst, d);
1159 case ICMD_IOR: /* ..., val1, val2 ==> ..., val1 | val2 */
1162 var_to_reg_int(s1, src->prev, REG_ITMP1);
1163 var_to_reg_int(s2, src, REG_ITMP2);
1164 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1166 store_reg_to_var_int(iptr->dst, d);
1169 case ICMD_IORCONST: /* ..., value ==> ..., value | constant */
1170 /* val.i = constant */
1172 var_to_reg_int(s1, src, REG_ITMP1);
1173 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1174 if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1175 M_OR_IMM(s1, iptr->val.i, d);
1178 ICONST(REG_ITMP2, iptr->val.i);
1179 M_OR(s1, REG_ITMP2, d);
1181 store_reg_to_var_int(iptr->dst, d);
1184 case ICMD_LORCONST: /* ..., value ==> ..., value | constant */
1185 /* val.l = constant */
1187 var_to_reg_int(s1, src, REG_ITMP1);
1188 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1189 if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1190 M_OR_IMM(s1, iptr->val.l, d);
1193 LCONST(REG_ITMP2, iptr->val.l);
1194 M_OR(s1, REG_ITMP2, d);
1196 store_reg_to_var_int(iptr->dst, d);
1199 case ICMD_IXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
1202 var_to_reg_int(s1, src->prev, REG_ITMP1);
1203 var_to_reg_int(s2, src, REG_ITMP2);
1204 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1206 store_reg_to_var_int(iptr->dst, d);
1209 case ICMD_IXORCONST: /* ..., value ==> ..., value ^ constant */
1210 /* val.i = constant */
1212 var_to_reg_int(s1, src, REG_ITMP1);
1213 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1214 if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1215 M_XOR_IMM(s1, iptr->val.i, d);
1218 ICONST(REG_ITMP2, iptr->val.i);
1219 M_XOR(s1, REG_ITMP2, d);
1221 store_reg_to_var_int(iptr->dst, d);
1224 case ICMD_LXORCONST: /* ..., value ==> ..., value ^ constant */
1225 /* val.l = constant */
1227 var_to_reg_int(s1, src, REG_ITMP1);
1228 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1229 if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1230 M_XOR_IMM(s1, iptr->val.l, d);
1233 LCONST(REG_ITMP2, iptr->val.l);
1234 M_XOR(s1, REG_ITMP2, d);
1236 store_reg_to_var_int(iptr->dst, d);
1240 case ICMD_LCMP: /* ..., val1, val2 ==> ..., val1 cmp val2 */
1242 var_to_reg_int(s1, src->prev, REG_ITMP1);
1243 var_to_reg_int(s2, src, REG_ITMP2);
1244 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1245 M_CMPLT(s1, s2, REG_ITMP3);
1246 M_CMPLT(s2, s1, REG_ITMP1);
1247 M_LSUB (REG_ITMP1, REG_ITMP3, d);
1248 store_reg_to_var_int(iptr->dst, d);
1252 case ICMD_IINC: /* ..., value ==> ..., value + constant */
1253 /* op1 = variable, val.i = constant */
1255 var = &(rd->locals[iptr->op1][TYPE_INT]);
1256 if (var->flags & INMEMORY) {
1258 M_LLD(s1, REG_SP, 8 * var->regoff);
1262 if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1263 M_IADD_IMM(s1, iptr->val.i, s1);
1265 else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1266 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1269 M_LDA (s1, s1, iptr->val.i);
1270 M_IADD(s1, REG_ZERO, s1);
1272 if (var->flags & INMEMORY)
1273 M_LST(s1, REG_SP, 8 * var->regoff);
1277 /* floating operations ************************************************/
1279 case ICMD_FNEG: /* ..., value ==> ..., - value */
1281 var_to_reg_flt(s1, src, REG_FTMP1);
1282 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1284 store_reg_to_var_flt(iptr->dst, d);
1287 case ICMD_DNEG: /* ..., value ==> ..., - value */
1289 var_to_reg_flt(s1, src, REG_FTMP1);
1290 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1292 store_reg_to_var_flt(iptr->dst, d);
1295 case ICMD_FADD: /* ..., val1, val2 ==> ..., val1 + val2 */
1297 var_to_reg_flt(s1, src->prev, REG_FTMP1);
1298 var_to_reg_flt(s2, src, REG_FTMP2);
1299 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1304 if (d == s1 || d == s2) {
1305 M_FADDS(s1, s2, REG_FTMP3);
1307 M_FMOV(REG_FTMP3, d);
1314 store_reg_to_var_flt(iptr->dst, d);
1317 case ICMD_DADD: /* ..., val1, val2 ==> ..., val1 + val2 */
1319 var_to_reg_flt(s1, src->prev, REG_FTMP1);
1320 var_to_reg_flt(s2, src, REG_FTMP2);
1321 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1326 if (d == s1 || d == s2) {
1327 M_DADDS(s1, s2, REG_FTMP3);
1329 M_FMOV(REG_FTMP3, d);
1336 store_reg_to_var_flt(iptr->dst, d);
1339 case ICMD_FSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
1341 var_to_reg_flt(s1, src->prev, REG_FTMP1);
1342 var_to_reg_flt(s2, src, REG_FTMP2);
1343 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1348 if (d == s1 || d == s2) {
1349 M_FSUBS(s1, s2, REG_FTMP3);
1351 M_FMOV(REG_FTMP3, d);
1358 store_reg_to_var_flt(iptr->dst, d);
1361 case ICMD_DSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
1363 var_to_reg_flt(s1, src->prev, REG_FTMP1);
1364 var_to_reg_flt(s2, src, REG_FTMP2);
1365 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1370 if (d == s1 || d == s2) {
1371 M_DSUBS(s1, s2, REG_FTMP3);
1373 M_FMOV(REG_FTMP3, d);
1380 store_reg_to_var_flt(iptr->dst, d);
1383 case ICMD_FMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
1385 var_to_reg_flt(s1, src->prev, REG_FTMP1);
1386 var_to_reg_flt(s2, src, REG_FTMP2);
1387 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1392 if (d == s1 || d == s2) {
1393 M_FMULS(s1, s2, REG_FTMP3);
1395 M_FMOV(REG_FTMP3, d);
1402 store_reg_to_var_flt(iptr->dst, d);
1405 case ICMD_DMUL: /* ..., val1, val2 ==> ..., val1 *** val2 */
1407 var_to_reg_flt(s1, src->prev, REG_FTMP1);
1408 var_to_reg_flt(s2, src, REG_FTMP2);
1409 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1414 if (d == s1 || d == s2) {
1415 M_DMULS(s1, s2, REG_FTMP3);
1417 M_FMOV(REG_FTMP3, d);
1424 store_reg_to_var_flt(iptr->dst, d);
1427 case ICMD_FDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
1429 var_to_reg_flt(s1, src->prev, REG_FTMP1);
1430 var_to_reg_flt(s2, src, REG_FTMP2);
1431 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1436 if (d == s1 || d == s2) {
1437 M_FDIVS(s1, s2, REG_FTMP3);
1439 M_FMOV(REG_FTMP3, d);
1446 store_reg_to_var_flt(iptr->dst, d);
1449 case ICMD_DDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
1451 var_to_reg_flt(s1, src->prev, REG_FTMP1);
1452 var_to_reg_flt(s2, src, REG_FTMP2);
1453 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1458 if (d == s1 || d == s2) {
1459 M_DDIVS(s1, s2, REG_FTMP3);
1461 M_FMOV(REG_FTMP3, d);
1468 store_reg_to_var_flt(iptr->dst, d);
1471 case ICMD_I2F: /* ..., value ==> ..., (float) value */
1473 var_to_reg_int(s1, src, REG_ITMP1);
1474 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1475 a = dseg_adddouble(cd, 0.0);
1476 M_LST (s1, REG_PV, a);
1477 M_DLD (d, REG_PV, a);
1479 store_reg_to_var_flt(iptr->dst, d);
1482 case ICMD_I2D: /* ..., value ==> ..., (double) value */
1484 var_to_reg_int(s1, src, REG_ITMP1);
1485 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1486 a = dseg_adddouble(cd, 0.0);
1487 M_LST (s1, REG_PV, a);
1488 M_DLD (d, REG_PV, a);
1490 store_reg_to_var_flt(iptr->dst, d);
1493 case ICMD_F2I: /* ..., value ==> ..., (int) value */
1495 var_to_reg_flt(s1, src, REG_FTMP1);
1496 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1497 a = dseg_adddouble(cd, 0.0);
1498 M_CVTDL_C(s1, REG_FTMP2);
1499 M_CVTLI(REG_FTMP2, REG_FTMP3);
1500 M_DST (REG_FTMP3, REG_PV, a);
1501 M_ILD (d, REG_PV, a);
1502 store_reg_to_var_int(iptr->dst, d);
1505 case ICMD_F2L: /* ..., value ==> ..., (long) value */
1507 var_to_reg_flt(s1, src, REG_FTMP1);
1508 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1509 a = dseg_adddouble(cd, 0.0);
1510 M_CVTDL_C(s1, REG_FTMP2);
1511 M_DST (REG_FTMP2, REG_PV, a);
1512 M_LLD (d, REG_PV, a);
1513 store_reg_to_var_int(iptr->dst, d);
1516 case ICMD_F2D: /* ..., value ==> ..., (double) value */
1518 var_to_reg_flt(s1, src, REG_FTMP1);
1519 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1522 store_reg_to_var_flt(iptr->dst, d);
1525 case ICMD_D2F: /* ..., value ==> ..., (float) value */
1527 var_to_reg_flt(s1, src, REG_FTMP1);
1528 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1536 store_reg_to_var_flt(iptr->dst, d);
1539 case ICMD_FCMPL: /* ..., val1, val2 ==> ..., val1 fcmpl val2 */
1541 var_to_reg_flt(s1, src->prev, REG_FTMP1);
1542 var_to_reg_flt(s2, src, REG_FTMP2);
1543 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1545 M_LSUB_IMM(REG_ZERO, 1, d);
1546 M_FCMPEQ(s1, s2, REG_FTMP3);
1547 M_FBEQZ (REG_FTMP3, 1); /* jump over next instructions */
1549 M_FCMPLT(s2, s1, REG_FTMP3);
1550 M_FBEQZ (REG_FTMP3, 1); /* jump over next instruction */
1551 M_LADD_IMM(REG_ZERO, 1, d);
1554 M_LSUB_IMM(REG_ZERO, 1, d);
1555 M_FCMPEQS(s1, s2, REG_FTMP3);
1557 M_FBEQZ (REG_FTMP3, 1); /* jump over next instructions */
1559 M_FCMPLTS(s2, s1, REG_FTMP3);
1561 M_FBEQZ (REG_FTMP3, 1); /* jump over next instruction */
1562 M_LADD_IMM(REG_ZERO, 1, d);
1564 store_reg_to_var_int(iptr->dst, d);
1567 case ICMD_FCMPG: /* ..., val1, val2 ==> ..., val1 fcmpg val2 */
1569 var_to_reg_flt(s1, src->prev, REG_FTMP1);
1570 var_to_reg_flt(s2, src, REG_FTMP2);
1571 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1573 M_LADD_IMM(REG_ZERO, 1, d);
1574 M_FCMPEQ(s1, s2, REG_FTMP3);
1575 M_FBEQZ (REG_FTMP3, 1); /* jump over next instruction */
1577 M_FCMPLT(s1, s2, REG_FTMP3);
1578 M_FBEQZ (REG_FTMP3, 1); /* jump over next instruction */
1579 M_LSUB_IMM(REG_ZERO, 1, d);
1582 M_LADD_IMM(REG_ZERO, 1, d);
1583 M_FCMPEQS(s1, s2, REG_FTMP3);
1585 M_FBEQZ (REG_FTMP3, 1); /* jump over next instruction */
1587 M_FCMPLTS(s1, s2, REG_FTMP3);
1589 M_FBEQZ (REG_FTMP3, 1); /* jump over next instruction */
1590 M_LSUB_IMM(REG_ZERO, 1, d);
1592 store_reg_to_var_int(iptr->dst, d);
1596 /* memory operations **************************************************/
1598 case ICMD_ARRAYLENGTH: /* ..., arrayref ==> ..., length */
1600 var_to_reg_int(s1, src, REG_ITMP1);
1601 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1602 gen_nullptr_check(s1);
1603 M_ILD(d, s1, OFFSET(java_arrayheader, size));
1604 store_reg_to_var_int(iptr->dst, d);
1607 case ICMD_AALOAD: /* ..., arrayref, index ==> ..., value */
1609 var_to_reg_int(s1, src->prev, REG_ITMP1);
1610 var_to_reg_int(s2, src, REG_ITMP2);
1611 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1612 if (iptr->op1 == 0) {
1613 gen_nullptr_check(s1);
1616 M_SAADDQ(s2, s1, REG_ITMP1);
1617 M_ALD( d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1618 store_reg_to_var_int(iptr->dst, d);
1621 case ICMD_LALOAD: /* ..., arrayref, index ==> ..., value */
1623 var_to_reg_int(s1, src->prev, REG_ITMP1);
1624 var_to_reg_int(s2, src, REG_ITMP2);
1625 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1626 if (iptr->op1 == 0) {
1627 gen_nullptr_check(s1);
1630 M_S8ADDQ(s2, s1, REG_ITMP1);
1631 M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1632 store_reg_to_var_int(iptr->dst, d);
1635 case ICMD_IALOAD: /* ..., arrayref, index ==> ..., value */
1637 var_to_reg_int(s1, src->prev, REG_ITMP1);
1638 var_to_reg_int(s2, src, REG_ITMP2);
1639 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1640 if (iptr->op1 == 0) {
1641 gen_nullptr_check(s1);
1645 M_S4ADDQ(s2, s1, REG_ITMP1);
1646 M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1647 store_reg_to_var_int(iptr->dst, d);
1650 case ICMD_FALOAD: /* ..., arrayref, index ==> ..., value */
1652 var_to_reg_int(s1, src->prev, REG_ITMP1);
1653 var_to_reg_int(s2, src, REG_ITMP2);
1654 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1655 if (iptr->op1 == 0) {
1656 gen_nullptr_check(s1);
1659 M_S4ADDQ(s2, s1, REG_ITMP1);
1660 M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1661 store_reg_to_var_flt(iptr->dst, d);
1664 case ICMD_DALOAD: /* ..., arrayref, index ==> ..., value */
1666 var_to_reg_int(s1, src->prev, REG_ITMP1);
1667 var_to_reg_int(s2, src, REG_ITMP2);
1668 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1669 if (iptr->op1 == 0) {
1670 gen_nullptr_check(s1);
1673 M_S8ADDQ(s2, s1, REG_ITMP1);
1674 M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1675 store_reg_to_var_flt(iptr->dst, d);
1678 case ICMD_CALOAD: /* ..., arrayref, index ==> ..., value */
1680 var_to_reg_int(s1, src->prev, REG_ITMP1);
1681 var_to_reg_int(s2, src, REG_ITMP2);
1682 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1683 if (iptr->op1 == 0) {
1684 gen_nullptr_check(s1);
1687 if (has_ext_instr_set) {
1688 M_LADD(s2, s1, REG_ITMP1);
1689 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1690 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1693 M_LADD (s2, s1, REG_ITMP1);
1694 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1695 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1696 M_LDA (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1697 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
1699 store_reg_to_var_int(iptr->dst, d);
1702 case ICMD_SALOAD: /* ..., arrayref, index ==> ..., value */
1704 var_to_reg_int(s1, src->prev, REG_ITMP1);
1705 var_to_reg_int(s2, src, REG_ITMP2);
1706 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1707 if (iptr->op1 == 0) {
1708 gen_nullptr_check(s1);
1711 if (has_ext_instr_set) {
1712 M_LADD(s2, s1, REG_ITMP1);
1713 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1714 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
1718 M_LADD(s2, s1, REG_ITMP1);
1719 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1720 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1721 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
1722 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1723 M_SRA_IMM(d, 48, d);
1725 store_reg_to_var_int(iptr->dst, d);
1728 case ICMD_BALOAD: /* ..., arrayref, index ==> ..., value */
1730 var_to_reg_int(s1, src->prev, REG_ITMP1);
1731 var_to_reg_int(s2, src, REG_ITMP2);
1732 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1733 if (iptr->op1 == 0) {
1734 gen_nullptr_check(s1);
1737 if (has_ext_instr_set) {
1738 M_LADD (s2, s1, REG_ITMP1);
1739 M_BLDU (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
1743 M_LADD(s2, s1, REG_ITMP1);
1744 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1745 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
1746 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1747 M_SRA_IMM(d, 56, d);
1749 store_reg_to_var_int(iptr->dst, d);
1753 case ICMD_AASTORE: /* ..., arrayref, index, value ==> ... */
1755 var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1756 var_to_reg_int(s2, src->prev, REG_ITMP2);
1757 if (iptr->op1 == 0) {
1758 gen_nullptr_check(s1);
1761 var_to_reg_int(s3, src, REG_ITMP3);
1762 M_SAADDQ(s2, s1, REG_ITMP1);
1763 M_AST (s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1766 case ICMD_LASTORE: /* ..., arrayref, index, value ==> ... */
1768 var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1769 var_to_reg_int(s2, src->prev, REG_ITMP2);
1770 if (iptr->op1 == 0) {
1771 gen_nullptr_check(s1);
1774 var_to_reg_int(s3, src, REG_ITMP3);
1775 M_S8ADDQ(s2, s1, REG_ITMP1);
1776 M_LST (s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1779 case ICMD_IASTORE: /* ..., arrayref, index, value ==> ... */
1781 var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1782 var_to_reg_int(s2, src->prev, REG_ITMP2);
1783 if (iptr->op1 == 0) {
1784 gen_nullptr_check(s1);
1788 var_to_reg_int(s3, src, REG_ITMP3);
1789 M_S4ADDQ(s2, s1, REG_ITMP1);
1790 M_IST (s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1793 case ICMD_FASTORE: /* ..., arrayref, index, value ==> ... */
1795 var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1796 var_to_reg_int(s2, src->prev, REG_ITMP2);
1797 if (iptr->op1 == 0) {
1798 gen_nullptr_check(s1);
1801 var_to_reg_flt(s3, src, REG_FTMP3);
1802 M_S4ADDQ(s2, s1, REG_ITMP1);
1803 M_FST (s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1806 case ICMD_DASTORE: /* ..., arrayref, index, value ==> ... */
1808 var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1809 var_to_reg_int(s2, src->prev, REG_ITMP2);
1810 if (iptr->op1 == 0) {
1811 gen_nullptr_check(s1);
1814 var_to_reg_flt(s3, src, REG_FTMP3);
1815 M_S8ADDQ(s2, s1, REG_ITMP1);
1816 M_DST (s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1819 case ICMD_CASTORE: /* ..., arrayref, index, value ==> ... */
1821 var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1822 var_to_reg_int(s2, src->prev, REG_ITMP2);
1823 if (iptr->op1 == 0) {
1824 gen_nullptr_check(s1);
1827 var_to_reg_int(s3, src, REG_ITMP3);
1828 if (has_ext_instr_set) {
1829 M_LADD(s2, s1, REG_ITMP1);
1830 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1831 M_SST (s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1834 M_LADD (s2, s1, REG_ITMP1);
1835 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1836 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1837 M_LDA (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1838 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1839 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1840 M_OR (REG_ITMP2, REG_ITMP3, REG_ITMP2);
1841 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1845 case ICMD_SASTORE: /* ..., arrayref, index, value ==> ... */
1847 var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1848 var_to_reg_int(s2, src->prev, REG_ITMP2);
1849 if (iptr->op1 == 0) {
1850 gen_nullptr_check(s1);
1853 var_to_reg_int(s3, src, REG_ITMP3);
1854 if (has_ext_instr_set) {
1855 M_LADD(s2, s1, REG_ITMP1);
1856 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1857 M_SST (s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1860 M_LADD (s2, s1, REG_ITMP1);
1861 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1862 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1863 M_LDA (REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1864 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1865 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1866 M_OR (REG_ITMP2, REG_ITMP3, REG_ITMP2);
1867 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1871 case ICMD_BASTORE: /* ..., arrayref, index, value ==> ... */
1873 var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1874 var_to_reg_int(s2, src->prev, REG_ITMP2);
1875 if (iptr->op1 == 0) {
1876 gen_nullptr_check(s1);
1879 var_to_reg_int(s3, src, REG_ITMP3);
1880 if (has_ext_instr_set) {
1881 M_LADD(s2, s1, REG_ITMP1);
1882 M_BST (s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1885 M_LADD (s2, s1, REG_ITMP1);
1886 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1887 M_LDA (REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1888 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
1889 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1890 M_OR (REG_ITMP2, REG_ITMP3, REG_ITMP2);
1891 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1896 case ICMD_IASTORECONST: /* ..., arrayref, index ==> ... */
1898 var_to_reg_int(s1, src->prev, REG_ITMP1);
1899 var_to_reg_int(s2, src, REG_ITMP2);
1900 if (iptr->op1 == 0) {
1901 gen_nullptr_check(s1);
1904 M_S4ADDQ(s2, s1, REG_ITMP1);
1905 M_IST(REG_ZERO, REG_ITMP1, OFFSET(java_intarray, data[0]));
1908 case ICMD_LASTORECONST: /* ..., arrayref, index ==> ... */
1910 var_to_reg_int(s1, src->prev, REG_ITMP1);
1911 var_to_reg_int(s2, src, REG_ITMP2);
1912 if (iptr->op1 == 0) {
1913 gen_nullptr_check(s1);
1916 M_S8ADDQ(s2, s1, REG_ITMP1);
1917 M_LST(REG_ZERO, REG_ITMP1, OFFSET(java_longarray, data[0]));
1920 case ICMD_AASTORECONST: /* ..., arrayref, index ==> ... */
1922 var_to_reg_int(s1, src->prev, REG_ITMP1);
1923 var_to_reg_int(s2, src, REG_ITMP2);
1924 if (iptr->op1 == 0) {
1925 gen_nullptr_check(s1);
1928 M_SAADDQ(s2, s1, REG_ITMP1);
1929 M_AST(REG_ZERO, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1932 case ICMD_BASTORECONST: /* ..., arrayref, index ==> ... */
1934 var_to_reg_int(s1, src->prev, REG_ITMP1);
1935 var_to_reg_int(s2, src, REG_ITMP2);
1936 if (iptr->op1 == 0) {
1937 gen_nullptr_check(s1);
1940 if (has_ext_instr_set) {
1941 M_LADD(s2, s1, REG_ITMP1);
1942 M_BST(REG_ZERO, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1945 M_LADD(s2, s1, REG_ITMP1);
1946 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1947 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1948 M_INSBL(REG_ZERO, REG_ITMP1, REG_ITMP3);
1949 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1950 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1951 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1955 case ICMD_CASTORECONST: /* ..., arrayref, index ==> ... */
1957 var_to_reg_int(s1, src->prev, REG_ITMP1);
1958 var_to_reg_int(s2, src, REG_ITMP2);
1959 if (iptr->op1 == 0) {
1960 gen_nullptr_check(s1);
1963 if (has_ext_instr_set) {
1964 M_LADD(s2, s1, REG_ITMP1);
1965 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1966 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_chararray, data[0]));
1969 M_LADD(s2, s1, REG_ITMP1);
1970 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1971 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1972 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1973 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
1974 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1975 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1976 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1980 case ICMD_SASTORECONST: /* ..., arrayref, index ==> ... */
1982 var_to_reg_int(s1, src->prev, REG_ITMP1);
1983 var_to_reg_int(s2, src, REG_ITMP2);
1984 if (iptr->op1 == 0) {
1985 gen_nullptr_check(s1);
1988 if (has_ext_instr_set) {
1989 M_LADD(s2, s1, REG_ITMP1);
1990 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1991 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1994 M_LADD(s2, s1, REG_ITMP1);
1995 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1996 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1997 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1998 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
1999 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2000 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2001 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2006 case ICMD_GETSTATIC: /* ... ==> ..., value */
2007 /* op1 = type, val.a = field address */
2010 codegen_addpatchref(cd, mcodeptr,
2011 PATCHER_get_putstatic,
2012 (unresolved_field *) iptr->target);
2014 if (showdisassemble)
2020 fieldinfo *fi = iptr->val.a;
2022 if (!fi->class->initialized) {
2023 codegen_addpatchref(cd, mcodeptr,
2024 PATCHER_clinit, fi->class);
2026 if (showdisassemble)
2030 a = (ptrint) &(fi->value);
2033 a = dseg_addaddress(cd, a);
2034 M_ALD(REG_ITMP1, REG_PV, a);
2035 switch (iptr->op1) {
2037 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2038 M_ILD(d, REG_ITMP1, 0);
2039 store_reg_to_var_int(iptr->dst, d);
2042 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2043 M_LLD(d, REG_ITMP1, 0);
2044 store_reg_to_var_int(iptr->dst, d);
2047 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2048 M_ALD(d, REG_ITMP1, 0);
2049 store_reg_to_var_int(iptr->dst, d);
2052 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2053 M_FLD(d, REG_ITMP1, 0);
2054 store_reg_to_var_flt(iptr->dst, d);
2057 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2058 M_DLD(d, REG_ITMP1, 0);
2059 store_reg_to_var_flt(iptr->dst, d);
2064 case ICMD_PUTSTATIC: /* ..., value ==> ... */
2065 /* op1 = type, val.a = field address */
2068 codegen_addpatchref(cd, mcodeptr,
2069 PATCHER_get_putstatic,
2070 (unresolved_field *) iptr->target);
2072 if (showdisassemble)
2078 fieldinfo *fi = iptr->val.a;
2080 if (!fi->class->initialized) {
2081 codegen_addpatchref(cd, mcodeptr,
2082 PATCHER_clinit, fi->class);
2084 if (showdisassemble)
2088 a = (ptrint) &(fi->value);
2091 a = dseg_addaddress(cd, a);
2092 M_ALD(REG_ITMP1, REG_PV, a);
2093 switch (iptr->op1) {
2095 var_to_reg_int(s2, src, REG_ITMP2);
2096 M_IST(s2, REG_ITMP1, 0);
2099 var_to_reg_int(s2, src, REG_ITMP2);
2100 M_LST(s2, REG_ITMP1, 0);
2103 var_to_reg_int(s2, src, REG_ITMP2);
2104 M_AST(s2, REG_ITMP1, 0);
2107 var_to_reg_flt(s2, src, REG_FTMP2);
2108 M_FST(s2, REG_ITMP1, 0);
2111 var_to_reg_flt(s2, src, REG_FTMP2);
2112 M_DST(s2, REG_ITMP1, 0);
2117 case ICMD_PUTSTATICCONST: /* ... ==> ... */
2118 /* val = value (in current instruction) */
2119 /* op1 = type, val.a = field address (in */
2120 /* following NOP) */
2122 if (!iptr[1].val.a) {
2123 codegen_addpatchref(cd, mcodeptr,
2124 PATCHER_get_putstatic,
2125 (unresolved_field *) iptr[1].target);
2127 if (showdisassemble)
2133 fieldinfo *fi = iptr[1].val.a;
2135 if (!fi->class->initialized) {
2136 codegen_addpatchref(cd, mcodeptr,
2137 PATCHER_clinit, fi->class);
2139 if (showdisassemble)
2143 a = (ptrint) &(fi->value);
2146 a = dseg_addaddress(cd, a);
2147 M_ALD(REG_ITMP1, REG_PV, a);
2148 switch (iptr->op1) {
2150 M_IST(REG_ZERO, REG_ITMP1, 0);
2153 M_LST(REG_ZERO, REG_ITMP1, 0);
2156 M_AST(REG_ZERO, REG_ITMP1, 0);
2159 M_FST(REG_ZERO, REG_ITMP1, 0);
2162 M_DST(REG_ZERO, REG_ITMP1, 0);
2168 case ICMD_GETFIELD: /* ... ==> ..., value */
2169 /* op1 = type, val.i = field offset */
2171 var_to_reg_int(s1, src, REG_ITMP1);
2172 gen_nullptr_check(s1);
2175 codegen_addpatchref(cd, mcodeptr,
2176 PATCHER_get_putfield,
2177 (unresolved_field *) iptr->target);
2179 if (showdisassemble)
2185 a = ((fieldinfo *) (iptr->val.a))->offset;
2188 switch (iptr->op1) {
2190 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2192 store_reg_to_var_int(iptr->dst, d);
2195 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2197 store_reg_to_var_int(iptr->dst, d);
2200 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2202 store_reg_to_var_int(iptr->dst, d);
2205 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
2207 store_reg_to_var_flt(iptr->dst, d);
2210 d = reg_of_var(rd, iptr->dst, REG_FTMP3);
2212 store_reg_to_var_flt(iptr->dst, d);
2217 case ICMD_PUTFIELD: /* ..., objectref, value ==> ... */
2218 /* op1 = type, val.a = field address */
2220 var_to_reg_int(s1, src->prev, REG_ITMP1);
2221 gen_nullptr_check(s1);
2223 if (!IS_FLT_DBL_TYPE(iptr->op1)) {
2224 var_to_reg_int(s2, src, REG_ITMP2);
2226 var_to_reg_flt(s2, src, REG_FTMP2);
2230 codegen_addpatchref(cd, mcodeptr,
2231 PATCHER_get_putfield,
2232 (unresolved_field *) iptr->target);
2234 if (showdisassemble)
2240 a = ((fieldinfo *) (iptr->val.a))->offset;
2243 switch (iptr->op1) {
2262 case ICMD_PUTFIELDCONST: /* ..., objectref ==> ... */
2263 /* val = value (in current instruction) */
2264 /* op1 = type, val.a = field address (in */
2265 /* following NOP) */
2267 var_to_reg_int(s1, src, REG_ITMP1);
2268 gen_nullptr_check(s1);
2270 if (!iptr[1].val.a) {
2271 codegen_addpatchref(cd, mcodeptr,
2272 PATCHER_get_putfield,
2273 (unresolved_field *) iptr[1].target);
2275 if (showdisassemble)
2281 a = ((fieldinfo *) (iptr[1].val.a))->offset;
2284 switch (iptr[1].op1) {
2286 M_IST(REG_ZERO, s1, a);
2289 M_LST(REG_ZERO, s1, a);
2292 M_AST(REG_ZERO, s1, a);
2295 M_FST(REG_ZERO, s1, a);
2298 M_DST(REG_ZERO, s1, a);
2304 /* branch operations **************************************************/
2306 case ICMD_ATHROW: /* ..., objectref ==> ... (, objectref) */
2308 var_to_reg_int(s1, src, REG_ITMP1);
2309 M_INTMOVE(s1, REG_ITMP1_XPTR);
2310 a = dseg_addaddress(cd, asm_handle_exception);
2311 M_ALD(REG_ITMP2, REG_PV, a);
2312 M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2313 M_NOP; /* nop ensures that XPC is less than the end */
2314 /* of basic block */
2318 case ICMD_GOTO: /* ... ==> ... */
2319 /* op1 = target JavaVM pc */
2321 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2325 case ICMD_JSR: /* ... ==> ... */
2326 /* op1 = target JavaVM pc */
2328 M_BSR(REG_ITMP1, 0);
2329 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2332 case ICMD_RET: /* ... ==> ... */
2333 /* op1 = local variable */
2335 var = &(rd->locals[iptr->op1][TYPE_ADR]);
2336 if (var->flags & INMEMORY) {
2337 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2338 M_RET(REG_ZERO, REG_ITMP1);
2341 M_RET(REG_ZERO, var->regoff);
2345 case ICMD_IFNULL: /* ..., value ==> ... */
2346 /* op1 = target JavaVM pc */
2348 var_to_reg_int(s1, src, REG_ITMP1);
2350 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2353 case ICMD_IFNONNULL: /* ..., value ==> ... */
2354 /* op1 = target JavaVM pc */
2356 var_to_reg_int(s1, src, REG_ITMP1);
2358 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2361 case ICMD_IFEQ: /* ..., value ==> ... */
2362 /* op1 = target JavaVM pc, val.i = constant */
2364 var_to_reg_int(s1, src, REG_ITMP1);
2365 if (iptr->val.i == 0) {
2369 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2370 M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2373 ICONST(REG_ITMP2, iptr->val.i);
2374 M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2376 M_BNEZ(REG_ITMP1, 0);
2378 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2381 case ICMD_IFLT: /* ..., value ==> ... */
2382 /* op1 = target JavaVM pc, val.i = constant */
2384 var_to_reg_int(s1, src, REG_ITMP1);
2385 if (iptr->val.i == 0) {
2389 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2390 M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2393 ICONST(REG_ITMP2, iptr->val.i);
2394 M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2396 M_BNEZ(REG_ITMP1, 0);
2398 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2401 case ICMD_IFLE: /* ..., value ==> ... */
2402 /* op1 = target JavaVM pc, val.i = constant */
2404 var_to_reg_int(s1, src, REG_ITMP1);
2405 if (iptr->val.i == 0) {
2409 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2410 M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2413 ICONST(REG_ITMP2, iptr->val.i);
2414 M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2416 M_BNEZ(REG_ITMP1, 0);
2418 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2421 case ICMD_IFNE: /* ..., value ==> ... */
2422 /* op1 = target JavaVM pc, val.i = constant */
2424 var_to_reg_int(s1, src, REG_ITMP1);
2425 if (iptr->val.i == 0) {
2429 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2430 M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2433 ICONST(REG_ITMP2, iptr->val.i);
2434 M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2436 M_BEQZ(REG_ITMP1, 0);
2438 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2441 case ICMD_IFGT: /* ..., value ==> ... */
2442 /* op1 = target JavaVM pc, val.i = constant */
2444 var_to_reg_int(s1, src, REG_ITMP1);
2445 if (iptr->val.i == 0) {
2449 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2450 M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2453 ICONST(REG_ITMP2, iptr->val.i);
2454 M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2456 M_BEQZ(REG_ITMP1, 0);
2458 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2461 case ICMD_IFGE: /* ..., value ==> ... */
2462 /* op1 = target JavaVM pc, val.i = constant */
2464 var_to_reg_int(s1, src, REG_ITMP1);
2465 if (iptr->val.i == 0) {
2469 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2470 M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2473 ICONST(REG_ITMP2, iptr->val.i);
2474 M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2476 M_BEQZ(REG_ITMP1, 0);
2478 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2481 case ICMD_IF_LEQ: /* ..., value ==> ... */
2482 /* op1 = target JavaVM pc, val.l = constant */
2484 var_to_reg_int(s1, src, REG_ITMP1);
2485 if (iptr->val.l == 0) {
2489 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2490 M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2493 LCONST(REG_ITMP2, iptr->val.l);
2494 M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2496 M_BNEZ(REG_ITMP1, 0);
2498 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2501 case ICMD_IF_LLT: /* ..., value ==> ... */
2502 /* op1 = target JavaVM pc, val.l = constant */
2504 var_to_reg_int(s1, src, REG_ITMP1);
2505 if (iptr->val.l == 0) {
2509 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2510 M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2513 LCONST(REG_ITMP2, iptr->val.l);
2514 M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2516 M_BNEZ(REG_ITMP1, 0);
2518 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2521 case ICMD_IF_LLE: /* ..., value ==> ... */
2522 /* op1 = target JavaVM pc, val.l = constant */
2524 var_to_reg_int(s1, src, REG_ITMP1);
2525 if (iptr->val.l == 0) {
2529 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2530 M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2533 LCONST(REG_ITMP2, iptr->val.l);
2534 M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2536 M_BNEZ(REG_ITMP1, 0);
2538 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2541 case ICMD_IF_LNE: /* ..., value ==> ... */
2542 /* op1 = target JavaVM pc, val.l = constant */
2544 var_to_reg_int(s1, src, REG_ITMP1);
2545 if (iptr->val.l == 0) {
2549 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2550 M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2553 LCONST(REG_ITMP2, iptr->val.l);
2554 M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2556 M_BEQZ(REG_ITMP1, 0);
2558 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2561 case ICMD_IF_LGT: /* ..., value ==> ... */
2562 /* op1 = target JavaVM pc, val.l = constant */
2564 var_to_reg_int(s1, src, REG_ITMP1);
2565 if (iptr->val.l == 0) {
2569 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2570 M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2573 LCONST(REG_ITMP2, iptr->val.l);
2574 M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2576 M_BEQZ(REG_ITMP1, 0);
2578 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2581 case ICMD_IF_LGE: /* ..., value ==> ... */
2582 /* op1 = target JavaVM pc, val.l = constant */
2584 var_to_reg_int(s1, src, REG_ITMP1);
2585 if (iptr->val.l == 0) {
2589 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2590 M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2593 LCONST(REG_ITMP2, iptr->val.l);
2594 M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2596 M_BEQZ(REG_ITMP1, 0);
2598 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2601 case ICMD_IF_ICMPEQ: /* ..., value, value ==> ... */
2602 case ICMD_IF_LCMPEQ: /* op1 = target JavaVM pc */
2603 case ICMD_IF_ACMPEQ:
2605 var_to_reg_int(s1, src->prev, REG_ITMP1);
2606 var_to_reg_int(s2, src, REG_ITMP2);
2607 M_CMPEQ(s1, s2, REG_ITMP1);
2608 M_BNEZ(REG_ITMP1, 0);
2609 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2612 case ICMD_IF_ICMPNE: /* ..., value, value ==> ... */
2613 case ICMD_IF_LCMPNE: /* op1 = target JavaVM pc */
2614 case ICMD_IF_ACMPNE:
2616 var_to_reg_int(s1, src->prev, REG_ITMP1);
2617 var_to_reg_int(s2, src, REG_ITMP2);
2618 M_CMPEQ(s1, s2, REG_ITMP1);
2619 M_BEQZ(REG_ITMP1, 0);
2620 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2623 case ICMD_IF_ICMPLT: /* ..., value, value ==> ... */
2624 case ICMD_IF_LCMPLT: /* op1 = target JavaVM pc */
2626 var_to_reg_int(s1, src->prev, REG_ITMP1);
2627 var_to_reg_int(s2, src, REG_ITMP2);
2628 M_CMPLT(s1, s2, REG_ITMP1);
2629 M_BNEZ(REG_ITMP1, 0);
2630 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2633 case ICMD_IF_ICMPGT: /* ..., value, value ==> ... */
2634 case ICMD_IF_LCMPGT: /* op1 = target JavaVM pc */
2636 var_to_reg_int(s1, src->prev, REG_ITMP1);
2637 var_to_reg_int(s2, src, REG_ITMP2);
2638 M_CMPLE(s1, s2, REG_ITMP1);
2639 M_BEQZ(REG_ITMP1, 0);
2640 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2643 case ICMD_IF_ICMPLE: /* ..., value, value ==> ... */
2644 case ICMD_IF_LCMPLE: /* op1 = target JavaVM pc */
2646 var_to_reg_int(s1, src->prev, REG_ITMP1);
2647 var_to_reg_int(s2, src, REG_ITMP2);
2648 M_CMPLE(s1, s2, REG_ITMP1);
2649 M_BNEZ(REG_ITMP1, 0);
2650 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2653 case ICMD_IF_ICMPGE: /* ..., value, value ==> ... */
2654 case ICMD_IF_LCMPGE: /* op1 = target JavaVM pc */
2656 var_to_reg_int(s1, src->prev, REG_ITMP1);
2657 var_to_reg_int(s2, src, REG_ITMP2);
2658 M_CMPLT(s1, s2, REG_ITMP1);
2659 M_BEQZ(REG_ITMP1, 0);
2660 codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2663 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST */
2665 case ICMD_ELSE_ICONST: /* handled by IFxx_ICONST */
2668 case ICMD_IFEQ_ICONST: /* ..., value ==> ..., constant */
2669 /* val.i = constant */
2671 var_to_reg_int(s1, src, REG_ITMP1);
2672 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2674 if (iptr[1].opc == ICMD_ELSE_ICONST) {
2675 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2676 M_CMPEQ(s1, REG_ZERO, d);
2677 store_reg_to_var_int(iptr->dst, d);
2680 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2681 M_CMPEQ(s1, REG_ZERO, d);
2683 store_reg_to_var_int(iptr->dst, d);
2687 M_MOV(s1, REG_ITMP1);
2690 ICONST(d, iptr[1].val.i);
2692 if ((s3 >= 0) && (s3 <= 255)) {
2693 M_CMOVEQ_IMM(s1, s3, d);
2696 ICONST(REG_ITMP2, s3);
2697 M_CMOVEQ(s1, REG_ITMP2, d);
2699 store_reg_to_var_int(iptr->dst, d);
2702 case ICMD_IFNE_ICONST: /* ..., value ==> ..., constant */
2703 /* val.i = constant */
2705 var_to_reg_int(s1, src, REG_ITMP1);
2706 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2708 if (iptr[1].opc == ICMD_ELSE_ICONST) {
2709 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2710 M_CMPEQ(s1, REG_ZERO, d);
2711 store_reg_to_var_int(iptr->dst, d);
2714 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2715 M_CMPEQ(s1, REG_ZERO, d);
2717 store_reg_to_var_int(iptr->dst, d);
2721 M_MOV(s1, REG_ITMP1);
2724 ICONST(d, iptr[1].val.i);
2726 if ((s3 >= 0) && (s3 <= 255)) {
2727 M_CMOVNE_IMM(s1, s3, d);
2730 ICONST(REG_ITMP2, s3);
2731 M_CMOVNE(s1, REG_ITMP2, d);
2733 store_reg_to_var_int(iptr->dst, d);
2736 case ICMD_IFLT_ICONST: /* ..., value ==> ..., constant */
2737 /* val.i = constant */
2739 var_to_reg_int(s1, src, REG_ITMP1);
2740 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2742 if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2743 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2744 M_CMPLT(s1, REG_ZERO, d);
2745 store_reg_to_var_int(iptr->dst, d);
2748 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2749 M_CMPLE(REG_ZERO, s1, d);
2750 store_reg_to_var_int(iptr->dst, d);
2754 M_MOV(s1, REG_ITMP1);
2757 ICONST(d, iptr[1].val.i);
2759 if ((s3 >= 0) && (s3 <= 255)) {
2760 M_CMOVLT_IMM(s1, s3, d);
2763 ICONST(REG_ITMP2, s3);
2764 M_CMOVLT(s1, REG_ITMP2, d);
2766 store_reg_to_var_int(iptr->dst, d);
2769 case ICMD_IFGE_ICONST: /* ..., value ==> ..., constant */
2770 /* val.i = constant */
2772 var_to_reg_int(s1, src, REG_ITMP1);
2773 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2775 if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2776 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2777 M_CMPLE(REG_ZERO, s1, d);
2778 store_reg_to_var_int(iptr->dst, d);
2781 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2782 M_CMPLT(s1, REG_ZERO, d);
2783 store_reg_to_var_int(iptr->dst, d);
2787 M_MOV(s1, REG_ITMP1);
2790 ICONST(d, iptr[1].val.i);
2792 if ((s3 >= 0) && (s3 <= 255)) {
2793 M_CMOVGE_IMM(s1, s3, d);
2796 ICONST(REG_ITMP2, s3);
2797 M_CMOVGE(s1, REG_ITMP2, d);
2799 store_reg_to_var_int(iptr->dst, d);
2802 case ICMD_IFGT_ICONST: /* ..., value ==> ..., constant */
2803 /* val.i = constant */
2805 var_to_reg_int(s1, src, REG_ITMP1);
2806 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2808 if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2809 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2810 M_CMPLT(REG_ZERO, s1, d);
2811 store_reg_to_var_int(iptr->dst, d);
2814 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2815 M_CMPLE(s1, REG_ZERO, d);
2816 store_reg_to_var_int(iptr->dst, d);
2820 M_MOV(s1, REG_ITMP1);
2823 ICONST(d, iptr[1].val.i);
2825 if ((s3 >= 0) && (s3 <= 255)) {
2826 M_CMOVGT_IMM(s1, s3, d);
2829 ICONST(REG_ITMP2, s3);
2830 M_CMOVGT(s1, REG_ITMP2, d);
2832 store_reg_to_var_int(iptr->dst, d);
2835 case ICMD_IFLE_ICONST: /* ..., value ==> ..., constant */
2836 /* val.i = constant */
2838 var_to_reg_int(s1, src, REG_ITMP1);
2839 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
2841 if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2842 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2843 M_CMPLE(s1, REG_ZERO, d);
2844 store_reg_to_var_int(iptr->dst, d);
2847 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2848 M_CMPLT(REG_ZERO, s1, d);
2849 store_reg_to_var_int(iptr->dst, d);
2853 M_MOV(s1, REG_ITMP1);
2856 ICONST(d, iptr[1].val.i);
2858 if ((s3 >= 0) && (s3 <= 255)) {
2859 M_CMOVLE_IMM(s1, s3, d);
2862 ICONST(REG_ITMP2, s3);
2863 M_CMOVLE(s1, REG_ITMP2, d);
2865 store_reg_to_var_int(iptr->dst, d);
2869 case ICMD_IRETURN: /* ..., retvalue ==> ... */
2873 var_to_reg_int(s1, src, REG_RESULT);
2874 M_INTMOVE(s1, REG_RESULT);
2876 goto nowperformreturn;
2878 case ICMD_FRETURN: /* ..., retvalue ==> ... */
2881 var_to_reg_flt(s1, src, REG_FRESULT);
2882 M_FLTMOVE(s1, REG_FRESULT);
2884 goto nowperformreturn;
2886 case ICMD_RETURN: /* ... ==> ... */
2892 p = parentargs_base;
2894 /* call trace function */
2897 M_LDA(REG_SP, REG_SP, -3 * 8);
2898 M_AST(REG_RA, REG_SP, 0 * 8);
2899 M_LST(REG_RESULT, REG_SP, 1 * 8);
2900 M_DST(REG_FRESULT, REG_SP, 2 * 8);
2901 a = dseg_addaddress(cd, m);
2902 M_ALD(rd->argintregs[0], REG_PV, a);
2903 M_MOV(REG_RESULT, rd->argintregs[1]);
2904 M_FLTMOVE(REG_FRESULT, rd->argfltregs[2]);
2905 M_FLTMOVE(REG_FRESULT, rd->argfltregs[3]);
2906 a = dseg_addaddress(cd, (void *) builtin_displaymethodstop);
2907 M_ALD(REG_PV, REG_PV, a);
2908 M_JSR(REG_RA, REG_PV);
2909 s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2910 if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
2912 s4 ml = -s1, mh = 0;
2913 while (ml < -32768) { ml += 65536; mh--; }
2914 M_LDA(REG_PV, REG_RA, ml);
2915 M_LDAH(REG_PV, REG_PV, mh);
2917 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
2918 M_LLD(REG_RESULT, REG_SP, 1 * 8);
2919 M_ALD(REG_RA, REG_SP, 0 * 8);
2920 M_LDA(REG_SP, REG_SP, 3 * 8);
2923 #if defined(USE_THREADS)
2924 if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2927 M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 8);
2929 switch (iptr->opc) {
2933 M_LST(REG_RESULT, REG_SP, rd->memuse * 8);
2937 M_DST(REG_FRESULT, REG_SP, rd->memuse * 8);
2941 a = dseg_addaddress(cd, BUILTIN_monitorexit);
2942 M_ALD(REG_PV, REG_PV, a);
2943 M_JSR(REG_RA, REG_PV);
2944 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
2945 M_LDA(REG_PV, REG_RA, disp);
2947 switch (iptr->opc) {
2951 M_LLD(REG_RESULT, REG_SP, rd->memuse * 8);
2955 M_DLD(REG_FRESULT, REG_SP, rd->memuse * 8);
2961 /* restore return address */
2963 if (!m->isleafmethod) {
2964 p--; M_LLD(REG_RA, REG_SP, p * 8);
2967 /* restore saved registers */
2969 for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
2970 p--; M_LLD(rd->savintregs[i], REG_SP, p * 8);
2972 for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
2973 p--; M_DLD(rd->savfltregs[i], REG_SP, p * 8);
2976 /* deallocate stack */
2978 if (parentargs_base) {
2979 M_LDA(REG_SP, REG_SP, parentargs_base * 8);
2982 M_RET(REG_ZERO, REG_RA);
2988 case ICMD_TABLESWITCH: /* ..., index ==> ... */
2993 tptr = (void **) iptr->target;
2995 s4ptr = iptr->val.a;
2996 l = s4ptr[1]; /* low */
2997 i = s4ptr[2]; /* high */
2999 var_to_reg_int(s1, src, REG_ITMP1);
3001 {M_INTMOVE(s1, REG_ITMP1);}
3002 else if (l <= 32768) {
3003 M_LDA(REG_ITMP1, s1, -l);
3006 ICONST(REG_ITMP2, l);
3007 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3014 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3016 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3017 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3019 M_BEQZ(REG_ITMP2, 0);
3022 /* codegen_addreference(cd, BlockPtrOfPC(s4ptr[0]), mcodeptr); */
3023 codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3025 /* build jump table top down and use address of lowest entry */
3027 /* s4ptr += 3 + i; */
3031 /* dseg_addtarget(cd, BlockPtrOfPC(*--s4ptr)); */
3032 dseg_addtarget(cd, (basicblock *) tptr[0]);
3037 /* length of dataseg after last dseg_addtarget is used by load */
3039 M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3040 M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
3041 M_JMP(REG_ZERO, REG_ITMP2);
3046 case ICMD_LOOKUPSWITCH: /* ..., key ==> ... */
3048 s4 i, l, val, *s4ptr;
3051 tptr = (void **) iptr->target;
3053 s4ptr = iptr->val.a;
3054 l = s4ptr[0]; /* default */
3055 i = s4ptr[1]; /* count */
3057 MCODECHECK((i<<2)+8);
3058 var_to_reg_int(s1, src, REG_ITMP1);
3064 if ((val >= 0) && (val <= 255)) {
3065 M_CMPEQ_IMM(s1, val, REG_ITMP2);
3068 if ((val >= -32768) && (val <= 32767)) {
3069 M_LDA(REG_ITMP2, REG_ZERO, val);
3072 a = dseg_adds4(cd, val);
3073 M_ILD(REG_ITMP2, REG_PV, a);
3075 M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3077 M_BNEZ(REG_ITMP2, 0);
3078 /* codegen_addreference(cd, BlockPtrOfPC(s4ptr[1]), mcodeptr); */
3079 codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3083 /* codegen_addreference(cd, BlockPtrOfPC(l), mcodeptr); */
3085 tptr = (void **) iptr->target;
3086 codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3093 case ICMD_BUILTIN: /* ..., arg1, arg2, arg3 ==> ... */
3094 /* op1 = arg count val.a = builtintable entry */
3100 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ... */
3101 /* op1 = arg count, val.a = method pointer */
3103 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3104 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer */
3105 case ICMD_INVOKEINTERFACE:
3110 md = lm->parseddesc;
3112 unresolved_method *um = iptr->target;
3113 md = um->methodref->parseddesc.md;
3119 MCODECHECK((s3 << 1) + 64);
3121 /* copy arguments to registers or stack location */
3123 for (s3 = s3 - 1; s3 >= 0; s3--, src = src->prev) {
3124 if (src->varkind == ARGVAR)
3126 if (IS_INT_LNG_TYPE(src->type)) {
3127 if (!md->params[s3].inmemory) {
3128 s1 = rd->argintregs[md->params[s3].regoff];
3129 var_to_reg_int(d, src, s1);
3132 var_to_reg_int(d, src, REG_ITMP1);
3133 M_LST(d, REG_SP, md->params[s3].regoff * 8);
3137 if (!md->params[s3].inmemory) {
3138 s1 = rd->argfltregs[md->params[s3].regoff];
3139 var_to_reg_flt(d, src, s1);
3142 var_to_reg_flt(d, src, REG_FTMP1);
3143 M_DST(d, REG_SP, md->params[s3].regoff * 8);
3148 switch (iptr->opc) {
3151 codegen_addpatchref(cd, mcodeptr, bte->fp, iptr->target);
3153 if (showdisassemble)
3159 a = (ptrint) bte->fp;
3162 a = dseg_addaddress(cd, a);
3163 d = md->returntype.type;
3165 M_ALD(REG_PV, REG_PV, a); /* Pointer to built-in-function */
3168 case ICMD_INVOKESPECIAL:
3169 M_BEQZ(rd->argintregs[0], 0);
3170 codegen_addxnullrefs(cd, mcodeptr);
3173 case ICMD_INVOKESTATIC:
3175 unresolved_method *um = iptr->target;
3177 codegen_addpatchref(cd, mcodeptr,
3178 PATCHER_invokestatic_special, um);
3180 if (showdisassemble)
3184 d = um->methodref->parseddesc.md->returntype.type;
3187 a = (ptrint) lm->stubroutine;
3188 d = lm->parseddesc->returntype.type;
3191 a = dseg_addaddress(cd, a);
3192 M_ALD(REG_PV, REG_PV, a); /* method pointer in r27 */
3195 case ICMD_INVOKEVIRTUAL:
3196 gen_nullptr_check(rd->argintregs[0]);
3199 unresolved_method *um = iptr->target;
3201 codegen_addpatchref(cd, mcodeptr,
3202 PATCHER_invokevirtual, um);
3204 if (showdisassemble)
3208 d = um->methodref->parseddesc.md->returntype.type;
3211 s1 = OFFSET(vftbl_t, table[0]) +
3212 sizeof(methodptr) * lm->vftblindex;
3213 d = lm->parseddesc->returntype.type;
3216 M_ALD(REG_METHODPTR, rd->argintregs[0],
3217 OFFSET(java_objectheader, vftbl));
3218 M_ALD(REG_PV, REG_METHODPTR, s1);
3221 case ICMD_INVOKEINTERFACE:
3222 gen_nullptr_check(rd->argintregs[0]);
3225 unresolved_method *um = iptr->target;
3227 codegen_addpatchref(cd, mcodeptr,
3228 PATCHER_invokeinterface, um);
3230 if (showdisassemble)
3235 d = um->methodref->parseddesc.md->returntype.type;
3238 s1 = OFFSET(vftbl_t, interfacetable[0]) -
3239 sizeof(methodptr*) * lm->class->index;
3241 s2 = sizeof(methodptr) * (lm - lm->class->methods);
3243 d = lm->parseddesc->returntype.type;
3246 M_ALD(REG_METHODPTR, rd->argintregs[0],
3247 OFFSET(java_objectheader, vftbl));
3248 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
3249 M_ALD(REG_PV, REG_METHODPTR, s2);
3253 M_JSR(REG_RA, REG_PV);
3257 s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3258 if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3260 s4 ml = -s1, mh = 0;
3261 while (ml < -32768) { ml += 65536; mh--; }
3262 M_LDA(REG_PV, REG_RA, ml);
3263 M_LDAH(REG_PV, REG_PV, mh);
3266 /* d contains return type */
3268 if (d != TYPE_VOID) {
3269 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3270 s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
3271 M_INTMOVE(REG_RESULT, s1);
3272 store_reg_to_var_int(iptr->dst, s1);
3274 s1 = reg_of_var(rd, iptr->dst, REG_FRESULT);
3275 M_FLTMOVE(REG_FRESULT, s1);
3276 store_reg_to_var_flt(iptr->dst, s1);
3282 case ICMD_CHECKCAST: /* ..., objectref ==> ..., objectref */
3284 /* op1: 0 == array, 1 == class */
3285 /* val.a: (classinfo*) superclass */
3287 /* superclass is an interface:
3289 * OK if ((sub == NULL) ||
3290 * (sub->vftbl->interfacetablelength > super->index) &&
3291 * (sub->vftbl->interfacetable[-super->index] != NULL));
3293 * superclass is a class:
3295 * OK if ((sub == NULL) || (0
3296 * <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3297 * super->vftbl->diffval));
3302 vftbl_t *supervftbl;
3305 super = (classinfo *) iptr->val.a;
3312 superindex = super->index;
3313 supervftbl = super->vftbl;
3316 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3317 codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
3319 var_to_reg_int(s1, src, REG_ITMP1);
3321 /* calculate interface checkcast code size */
3325 s2 += showdisassemble ? 1 : 0;
3327 /* calculate class checkcast code size */
3329 s3 = 9 /* 8 + (s1 == REG_ITMP1) */;
3331 s3 += showdisassemble ? 1 : 0;
3333 /* if class is not resolved, check which code to call */
3336 M_BEQZ(s1, 4 + (showdisassemble ? 1 : 0) + s2 + 1 + s3);
3338 codegen_addpatchref(cd, mcodeptr,
3339 PATCHER_checkcast_instanceof_flags,
3340 (constant_classref *) iptr->target);
3342 if (showdisassemble)
3345 a = dseg_adds4(cd, 0); /* super->flags */
3346 M_ILD(REG_ITMP2, REG_PV, a);
3347 a = dseg_adds4(cd, ACC_INTERFACE);
3348 M_ILD(REG_ITMP3, REG_PV, a);
3349 M_AND(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3350 M_BEQZ(REG_ITMP2, s2 + 1);
3353 /* interface checkcast code */
3355 if (!super || (super->flags & ACC_INTERFACE)) {
3360 codegen_addpatchref(cd, mcodeptr,
3361 PATCHER_checkcast_instanceof_interface,
3362 (constant_classref *) iptr->target);
3364 if (showdisassemble)
3368 M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3369 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
3370 M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3371 M_BLEZ(REG_ITMP3, 0);
3372 codegen_addxcastrefs(cd, mcodeptr);
3373 M_ALD(REG_ITMP3, REG_ITMP2,
3374 OFFSET(vftbl_t, interfacetable[0]) -
3375 superindex * sizeof(methodptr*));
3376 M_BEQZ(REG_ITMP3, 0);
3377 codegen_addxcastrefs(cd, mcodeptr);
3383 /* class checkcast code */
3385 if (!super || !(super->flags & ACC_INTERFACE)) {
3390 codegen_addpatchref(cd, mcodeptr,
3391 PATCHER_checkcast_instanceof_class,
3392 (constant_classref *) iptr->target);
3394 if (showdisassemble)
3398 M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3399 a = dseg_addaddress(cd, supervftbl);
3400 M_ALD(REG_ITMP3, REG_PV, a);
3401 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3402 codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3404 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3405 /* if (s1 != REG_ITMP1) { */
3406 /* M_ILD(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, baseval)); */
3407 /* M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval)); */
3408 /* #if defined(USE_THREADS) && defined(NATIVE_THREADS) */
3409 /* codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase); */
3411 /* M_ISUB(REG_ITMP2, REG_ITMP1, REG_ITMP2); */
3414 M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, baseval));
3415 M_ISUB(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3416 M_ALD(REG_ITMP3, REG_PV, a);
3417 M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval));
3418 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3419 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3422 M_CMPULE(REG_ITMP2, REG_ITMP3, REG_ITMP3);
3423 M_BEQZ(REG_ITMP3, 0);
3424 codegen_addxcastrefs(cd, mcodeptr);
3426 d = reg_of_var(rd, iptr->dst, REG_ITMP3);
3428 store_reg_to_var_int(iptr->dst, d);
3432 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult */
3434 /* op1: 0 == array, 1 == class */
3435 /* val.a: (classinfo*) superclass */
3437 /* superclass is an interface:
3439 * return (sub != NULL) &&
3440 * (sub->vftbl->interfacetablelength > super->index) &&
3441 * (sub->vftbl->interfacetable[-super->index] != NULL);
3443 * superclass is a class:
3445 * return ((sub != NULL) && (0
3446 * <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3447 * super->vftbl->diffvall));
3452 vftbl_t *supervftbl;
3455 super = (classinfo *) iptr->val.a;
3462 superindex = super->index;
3463 supervftbl = super->vftbl;
3466 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3467 codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
3469 var_to_reg_int(s1, src, REG_ITMP1);
3470 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
3472 M_MOV(s1, REG_ITMP1);
3476 /* calculate interface instanceof code size */
3480 s2 += (d == REG_ITMP2 ? 1 : 0) + (showdisassemble ? 1 : 0);
3482 /* calculate class instanceof code size */
3486 s3 += (showdisassemble ? 1 : 0);
3488 /* if class is not resolved, check which code to call */
3492 M_BEQZ(s1, 4 + (showdisassemble ? 1 : 0) + s2 + 1 + s3);
3494 codegen_addpatchref(cd, mcodeptr,
3495 PATCHER_checkcast_instanceof_flags,
3496 (constant_classref *) iptr->target);
3498 if (showdisassemble)
3501 a = dseg_adds4(cd, 0); /* super->flags */
3502 M_ILD(REG_ITMP3, REG_PV, a);
3503 a = dseg_adds4(cd, ACC_INTERFACE);
3504 M_ILD(REG_ITMP2, REG_PV, a);
3505 M_AND(REG_ITMP3, REG_ITMP2, REG_ITMP3);
3506 M_BEQZ(REG_ITMP3, s2 + 1);
3509 /* interface instanceof code */
3511 if (!super || (super->flags & ACC_INTERFACE)) {
3517 /* If d == REG_ITMP2, then it's destroyed in check code */
3522 codegen_addpatchref(cd, mcodeptr,
3523 PATCHER_checkcast_instanceof_interface,
3524 (constant_classref *) iptr->target);
3526 if (showdisassemble)
3530 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3531 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3532 M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3533 M_BLEZ(REG_ITMP3, 2);
3534 M_ALD(REG_ITMP1, REG_ITMP1,
3535 OFFSET(vftbl_t, interfacetable[0]) -
3536 superindex * sizeof(methodptr*));
3537 M_CMPULT(REG_ZERO, REG_ITMP1, d); /* REG_ITMP1 != 0 */
3543 /* class instanceof code */
3545 if (!super || !(super->flags & ACC_INTERFACE)) {
3551 codegen_addpatchref(cd, mcodeptr,
3552 PATCHER_checkcast_instanceof_class,
3553 (constant_classref *) iptr->target);
3555 if (showdisassemble)
3559 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3560 a = dseg_addaddress(cd, supervftbl);
3561 M_ALD(REG_ITMP2, REG_PV, a);
3562 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3563 codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3565 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3566 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3567 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3568 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3569 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3571 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3572 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3574 store_reg_to_var_int(iptr->dst, d);
3579 case ICMD_CHECKASIZE: /* ..., size ==> ..., size */
3581 var_to_reg_int(s1, src, REG_ITMP1);
3583 codegen_addxcheckarefs(cd, mcodeptr);
3586 case ICMD_CHECKEXCEPTION: /* ... ==> ... */
3588 M_BEQZ(REG_RESULT, 0);
3589 codegen_addxexceptionrefs(cd, mcodeptr);
3592 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref */
3593 /* op1 = dimension, val.a = array descriptor */
3595 /* check for negative sizes and copy sizes to stack if necessary */
3597 MCODECHECK((iptr->op1 << 1) + 64);
3599 for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3600 var_to_reg_int(s2, src, REG_ITMP1);
3602 codegen_addxcheckarefs(cd, mcodeptr);
3604 /* copy SAVEDVAR sizes to stack */
3606 if (src->varkind != ARGVAR) {
3607 M_LST(s2, REG_SP, s1 * 8);
3611 /* is patcher function set? */
3614 codegen_addpatchref(cd, mcodeptr,
3615 (functionptr) iptr->target, iptr->val.a);
3617 if (showdisassemble)
3623 a = (ptrint) iptr->val.a;
3626 /* a0 = dimension count */
3628 ICONST(rd->argintregs[0], iptr->op1);
3630 /* a1 = arraydescriptor */
3632 a = dseg_addaddress(cd, a);
3633 M_ALD(rd->argintregs[1], REG_PV, a);
3635 /* a2 = pointer to dimensions = stack pointer */
3637 M_INTMOVE(REG_SP, rd->argintregs[2]);
3639 a = dseg_addaddress(cd, (void *) BUILTIN_multianewarray);
3640 M_ALD(REG_PV, REG_PV, a);
3641 M_JSR(REG_RA, REG_PV);
3642 s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3644 M_LDA(REG_PV, REG_RA, -s1);
3646 s4 ml = -s1, mh = 0;
3647 while (ml < -32768) { ml += 65536; mh--; }
3648 M_LDA(REG_PV, REG_RA, ml);
3649 M_LDAH(REG_PV, REG_PV, mh);
3651 s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
3652 M_INTMOVE(REG_RESULT, s1);
3653 store_reg_to_var_int(iptr->dst, s1);
3657 throw_cacao_exception_exit(string_java_lang_InternalError,
3658 "Unknown ICMD %d", iptr->opc);
3661 } /* for instruction */
3663 /* copy values to interface registers */
3665 src = bptr->outstack;
3666 len = bptr->outdepth;
3673 if ((src->varkind != STACKVAR)) {
3675 if (IS_FLT_DBL_TYPE(s2)) {
3676 var_to_reg_flt(s1, src, REG_FTMP1);
3677 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3678 M_FLTMOVE(s1,rd->interfaces[len][s2].regoff);
3681 M_DST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3685 var_to_reg_int(s1, src, REG_ITMP1);
3686 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3687 M_INTMOVE(s1,rd->interfaces[len][s2].regoff);
3690 M_LST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3696 } /* if (bptr -> flags >= BBREACHED) */
3697 } /* for basic block */
3699 codegen_createlinenumbertable(cd);
3702 /* generate bound check stubs */
3704 s4 *xcodeptr = NULL;
3707 for (bref = cd->xboundrefs; bref != NULL; bref = bref->next) {
3708 gen_resolvebranch((u1*) cd->mcodebase + bref->branchpos,
3710 (u1*) mcodeptr - cd->mcodebase);
3714 /* move index register into REG_ITMP1 */
3715 M_MOV(bref->reg, REG_ITMP1);
3716 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3718 if (xcodeptr != NULL) {
3719 M_BR(xcodeptr - mcodeptr - 1);
3722 xcodeptr = mcodeptr;
3724 a = dseg_addaddress(cd, asm_throw_and_handle_arrayindexoutofbounds_exception);
3725 M_ALD(REG_PV, REG_PV, a);
3727 M_JSR(REG_RA, REG_PV);
3730 s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3731 if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3733 s4 ml = -s1, mh = 0;
3734 while (ml < -32768) { ml += 65536; mh--; }
3735 M_LDA(REG_PV, REG_RA, ml);
3736 M_LDAH(REG_PV, REG_PV, mh);
3741 /* generate negative array size check stubs */
3745 for (bref = cd->xcheckarefs; bref != NULL; bref = bref->next) {
3746 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3747 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3749 (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3753 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3755 (u1 *) mcodeptr - cd->mcodebase);
3759 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3761 if (xcodeptr != NULL) {
3762 M_BR(xcodeptr - mcodeptr - 1);
3765 xcodeptr = mcodeptr;
3767 a = dseg_addaddress(cd, string_java_lang_NegativeArraySizeException);
3768 M_ALD(REG_ITMP1_XPTR,REG_PV,a);
3770 a = dseg_addaddress(cd, asm_throw_and_handle_nat_exception);
3771 M_ALD(REG_PV, REG_PV, a);
3773 M_JSR(REG_RA, REG_PV);
3776 s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3777 if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3779 s4 ml = -s1, mh = 0;
3780 while (ml < -32768) { ml += 65536; mh--; }
3781 M_LDA(REG_PV, REG_RA, ml);
3782 M_LDAH(REG_PV, REG_PV, mh);
3787 /* generate cast check stubs */
3791 for (bref = cd->xcastrefs; bref != NULL; bref = bref->next) {
3792 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3793 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3795 (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3799 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3801 (u1 *) mcodeptr - cd->mcodebase);
3805 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3807 if (xcodeptr != NULL) {
3808 M_BR(xcodeptr - mcodeptr - 1);
3811 xcodeptr = mcodeptr;
3813 a = dseg_addaddress(cd, string_java_lang_ClassCastException);
3814 M_ALD(REG_ITMP1_XPTR,REG_PV,a);
3816 a = dseg_addaddress(cd, asm_throw_and_handle_nat_exception);
3817 M_ALD(REG_PV, REG_PV, a);
3819 M_JSR(REG_RA, REG_PV);
3822 s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3823 if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3825 s4 ml = -s1, mh = 0;
3826 while (ml < -32768) { ml += 65536; mh--; }
3827 M_LDA(REG_PV, REG_RA, ml);
3828 M_LDAH(REG_PV, REG_PV, mh);
3833 /* generate exception check stubs */
3837 for (bref = cd->xexceptionrefs; bref != NULL; bref = bref->next) {
3838 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3839 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3841 (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3845 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3847 (u1 *) mcodeptr - cd->mcodebase);
3851 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3853 if (xcodeptr != NULL) {
3854 M_BR(xcodeptr - mcodeptr - 1);
3857 xcodeptr = mcodeptr;
3859 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3860 M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3861 M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3863 a = dseg_addaddress(cd, &builtin_get_exceptionptrptr);
3864 M_ALD(REG_PV, REG_PV, a);
3865 M_JSR(REG_RA, REG_PV);
3868 s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3869 if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3871 s4 ml = -s1, mh = 0;
3872 while (ml < -32768) { ml += 65536; mh--; }
3873 M_LDA(REG_PV, REG_RA, ml);
3874 M_LDAH(REG_PV, REG_PV, mh);
3877 M_ALD(REG_ITMP1_XPTR, REG_RESULT, 0);
3878 M_AST(REG_ZERO, REG_RESULT, 0);
3880 M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3881 M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3883 a = dseg_addaddress(cd, &_exceptionptr);
3884 M_ALD(REG_ITMP3, REG_PV, a);
3885 M_ALD(REG_ITMP1_XPTR, REG_ITMP3, 0);
3886 M_AST(REG_ZERO, REG_ITMP3, 0);
3889 a = dseg_addaddress(cd, asm_refillin_and_handle_exception);
3890 M_ALD(REG_PV, REG_PV, a);
3892 M_JMP(REG_RA, REG_PV);
3895 s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3896 if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3898 s4 ml = -s1, mh = 0;
3899 while (ml < -32768) { ml += 65536; mh--; }
3900 M_LDA(REG_PV, REG_RA, ml);
3901 M_LDAH(REG_PV, REG_PV, mh);
3907 /* generate null pointer check stubs */
3911 for (bref = cd->xnullrefs; bref != NULL; bref = bref->next) {
3912 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3913 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3915 (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3919 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3921 (u1 *) mcodeptr - cd->mcodebase);
3925 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3927 if (xcodeptr != NULL) {
3928 M_BR(xcodeptr - mcodeptr - 1);
3931 xcodeptr = mcodeptr;
3933 a = dseg_addaddress(cd, string_java_lang_NullPointerException);
3934 M_ALD(REG_ITMP1_XPTR,REG_PV,a);
3936 a = dseg_addaddress(cd, asm_throw_and_handle_nat_exception);
3937 M_ALD(REG_PV, REG_PV, a);
3939 M_JSR(REG_RA, REG_PV);
3942 s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3943 if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3945 s4 ml = -s1, mh = 0;
3946 while (ml < -32768) { ml += 65536; mh--; }
3947 M_LDA(REG_PV, REG_RA, ml);
3948 M_LDAH(REG_PV, REG_PV, mh);
3953 /* generate put/getstatic stub call code */
3960 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
3961 /* check code segment size */
3963 MCODECHECK(13 + 4 + 1);
3965 /* Get machine code which is patched back in later. The call is */
3966 /* 1 instruction word long. */
3968 xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
3971 /* patch in the call to call the following code (done at compile */
3974 tmpmcodeptr = mcodeptr; /* save current mcodeptr */
3975 mcodeptr = xcodeptr; /* set mcodeptr to patch position */
3977 M_BSR(REG_ITMP3, tmpmcodeptr - (xcodeptr + 1));
3979 mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
3981 /* create stack frame */
3983 M_LSUB_IMM(REG_SP, 5 * 8, REG_SP);
3985 /* move return address onto stack */
3987 M_AST(REG_ITMP3, REG_SP, 4 * 8);
3989 /* move pointer to java_objectheader onto stack */
3991 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3992 /* create a virtual java_objectheader */
3994 (void) dseg_addaddress(cd, get_dummyLR()); /* monitorPtr */
3995 a = dseg_addaddress(cd, NULL); /* vftbl */
3998 M_LDA(REG_ITMP3, REG_PV, a);
4000 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4001 M_LDA(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4003 M_AST(REG_ITMP3, REG_SP, 3 * 8);
4005 M_AST(REG_ZERO, REG_SP, 3 * 8);
4008 /* move machine code onto stack */
4010 a = dseg_adds4(cd, mcode);
4012 M_ILD(REG_ITMP3, REG_PV, a);
4014 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4015 M_ILD(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4017 M_IST(REG_ITMP3, REG_SP, 2 * 8);
4019 /* move class/method/field reference onto stack */
4021 a = dseg_addaddress(cd, pref->ref);
4023 M_ALD(REG_ITMP3, REG_PV, a);
4025 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4026 M_ALD(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4028 M_AST(REG_ITMP3, REG_SP, 1 * 8);
4030 /* move patcher function pointer onto stack */
4032 a = dseg_addaddress(cd, pref->patcher);
4034 M_ALD(REG_ITMP3, REG_PV, a);
4036 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4037 M_ALD(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4039 M_AST(REG_ITMP3, REG_SP, 0 * 8);
4041 a = dseg_addaddress(cd, asm_wrapper_patcher);
4043 M_ALD(REG_ITMP3, REG_PV, a);
4045 M_LDAH(REG_ITMP3, REG_PV, (a >> 16) & 0x0000ffff);
4046 M_ALD(REG_ITMP3, REG_ITMP3, a & 0x0000ffff);
4048 M_JMP(REG_ZERO, REG_ITMP3);
4053 codegen_finish(m, cd, (s4) ((u1 *) mcodeptr - cd->mcodebase));
4057 /* createcompilerstub **********************************************************
4059 Creates a stub routine which calls the compiler.
4061 *******************************************************************************/
4063 #define COMPSTUBSIZE 3
4065 functionptr createcompilerstub(methodinfo *m)
4067 u8 *s = CNEW(u8, COMPSTUBSIZE); /* memory to hold the stub */
4068 s4 *mcodeptr = (s4 *) s; /* code generation pointer */
4070 /* code for the stub */
4071 M_ALD(REG_PV, REG_PV, 16); /* load pointer to the compiler */
4072 M_JMP(0, REG_PV); /* jump to the compiler, return address
4073 in reg 0 is used as method pointer */
4074 s[1] = (ptrint) m; /* literals to be adressed */
4075 s[2] = (ptrint) asm_call_jit_compiler; /* jump directly via PV from above */
4077 #if defined(STATISTICS)
4079 count_cstub_len += COMPSTUBSIZE * 8;
4082 return (functionptr) s;
4086 /* createnativestub ************************************************************
4088 Creates a stub routine which calls a native method.
4090 *******************************************************************************/
4092 functionptr createnativestub(functionptr f, methodinfo *m, codegendata *cd,
4093 registerdata *rd, methoddesc *nmd)
4095 s4 *mcodeptr; /* code generation pointer */
4096 s4 stackframesize; /* size of stackframe if needed */
4100 s4 i, j; /* count variables */
4104 /* initialize variables */
4107 nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
4110 /* calculate stack frame size */
4113 1 + /* return address */
4114 6 + /* dynamic stack info */
4115 1 + /* methodinfo for call trace */
4116 (md->paramcount > INT_ARG_CNT ? INT_ARG_CNT : md->paramcount) +
4120 /* create method header */
4122 (void) dseg_addaddress(cd, m); /* MethodPointer */
4123 (void) dseg_adds4(cd, stackframesize * 8); /* FrameSize */
4124 (void) dseg_adds4(cd, 0); /* IsSync */
4125 (void) dseg_adds4(cd, 0); /* IsLeaf */
4126 (void) dseg_adds4(cd, 0); /* IntSave */
4127 (void) dseg_adds4(cd, 0); /* FltSave */
4128 (void) dseg_addlinenumbertablesize(cd);
4129 (void) dseg_adds4(cd, 0); /* ExTableSize */
4132 /* initialize mcode variables */
4134 mcodeptr = (s4 *) cd->mcodebase;
4135 cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize);
4138 /* generate stub code */
4140 M_LDA(REG_SP, REG_SP, -stackframesize * 8);
4141 M_AST(REG_RA, REG_SP, (stackframesize - 1) * 8);
4144 /* if function is static, check for initialized */
4146 if ((m->flags & ACC_STATIC) && !m->class->initialized) {
4147 codegen_addpatchref(cd, mcodeptr, PATCHER_clinit, m->class);
4149 if (showdisassemble)
4153 /* call trace function */
4156 /* save integer argument registers */
4158 for (i = 0, j = 1; i < md->paramcount && i < INT_ARG_CNT; i++)
4159 if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
4160 M_LST(rd->argintregs[i], REG_SP, j++ * 8);
4162 /* save and copy float arguments into integer registers */
4164 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4165 t = md->paramtypes[i].type;
4167 if (IS_FLT_DBL_TYPE(t)) {
4168 if (IS_2_WORD_TYPE(t)) {
4169 M_DST(rd->argfltregs[i], REG_SP, j * 8);
4170 M_LLD(rd->argintregs[i], REG_SP, j * 8);
4172 M_FST(rd->argfltregs[i], REG_SP, j * 8);
4173 M_ILD(rd->argintregs[i], REG_SP, j * 8);
4179 off = dseg_addaddress(cd, m);
4180 M_ALD(REG_ITMP1, REG_PV, off);
4181 M_AST(REG_ITMP1, REG_SP, 0 * 8);
4182 off = dseg_addaddress(cd, builtin_trace_args);
4183 M_ALD(REG_PV, REG_PV, off);
4184 M_JSR(REG_RA, REG_PV);
4185 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4186 M_LDA(REG_PV, REG_RA, -disp);
4188 for (i = 0, j = 1; i < md->paramcount && i < INT_ARG_CNT; i++)
4189 if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
4190 M_LLD(rd->argintregs[i], REG_SP, j++ * 8);
4192 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4193 t = md->paramtypes[i].type;
4195 if (IS_FLT_DBL_TYPE(t)) {
4196 if (IS_2_WORD_TYPE(t)) {
4197 M_DLD(rd->argfltregs[i], REG_SP, j * 8);
4199 M_FLD(rd->argfltregs[i], REG_SP, j * 8);
4207 /* save integer and float argument registers */
4209 for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++)
4210 if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
4211 M_LST(rd->argintregs[i], REG_SP, j++ * 8);
4213 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++)
4214 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type))
4215 M_DST(rd->argfltregs[i], REG_SP, j++ * 8);
4217 /* create native stack info */
4219 off = dseg_addaddress(cd, builtin_asm_get_stackframeinfo);
4220 M_ALD(REG_PV, REG_PV, off);
4221 M_JSR(REG_RA, REG_PV);
4222 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4223 M_LDA(REG_PV, REG_RA, -disp);
4225 M_LST(REG_RESULT, REG_SP, (stackframesize - 5) * 8); /* save adress of pointer */
4226 M_LLD(REG_ITMP2, REG_RESULT, 0); /* get pointer */
4227 M_LST(REG_ITMP2, REG_SP, (stackframesize - 6) * 8); /* save old value */
4228 M_LDA(REG_ITMP3, REG_SP, (stackframesize - 6) * 8); /* calculate new value */
4229 M_LST(REG_ITMP3, REG_RESULT, 0); /* store new value */
4230 off = dseg_addaddress(cd, m);
4231 M_LLD(REG_ITMP2, REG_PV, off);
4232 M_LST(REG_ITMP2, REG_SP, (stackframesize - 4) * 8);
4233 M_LST(REG_ZERO, REG_SP, (stackframesize - 3) * 8);
4234 M_LST(REG_ZERO, REG_SP, (stackframesize - 2) * 8);
4236 /* restore integer and float argument registers */
4238 for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++)
4239 if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
4240 M_LLD(rd->argintregs[i], REG_SP, j++ * 8);
4242 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++)
4243 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type))
4244 M_DLD(rd->argfltregs[i], REG_SP, j++ * 8);
4247 /* copy or spill arguments to new locations */
4249 for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
4250 t = md->paramtypes[i].type;
4252 if (IS_INT_LNG_TYPE(t)) {
4253 if (!md->params[i].inmemory) {
4254 s1 = rd->argintregs[md->params[i].regoff];
4256 if (!nmd->params[j].inmemory) {
4257 s2 = rd->argintregs[nmd->params[j].regoff];
4261 s2 = nmd->params[j].regoff;
4262 M_LST(s1, REG_SP, s2 * 8);
4266 s1 = md->params[i].regoff + stackframesize;
4267 s2 = nmd->params[j].regoff;
4268 M_LLD(REG_ITMP1, REG_SP, s1 * 8);
4269 M_LST(REG_ITMP1, REG_SP, s2 * 8);
4273 if (!md->params[i].inmemory) {
4274 s1 = rd->argfltregs[md->params[i].regoff];
4276 if (!nmd->params[j].inmemory) {
4277 s2 = rd->argfltregs[nmd->params[j].regoff];
4281 s2 = nmd->params[j].regoff;
4282 if (IS_2_WORD_TYPE(t))
4283 M_DST(s1, REG_SP, s2 * 8);
4285 M_FST(s1, REG_SP, s2 * 8);
4289 s1 = md->params[i].regoff + stackframesize;
4290 s2 = nmd->params[j].regoff;
4291 M_DLD(REG_FTMP1, REG_SP, s1 * 8);
4292 if (IS_2_WORD_TYPE(t))
4293 M_DST(REG_FTMP1, REG_SP, s2 * 8);
4295 M_FST(REG_FTMP1, REG_SP, s2 * 8);
4300 /* put class into second argument register */
4302 if (m->flags & ACC_STATIC) {
4303 off = dseg_addaddress(cd, m->class);
4304 M_ALD(rd->argintregs[1], REG_PV, off);
4307 /* put env into first argument register */
4309 off = dseg_addaddress(cd, &env);
4310 M_ALD(rd->argintregs[0], REG_PV, off);
4312 /* do the native function call */
4314 #if !defined(ENABLE_STATICVM)
4316 codegen_addpatchref(cd, mcodeptr, PATCHER_resolve_native, m);
4318 if (showdisassemble)
4323 off = dseg_addaddress(cd, f);
4324 M_ALD(REG_PV, REG_PV, off); /* load adress of native method */
4325 M_JSR(REG_RA, REG_PV); /* call native method */
4326 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4327 M_LDA(REG_PV, REG_RA, -disp); /* recompute pv from ra */
4330 /* remove native stack info */
4332 M_LLD(REG_ITMP3, REG_SP, (stackframesize - 5) * 8); /* get address of stacktrace helper pointer */
4333 M_LLD(REG_ITMP1, REG_SP, (stackframesize - 6) * 8); /* get old value */
4334 M_LST(REG_ITMP1, REG_ITMP3, 0); /* set old value */
4337 /* call finished trace */
4340 M_LST(REG_RESULT, REG_SP, 0 * 8);
4341 M_DST(REG_FRESULT, REG_SP, 1 * 8);
4343 off = dseg_addaddress(cd, m);
4344 M_ALD(rd->argintregs[0], REG_PV, off);
4346 M_MOV(REG_RESULT, rd->argintregs[1]);
4347 M_FMOV(REG_FRESULT, rd->argfltregs[2]);
4348 M_FMOV(REG_FRESULT, rd->argfltregs[3]);
4350 off = dseg_addaddress(cd, builtin_displaymethodstop);
4351 M_ALD(REG_PV, REG_PV, off);
4352 M_JSR(REG_RA, REG_PV);
4353 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4354 M_LDA(REG_PV, REG_RA, -disp);
4356 M_LLD(REG_RESULT, REG_SP, 0 * 8);
4357 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
4361 /* check for exception */
4363 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4364 if (IS_FLT_DBL_TYPE(md->returntype.type))
4365 M_DST(REG_FRESULT, REG_SP, 0 * 8);
4367 M_AST(REG_RESULT, REG_SP, 0 * 8);
4369 off = dseg_addaddress(cd, builtin_get_exceptionptrptr);
4370 M_ALD(REG_PV, REG_PV, off);
4371 M_JSR(REG_RA, REG_PV);
4372 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4373 M_LDA(REG_PV, REG_RA, -disp);
4374 M_MOV(REG_RESULT, REG_ITMP3);
4376 if (IS_FLT_DBL_TYPE(md->returntype.type))
4377 M_DLD(REG_FRESULT, REG_SP, 0 * 8);
4379 M_ALD(REG_RESULT, REG_SP, 0 * 8);
4381 off = dseg_addaddress(cd, &_exceptionptr);
4382 M_ALD(REG_ITMP3, REG_PV, off); /* get address of exceptionptr */
4385 M_ALD(REG_ITMP1, REG_ITMP3, 0); /* load exception into reg. itmp1 */
4386 M_BNEZ(REG_ITMP1, 3); /* if no exception then return */
4388 M_ALD(REG_RA, REG_SP, (stackframesize - 1) * 8); /* load return address */
4390 M_LDA(REG_SP, REG_SP, stackframesize * 8);
4392 M_RET(REG_ZERO, REG_RA); /* return to caller */
4394 /* handle exception */
4396 M_AST(REG_ZERO, REG_ITMP3, 0); /* store NULL into exceptionptr */
4398 M_ALD(REG_RA, REG_SP, (stackframesize - 1) * 8); /* load return address */
4399 M_LDA(REG_ITMP2, REG_RA, -4); /* move fault address into reg. itmp2 */
4401 M_LDA(REG_SP, REG_SP, stackframesize * 8);
4403 off = dseg_addaddress(cd, asm_handle_nat_exception);
4404 M_ALD(REG_ITMP3, REG_PV, off); /* load asm exception handler address */
4405 M_JMP(REG_ZERO, REG_ITMP3); /* jump to asm exception handler */
4408 /* process patcher calls **************************************************/
4416 /* there can only be one <clinit> ref entry */
4417 pref = cd->patchrefs;
4419 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4420 /* Get machine code which is patched back in later. The call is */
4421 /* 1 instruction word long. */
4423 xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
4424 mcode = (u4) *xcodeptr;
4426 /* patch in the call to call the following code (done at compile */
4429 tmpmcodeptr = mcodeptr; /* save current mcodeptr */
4430 mcodeptr = xcodeptr; /* set mcodeptr to patch position */
4432 M_BSR(REG_ITMP3, tmpmcodeptr - (xcodeptr + 1));
4434 mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
4436 /* create stack frame */
4438 M_LSUB_IMM(REG_SP, 5 * 8, REG_SP);
4440 /* move return address onto stack */
4442 M_AST(REG_ITMP3, REG_SP, 4 * 8);
4444 /* move pointer to java_objectheader onto stack */
4446 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4447 /* create a virtual java_objectheader */
4449 (void) dseg_addaddress(cd, get_dummyLR()); /* monitorPtr */
4450 off = dseg_addaddress(cd, NULL); /* vftbl */
4452 M_LDA(REG_ITMP3, REG_PV, off);
4453 M_AST(REG_ITMP3, REG_SP, 3 * 8);
4455 M_AST(REG_ZERO, REG_SP, 3 * 8);
4458 /* move machine code onto stack */
4460 off = dseg_adds4(cd, mcode);
4461 M_ILD(REG_ITMP3, REG_PV, off);
4462 M_IST(REG_ITMP3, REG_SP, 2 * 8);
4464 /* move class/method/field reference onto stack */
4466 off = dseg_addaddress(cd, pref->ref);
4467 M_ALD(REG_ITMP3, REG_PV, off);
4468 M_AST(REG_ITMP3, REG_SP, 1 * 8);
4470 /* move patcher function pointer onto stack */
4472 off = dseg_addaddress(cd, pref->patcher);
4473 M_ALD(REG_ITMP3, REG_PV, off);
4474 M_AST(REG_ITMP3, REG_SP, 0 * 8);
4476 off = dseg_addaddress(cd, asm_wrapper_patcher);
4477 M_ALD(REG_ITMP3, REG_PV, off);
4478 M_JMP(REG_ZERO, REG_ITMP3);
4482 codegen_finish(m, cd, (s4) ((u1 *) mcodeptr - cd->mcodebase));
4484 return m->entrypoint;
4489 * These are local overrides for various environment variables in Emacs.
4490 * Please do not remove this and leave it at the end of the file, where
4491 * Emacs will automagically detect them.
4492 * ---------------------------------------------------------------------
4495 * indent-tabs-mode: t