src/vm/jit/alpha/codegen.c

   1 /* src/vm/jit/alpha/codegen.c - machine code generator for Alpha
   2
   3    Copyright (C) 1996-2005 R. Grafl, A. Krall, C. Kruegel, C. Oates,
   4    R. Obermaisser, M. Platter, M. Probst, S. Ring, E. Steiner,
   5    C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich, J. Wenninger,
   6    Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  23    02111-1307, USA.
  24
  25    Contact: cacao@complang.tuwien.ac.at
  26
  27    Authors: Andreas Krall
  28             Reinhard Grafl
  29
  30    Changes: Joseph Wenninger
  31             Christian Thalinger
  32             Christian Ullrich
  33
  34    $Id: codegen.c 3345 2005-10-04 22:14:53Z twisti $
  35
  36 */
  37
  38
  39 #include <stdio.h>
  40
  41 #include "config.h"
  42 #include "vm/types.h"
  43
  44 #include "md.h"
  45 #include "md-abi.h"
  46 #include "md-abi.inc"
  47
  48 #include "vm/jit/alpha/arch.h"
  49 #include "vm/jit/alpha/codegen.h"
  50
  51 #include "cacao/cacao.h"
  52 #include "native/native.h"
  53 #include "vm/builtin.h"
  54 #include "vm/global.h"
  55 #include "vm/loader.h"
  56 #include "vm/stringlocal.h"
  57 #include "vm/tables.h"
  58 #include "vm/jit/asmpart.h"
  59 #include "vm/jit/codegen.inc"
  60 #include "vm/jit/jit.h"
  61
  62 #if defined(LSRA)
  63 # include "vm/jit/lsra.h"
  64 # include "vm/jit/lsra.inc"
  65 #endif
  66
  67 #include "vm/jit/parse.h"
  68 #include "vm/jit/patcher.h"
  69 #include "vm/jit/reg.h"
  70 #include "vm/jit/reg.inc"
  71
  72
  73 /* codegen *********************************************************************
  74
  75    Generates machine code.
  76
  77 *******************************************************************************/
  78
  79 void codegen(methodinfo *m, codegendata *cd, registerdata *rd)
  80 {
  81         s4                  len, s1, s2, s3, d, disp;
  82         ptrint              a;
  83         s4                  parentargs_base;
  84         s4                 *mcodeptr;
  85         stackptr            src;
  86         varinfo            *var;
  87         basicblock         *bptr;
  88         instruction        *iptr;
  89         exceptiontable     *ex;
  90         u2                  currentline;
  91         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE*  */
  92         builtintable_entry *bte;
  93         methoddesc         *md;
  94
  95         /* prevent compiler warnings */
  96
  97         d = 0;
  98         currentline = 0;
  99         lm = NULL;
 100         bte = NULL;
 101
 102         {
 103         s4 i, p, t, l;
 104         s4 savedregs_num;
 105
 106         savedregs_num = (m->isleafmethod) ? 0 : 1;        /* space to save the RA */
 107
 108         /* space to save used callee saved registers */
 109
 110         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
 111         savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
 112
 113         parentargs_base = rd->memuse + savedregs_num;
 114
 115 #if defined(USE_THREADS)           /* space to save argument of monitor_enter */
 116
 117         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 118                 parentargs_base++;
 119
 120 #endif
 121
 122         /* create method header */
 123
 124         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
 125         (void) dseg_adds4(cd, parentargs_base * 8);             /* FrameSize      */
 126
 127 #if defined(USE_THREADS)
 128
 129         /* IsSync contains the offset relative to the stack pointer for the
 130            argument of monitor_exit used in the exception handler. Since the
 131            offset could be zero and give a wrong meaning of the flag it is
 132            offset by one.
 133         */
 134
 135         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 136                 (void) dseg_adds4(cd, (rd->memuse + 1) * 8);     /* IsSync         */
 137         else
 138
 139 #endif
 140
 141         (void) dseg_adds4(cd, 0);                               /* IsSync         */
 142
 143         (void) dseg_adds4(cd, m->isleafmethod);                 /* IsLeaf         */
 144         (void) dseg_adds4(cd, INT_SAV_CNT - rd->savintreguse);/* IntSave  */
 145         (void) dseg_adds4(cd, FLT_SAV_CNT - rd->savfltreguse);/* FltSave  */
 146
 147         dseg_addlinenumbertablesize(cd);
 148
 149         (void) dseg_adds4(cd, cd->exceptiontablelength);        /* ExTableSize    */
 150
 151         /* create exception table */
 152
 153         for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
 154                 dseg_addtarget(cd, ex->start);
 155                 dseg_addtarget(cd, ex->end);
 156                 dseg_addtarget(cd, ex->handler);
 157                 (void) dseg_addaddress(cd, ex->catchtype.cls);
 158         }
 159
 160         /* initialize mcode variables */
 161
 162         mcodeptr = (s4 *) cd->mcodebase;
 163         cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize);
 164         MCODECHECK(128 + m->paramcount);
 165
 166         /* create stack frame (if necessary) */
 167
 168         if (parentargs_base) {
 169                 M_LDA(REG_SP, REG_SP, -parentargs_base * 8);
 170         }
 171
 172         /* save return address and used callee saved registers */
 173
 174         p = parentargs_base;
 175         if (!m->isleafmethod) {
 176                 p--; M_AST(REG_RA, REG_SP, p * 8);
 177         }
 178         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
 179                 p--; M_LST(rd->savintregs[i], REG_SP, p * 8);
 180         }
 181         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
 182                 p--; M_DST(rd->savfltregs[i], REG_SP, p * 8);
 183         }
 184
 185         /* take arguments out of register or stack frame */
 186
 187         md = m->parseddesc;
 188
 189         for (p = 0, l = 0; p < md->paramcount; p++) {
 190                 t = md->paramtypes[p].type;
 191                 var = &(rd->locals[l][t]);
 192                 l++;
 193                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 194                         l++;
 195                 if (var->type < 0)
 196                         continue;
 197                 s1 = md->params[p].regoff;
 198                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 199                         if (!md->params[p].inmemory) {           /* register arguments    */
 200                                 s2 = rd->argintregs[s1];
 201                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 202                                         M_INTMOVE(s2, var->regoff);
 203
 204                                 } else {                             /* reg arg -> spilled    */
 205                                         M_LST(s2, REG_SP, var->regoff * 8);
 206                                 }
 207
 208                         } else {                                 /* stack arguments       */
 209                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 210                                         M_LLD(var->regoff, REG_SP, (parentargs_base + s1) * 8);
 211
 212                                 } else {                             /* stack arg -> spilled  */
 213                                         var->regoff = parentargs_base + s1;
 214                                 }
 215                         }
 216
 217                 } else {                                     /* floating args         */
 218                         if (!md->params[p].inmemory) {           /* register arguments    */
 219                                 s2 = rd->argfltregs[s1];
 220                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 221                                         M_FLTMOVE(s2, var->regoff);
 222
 223                                 } else {                                         /* reg arg -> spilled    */
 224                                         M_DST(s2, REG_SP, var->regoff * 8);
 225                                 }
 226
 227                         } else {                                 /* stack arguments       */
 228                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 229                                         M_DLD(var->regoff, REG_SP, (parentargs_base + s1) * 8);
 230
 231                                 } else {                             /* stack-arg -> spilled  */
 232                                         var->regoff = parentargs_base + s1;
 233                                 }
 234                         }
 235                 }
 236         } /* end for */
 237
 238         /* call monitorenter function */
 239
 240 #if defined(USE_THREADS)
 241         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 242                 /* stack offset for monitor argument */
 243
 244                 s1 = rd->memuse;
 245
 246                 if (runverbose) {
 247                         M_LDA(REG_SP, REG_SP, -(INT_ARG_CNT + FLT_ARG_CNT) * 8);
 248
 249                         for (p = 0; p < INT_ARG_CNT; p++)
 250                                 M_LST(rd->argintregs[p], REG_SP, p * 8);
 251
 252                         for (p = 0; p < FLT_ARG_CNT; p++)
 253                                 M_DST(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
 254
 255                         s1 += INT_ARG_CNT + FLT_ARG_CNT;
 256                 }
 257
 258                 /* decide which monitor enter function to call */
 259
 260                 if (m->flags & ACC_STATIC) {
 261                         disp = dseg_addaddress(cd, m->class);
 262                         M_ALD(REG_ITMP1, REG_PV, disp);
 263                         M_AST(REG_ITMP1, REG_SP, s1 * 8);
 264                         M_INTMOVE(REG_ITMP1, rd->argintregs[0]);
 265                         disp = dseg_addaddress(cd, BUILTIN_staticmonitorenter);
 266                         M_ALD(REG_PV, REG_PV, disp);
 267                         M_JSR(REG_RA, REG_PV);
 268                         disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 269                         M_LDA(REG_PV, REG_RA, disp);
 270
 271                 } else {
 272                         M_BEQZ(rd->argintregs[0], 0);
 273                         codegen_addxnullrefs(cd, mcodeptr);
 274                         M_AST(rd->argintregs[0], REG_SP, s1 * 8);
 275                         disp = dseg_addaddress(cd, BUILTIN_monitorenter);
 276                         M_ALD(REG_PV, REG_PV, disp);
 277                         M_JSR(REG_RA, REG_PV);
 278                         disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 279                         M_LDA(REG_PV, REG_RA, disp);
 280                 }
 281
 282                 if (runverbose) {
 283                         for (p = 0; p < INT_ARG_CNT; p++)
 284                                 M_LLD(rd->argintregs[p], REG_SP, p * 8);
 285
 286                         for (p = 0; p < FLT_ARG_CNT; p++)
 287                                 M_DLD(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
 288
 289                         M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT) * 8);
 290                 }
 291         }
 292 #endif
 293
 294         /* call trace function */
 295
 296         if (runverbose) {
 297                 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
 298                 M_AST(REG_RA, REG_SP, 1 * 8);
 299
 300                 /* save integer argument registers */
 301
 302                 for (p = 0; p < md->paramcount && p < INT_ARG_CNT; p++)
 303                         M_LST(rd->argintregs[p], REG_SP, (2 + p) * 8);
 304
 305                 /* save and copy float arguments into integer registers */
 306
 307                 for (p = 0; p < md->paramcount && p < FLT_ARG_CNT; p++) {
 308                         t = md->paramtypes[p].type;
 309
 310                         if (IS_FLT_DBL_TYPE(t)) {
 311                                 if (IS_2_WORD_TYPE(t)) {
 312                                         M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 313
 314                                 } else {
 315                                         M_FST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 316                                 }
 317
 318                                 M_LLD(rd->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 319
 320                         } else {
 321                                 M_DST(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 322                         }
 323                 }
 324
 325                 disp = dseg_addaddress(cd, m);
 326                 M_ALD(REG_ITMP1, REG_PV, disp);
 327                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
 328                 disp = dseg_addaddress(cd, (void *) builtin_trace_args);
 329                 M_ALD(REG_PV, REG_PV, disp);
 330                 M_JSR(REG_RA, REG_PV);
 331                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 332                 M_LDA(REG_PV, REG_RA, disp);
 333                 M_ALD(REG_RA, REG_SP, 1 * 8);
 334
 335                 /* restore integer argument registers */
 336
 337                 for (p = 0; p < md->paramcount && p < INT_ARG_CNT; p++)
 338                         M_LLD(rd->argintregs[p], REG_SP, (2 + p) * 8);
 339
 340                 /* restore float argument registers */
 341
 342                 for (p = 0; p < md->paramcount && p < FLT_ARG_CNT; p++) {
 343                         t = md->paramtypes[p].type;
 344
 345                         if (IS_FLT_DBL_TYPE(t)) {
 346                                 if (IS_2_WORD_TYPE(t)) {
 347                                         M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 348
 349                                 } else {
 350                                         M_FLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 351                                 }
 352
 353                         } else {
 354                                 M_DLD(rd->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 355                         }
 356                 }
 357
 358                 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
 359         }
 360
 361         }
 362
 363         /* end of header generation */
 364
 365         /* walk through all basic blocks */
 366
 367         for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
 368
 369                 bptr->mpc = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 370
 371                 if (bptr->flags >= BBREACHED) {
 372
 373                 /* branch resolving */
 374
 375                 {
 376                 branchref *brefs;
 377                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 378                         gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
 379                                           brefs->branchpos, bptr->mpc);
 380                         }
 381                 }
 382
 383                 /* copy interface registers to their destination */
 384
 385                 src = bptr->instack;
 386                 len = bptr->indepth;
 387                 MCODECHECK(64+len);
 388 #ifdef LSRA
 389                 if (opt_lsra) {
 390                 while (src != NULL) {
 391                         len--;
 392                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 393                                         /*                              d = reg_of_var(m, src, REG_ITMP1); */
 394                                         if (!(src->flags & INMEMORY))
 395                                                 d = src->regoff;
 396                                         else
 397                                                 d = REG_ITMP1;
 398                                         M_INTMOVE(REG_ITMP1, d);
 399                                         store_reg_to_var_int(src, d);
 400                                 }
 401                                 src = src->prev;
 402                         }
 403                 } else {
 404 #endif
 405                         while (src != NULL) {
 406                                 len--;
 407                                 if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 408                                         d = reg_of_var(rd, src, REG_ITMP1);
 409                                         M_INTMOVE(REG_ITMP1, d);
 410                                         store_reg_to_var_int(src, d);
 411                                 } else {
 412                                         d = reg_of_var(rd, src, REG_IFTMP);
 413                                         if ((src->varkind != STACKVAR)) {
 414                                                 s2 = src->type;
 415                                                 if (IS_FLT_DBL_TYPE(s2)) {
 416                                                         if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 417                                                                 s1 = rd->interfaces[len][s2].regoff;
 418                                                                 M_FLTMOVE(s1, d);
 419                                                         } else {
 420                                                                 M_DLD(d, REG_SP, rd->interfaces[len][s2].regoff * 8);
 421                                                         }
 422                                                         store_reg_to_var_flt(src, d);
 423                                                 }
 424                                                 else {
 425                                                         if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
 426                                                                 s1 = rd->interfaces[len][s2].regoff;
 427                                                                 M_INTMOVE(s1, d);
 428                                                         } else {
 429                                                                 M_LLD(d, REG_SP, rd->interfaces[len][s2].regoff * 8);
 430                                                         }
 431                                                         store_reg_to_var_int(src, d);
 432                                                 }
 433                                         }
 434                                 }
 435                                 src = src->prev;
 436                         }
 437 #ifdef LSRA
 438                 }
 439 #endif
 440
 441                 /* walk through all instructions */
 442
 443                 src = bptr->instack;
 444                 len = bptr->icount;
 445
 446                 for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) {
 447                         if (iptr->line != currentline) {
 448                                 dseg_addlinenumber(cd, iptr->line, (u1 *) mcodeptr);
 449                                 currentline = iptr->line;
 450                         }
 451
 452                 MCODECHECK(64);       /* an instruction usually needs < 64 words      */
 453                 switch (iptr->opc) {
 454
 455                 case ICMD_INLINE_START:
 456                 case ICMD_INLINE_END:
 457                         break;
 458
 459                 case ICMD_NOP:        /* ...  ==> ...                                 */
 460                         break;
 461
 462                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
 463
 464                         var_to_reg_int(s1, src, REG_ITMP1);
 465                         M_BEQZ(s1, 0);
 466                         codegen_addxnullrefs(cd, mcodeptr);
 467                         break;
 468
 469                 /* constant operations ************************************************/
 470
 471                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 472                                       /* op1 = 0, val.i = constant                    */
 473
 474                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 475                         ICONST(d, iptr->val.i);
 476                         store_reg_to_var_int(iptr->dst, d);
 477                         break;
 478
 479                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 480                                       /* op1 = 0, val.l = constant                    */
 481
 482                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 483                         LCONST(d, iptr->val.l);
 484                         store_reg_to_var_int(iptr->dst, d);
 485                         break;
 486
 487                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 488                                       /* op1 = 0, val.f = constant                    */
 489
 490                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 491                         disp = dseg_addfloat(cd, iptr->val.f);
 492                         M_FLD(d, REG_PV, disp);
 493                         store_reg_to_var_flt(iptr->dst, d);
 494                         break;
 495
 496                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 497                                       /* op1 = 0, val.d = constant                    */
 498
 499                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 500                         disp = dseg_adddouble(cd, iptr->val.d);
 501                         M_DLD(d, REG_PV, disp);
 502                         store_reg_to_var_flt(iptr->dst, d);
 503                         break;
 504
 505                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 506                                       /* op1 = 0, val.a = constant                    */
 507
 508                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 509                         if (iptr->val.a) {
 510                                 disp = dseg_addaddress(cd, iptr->val.a);
 511                                 M_ALD(d, REG_PV, disp);
 512                         } else {
 513                                 M_INTMOVE(REG_ZERO, d);
 514                         }
 515                         store_reg_to_var_int(iptr->dst, d);
 516                         break;
 517
 518
 519                 /* load/store operations **********************************************/
 520
 521                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 522                 case ICMD_LLOAD:      /* op1 = local variable                         */
 523                 case ICMD_ALOAD:
 524
 525                         d = reg_of_var(rd, iptr->dst, REG_ITMP1);
 526                         if ((iptr->dst->varkind == LOCALVAR) &&
 527                             (iptr->dst->varnum == iptr->op1))
 528                                 break;
 529                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 530                         if (var->flags & INMEMORY) {
 531                                 M_LLD(d, REG_SP, var->regoff * 8);
 532                         } else {
 533                                 M_INTMOVE(var->regoff, d);
 534                         }
 535                         store_reg_to_var_int(iptr->dst, d);
 536                         break;
 537
 538                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 539                 case ICMD_DLOAD:      /* op1 = local variable                         */
 540
 541                         d = reg_of_var(rd, iptr->dst, REG_FTMP1);
 542                         if ((iptr->dst->varkind == LOCALVAR) &&
 543                             (iptr->dst->varnum == iptr->op1))
 544                                 break;
 545                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 546                         if (var->flags & INMEMORY) {
 547                                 M_DLD(d, REG_SP, var->regoff * 8);
 548                         } else {
 549                                 M_FLTMOVE(var->regoff, d);
 550                         }
 551                         store_reg_to_var_flt(iptr->dst, d);
 552                         break;
 553
 554
 555                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 556                 case ICMD_LSTORE:     /* op1 = local variable                         */
 557                 case ICMD_ASTORE:
 558
 559                         if ((src->varkind == LOCALVAR) &&
 560                             (src->varnum == iptr->op1))
 561                                 break;
 562                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 563                         if (var->flags & INMEMORY) {
 564                                 var_to_reg_int(s1, src, REG_ITMP1);
 565                                 M_LST(s1, REG_SP, var->regoff * 8);
 566                         } else {
 567                                 var_to_reg_int(s1, src, var->regoff);
 568                                 M_INTMOVE(s1, var->regoff);
 569                         }
 570                         break;
 571
 572                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 573                 case ICMD_DSTORE:     /* op1 = local variable                         */
 574
 575                         if ((src->varkind == LOCALVAR) &&
 576                             (src->varnum == iptr->op1))
 577                                 break;
 578                         var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 579                         if (var->flags & INMEMORY) {
 580                                 var_to_reg_flt(s1, src, REG_FTMP1);
 581                                 M_DST(s1, REG_SP, var->regoff * 8);
 582                         } else {
 583                                 var_to_reg_flt(s1, src, var->regoff);
 584                                 M_FLTMOVE(s1, var->regoff);
 585                         }
 586                         break;
 587
 588
 589                 /* pop/dup/swap operations ********************************************/
 590
 591                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 592
 593                 case ICMD_POP:        /* ..., value  ==> ...                          */
 594                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 595                         break;
 596
 597                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 598                         M_COPY(src, iptr->dst);
 599                         break;
 600
 601                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 602
 603                         M_COPY(src,       iptr->dst);
 604                         M_COPY(src->prev, iptr->dst->prev);
 605                         M_COPY(iptr->dst, iptr->dst->prev->prev);
 606                         break;
 607
 608                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 609
 610                         M_COPY(src,             iptr->dst);
 611                         M_COPY(src->prev,       iptr->dst->prev);
 612                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 613                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 614                         break;
 615
 616                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 617
 618                         M_COPY(src,       iptr->dst);
 619                         M_COPY(src->prev, iptr->dst->prev);
 620                         break;
 621
 622                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 623
 624                         M_COPY(src,             iptr->dst);
 625                         M_COPY(src->prev,       iptr->dst->prev);
 626                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 627                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 628                         M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
 629                         break;
 630
 631                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 632
 633                         M_COPY(src,                   iptr->dst);
 634                         M_COPY(src->prev,             iptr->dst->prev);
 635                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 636                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 637                         M_COPY(iptr->dst,             iptr->dst->prev->prev->prev->prev);
 638                         M_COPY(iptr->dst->prev,       iptr->dst->prev->prev->prev->prev->prev);
 639                         break;
 640
 641                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 642
 643                         M_COPY(src,       iptr->dst->prev);
 644                         M_COPY(src->prev, iptr->dst);
 645                         break;
 646
 647
 648                 /* integer operations *************************************************/
 649
 650                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 651
 652                         var_to_reg_int(s1, src, REG_ITMP1);
 653                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 654                         M_ISUB(REG_ZERO, s1, d);
 655                         store_reg_to_var_int(iptr->dst, d);
 656                         break;
 657
 658                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 659
 660                         var_to_reg_int(s1, src, REG_ITMP1);
 661                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 662                         M_LSUB(REG_ZERO, s1, d);
 663                         store_reg_to_var_int(iptr->dst, d);
 664                         break;
 665
 666                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 667
 668                         var_to_reg_int(s1, src, REG_ITMP1);
 669                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 670                         M_INTMOVE(s1, d);
 671                         store_reg_to_var_int(iptr->dst, d);
 672                         break;
 673
 674                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 675
 676                         var_to_reg_int(s1, src, REG_ITMP1);
 677                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 678                         M_IADD(s1, REG_ZERO, d);
 679                         store_reg_to_var_int(iptr->dst, d);
 680                         break;
 681
 682                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 683
 684                         var_to_reg_int(s1, src, REG_ITMP1);
 685                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 686                         if (has_ext_instr_set) {
 687                                 M_BSEXT(s1, d);
 688                         } else {
 689                                 M_SLL_IMM(s1, 56, d);
 690                                 M_SRA_IMM( d, 56, d);
 691                         }
 692                         store_reg_to_var_int(iptr->dst, d);
 693                         break;
 694
 695                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 696
 697                         var_to_reg_int(s1, src, REG_ITMP1);
 698                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 699             M_CZEXT(s1, d);
 700                         store_reg_to_var_int(iptr->dst, d);
 701                         break;
 702
 703                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 704
 705                         var_to_reg_int(s1, src, REG_ITMP1);
 706                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 707                         if (has_ext_instr_set) {
 708                                 M_SSEXT(s1, d);
 709                         } else {
 710                                 M_SLL_IMM(s1, 48, d);
 711                                 M_SRA_IMM( d, 48, d);
 712                         }
 713                         store_reg_to_var_int(iptr->dst, d);
 714                         break;
 715
 716
 717                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 718
 719                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 720                         var_to_reg_int(s2, src, REG_ITMP2);
 721                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 722                         M_IADD(s1, s2, d);
 723                         store_reg_to_var_int(iptr->dst, d);
 724                         break;
 725
 726                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 727                                       /* val.i = constant                             */
 728
 729                         var_to_reg_int(s1, src, REG_ITMP1);
 730                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 731                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 732                                 M_IADD_IMM(s1, iptr->val.i, d);
 733                         } else {
 734                                 ICONST(REG_ITMP2, iptr->val.i);
 735                                 M_IADD(s1, REG_ITMP2, d);
 736                         }
 737                         store_reg_to_var_int(iptr->dst, d);
 738                         break;
 739
 740                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 741
 742                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 743                         var_to_reg_int(s2, src, REG_ITMP2);
 744                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 745                         M_LADD(s1, s2, d);
 746                         store_reg_to_var_int(iptr->dst, d);
 747                         break;
 748
 749                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 750                                       /* val.l = constant                             */
 751
 752                         var_to_reg_int(s1, src, REG_ITMP1);
 753                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 754                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 755                                 M_LADD_IMM(s1, iptr->val.l, d);
 756                         } else {
 757                                 LCONST(REG_ITMP2, iptr->val.l);
 758                                 M_LADD(s1, REG_ITMP2, d);
 759                         }
 760                         store_reg_to_var_int(iptr->dst, d);
 761                         break;
 762
 763                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 764
 765                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 766                         var_to_reg_int(s2, src, REG_ITMP2);
 767                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 768                         M_ISUB(s1, s2, d);
 769                         store_reg_to_var_int(iptr->dst, d);
 770                         break;
 771
 772                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 773                                       /* val.i = constant                             */
 774
 775                         var_to_reg_int(s1, src, REG_ITMP1);
 776                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 777                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 778                                 M_ISUB_IMM(s1, iptr->val.i, d);
 779                         } else {
 780                                 ICONST(REG_ITMP2, iptr->val.i);
 781                                 M_ISUB(s1, REG_ITMP2, d);
 782                         }
 783                         store_reg_to_var_int(iptr->dst, d);
 784                         break;
 785
 786                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 787
 788                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 789                         var_to_reg_int(s2, src, REG_ITMP2);
 790                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 791                         M_LSUB(s1, s2, d);
 792                         store_reg_to_var_int(iptr->dst, d);
 793                         break;
 794
 795                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 796                                       /* val.l = constant                             */
 797
 798                         var_to_reg_int(s1, src, REG_ITMP1);
 799                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 800                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 801                                 M_LSUB_IMM(s1, iptr->val.l, d);
 802                         } else {
 803                                 LCONST(REG_ITMP2, iptr->val.l);
 804                                 M_LSUB(s1, REG_ITMP2, d);
 805                         }
 806                         store_reg_to_var_int(iptr->dst, d);
 807                         break;
 808
 809                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 810
 811                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 812                         var_to_reg_int(s2, src, REG_ITMP2);
 813                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 814                         M_IMUL(s1, s2, d);
 815                         store_reg_to_var_int(iptr->dst, d);
 816                         break;
 817
 818                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 819                                       /* val.i = constant                             */
 820
 821                         var_to_reg_int(s1, src, REG_ITMP1);
 822                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 823                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 824                                 M_IMUL_IMM(s1, iptr->val.i, d);
 825                         } else {
 826                                 ICONST(REG_ITMP2, iptr->val.i);
 827                                 M_IMUL(s1, REG_ITMP2, d);
 828                         }
 829                         store_reg_to_var_int(iptr->dst, d);
 830                         break;
 831
 832                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 833
 834                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 835                         var_to_reg_int(s2, src, REG_ITMP2);
 836                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 837                         M_LMUL(s1, s2, d);
 838                         store_reg_to_var_int(iptr->dst, d);
 839                         break;
 840
 841                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
 842                                       /* val.l = constant                             */
 843
 844                         var_to_reg_int(s1, src, REG_ITMP1);
 845                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 846                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 847                                 M_LMUL_IMM(s1, iptr->val.l, d);
 848                         } else {
 849                                 LCONST(REG_ITMP2, iptr->val.l);
 850                                 M_LMUL(s1, REG_ITMP2, d);
 851                         }
 852                         store_reg_to_var_int(iptr->dst, d);
 853                         break;
 854
 855                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 856                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 857
 858                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 859                         var_to_reg_int(s2, src, REG_ITMP2);
 860                         d = reg_of_var(rd, iptr->dst, REG_RESULT);
 861                         M_BEQZ(s2, 0);
 862                         codegen_addxdivrefs(cd, mcodeptr);
 863
 864                         M_MOV(s1, rd->argintregs[0]);
 865                         M_MOV(s2, rd->argintregs[1]);
 866                         bte = iptr->val.a;
 867                         disp = dseg_addaddress(cd, bte->fp);
 868                         M_ALD(REG_PV, REG_PV, disp);
 869                         M_JSR(REG_RA, REG_PV);
 870                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 871                         M_LDA(REG_PV, REG_RA, -disp);
 872
 873                         M_IADD(REG_RESULT, REG_ZERO, d); /* sign extend (bugfix for gcc -O2) */
 874                         store_reg_to_var_int(iptr->dst, d);
 875                         break;
 876
 877                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 878                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 879
 880                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 881                         var_to_reg_int(s2, src, REG_ITMP2);
 882                         d = reg_of_var(rd, iptr->dst, REG_RESULT);
 883                         M_BEQZ(s2, 0);
 884                         codegen_addxdivrefs(cd, mcodeptr);
 885
 886                         M_MOV(s1, rd->argintregs[0]);
 887                         M_MOV(s2, rd->argintregs[1]);
 888                         bte = iptr->val.a;
 889                         disp = dseg_addaddress(cd, bte->fp);
 890                         M_ALD(REG_PV, REG_PV, disp);
 891                         M_JSR(REG_RA, REG_PV);
 892                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 893                         M_LDA(REG_PV, REG_RA, -disp);
 894
 895                         M_INTMOVE(REG_RESULT, d);
 896                         store_reg_to_var_int(iptr->dst, d);
 897                         break;
 898
 899                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
 900                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
 901
 902                         var_to_reg_int(s1, src, REG_ITMP1);
 903                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 904                         if (iptr->val.i <= 15) {
 905                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
 906                                 M_CMOVGE(s1, s1, REG_ITMP2);
 907                         } else {
 908                                 M_SRA_IMM(s1, 63, REG_ITMP2);
 909                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
 910                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
 911                         }
 912                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
 913                         store_reg_to_var_int(iptr->dst, d);
 914                         break;
 915
 916                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 917
 918                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 919                         var_to_reg_int(s2, src, REG_ITMP2);
 920                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 921                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 922                         M_SLL(s1, REG_ITMP3, d);
 923                         M_IADD(d, REG_ZERO, d);
 924                         store_reg_to_var_int(iptr->dst, d);
 925                         break;
 926
 927                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
 928                                       /* val.i = constant                             */
 929
 930                         var_to_reg_int(s1, src, REG_ITMP1);
 931                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 932                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
 933                         M_IADD(d, REG_ZERO, d);
 934                         store_reg_to_var_int(iptr->dst, d);
 935                         break;
 936
 937                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
 938
 939                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 940                         var_to_reg_int(s2, src, REG_ITMP2);
 941                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 942                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 943                         M_SRA(s1, REG_ITMP3, d);
 944                         store_reg_to_var_int(iptr->dst, d);
 945                         break;
 946
 947                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
 948                                       /* val.i = constant                             */
 949
 950                         var_to_reg_int(s1, src, REG_ITMP1);
 951                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 952                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
 953                         store_reg_to_var_int(iptr->dst, d);
 954                         break;
 955
 956                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
 957
 958                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 959                         var_to_reg_int(s2, src, REG_ITMP2);
 960                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 961                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
 962             M_IZEXT(s1, d);
 963                         M_SRL(d, REG_ITMP2, d);
 964                         M_IADD(d, REG_ZERO, d);
 965                         store_reg_to_var_int(iptr->dst, d);
 966                         break;
 967
 968                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
 969                                       /* val.i = constant                             */
 970
 971                         var_to_reg_int(s1, src, REG_ITMP1);
 972                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 973             M_IZEXT(s1, d);
 974                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
 975                         M_IADD(d, REG_ZERO, d);
 976                         store_reg_to_var_int(iptr->dst, d);
 977                         break;
 978
 979                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 980
 981                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 982                         var_to_reg_int(s2, src, REG_ITMP2);
 983                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 984                         M_SLL(s1, s2, d);
 985                         store_reg_to_var_int(iptr->dst, d);
 986                         break;
 987
 988                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
 989                                       /* val.i = constant                             */
 990
 991                         var_to_reg_int(s1, src, REG_ITMP1);
 992                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
 993                         M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
 994                         store_reg_to_var_int(iptr->dst, d);
 995                         break;
 996
 997                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
 998
 999                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1000                         var_to_reg_int(s2, src, REG_ITMP2);
1001                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1002                         M_SRA(s1, s2, d);
1003                         store_reg_to_var_int(iptr->dst, d);
1004                         break;
1005
1006                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1007                                       /* val.i = constant                             */
1008
1009                         var_to_reg_int(s1, src, REG_ITMP1);
1010                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1011                         M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
1012                         store_reg_to_var_int(iptr->dst, d);
1013                         break;
1014
1015                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1016
1017                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1018                         var_to_reg_int(s2, src, REG_ITMP2);
1019                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1020                         M_SRL(s1, s2, d);
1021                         store_reg_to_var_int(iptr->dst, d);
1022                         break;
1023
1024                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1025                                       /* val.i = constant                             */
1026
1027                         var_to_reg_int(s1, src, REG_ITMP1);
1028                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1029                         M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
1030                         store_reg_to_var_int(iptr->dst, d);
1031                         break;
1032
1033                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1034                 case ICMD_LAND:
1035
1036                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1037                         var_to_reg_int(s2, src, REG_ITMP2);
1038                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1039                         M_AND(s1, s2, d);
1040                         store_reg_to_var_int(iptr->dst, d);
1041                         break;
1042
1043                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1044                                       /* val.i = constant                             */
1045
1046                         var_to_reg_int(s1, src, REG_ITMP1);
1047                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1048                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1049                                 M_AND_IMM(s1, iptr->val.i, d);
1050                         } else if (iptr->val.i == 0xffff) {
1051                                 M_CZEXT(s1, d);
1052                         } else if (iptr->val.i == 0xffffff) {
1053                                 M_ZAPNOT_IMM(s1, 0x07, d);
1054                         } else {
1055                                 ICONST(REG_ITMP2, iptr->val.i);
1056                                 M_AND(s1, REG_ITMP2, d);
1057                         }
1058                         store_reg_to_var_int(iptr->dst, d);
1059                         break;
1060
1061                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1062                                       /* val.i = constant                             */
1063
1064                         var_to_reg_int(s1, src, REG_ITMP1);
1065                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1066                         if (s1 == d) {
1067                                 M_MOV(s1, REG_ITMP1);
1068                                 s1 = REG_ITMP1;
1069                         }
1070                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1071                                 M_AND_IMM(s1, iptr->val.i, d);
1072                                 M_BGEZ(s1, 3);
1073                                 M_ISUB(REG_ZERO, s1, d);
1074                                 M_AND_IMM(d, iptr->val.i, d);
1075                         } else if (iptr->val.i == 0xffff) {
1076                                 M_CZEXT(s1, d);
1077                                 M_BGEZ(s1, 3);
1078                                 M_ISUB(REG_ZERO, s1, d);
1079                                 M_CZEXT(d, d);
1080                         } else if (iptr->val.i == 0xffffff) {
1081                                 M_ZAPNOT_IMM(s1, 0x07, d);
1082                                 M_BGEZ(s1, 3);
1083                                 M_ISUB(REG_ZERO, s1, d);
1084                                 M_ZAPNOT_IMM(d, 0x07, d);
1085                         } else {
1086                                 ICONST(REG_ITMP2, iptr->val.i);
1087                                 M_AND(s1, REG_ITMP2, d);
1088                                 M_BGEZ(s1, 3);
1089                                 M_ISUB(REG_ZERO, s1, d);
1090                                 M_AND(d, REG_ITMP2, d);
1091                         }
1092                         M_ISUB(REG_ZERO, d, d);
1093                         store_reg_to_var_int(iptr->dst, d);
1094                         break;
1095
1096                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1097                                       /* val.l = constant                             */
1098
1099                         var_to_reg_int(s1, src, REG_ITMP1);
1100                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1101                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1102                                 M_AND_IMM(s1, iptr->val.l, d);
1103                         } else if (iptr->val.l == 0xffffL) {
1104                                 M_CZEXT(s1, d);
1105                         } else if (iptr->val.l == 0xffffffL) {
1106                                 M_ZAPNOT_IMM(s1, 0x07, d);
1107                         } else if (iptr->val.l == 0xffffffffL) {
1108                                 M_IZEXT(s1, d);
1109                         } else if (iptr->val.l == 0xffffffffffL) {
1110                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1111                         } else if (iptr->val.l == 0xffffffffffffL) {
1112                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1113                         } else if (iptr->val.l == 0xffffffffffffffL) {
1114                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1115                         } else {
1116                                 LCONST(REG_ITMP2, iptr->val.l);
1117                                 M_AND(s1, REG_ITMP2, d);
1118                         }
1119                         store_reg_to_var_int(iptr->dst, d);
1120                         break;
1121
1122                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1123                                       /* val.l = constant                             */
1124
1125                         var_to_reg_int(s1, src, REG_ITMP1);
1126                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1127                         if (s1 == d) {
1128                                 M_MOV(s1, REG_ITMP1);
1129                                 s1 = REG_ITMP1;
1130                         }
1131                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1132                                 M_AND_IMM(s1, iptr->val.l, d);
1133                                 M_BGEZ(s1, 3);
1134                                 M_LSUB(REG_ZERO, s1, d);
1135                                 M_AND_IMM(d, iptr->val.l, d);
1136                         } else if (iptr->val.l == 0xffffL) {
1137                                 M_CZEXT(s1, d);
1138                                 M_BGEZ(s1, 3);
1139                                 M_LSUB(REG_ZERO, s1, d);
1140                                 M_CZEXT(d, d);
1141                         } else if (iptr->val.l == 0xffffffL) {
1142                                 M_ZAPNOT_IMM(s1, 0x07, d);
1143                                 M_BGEZ(s1, 3);
1144                                 M_LSUB(REG_ZERO, s1, d);
1145                                 M_ZAPNOT_IMM(d, 0x07, d);
1146                         } else if (iptr->val.l == 0xffffffffL) {
1147                                 M_IZEXT(s1, d);
1148                                 M_BGEZ(s1, 3);
1149                                 M_LSUB(REG_ZERO, s1, d);
1150                                 M_IZEXT(d, d);
1151                         } else if (iptr->val.l == 0xffffffffffL) {
1152                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1153                                 M_BGEZ(s1, 3);
1154                                 M_LSUB(REG_ZERO, s1, d);
1155                                 M_ZAPNOT_IMM(d, 0x1f, d);
1156                         } else if (iptr->val.l == 0xffffffffffffL) {
1157                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1158                                 M_BGEZ(s1, 3);
1159                                 M_LSUB(REG_ZERO, s1, d);
1160                                 M_ZAPNOT_IMM(d, 0x3f, d);
1161                         } else if (iptr->val.l == 0xffffffffffffffL) {
1162                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1163                                 M_BGEZ(s1, 3);
1164                                 M_LSUB(REG_ZERO, s1, d);
1165                                 M_ZAPNOT_IMM(d, 0x7f, d);
1166                         } else {
1167                                 LCONST(REG_ITMP2, iptr->val.l);
1168                                 M_AND(s1, REG_ITMP2, d);
1169                                 M_BGEZ(s1, 3);
1170                                 M_LSUB(REG_ZERO, s1, d);
1171                                 M_AND(d, REG_ITMP2, d);
1172                         }
1173                         M_LSUB(REG_ZERO, d, d);
1174                         store_reg_to_var_int(iptr->dst, d);
1175                         break;
1176
1177                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1178                 case ICMD_LOR:
1179
1180                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1181                         var_to_reg_int(s2, src, REG_ITMP2);
1182                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1183                         M_OR( s1,s2, d);
1184                         store_reg_to_var_int(iptr->dst, d);
1185                         break;
1186
1187                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1188                                       /* val.i = constant                             */
1189
1190                         var_to_reg_int(s1, src, REG_ITMP1);
1191                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1192                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1193                                 M_OR_IMM(s1, iptr->val.i, d);
1194                         } else {
1195                                 ICONST(REG_ITMP2, iptr->val.i);
1196                                 M_OR(s1, REG_ITMP2, d);
1197                         }
1198                         store_reg_to_var_int(iptr->dst, d);
1199                         break;
1200
1201                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1202                                       /* val.l = constant                             */
1203
1204                         var_to_reg_int(s1, src, REG_ITMP1);
1205                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1206                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1207                                 M_OR_IMM(s1, iptr->val.l, d);
1208                         } else {
1209                                 LCONST(REG_ITMP2, iptr->val.l);
1210                                 M_OR(s1, REG_ITMP2, d);
1211                         }
1212                         store_reg_to_var_int(iptr->dst, d);
1213                         break;
1214
1215                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1216                 case ICMD_LXOR:
1217
1218                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1219                         var_to_reg_int(s2, src, REG_ITMP2);
1220                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1221                         M_XOR(s1, s2, d);
1222                         store_reg_to_var_int(iptr->dst, d);
1223                         break;
1224
1225                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1226                                       /* val.i = constant                             */
1227
1228                         var_to_reg_int(s1, src, REG_ITMP1);
1229                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1230                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1231                                 M_XOR_IMM(s1, iptr->val.i, d);
1232                         } else {
1233                                 ICONST(REG_ITMP2, iptr->val.i);
1234                                 M_XOR(s1, REG_ITMP2, d);
1235                         }
1236                         store_reg_to_var_int(iptr->dst, d);
1237                         break;
1238
1239                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1240                                       /* val.l = constant                             */
1241
1242                         var_to_reg_int(s1, src, REG_ITMP1);
1243                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1244                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1245                                 M_XOR_IMM(s1, iptr->val.l, d);
1246                         } else {
1247                                 LCONST(REG_ITMP2, iptr->val.l);
1248                                 M_XOR(s1, REG_ITMP2, d);
1249                         }
1250                         store_reg_to_var_int(iptr->dst, d);
1251                         break;
1252
1253
1254                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1255
1256                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1257                         var_to_reg_int(s2, src, REG_ITMP2);
1258                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1259                         M_CMPLT(s1, s2, REG_ITMP3);
1260                         M_CMPLT(s2, s1, REG_ITMP1);
1261                         M_LSUB(REG_ITMP1, REG_ITMP3, d);
1262                         store_reg_to_var_int(iptr->dst, d);
1263                         break;
1264
1265
1266                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1267                                       /* op1 = variable, val.i = constant             */
1268
1269                         var = &(rd->locals[iptr->op1][TYPE_INT]);
1270                         if (var->flags & INMEMORY) {
1271                                 s1 = REG_ITMP1;
1272                                 M_LLD(s1, REG_SP, var->regoff * 8);
1273                         } else
1274                                 s1 = var->regoff;
1275                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1276                                 M_IADD_IMM(s1, iptr->val.i, s1);
1277                         } else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1278                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1279                         } else {
1280                                 M_LDA (s1, s1, iptr->val.i);
1281                                 M_IADD(s1, REG_ZERO, s1);
1282                         }
1283                         if (var->flags & INMEMORY)
1284                                 M_LST(s1, REG_SP, var->regoff * 8);
1285                         break;
1286
1287
1288                 /* floating operations ************************************************/
1289
1290                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1291
1292                         var_to_reg_flt(s1, src, REG_FTMP1);
1293                         d = reg_of_var(rd, iptr->dst, REG_FTMP2);
1294                         M_FMOVN(s1, d);
1295                         store_reg_to_var_flt(iptr->dst, d);
1296                         break;
1297
1298                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1299
1300                         var_to_reg_flt(s1, src, REG_FTMP1);
1301                         d = reg_of_var(rd, iptr->dst, REG_FTMP2);
1302                         M_FMOVN(s1, d);
1303                         store_reg_to_var_flt(iptr->dst, d);
1304                         break;
1305
1306                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1307
1308                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1309                         var_to_reg_flt(s2, src, REG_FTMP2);
1310                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1311                         if (opt_noieee) {
1312                                 M_FADD(s1, s2, d);
1313                         } else {
1314                                 if (d == s1 || d == s2) {
1315                                         M_FADDS(s1, s2, REG_FTMP3);
1316                                         M_TRAPB;
1317                                         M_FMOV(REG_FTMP3, d);
1318                                 } else {
1319                                         M_FADDS(s1, s2, d);
1320                                         M_TRAPB;
1321                                 }
1322                         }
1323                         store_reg_to_var_flt(iptr->dst, d);
1324                         break;
1325
1326                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1327
1328                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1329                         var_to_reg_flt(s2, src, REG_FTMP2);
1330                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1331                         if (opt_noieee) {
1332                                 M_DADD(s1, s2, d);
1333                         } else {
1334                                 if (d == s1 || d == s2) {
1335                                         M_DADDS(s1, s2, REG_FTMP3);
1336                                         M_TRAPB;
1337                                         M_FMOV(REG_FTMP3, d);
1338                                 } else {
1339                                         M_DADDS(s1, s2, d);
1340                                         M_TRAPB;
1341                                 }
1342                         }
1343                         store_reg_to_var_flt(iptr->dst, d);
1344                         break;
1345
1346                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1347
1348                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1349                         var_to_reg_flt(s2, src, REG_FTMP2);
1350                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1351                         if (opt_noieee) {
1352                                 M_FSUB(s1, s2, d);
1353                         } else {
1354                                 if (d == s1 || d == s2) {
1355                                         M_FSUBS(s1, s2, REG_FTMP3);
1356                                         M_TRAPB;
1357                                         M_FMOV(REG_FTMP3, d);
1358                                 } else {
1359                                         M_FSUBS(s1, s2, d);
1360                                         M_TRAPB;
1361                                 }
1362                         }
1363                         store_reg_to_var_flt(iptr->dst, d);
1364                         break;
1365
1366                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1367
1368                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1369                         var_to_reg_flt(s2, src, REG_FTMP2);
1370                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1371                         if (opt_noieee) {
1372                                 M_DSUB(s1, s2, d);
1373                         } else {
1374                                 if (d == s1 || d == s2) {
1375                                         M_DSUBS(s1, s2, REG_FTMP3);
1376                                         M_TRAPB;
1377                                         M_FMOV(REG_FTMP3, d);
1378                                 } else {
1379                                         M_DSUBS(s1, s2, d);
1380                                         M_TRAPB;
1381                                 }
1382                         }
1383                         store_reg_to_var_flt(iptr->dst, d);
1384                         break;
1385
1386                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1387
1388                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1389                         var_to_reg_flt(s2, src, REG_FTMP2);
1390                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1391                         if (opt_noieee) {
1392                                 M_FMUL(s1, s2, d);
1393                         } else {
1394                                 if (d == s1 || d == s2) {
1395                                         M_FMULS(s1, s2, REG_FTMP3);
1396                                         M_TRAPB;
1397                                         M_FMOV(REG_FTMP3, d);
1398                                 } else {
1399                                         M_FMULS(s1, s2, d);
1400                                         M_TRAPB;
1401                                 }
1402                         }
1403                         store_reg_to_var_flt(iptr->dst, d);
1404                         break;
1405
1406                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2      */
1407
1408                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1409                         var_to_reg_flt(s2, src, REG_FTMP2);
1410                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1411                         if (opt_noieee) {
1412                                 M_DMUL(s1, s2, d);
1413                         } else {
1414                                 if (d == s1 || d == s2) {
1415                                         M_DMULS(s1, s2, REG_FTMP3);
1416                                         M_TRAPB;
1417                                         M_FMOV(REG_FTMP3, d);
1418                                 } else {
1419                                         M_DMULS(s1, s2, d);
1420                                         M_TRAPB;
1421                                 }
1422                         }
1423                         store_reg_to_var_flt(iptr->dst, d);
1424                         break;
1425
1426                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1427
1428                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1429                         var_to_reg_flt(s2, src, REG_FTMP2);
1430                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1431                         if (opt_noieee) {
1432                                 M_FDIV(s1, s2, d);
1433                         } else {
1434                                 if (d == s1 || d == s2) {
1435                                         M_FDIVS(s1, s2, REG_FTMP3);
1436                                         M_TRAPB;
1437                                         M_FMOV(REG_FTMP3, d);
1438                                 } else {
1439                                         M_FDIVS(s1, s2, d);
1440                                         M_TRAPB;
1441                                 }
1442                         }
1443                         store_reg_to_var_flt(iptr->dst, d);
1444                         break;
1445
1446                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1447
1448                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1449                         var_to_reg_flt(s2, src, REG_FTMP2);
1450                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1451                         if (opt_noieee) {
1452                                 M_DDIV(s1, s2, d);
1453                         } else {
1454                                 if (d == s1 || d == s2) {
1455                                         M_DDIVS(s1, s2, REG_FTMP3);
1456                                         M_TRAPB;
1457                                         M_FMOV(REG_FTMP3, d);
1458                                 } else {
1459                                         M_DDIVS(s1, s2, d);
1460                                         M_TRAPB;
1461                                 }
1462                         }
1463                         store_reg_to_var_flt(iptr->dst, d);
1464                         break;
1465
1466                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1467                 case ICMD_L2F:
1468                         var_to_reg_int(s1, src, REG_ITMP1);
1469                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1470                         disp = dseg_adddouble(cd, 0.0);
1471                         M_LST(s1, REG_PV, disp);
1472                         M_DLD(d, REG_PV, disp);
1473                         M_CVTLF(d, d);
1474                         store_reg_to_var_flt(iptr->dst, d);
1475                         break;
1476
1477                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1478                 case ICMD_L2D:
1479                         var_to_reg_int(s1, src, REG_ITMP1);
1480                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1481                         disp = dseg_adddouble(cd, 0.0);
1482                         M_LST(s1, REG_PV, disp);
1483                         M_DLD(d, REG_PV, disp);
1484                         M_CVTLD(d, d);
1485                         store_reg_to_var_flt(iptr->dst, d);
1486                         break;
1487
1488                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1489                 case ICMD_D2I:
1490                         var_to_reg_flt(s1, src, REG_FTMP1);
1491                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1492                         disp = dseg_adddouble(cd, 0.0);
1493                         M_CVTDL_C(s1, REG_FTMP2);
1494                         M_CVTLI(REG_FTMP2, REG_FTMP3);
1495                         M_DST(REG_FTMP3, REG_PV, disp);
1496                         M_ILD(d, REG_PV, disp);
1497                         store_reg_to_var_int(iptr->dst, d);
1498                         break;
1499
1500                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1501                 case ICMD_D2L:
1502                         var_to_reg_flt(s1, src, REG_FTMP1);
1503                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1504                         disp = dseg_adddouble(cd, 0.0);
1505                         M_CVTDL_C(s1, REG_FTMP2);
1506                         M_DST(REG_FTMP2, REG_PV, disp);
1507                         M_LLD(d, REG_PV, disp);
1508                         store_reg_to_var_int(iptr->dst, d);
1509                         break;
1510
1511                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1512
1513                         var_to_reg_flt(s1, src, REG_FTMP1);
1514                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1515                         M_CVTFDS(s1, d);
1516                         M_TRAPB;
1517                         store_reg_to_var_flt(iptr->dst, d);
1518                         break;
1519
1520                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1521
1522                         var_to_reg_flt(s1, src, REG_FTMP1);
1523                         d = reg_of_var(rd, iptr->dst, REG_FTMP3);
1524                         if (opt_noieee) {
1525                                 M_CVTDF(s1, d);
1526                         } else {
1527                                 M_CVTDFS(s1, d);
1528                                 M_TRAPB;
1529                         }
1530                         store_reg_to_var_flt(iptr->dst, d);
1531                         break;
1532
1533                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1534                 case ICMD_DCMPL:
1535                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1536                         var_to_reg_flt(s2, src, REG_FTMP2);
1537                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1538                         if (opt_noieee) {
1539                                 M_LSUB_IMM(REG_ZERO, 1, d);
1540                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1541                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1542                                 M_CLR   (d);
1543                                 M_FCMPLT(s2, s1, REG_FTMP3);
1544                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1545                                 M_LADD_IMM(REG_ZERO, 1, d);
1546                         } else {
1547                                 M_LSUB_IMM(REG_ZERO, 1, d);
1548                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1549                                 M_TRAPB;
1550                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1551                                 M_CLR   (d);
1552                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1553                                 M_TRAPB;
1554                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1555                                 M_LADD_IMM(REG_ZERO, 1, d);
1556                         }
1557                         store_reg_to_var_int(iptr->dst, d);
1558                         break;
1559
1560                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1561                 case ICMD_DCMPG:
1562                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1563                         var_to_reg_flt(s2, src, REG_FTMP2);
1564                         d = reg_of_var(rd, iptr->dst, REG_ITMP3);
1565                         if (opt_noieee) {
1566                                 M_LADD_IMM(REG_ZERO, 1, d);
1567                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1568                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1569                                 M_CLR   (d);
1570                                 M_FCMPLT(s1, s2, REG_FTMP3);
1571                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1572                                 M_LSUB_IMM(REG_ZERO, 1, d);
1573                         } else {
1574                                 M_LADD_IMM(REG_ZERO, 1, d);
1575                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1576                                 M_TRAPB;
1577                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1578                                 M_CLR   (d);
1579                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1580                                 M_TRAPB;
1581                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1582                                 M_LSUB_IMM(REG_ZERO, 1, d);
1583                         }
1584                         store_reg_to_var_int(iptr->dst, d);
1585                         break;
1586
1587
1588                 /* memory operations **************************************************/
1589
1590                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1591
1592                         var_to_reg_int(s1, src, REG_ITMP1);
1593                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1594                         gen_nullptr_check(s1);
1595                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1596                         store_reg_to_var_int(iptr->dst, d);
1597                         break;
1598
1599                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1600
1601                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1602                         var_to_reg_int(s2, src, REG_ITMP2);
1603                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1604                         if (iptr->op1 == 0) {
1605                                 gen_nullptr_check(s1);
1606                                 gen_bound_check;
1607                         }
1608                         if (has_ext_instr_set) {
1609                                 M_LADD   (s2, s1, REG_ITMP1);
1610                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
1611                                 M_BSEXT  (d, d);
1612                         } else {
1613                                 M_LADD(s2, s1, REG_ITMP1);
1614                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1615                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
1616                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1617                                 M_SRA_IMM(d, 56, d);
1618                         }
1619                         store_reg_to_var_int(iptr->dst, d);
1620                         break;
1621
1622                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1623
1624                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1625                         var_to_reg_int(s2, src, REG_ITMP2);
1626                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1627                         if (iptr->op1 == 0) {
1628                                 gen_nullptr_check(s1);
1629                                 gen_bound_check;
1630                         }
1631                         if (has_ext_instr_set) {
1632                                 M_LADD(s2, s1, REG_ITMP1);
1633                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1634                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1635                         } else {
1636                                 M_LADD (s2, s1, REG_ITMP1);
1637                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1638                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1639                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1640                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
1641                         }
1642                         store_reg_to_var_int(iptr->dst, d);
1643                         break;
1644
1645                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1646
1647                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1648                         var_to_reg_int(s2, src, REG_ITMP2);
1649                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1650                         if (iptr->op1 == 0) {
1651                                 gen_nullptr_check(s1);
1652                                 gen_bound_check;
1653                         }
1654                         if (has_ext_instr_set) {
1655                                 M_LADD(s2, s1, REG_ITMP1);
1656                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1657                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
1658                                 M_SSEXT(d, d);
1659                         } else {
1660                                 M_LADD(s2, s1, REG_ITMP1);
1661                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1662                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1663                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
1664                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1665                                 M_SRA_IMM(d, 48, d);
1666                         }
1667                         store_reg_to_var_int(iptr->dst, d);
1668                         break;
1669
1670                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1671
1672                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1673                         var_to_reg_int(s2, src, REG_ITMP2);
1674                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1675                         if (iptr->op1 == 0) {
1676                                 gen_nullptr_check(s1);
1677                                 gen_bound_check;
1678                         }
1679                         M_S4ADDQ(s2, s1, REG_ITMP1);
1680                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1681                         store_reg_to_var_int(iptr->dst, d);
1682                         break;
1683
1684                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1685
1686                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1687                         var_to_reg_int(s2, src, REG_ITMP2);
1688                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1689                         if (iptr->op1 == 0) {
1690                                 gen_nullptr_check(s1);
1691                                 gen_bound_check;
1692                         }
1693                         M_S8ADDQ(s2, s1, REG_ITMP1);
1694                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1695                         store_reg_to_var_int(iptr->dst, d);
1696                         break;
1697
1698                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1699
1700                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1701                         var_to_reg_int(s2, src, REG_ITMP2);
1702                         d = reg_of_var(rd, iptr->dst, REG_FTMP2);
1703                         if (iptr->op1 == 0) {
1704                                 gen_nullptr_check(s1);
1705                                 gen_bound_check;
1706                         }
1707                         M_S4ADDQ(s2, s1, REG_ITMP1);
1708                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1709                         store_reg_to_var_flt(iptr->dst, d);
1710                         break;
1711
1712                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1713
1714                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1715                         var_to_reg_int(s2, src, REG_ITMP2);
1716                         d = reg_of_var(rd, iptr->dst, REG_FTMP2);
1717                         if (iptr->op1 == 0) {
1718                                 gen_nullptr_check(s1);
1719                                 gen_bound_check;
1720                         }
1721                         M_S8ADDQ(s2, s1, REG_ITMP1);
1722                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1723                         store_reg_to_var_flt(iptr->dst, d);
1724                         break;
1725
1726                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1727
1728                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1729                         var_to_reg_int(s2, src, REG_ITMP2);
1730                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
1731                         if (iptr->op1 == 0) {
1732                                 gen_nullptr_check(s1);
1733                                 gen_bound_check;
1734                         }
1735                         M_SAADDQ(s2, s1, REG_ITMP1);
1736                         M_ALD(d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1737                         store_reg_to_var_int(iptr->dst, d);
1738                         break;
1739
1740
1741                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1742
1743                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1744                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1745                         if (iptr->op1 == 0) {
1746                                 gen_nullptr_check(s1);
1747                                 gen_bound_check;
1748                         }
1749                         var_to_reg_int(s3, src, REG_ITMP3);
1750                         if (has_ext_instr_set) {
1751                                 M_LADD(s2, s1, REG_ITMP1);
1752                                 M_BST(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1753                         } else {
1754                                 M_LADD(s2, s1, REG_ITMP1);
1755                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1756                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1757                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
1758                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1759                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1760                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1761                         }
1762                         break;
1763
1764                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1765
1766                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1767                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1768                         if (iptr->op1 == 0) {
1769                                 gen_nullptr_check(s1);
1770                                 gen_bound_check;
1771                         }
1772                         var_to_reg_int(s3, src, REG_ITMP3);
1773                         if (has_ext_instr_set) {
1774                                 M_LADD(s2, s1, REG_ITMP1);
1775                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1776                                 M_SST(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1777                         } else {
1778                                 M_LADD(s2, s1, REG_ITMP1);
1779                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1780                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1781                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1782                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1783                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1784                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1785                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1786                         }
1787                         break;
1788
1789                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1790
1791                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1792                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1793                         if (iptr->op1 == 0) {
1794                                 gen_nullptr_check(s1);
1795                                 gen_bound_check;
1796                         }
1797                         var_to_reg_int(s3, src, REG_ITMP3);
1798                         if (has_ext_instr_set) {
1799                                 M_LADD(s2, s1, REG_ITMP1);
1800                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1801                                 M_SST(s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1802                         } else {
1803                                 M_LADD(s2, s1, REG_ITMP1);
1804                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1805                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1806                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1807                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1808                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1809                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1810                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1811                         }
1812                         break;
1813
1814                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1815
1816                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1817                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1818                         if (iptr->op1 == 0) {
1819                                 gen_nullptr_check(s1);
1820                                 gen_bound_check;
1821                         }
1822                         var_to_reg_int(s3, src, REG_ITMP3);
1823                         M_S4ADDQ(s2, s1, REG_ITMP1);
1824                         M_IST(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1825                         break;
1826
1827                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1828
1829                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1830                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1831                         if (iptr->op1 == 0) {
1832                                 gen_nullptr_check(s1);
1833                                 gen_bound_check;
1834                         }
1835                         var_to_reg_int(s3, src, REG_ITMP3);
1836                         M_S8ADDQ(s2, s1, REG_ITMP1);
1837                         M_LST(s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1838                         break;
1839
1840                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1841
1842                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1843                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1844                         if (iptr->op1 == 0) {
1845                                 gen_nullptr_check(s1);
1846                                 gen_bound_check;
1847                         }
1848                         var_to_reg_flt(s3, src, REG_FTMP3);
1849                         M_S4ADDQ(s2, s1, REG_ITMP1);
1850                         M_FST(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1851                         break;
1852
1853                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1854
1855                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1856                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1857                         if (iptr->op1 == 0) {
1858                                 gen_nullptr_check(s1);
1859                                 gen_bound_check;
1860                         }
1861                         var_to_reg_flt(s3, src, REG_FTMP3);
1862                         M_S8ADDQ(s2, s1, REG_ITMP1);
1863                         M_DST(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1864                         break;
1865
1866                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1867
1868                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1869                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1870 /*                      if (iptr->op1 == 0) { */
1871                                 gen_nullptr_check(s1);
1872                                 gen_bound_check;
1873 /*                      } */
1874                         var_to_reg_int(s3, src, REG_ITMP3);
1875
1876                         M_MOV(s1, rd->argintregs[0]);
1877                         M_MOV(s3, rd->argintregs[1]);
1878                         bte = iptr->val.a;
1879                         disp = dseg_addaddress(cd, bte->fp);
1880                         M_ALD(REG_PV, REG_PV, disp);
1881                         M_JSR(REG_RA, REG_PV);
1882                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
1883                         M_LDA(REG_PV, REG_RA, -disp);
1884
1885                         M_BEQZ(REG_RESULT, 0);
1886                         codegen_addxstorerefs(cd, mcodeptr);
1887
1888                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1889                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1890                         var_to_reg_int(s3, src, REG_ITMP3);
1891                         M_SAADDQ(s2, s1, REG_ITMP1);
1892                         M_AST(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1893                         break;
1894
1895
1896                 case ICMD_IASTORECONST:   /* ..., arrayref, index  ==> ...            */
1897
1898                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1899                         var_to_reg_int(s2, src, REG_ITMP2);
1900                         if (iptr->op1 == 0) {
1901                                 gen_nullptr_check(s1);
1902                                 gen_bound_check;
1903                         }
1904                         M_S4ADDQ(s2, s1, REG_ITMP1);
1905                         M_IST(REG_ZERO, REG_ITMP1, OFFSET(java_intarray, data[0]));
1906                         break;
1907
1908                 case ICMD_LASTORECONST:   /* ..., arrayref, index  ==> ...            */
1909
1910                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1911                         var_to_reg_int(s2, src, REG_ITMP2);
1912                         if (iptr->op1 == 0) {
1913                                 gen_nullptr_check(s1);
1914                                 gen_bound_check;
1915                         }
1916                         M_S8ADDQ(s2, s1, REG_ITMP1);
1917                         M_LST(REG_ZERO, REG_ITMP1, OFFSET(java_longarray, data[0]));
1918                         break;
1919
1920                 case ICMD_AASTORECONST:   /* ..., arrayref, index  ==> ...            */
1921
1922                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1923                         var_to_reg_int(s2, src, REG_ITMP2);
1924                         if (iptr->op1 == 0) {
1925                                 gen_nullptr_check(s1);
1926                                 gen_bound_check;
1927                         }
1928                         M_SAADDQ(s2, s1, REG_ITMP1);
1929                         M_AST(REG_ZERO, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1930                         break;
1931
1932                 case ICMD_BASTORECONST:   /* ..., arrayref, index  ==> ...            */
1933
1934                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1935                         var_to_reg_int(s2, src, REG_ITMP2);
1936                         if (iptr->op1 == 0) {
1937                                 gen_nullptr_check(s1);
1938                                 gen_bound_check;
1939                         }
1940                         if (has_ext_instr_set) {
1941                                 M_LADD(s2, s1, REG_ITMP1);
1942                                 M_BST(REG_ZERO, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1943
1944                         } else {
1945                                 M_LADD(s2, s1, REG_ITMP1);
1946                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1947                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1948                                 M_INSBL(REG_ZERO, REG_ITMP1, REG_ITMP3);
1949                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1950                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1951                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1952                         }
1953                         break;
1954
1955                 case ICMD_CASTORECONST:   /* ..., arrayref, index  ==> ...            */
1956
1957                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1958                         var_to_reg_int(s2, src, REG_ITMP2);
1959                         if (iptr->op1 == 0) {
1960                                 gen_nullptr_check(s1);
1961                                 gen_bound_check;
1962                         }
1963                         if (has_ext_instr_set) {
1964                                 M_LADD(s2, s1, REG_ITMP1);
1965                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1966                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_chararray, data[0]));
1967
1968                         } else {
1969                                 M_LADD(s2, s1, REG_ITMP1);
1970                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1971                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1972                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1973                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
1974                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1975                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1976                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1977                         }
1978                         break;
1979
1980                 case ICMD_SASTORECONST:   /* ..., arrayref, index  ==> ...            */
1981
1982                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1983                         var_to_reg_int(s2, src, REG_ITMP2);
1984                         if (iptr->op1 == 0) {
1985                                 gen_nullptr_check(s1);
1986                                 gen_bound_check;
1987                         }
1988                         if (has_ext_instr_set) {
1989                                 M_LADD(s2, s1, REG_ITMP1);
1990                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1991                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1992
1993                         } else {
1994                                 M_LADD(s2, s1, REG_ITMP1);
1995                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1996                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1997                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1998                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
1999                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2000                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2001                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2002                         }
2003                         break;
2004
2005
2006                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2007                                       /* op1 = type, val.a = field address            */
2008
2009                         if (!iptr->val.a) {
2010                                 disp = dseg_addaddress(cd, 0);
2011
2012                                 codegen_addpatchref(cd, mcodeptr,
2013                                                                         PATCHER_get_putstatic,
2014                                                                         (unresolved_field *) iptr->target, disp);
2015
2016                                 if (opt_showdisassemble)
2017                                         M_NOP;
2018
2019
2020                         } else {
2021                                 fieldinfo *fi = iptr->val.a;
2022
2023                                 disp = dseg_addaddress(cd, &(fi->value));
2024
2025                                 if (!fi->class->initialized) {
2026                                         codegen_addpatchref(cd, mcodeptr,
2027                                                                                 PATCHER_clinit, fi->class, 0);
2028
2029                                         if (opt_showdisassemble)
2030                                                 M_NOP;
2031                                 }
2032                         }
2033
2034                         M_ALD(REG_ITMP1, REG_PV, disp);
2035                         switch (iptr->op1) {
2036                         case TYPE_INT:
2037                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2038                                 M_ILD(d, REG_ITMP1, 0);
2039                                 store_reg_to_var_int(iptr->dst, d);
2040                                 break;
2041                         case TYPE_LNG:
2042                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2043                                 M_LLD(d, REG_ITMP1, 0);
2044                                 store_reg_to_var_int(iptr->dst, d);
2045                                 break;
2046                         case TYPE_ADR:
2047                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2048                                 M_ALD(d, REG_ITMP1, 0);
2049                                 store_reg_to_var_int(iptr->dst, d);
2050                                 break;
2051                         case TYPE_FLT:
2052                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2053                                 M_FLD(d, REG_ITMP1, 0);
2054                                 store_reg_to_var_flt(iptr->dst, d);
2055                                 break;
2056                         case TYPE_DBL:
2057                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2058                                 M_DLD(d, REG_ITMP1, 0);
2059                                 store_reg_to_var_flt(iptr->dst, d);
2060                                 break;
2061                         }
2062                         break;
2063
2064                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2065                                       /* op1 = type, val.a = field address            */
2066
2067                         if (!iptr->val.a) {
2068                                 disp = dseg_addaddress(cd, 0);
2069
2070                                 codegen_addpatchref(cd, mcodeptr,
2071                                                                         PATCHER_get_putstatic,
2072                                                                         (unresolved_field *) iptr->target, disp);
2073
2074                                 if (opt_showdisassemble)
2075                                         M_NOP;
2076
2077                         } else {
2078                                 fieldinfo *fi = iptr->val.a;
2079
2080                                 disp = dseg_addaddress(cd, &(fi->value));
2081
2082                                 if (!fi->class->initialized) {
2083                                         codegen_addpatchref(cd, mcodeptr,
2084                                                                                 PATCHER_clinit, fi->class, 0);
2085
2086                                         if (opt_showdisassemble)
2087                                                 M_NOP;
2088                                 }
2089                         }
2090
2091                         M_ALD(REG_ITMP1, REG_PV, disp);
2092                         switch (iptr->op1) {
2093                         case TYPE_INT:
2094                                 var_to_reg_int(s2, src, REG_ITMP2);
2095                                 M_IST(s2, REG_ITMP1, 0);
2096                                 break;
2097                         case TYPE_LNG:
2098                                 var_to_reg_int(s2, src, REG_ITMP2);
2099                                 M_LST(s2, REG_ITMP1, 0);
2100                                 break;
2101                         case TYPE_ADR:
2102                                 var_to_reg_int(s2, src, REG_ITMP2);
2103                                 M_AST(s2, REG_ITMP1, 0);
2104                                 break;
2105                         case TYPE_FLT:
2106                                 var_to_reg_flt(s2, src, REG_FTMP2);
2107                                 M_FST(s2, REG_ITMP1, 0);
2108                                 break;
2109                         case TYPE_DBL:
2110                                 var_to_reg_flt(s2, src, REG_FTMP2);
2111                                 M_DST(s2, REG_ITMP1, 0);
2112                                 break;
2113                         }
2114                         break;
2115
2116                 case ICMD_PUTSTATICCONST: /* ...  ==> ...                             */
2117                                           /* val = value (in current instruction)     */
2118                                           /* op1 = type, val.a = field address (in    */
2119                                           /* following NOP)                           */
2120
2121                         if (!iptr[1].val.a) {
2122                                 disp = dseg_addaddress(cd, 0);
2123
2124                                 codegen_addpatchref(cd, mcodeptr,
2125                                                                         PATCHER_get_putstatic,
2126                                                                         (unresolved_field *) iptr[1].target, disp);
2127
2128                                 if (opt_showdisassemble)
2129                                         M_NOP;
2130
2131                         } else {
2132                                 fieldinfo *fi = iptr[1].val.a;
2133
2134                                 disp = dseg_addaddress(cd, &(fi->value));
2135
2136                                 if (!fi->class->initialized) {
2137                                         codegen_addpatchref(cd, mcodeptr,
2138                                                                                 PATCHER_clinit, fi->class, 0);
2139
2140                                         if (opt_showdisassemble)
2141                                                 M_NOP;
2142                                 }
2143                         }
2144
2145                         M_ALD(REG_ITMP1, REG_PV, disp);
2146                         switch (iptr->op1) {
2147                         case TYPE_INT:
2148                                 M_IST(REG_ZERO, REG_ITMP1, 0);
2149                                 break;
2150                         case TYPE_LNG:
2151                                 M_LST(REG_ZERO, REG_ITMP1, 0);
2152                                 break;
2153                         case TYPE_ADR:
2154                                 M_AST(REG_ZERO, REG_ITMP1, 0);
2155                                 break;
2156                         case TYPE_FLT:
2157                                 M_FST(REG_ZERO, REG_ITMP1, 0);
2158                                 break;
2159                         case TYPE_DBL:
2160                                 M_DST(REG_ZERO, REG_ITMP1, 0);
2161                                 break;
2162                         }
2163                         break;
2164
2165
2166                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2167                                       /* op1 = type, val.i = field offset             */
2168
2169                         var_to_reg_int(s1, src, REG_ITMP1);
2170                         gen_nullptr_check(s1);
2171
2172                         if (!iptr->val.a) {
2173                                 codegen_addpatchref(cd, mcodeptr,
2174                                                                         PATCHER_get_putfield,
2175                                                                         (unresolved_field *) iptr->target, 0);
2176
2177                                 if (opt_showdisassemble)
2178                                         M_NOP;
2179
2180                                 disp = 0;
2181
2182                         } else {
2183                                 disp = ((fieldinfo *) (iptr->val.a))->offset;
2184                         }
2185
2186                         switch (iptr->op1) {
2187                         case TYPE_INT:
2188                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2189                                 M_ILD(d, s1, disp);
2190                                 store_reg_to_var_int(iptr->dst, d);
2191                                 break;
2192                         case TYPE_LNG:
2193                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2194                                 M_LLD(d, s1, disp);
2195                                 store_reg_to_var_int(iptr->dst, d);
2196                                 break;
2197                         case TYPE_ADR:
2198                                 d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2199                                 M_ALD(d, s1, disp);
2200                                 store_reg_to_var_int(iptr->dst, d);
2201                                 break;
2202                         case TYPE_FLT:
2203                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2204                                 M_FLD(d, s1, disp);
2205                                 store_reg_to_var_flt(iptr->dst, d);
2206                                 break;
2207                         case TYPE_DBL:
2208                                 d = reg_of_var(rd, iptr->dst, REG_FTMP1);
2209                                 M_DLD(d, s1, disp);
2210                                 store_reg_to_var_flt(iptr->dst, d);
2211                                 break;
2212                         }
2213                         break;
2214
2215                 case ICMD_PUTFIELD:   /* ..., objectref, value  ==> ...               */
2216                                       /* op1 = type, val.a = field address            */
2217
2218                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2219                         gen_nullptr_check(s1);
2220
2221                         if (!IS_FLT_DBL_TYPE(iptr->op1)) {
2222                                 var_to_reg_int(s2, src, REG_ITMP2);
2223                         } else {
2224                                 var_to_reg_flt(s2, src, REG_FTMP2);
2225                         }
2226
2227                         if (!iptr->val.a) {
2228                                 codegen_addpatchref(cd, mcodeptr,
2229                                                                         PATCHER_get_putfield,
2230                                                                         (unresolved_field *) iptr->target, 0);
2231
2232                                 if (opt_showdisassemble)
2233                                         M_NOP;
2234
2235                                 disp = 0;
2236
2237                         } else {
2238                                 disp = ((fieldinfo *) (iptr->val.a))->offset;
2239                         }
2240
2241                         switch (iptr->op1) {
2242                         case TYPE_INT:
2243                                 M_IST(s2, s1, disp);
2244                                 break;
2245                         case TYPE_LNG:
2246                                 M_LST(s2, s1, disp);
2247                                 break;
2248                         case TYPE_ADR:
2249                                 M_AST(s2, s1, disp);
2250                                 break;
2251                         case TYPE_FLT:
2252                                 M_FST(s2, s1, disp);
2253                                 break;
2254                         case TYPE_DBL:
2255                                 M_DST(s2, s1, disp);
2256                                 break;
2257                         }
2258                         break;
2259
2260                 case ICMD_PUTFIELDCONST:  /* ..., objectref  ==> ...                  */
2261                                           /* val = value (in current instruction)     */
2262                                           /* op1 = type, val.a = field address (in    */
2263                                           /* following NOP)                           */
2264
2265                         var_to_reg_int(s1, src, REG_ITMP1);
2266                         gen_nullptr_check(s1);
2267
2268                         if (!iptr[1].val.a) {
2269                                 codegen_addpatchref(cd, mcodeptr,
2270                                                                         PATCHER_get_putfield,
2271                                                                         (unresolved_field *) iptr[1].target, 0);
2272
2273                                 if (opt_showdisassemble)
2274                                         M_NOP;
2275
2276                                 disp = 0;
2277
2278                         } else {
2279                                 disp = ((fieldinfo *) (iptr[1].val.a))->offset;
2280                         }
2281
2282                         switch (iptr[1].op1) {
2283                         case TYPE_INT:
2284                                 M_IST(REG_ZERO, s1, disp);
2285                                 break;
2286                         case TYPE_LNG:
2287                                 M_LST(REG_ZERO, s1, disp);
2288                                 break;
2289                         case TYPE_ADR:
2290                                 M_AST(REG_ZERO, s1, disp);
2291                                 break;
2292                         case TYPE_FLT:
2293                                 M_FST(REG_ZERO, s1, disp);
2294                                 break;
2295                         case TYPE_DBL:
2296                                 M_DST(REG_ZERO, s1, disp);
2297                                 break;
2298                         }
2299                         break;
2300
2301
2302                 /* branch operations **************************************************/
2303
2304                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2305
2306                         var_to_reg_int(s1, src, REG_ITMP1);
2307                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2308                         disp = dseg_addaddress(cd, asm_handle_exception);
2309                         M_ALD(REG_ITMP2, REG_PV, disp);
2310                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2311                         M_NOP;              /* nop ensures that XPC is less than the end */
2312                                             /* of basic block                            */
2313                         ALIGNCODENOP;
2314                         break;
2315
2316                 case ICMD_GOTO:         /* ... ==> ...                                */
2317                                         /* op1 = target JavaVM pc                     */
2318                         M_BR(0);
2319                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2320                         ALIGNCODENOP;
2321                         break;
2322
2323                 case ICMD_JSR:          /* ... ==> ...                                */
2324                                         /* op1 = target JavaVM pc                     */
2325
2326                         M_BSR(REG_ITMP1, 0);
2327                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2328                         break;
2329
2330                 case ICMD_RET:          /* ... ==> ...                                */
2331                                         /* op1 = local variable                       */
2332
2333                         var = &(rd->locals[iptr->op1][TYPE_ADR]);
2334                         if (var->flags & INMEMORY) {
2335                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2336                                 M_RET(REG_ZERO, REG_ITMP1);
2337                                 }
2338                         else
2339                                 M_RET(REG_ZERO, var->regoff);
2340                         ALIGNCODENOP;
2341                         break;
2342
2343                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2344                                         /* op1 = target JavaVM pc                     */
2345
2346                         var_to_reg_int(s1, src, REG_ITMP1);
2347                         M_BEQZ(s1, 0);
2348                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2349                         break;
2350
2351                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2352                                         /* op1 = target JavaVM pc                     */
2353
2354                         var_to_reg_int(s1, src, REG_ITMP1);
2355                         M_BNEZ(s1, 0);
2356                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2357                         break;
2358
2359                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2360                                         /* op1 = target JavaVM pc, val.i = constant   */
2361
2362                         var_to_reg_int(s1, src, REG_ITMP1);
2363                         if (iptr->val.i == 0) {
2364                                 M_BEQZ(s1, 0);
2365                                 }
2366                         else {
2367                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2368                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2369                                         }
2370                                 else {
2371                                         ICONST(REG_ITMP2, iptr->val.i);
2372                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2373                                         }
2374                                 M_BNEZ(REG_ITMP1, 0);
2375                                 }
2376                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2377                         break;
2378
2379                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2380                                         /* op1 = target JavaVM pc, val.i = constant   */
2381
2382                         var_to_reg_int(s1, src, REG_ITMP1);
2383                         if (iptr->val.i == 0) {
2384                                 M_BLTZ(s1, 0);
2385                                 }
2386                         else {
2387                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2388                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2389                                         }
2390                                 else {
2391                                         ICONST(REG_ITMP2, iptr->val.i);
2392                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2393                                         }
2394                                 M_BNEZ(REG_ITMP1, 0);
2395                                 }
2396                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2397                         break;
2398
2399                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2400                                         /* op1 = target JavaVM pc, val.i = constant   */
2401
2402                         var_to_reg_int(s1, src, REG_ITMP1);
2403                         if (iptr->val.i == 0) {
2404                                 M_BLEZ(s1, 0);
2405                                 }
2406                         else {
2407                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2408                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2409                                         }
2410                                 else {
2411                                         ICONST(REG_ITMP2, iptr->val.i);
2412                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2413                                         }
2414                                 M_BNEZ(REG_ITMP1, 0);
2415                                 }
2416                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2417                         break;
2418
2419                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2420                                         /* op1 = target JavaVM pc, val.i = constant   */
2421
2422                         var_to_reg_int(s1, src, REG_ITMP1);
2423                         if (iptr->val.i == 0) {
2424                                 M_BNEZ(s1, 0);
2425                                 }
2426                         else {
2427                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2428                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2429                                         }
2430                                 else {
2431                                         ICONST(REG_ITMP2, iptr->val.i);
2432                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2433                                         }
2434                                 M_BEQZ(REG_ITMP1, 0);
2435                                 }
2436                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2437                         break;
2438
2439                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2440                                         /* op1 = target JavaVM pc, val.i = constant   */
2441
2442                         var_to_reg_int(s1, src, REG_ITMP1);
2443                         if (iptr->val.i == 0) {
2444                                 M_BGTZ(s1, 0);
2445                                 }
2446                         else {
2447                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2448                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2449                                         }
2450                                 else {
2451                                         ICONST(REG_ITMP2, iptr->val.i);
2452                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2453                                         }
2454                                 M_BEQZ(REG_ITMP1, 0);
2455                                 }
2456                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2457                         break;
2458
2459                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2460                                         /* op1 = target JavaVM pc, val.i = constant   */
2461
2462                         var_to_reg_int(s1, src, REG_ITMP1);
2463                         if (iptr->val.i == 0) {
2464                                 M_BGEZ(s1, 0);
2465                                 }
2466                         else {
2467                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2468                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2469                                         }
2470                                 else {
2471                                         ICONST(REG_ITMP2, iptr->val.i);
2472                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2473                                         }
2474                                 M_BEQZ(REG_ITMP1, 0);
2475                                 }
2476                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2477                         break;
2478
2479                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2480                                         /* op1 = target JavaVM pc, val.l = constant   */
2481
2482                         var_to_reg_int(s1, src, REG_ITMP1);
2483                         if (iptr->val.l == 0) {
2484                                 M_BEQZ(s1, 0);
2485                                 }
2486                         else {
2487                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2488                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2489                                         }
2490                                 else {
2491                                         LCONST(REG_ITMP2, iptr->val.l);
2492                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2493                                         }
2494                                 M_BNEZ(REG_ITMP1, 0);
2495                                 }
2496                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2497                         break;
2498
2499                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2500                                         /* op1 = target JavaVM pc, val.l = constant   */
2501
2502                         var_to_reg_int(s1, src, REG_ITMP1);
2503                         if (iptr->val.l == 0) {
2504                                 M_BLTZ(s1, 0);
2505                                 }
2506                         else {
2507                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2508                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2509                                         }
2510                                 else {
2511                                         LCONST(REG_ITMP2, iptr->val.l);
2512                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2513                                         }
2514                                 M_BNEZ(REG_ITMP1, 0);
2515                                 }
2516                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2517                         break;
2518
2519                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2520                                         /* op1 = target JavaVM pc, val.l = constant   */
2521
2522                         var_to_reg_int(s1, src, REG_ITMP1);
2523                         if (iptr->val.l == 0) {
2524                                 M_BLEZ(s1, 0);
2525                                 }
2526                         else {
2527                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2528                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2529                                         }
2530                                 else {
2531                                         LCONST(REG_ITMP2, iptr->val.l);
2532                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2533                                         }
2534                                 M_BNEZ(REG_ITMP1, 0);
2535                                 }
2536                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2537                         break;
2538
2539                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2540                                         /* op1 = target JavaVM pc, val.l = constant   */
2541
2542                         var_to_reg_int(s1, src, REG_ITMP1);
2543                         if (iptr->val.l == 0) {
2544                                 M_BNEZ(s1, 0);
2545                                 }
2546                         else {
2547                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2548                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2549                                         }
2550                                 else {
2551                                         LCONST(REG_ITMP2, iptr->val.l);
2552                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2553                                         }
2554                                 M_BEQZ(REG_ITMP1, 0);
2555                                 }
2556                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2557                         break;
2558
2559                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2560                                         /* op1 = target JavaVM pc, val.l = constant   */
2561
2562                         var_to_reg_int(s1, src, REG_ITMP1);
2563                         if (iptr->val.l == 0) {
2564                                 M_BGTZ(s1, 0);
2565                                 }
2566                         else {
2567                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2568                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2569                                         }
2570                                 else {
2571                                         LCONST(REG_ITMP2, iptr->val.l);
2572                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2573                                         }
2574                                 M_BEQZ(REG_ITMP1, 0);
2575                                 }
2576                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2577                         break;
2578
2579                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2580                                         /* op1 = target JavaVM pc, val.l = constant   */
2581
2582                         var_to_reg_int(s1, src, REG_ITMP1);
2583                         if (iptr->val.l == 0) {
2584                                 M_BGEZ(s1, 0);
2585                                 }
2586                         else {
2587                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2588                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2589                                         }
2590                                 else {
2591                                         LCONST(REG_ITMP2, iptr->val.l);
2592                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2593                                         }
2594                                 M_BEQZ(REG_ITMP1, 0);
2595                                 }
2596                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2597                         break;
2598
2599                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2600                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2601                 case ICMD_IF_ACMPEQ:
2602
2603                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2604                         var_to_reg_int(s2, src, REG_ITMP2);
2605                         M_CMPEQ(s1, s2, REG_ITMP1);
2606                         M_BNEZ(REG_ITMP1, 0);
2607                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2608                         break;
2609
2610                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2611                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2612                 case ICMD_IF_ACMPNE:
2613
2614                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2615                         var_to_reg_int(s2, src, REG_ITMP2);
2616                         M_CMPEQ(s1, s2, REG_ITMP1);
2617                         M_BEQZ(REG_ITMP1, 0);
2618                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2619                         break;
2620
2621                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2622                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2623
2624                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2625                         var_to_reg_int(s2, src, REG_ITMP2);
2626                         M_CMPLT(s1, s2, REG_ITMP1);
2627                         M_BNEZ(REG_ITMP1, 0);
2628                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2629                         break;
2630
2631                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2632                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2633
2634                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2635                         var_to_reg_int(s2, src, REG_ITMP2);
2636                         M_CMPLE(s1, s2, REG_ITMP1);
2637                         M_BEQZ(REG_ITMP1, 0);
2638                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2639                         break;
2640
2641                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2642                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2643
2644                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2645                         var_to_reg_int(s2, src, REG_ITMP2);
2646                         M_CMPLE(s1, s2, REG_ITMP1);
2647                         M_BNEZ(REG_ITMP1, 0);
2648                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2649                         break;
2650
2651                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2652                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2653
2654                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2655                         var_to_reg_int(s2, src, REG_ITMP2);
2656                         M_CMPLT(s1, s2, REG_ITMP1);
2657                         M_BEQZ(REG_ITMP1, 0);
2658                         codegen_addreference(cd, (basicblock *) iptr->target, mcodeptr);
2659                         break;
2660
2661                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2662
2663                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2664                         break;
2665
2666                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2667                                         /* val.i = constant                           */
2668
2669                         var_to_reg_int(s1, src, REG_ITMP1);
2670                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2671                         s3 = iptr->val.i;
2672                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2673                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2674                                         M_CMPEQ(s1, REG_ZERO, d);
2675                                         store_reg_to_var_int(iptr->dst, d);
2676                                         break;
2677                                 }
2678                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2679                                         M_CMPEQ(s1, REG_ZERO, d);
2680                                         M_XOR_IMM(d, 1, d);
2681                                         store_reg_to_var_int(iptr->dst, d);
2682                                         break;
2683                                 }
2684                                 if (s1 == d) {
2685                                         M_MOV(s1, REG_ITMP1);
2686                                         s1 = REG_ITMP1;
2687                                 }
2688                                 ICONST(d, iptr[1].val.i);
2689                         }
2690                         if ((s3 >= 0) && (s3 <= 255)) {
2691                                 M_CMOVEQ_IMM(s1, s3, d);
2692                         } else {
2693                                 ICONST(REG_ITMP2, s3);
2694                                 M_CMOVEQ(s1, REG_ITMP2, d);
2695                         }
2696                         store_reg_to_var_int(iptr->dst, d);
2697                         break;
2698
2699                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2700                                         /* val.i = constant                           */
2701
2702                         var_to_reg_int(s1, src, REG_ITMP1);
2703                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2704                         s3 = iptr->val.i;
2705                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2706                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2707                                         M_CMPEQ(s1, REG_ZERO, d);
2708                                         store_reg_to_var_int(iptr->dst, d);
2709                                         break;
2710                                 }
2711                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2712                                         M_CMPEQ(s1, REG_ZERO, d);
2713                                         M_XOR_IMM(d, 1, d);
2714                                         store_reg_to_var_int(iptr->dst, d);
2715                                         break;
2716                                 }
2717                                 if (s1 == d) {
2718                                         M_MOV(s1, REG_ITMP1);
2719                                         s1 = REG_ITMP1;
2720                                 }
2721                                 ICONST(d, iptr[1].val.i);
2722                         }
2723                         if ((s3 >= 0) && (s3 <= 255)) {
2724                                 M_CMOVNE_IMM(s1, s3, d);
2725                         } else {
2726                                 ICONST(REG_ITMP2, s3);
2727                                 M_CMOVNE(s1, REG_ITMP2, d);
2728                         }
2729                         store_reg_to_var_int(iptr->dst, d);
2730                         break;
2731
2732                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2733                                         /* val.i = constant                           */
2734
2735                         var_to_reg_int(s1, src, REG_ITMP1);
2736                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2737                         s3 = iptr->val.i;
2738                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2739                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2740                                         M_CMPLT(s1, REG_ZERO, d);
2741                                         store_reg_to_var_int(iptr->dst, d);
2742                                         break;
2743                                 }
2744                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2745                                         M_CMPLE(REG_ZERO, s1, d);
2746                                         store_reg_to_var_int(iptr->dst, d);
2747                                         break;
2748                                 }
2749                                 if (s1 == d) {
2750                                         M_MOV(s1, REG_ITMP1);
2751                                         s1 = REG_ITMP1;
2752                                 }
2753                                 ICONST(d, iptr[1].val.i);
2754                         }
2755                         if ((s3 >= 0) && (s3 <= 255)) {
2756                                 M_CMOVLT_IMM(s1, s3, d);
2757                         } else {
2758                                 ICONST(REG_ITMP2, s3);
2759                                 M_CMOVLT(s1, REG_ITMP2, d);
2760                         }
2761                         store_reg_to_var_int(iptr->dst, d);
2762                         break;
2763
2764                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2765                                         /* val.i = constant                           */
2766
2767                         var_to_reg_int(s1, src, REG_ITMP1);
2768                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2769                         s3 = iptr->val.i;
2770                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2771                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2772                                         M_CMPLE(REG_ZERO, s1, d);
2773                                         store_reg_to_var_int(iptr->dst, d);
2774                                         break;
2775                                 }
2776                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2777                                         M_CMPLT(s1, REG_ZERO, d);
2778                                         store_reg_to_var_int(iptr->dst, d);
2779                                         break;
2780                                 }
2781                                 if (s1 == d) {
2782                                         M_MOV(s1, REG_ITMP1);
2783                                         s1 = REG_ITMP1;
2784                                 }
2785                                 ICONST(d, iptr[1].val.i);
2786                         }
2787                         if ((s3 >= 0) && (s3 <= 255)) {
2788                                 M_CMOVGE_IMM(s1, s3, d);
2789                         } else {
2790                                 ICONST(REG_ITMP2, s3);
2791                                 M_CMOVGE(s1, REG_ITMP2, d);
2792                         }
2793                         store_reg_to_var_int(iptr->dst, d);
2794                         break;
2795
2796                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2797                                         /* val.i = constant                           */
2798
2799                         var_to_reg_int(s1, src, REG_ITMP1);
2800                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2801                         s3 = iptr->val.i;
2802                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2803                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2804                                         M_CMPLT(REG_ZERO, s1, d);
2805                                         store_reg_to_var_int(iptr->dst, d);
2806                                         break;
2807                                 }
2808                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2809                                         M_CMPLE(s1, REG_ZERO, d);
2810                                         store_reg_to_var_int(iptr->dst, d);
2811                                         break;
2812                                 }
2813                                 if (s1 == d) {
2814                                         M_MOV(s1, REG_ITMP1);
2815                                         s1 = REG_ITMP1;
2816                                 }
2817                                 ICONST(d, iptr[1].val.i);
2818                         }
2819                         if ((s3 >= 0) && (s3 <= 255)) {
2820                                 M_CMOVGT_IMM(s1, s3, d);
2821                         } else {
2822                                 ICONST(REG_ITMP2, s3);
2823                                 M_CMOVGT(s1, REG_ITMP2, d);
2824                         }
2825                         store_reg_to_var_int(iptr->dst, d);
2826                         break;
2827
2828                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2829                                         /* val.i = constant                           */
2830
2831                         var_to_reg_int(s1, src, REG_ITMP1);
2832                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
2833                         s3 = iptr->val.i;
2834                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2835                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2836                                         M_CMPLE(s1, REG_ZERO, d);
2837                                         store_reg_to_var_int(iptr->dst, d);
2838                                         break;
2839                                 }
2840                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2841                                         M_CMPLT(REG_ZERO, s1, d);
2842                                         store_reg_to_var_int(iptr->dst, d);
2843                                         break;
2844                                 }
2845                                 if (s1 == d) {
2846                                         M_MOV(s1, REG_ITMP1);
2847                                         s1 = REG_ITMP1;
2848                                 }
2849                                 ICONST(d, iptr[1].val.i);
2850                         }
2851                         if ((s3 >= 0) && (s3 <= 255)) {
2852                                 M_CMOVLE_IMM(s1, s3, d);
2853                         } else {
2854                                 ICONST(REG_ITMP2, s3);
2855                                 M_CMOVLE(s1, REG_ITMP2, d);
2856                         }
2857                         store_reg_to_var_int(iptr->dst, d);
2858                         break;
2859
2860
2861                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2862                 case ICMD_LRETURN:
2863                 case ICMD_ARETURN:
2864
2865                         var_to_reg_int(s1, src, REG_RESULT);
2866                         M_INTMOVE(s1, REG_RESULT);
2867
2868                         goto nowperformreturn;
2869
2870                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2871                 case ICMD_DRETURN:
2872
2873                         var_to_reg_flt(s1, src, REG_FRESULT);
2874                         M_FLTMOVE(s1, REG_FRESULT);
2875
2876                         goto nowperformreturn;
2877
2878                 case ICMD_RETURN:       /* ...  ==> ...                               */
2879
2880 nowperformreturn:
2881                         {
2882                         s4 i, p;
2883
2884                         p = parentargs_base;
2885
2886                         /* call trace function */
2887
2888                         if (runverbose) {
2889                                 M_LDA(REG_SP, REG_SP, -3 * 8);
2890                                 M_AST(REG_RA, REG_SP, 0 * 8);
2891                                 M_LST(REG_RESULT, REG_SP, 1 * 8);
2892                                 M_DST(REG_FRESULT, REG_SP, 2 * 8);
2893
2894                                 disp = dseg_addaddress(cd, m);
2895                                 M_ALD(rd->argintregs[0], REG_PV, disp);
2896                                 M_MOV(REG_RESULT, rd->argintregs[1]);
2897                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[2]);
2898                                 M_FLTMOVE(REG_FRESULT, rd->argfltregs[3]);
2899
2900                                 disp = dseg_addaddress(cd, (void *) builtin_displaymethodstop);
2901                                 M_ALD(REG_PV, REG_PV, disp);
2902                                 M_JSR(REG_RA, REG_PV);
2903                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2904                                 M_LDA(REG_PV, REG_RA, -disp);
2905
2906                                 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
2907                                 M_LLD(REG_RESULT, REG_SP, 1 * 8);
2908                                 M_ALD(REG_RA, REG_SP, 0 * 8);
2909                                 M_LDA(REG_SP, REG_SP, 3 * 8);
2910                         }
2911
2912 #if defined(USE_THREADS)
2913                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2914                                 s4 disp;
2915
2916                                 M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 8);
2917
2918                                 switch (iptr->opc) {
2919                                 case ICMD_IRETURN:
2920                                 case ICMD_LRETURN:
2921                                 case ICMD_ARETURN:
2922                                         M_LST(REG_RESULT, REG_SP, rd->memuse * 8);
2923                                         break;
2924                                 case ICMD_FRETURN:
2925                                 case ICMD_DRETURN:
2926                                         M_DST(REG_FRESULT, REG_SP, rd->memuse * 8);
2927                                         break;
2928                                 }
2929
2930                                 disp = dseg_addaddress(cd, BUILTIN_monitorexit);
2931                                 M_ALD(REG_PV, REG_PV, disp);
2932                                 M_JSR(REG_RA, REG_PV);
2933                                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
2934                                 M_LDA(REG_PV, REG_RA, disp);
2935
2936                                 switch (iptr->opc) {
2937                                 case ICMD_IRETURN:
2938                                 case ICMD_LRETURN:
2939                                 case ICMD_ARETURN:
2940                                         M_LLD(REG_RESULT, REG_SP, rd->memuse * 8);
2941                                         break;
2942                                 case ICMD_FRETURN:
2943                                 case ICMD_DRETURN:
2944                                         M_DLD(REG_FRESULT, REG_SP, rd->memuse * 8);
2945                                         break;
2946                                 }
2947                         }
2948 #endif
2949
2950                         /* restore return address                                         */
2951
2952                         if (!m->isleafmethod) {
2953                                 p--; M_LLD(REG_RA, REG_SP, p * 8);
2954                         }
2955
2956                         /* restore saved registers                                        */
2957
2958                         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
2959                                 p--; M_LLD(rd->savintregs[i], REG_SP, p * 8);
2960                         }
2961                         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
2962                                 p--; M_DLD(rd->savfltregs[i], REG_SP, p * 8);
2963                         }
2964
2965                         /* deallocate stack                                               */
2966
2967                         if (parentargs_base) {
2968                                 M_LDA(REG_SP, REG_SP, parentargs_base * 8);
2969                         }
2970
2971                         M_RET(REG_ZERO, REG_RA);
2972                         ALIGNCODENOP;
2973                         }
2974                         break;
2975
2976
2977                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2978                         {
2979                         s4 i, l, *s4ptr;
2980                         void **tptr;
2981
2982                         tptr = (void **) iptr->target;
2983
2984                         s4ptr = iptr->val.a;
2985                         l = s4ptr[1];                          /* low     */
2986                         i = s4ptr[2];                          /* high    */
2987
2988                         var_to_reg_int(s1, src, REG_ITMP1);
2989                         if (l == 0) {
2990                                 M_INTMOVE(s1, REG_ITMP1);
2991                         } else if (l <= 32768) {
2992                                 M_LDA(REG_ITMP1, s1, -l);
2993                         } else {
2994                                 ICONST(REG_ITMP2, l);
2995                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
2996                         }
2997                         i = i - l + 1;
2998
2999                         /* range check */
3000
3001                         if (i <= 256)
3002                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3003                         else {
3004                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3005                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3006                         }
3007                         M_BEQZ(REG_ITMP2, 0);
3008                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3009
3010                         /* build jump table top down and use address of lowest entry */
3011
3012                         /* s4ptr += 3 + i; */
3013                         tptr += i;
3014
3015                         while (--i >= 0) {
3016                                 dseg_addtarget(cd, (basicblock *) tptr[0]);
3017                                 --tptr;
3018                         }
3019                         }
3020
3021                         /* length of dataseg after last dseg_addtarget is used by load */
3022
3023                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3024                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
3025                         M_JMP(REG_ZERO, REG_ITMP2);
3026                         ALIGNCODENOP;
3027                         break;
3028
3029
3030                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3031                         {
3032                         s4 i, l, val, *s4ptr;
3033                         void **tptr;
3034
3035                         tptr = (void **) iptr->target;
3036
3037                         s4ptr = iptr->val.a;
3038                         l = s4ptr[0];                          /* default  */
3039                         i = s4ptr[1];                          /* count    */
3040
3041                         MCODECHECK((i<<2)+8);
3042                         var_to_reg_int(s1, src, REG_ITMP1);
3043                         while (--i >= 0) {
3044                                 s4ptr += 2;
3045                                 ++tptr;
3046
3047                                 val = s4ptr[0];
3048                                 if ((val >= 0) && (val <= 255)) {
3049                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
3050                                 } else {
3051                                         if ((val >= -32768) && (val <= 32767)) {
3052                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
3053                                         } else {
3054                                                 disp = dseg_adds4(cd, val);
3055                                                 M_ILD(REG_ITMP2, REG_PV, disp);
3056                                         }
3057                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3058                                 }
3059                                 M_BNEZ(REG_ITMP2, 0);
3060                                 codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3061                         }
3062
3063                         M_BR(0);
3064
3065                         tptr = (void **) iptr->target;
3066                         codegen_addreference(cd, (basicblock *) tptr[0], mcodeptr);
3067
3068                         ALIGNCODENOP;
3069                         break;
3070                         }
3071
3072
3073                 case ICMD_BUILTIN:      /* ..., arg1, arg2, arg3 ==> ...              */
3074                                         /* op1 = arg count val.a = builtintable entry */
3075
3076                         bte = iptr->val.a;
3077                         md = bte->md;
3078                         goto gen_method;
3079
3080                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3081                                         /* op1 = arg count, val.a = method pointer    */
3082
3083                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3084                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
3085                 case ICMD_INVOKEINTERFACE:
3086
3087                         lm = iptr->val.a;
3088
3089                         if (lm)
3090                                 md = lm->parseddesc;
3091                         else {
3092                                 unresolved_method *um = iptr->target;
3093                                 md = um->methodref->parseddesc.md;
3094                         }
3095
3096 gen_method:
3097                         s3 = md->paramcount;
3098
3099                         MCODECHECK((s3 << 1) + 64);
3100
3101                         /* copy arguments to registers or stack location                  */
3102
3103                         for (s3 = s3 - 1; s3 >= 0; s3--, src = src->prev) {
3104                                 if (src->varkind == ARGVAR)
3105                                         continue;
3106                                 if (IS_INT_LNG_TYPE(src->type)) {
3107                                         if (!md->params[s3].inmemory) {
3108                                                 s1 = rd->argintregs[md->params[s3].regoff];
3109                                                 var_to_reg_int(d, src, s1);
3110                                                 M_INTMOVE(d, s1);
3111                                         } else {
3112                                                 var_to_reg_int(d, src, REG_ITMP1);
3113                                                 M_LST(d, REG_SP, md->params[s3].regoff * 8);
3114                                         }
3115
3116                                 } else {
3117                                         if (!md->params[s3].inmemory) {
3118                                                 s1 = rd->argfltregs[md->params[s3].regoff];
3119                                                 var_to_reg_flt(d, src, s1);
3120                                                 M_FLTMOVE(d, s1);
3121                                         } else {
3122                                                 var_to_reg_flt(d, src, REG_FTMP1);
3123                                                 M_DST(d, REG_SP, md->params[s3].regoff * 8);
3124                                         }
3125                                 }
3126                         }
3127
3128                         switch (iptr->opc) {
3129                         case ICMD_BUILTIN:
3130                                 if (iptr->target) {
3131                                         disp = dseg_addaddress(cd, NULL);
3132
3133                                         codegen_addpatchref(cd, mcodeptr, bte->fp, iptr->target,
3134                                                                                 disp);
3135
3136                                         if (opt_showdisassemble)
3137                                                 M_NOP;
3138
3139                                 } else {
3140                                         disp = dseg_addaddress(cd, bte->fp);
3141                                 }
3142
3143                                 d = md->returntype.type;
3144
3145                                 M_ALD(REG_PV, REG_PV, disp);  /* Pointer to built-in-function */
3146                                 M_JSR(REG_RA, REG_PV);
3147                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3148                                 M_LDA(REG_PV, REG_RA, -disp);
3149
3150                                 /* if op1 == true, we need to check for an exception */
3151
3152                                 if (iptr->op1 == true) {
3153                                         M_BEQZ(REG_RESULT, 0);
3154                                         codegen_addxexceptionrefs(cd, mcodeptr);
3155                                 }
3156                                 break;
3157
3158                         case ICMD_INVOKESPECIAL:
3159                                 M_BEQZ(rd->argintregs[0], 0);
3160                                 codegen_addxnullrefs(cd, mcodeptr);
3161                                 /* fall through */
3162
3163                         case ICMD_INVOKESTATIC:
3164                                 if (!lm) {
3165                                         unresolved_method *um = iptr->target;
3166
3167                                         disp = dseg_addaddress(cd, NULL);
3168
3169                                         codegen_addpatchref(cd, mcodeptr,
3170                                                                                 PATCHER_invokestatic_special, um, disp);
3171
3172                                         if (opt_showdisassemble)
3173                                                 M_NOP;
3174
3175                                         d = um->methodref->parseddesc.md->returntype.type;
3176
3177                                 } else {
3178                                         disp = dseg_addaddress(cd, lm->stubroutine);
3179                                         d = lm->parseddesc->returntype.type;
3180                                 }
3181
3182                                 M_ALD(REG_PV, REG_PV, disp);         /* method pointer in r27 */
3183                                 M_JSR(REG_RA, REG_PV);
3184                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3185                                 M_LDA(REG_PV, REG_RA, -disp);
3186                                 break;
3187
3188                         case ICMD_INVOKEVIRTUAL:
3189                                 gen_nullptr_check(rd->argintregs[0]);
3190
3191                                 if (!lm) {
3192                                         unresolved_method *um = iptr->target;
3193
3194                                         codegen_addpatchref(cd, mcodeptr,
3195                                                                                 PATCHER_invokevirtual, um, 0);
3196
3197                                         if (opt_showdisassemble)
3198                                                 M_NOP;
3199
3200                                         s1 = 0;
3201                                         d = um->methodref->parseddesc.md->returntype.type;
3202
3203                                 } else {
3204                                         s1 = OFFSET(vftbl_t, table[0]) +
3205                                                 sizeof(methodptr) * lm->vftblindex;
3206                                         d = lm->parseddesc->returntype.type;
3207                                 }
3208
3209                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
3210                                           OFFSET(java_objectheader, vftbl));
3211                                 M_ALD(REG_PV, REG_METHODPTR, s1);
3212                                 M_JSR(REG_RA, REG_PV);
3213                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3214                                 M_LDA(REG_PV, REG_RA, -disp);
3215                                 break;
3216
3217                         case ICMD_INVOKEINTERFACE:
3218                                 gen_nullptr_check(rd->argintregs[0]);
3219
3220                                 if (!lm) {
3221                                         unresolved_method *um = iptr->target;
3222
3223                                         codegen_addpatchref(cd, mcodeptr,
3224                                                                                 PATCHER_invokeinterface, um, 0);
3225
3226                                         if (opt_showdisassemble)
3227                                                 M_NOP;
3228
3229                                         s1 = 0;
3230                                         s2 = 0;
3231                                         d = um->methodref->parseddesc.md->returntype.type;
3232
3233                                 } else {
3234                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
3235                                                 sizeof(methodptr*) * lm->class->index;
3236
3237                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
3238
3239                                         d = lm->parseddesc->returntype.type;
3240                                 }
3241
3242                                 M_ALD(REG_METHODPTR, rd->argintregs[0],
3243                                           OFFSET(java_objectheader, vftbl));
3244                                 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
3245                                 M_ALD(REG_PV, REG_METHODPTR, s2);
3246                                 M_JSR(REG_RA, REG_PV);
3247                                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3248                                 M_LDA(REG_PV, REG_RA, -disp);
3249                                 break;
3250                         }
3251
3252                         /* d contains return type */
3253
3254                         if (d != TYPE_VOID) {
3255                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3256                                         s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
3257                                         M_INTMOVE(REG_RESULT, s1);
3258                                         store_reg_to_var_int(iptr->dst, s1);
3259                                 } else {
3260                                         s1 = reg_of_var(rd, iptr->dst, REG_FRESULT);
3261                                         M_FLTMOVE(REG_FRESULT, s1);
3262                                         store_reg_to_var_flt(iptr->dst, s1);
3263                                 }
3264                         }
3265                         break;
3266
3267
3268                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3269
3270                                       /* op1:   0 == array, 1 == class                */
3271                                       /* val.a: (classinfo*) superclass               */
3272
3273                         /*  superclass is an interface:
3274                          *
3275                          *  OK if ((sub == NULL) ||
3276                          *         (sub->vftbl->interfacetablelength > super->index) &&
3277                          *         (sub->vftbl->interfacetable[-super->index] != NULL));
3278                          *
3279                          *  superclass is a class:
3280                          *
3281                          *  OK if ((sub == NULL) || (0
3282                          *         <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3283                          *         super->vftbl->diffval));
3284                          */
3285
3286                         {
3287                         classinfo *super;
3288                         vftbl_t   *supervftbl;
3289                         s4         superindex;
3290
3291                         super = (classinfo *) iptr->val.a;
3292
3293                         if (!super) {
3294                                 superindex = 0;
3295                                 supervftbl = NULL;
3296
3297                         } else {
3298                                 superindex = super->index;
3299                                 supervftbl = super->vftbl;
3300                         }
3301
3302 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3303                         codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
3304 #endif
3305                         var_to_reg_int(s1, src, REG_ITMP1);
3306
3307                         /* calculate interface checkcast code size */
3308
3309                         s2 = 6;
3310                         if (!super)
3311                                 s2 += opt_showdisassemble ? 1 : 0;
3312
3313                         /* calculate class checkcast code size */
3314
3315                         s3 = 9 /* 8 + (s1 == REG_ITMP1) */;
3316                         if (!super)
3317                                 s3 += opt_showdisassemble ? 1 : 0;
3318
3319                         /* if class is not resolved, check which code to call */
3320
3321                         if (!super) {
3322                                 M_BEQZ(s1, 4 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3323
3324                                 disp = dseg_adds4(cd, 0);                     /* super->flags */
3325
3326                                 codegen_addpatchref(cd, mcodeptr,
3327                                                                         PATCHER_checkcast_instanceof_flags,
3328                                                                         (constant_classref *) iptr->target, disp);
3329
3330                                 if (opt_showdisassemble)
3331                                         M_NOP;
3332
3333                                 M_ILD(REG_ITMP2, REG_PV, disp);
3334                                 disp = dseg_adds4(cd, ACC_INTERFACE);
3335                                 M_ILD(REG_ITMP3, REG_PV, disp);
3336                                 M_AND(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3337                                 M_BEQZ(REG_ITMP2, s2 + 1);
3338                         }
3339
3340                         /* interface checkcast code */
3341
3342                         if (!super || (super->flags & ACC_INTERFACE)) {
3343                                 if (super) {
3344                                         M_BEQZ(s1, s2);
3345
3346                                 } else {
3347                                         codegen_addpatchref(cd, mcodeptr,
3348                                                                                 PATCHER_checkcast_instanceof_interface,
3349                                                                                 (constant_classref *) iptr->target, 0);
3350
3351                                         if (opt_showdisassemble)
3352                                                 M_NOP;
3353                                 }
3354
3355                                 M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3356                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
3357                                 M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3358                                 M_BLEZ(REG_ITMP3, 0);
3359                                 codegen_addxcastrefs(cd, mcodeptr);
3360                                 M_ALD(REG_ITMP3, REG_ITMP2,
3361                                           (s4) (OFFSET(vftbl_t, interfacetable[0]) -
3362                                                         superindex * sizeof(methodptr*)));
3363                                 M_BEQZ(REG_ITMP3, 0);
3364                                 codegen_addxcastrefs(cd, mcodeptr);
3365
3366                                 if (!super)
3367                                         M_BR(s3);
3368                         }
3369
3370                         /* class checkcast code */
3371
3372                         if (!super || !(super->flags & ACC_INTERFACE)) {
3373                                 disp = dseg_addaddress(cd, supervftbl);
3374
3375                                 if (super) {
3376                                         M_BEQZ(s1, s3);
3377
3378                                 } else {
3379                                         codegen_addpatchref(cd, mcodeptr,
3380                                                                                 PATCHER_checkcast_instanceof_class,
3381                                                                                 (constant_classref *) iptr->target,
3382                                                                                 disp);
3383
3384                                         if (opt_showdisassemble)
3385                                                 M_NOP;
3386                                 }
3387
3388                                 M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3389                                 M_ALD(REG_ITMP3, REG_PV, disp);
3390 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3391                                 codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3392 #endif
3393                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3394 /*                              if (s1 != REG_ITMP1) { */
3395 /*                                      M_ILD(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, baseval)); */
3396 /*                                      M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval)); */
3397 /*  #if defined(USE_THREADS) && defined(NATIVE_THREADS) */
3398 /*                                      codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase); */
3399 /*  #endif */
3400 /*                                      M_ISUB(REG_ITMP2, REG_ITMP1, REG_ITMP2); */
3401
3402 /*                              } else { */
3403                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, baseval));
3404                                         M_ISUB(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3405                                         M_ALD(REG_ITMP3, REG_PV, disp);
3406                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval));
3407 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3408                                         codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3409 #endif
3410 /*                              } */
3411                                 M_CMPULE(REG_ITMP2, REG_ITMP3, REG_ITMP3);
3412                                 M_BEQZ(REG_ITMP3, 0);
3413                                 codegen_addxcastrefs(cd, mcodeptr);
3414                         }
3415                         d = reg_of_var(rd, iptr->dst, s1);
3416                         M_INTMOVE(s1, d);
3417                         store_reg_to_var_int(iptr->dst, d);
3418                         }
3419                         break;
3420
3421                 case ICMD_ARRAYCHECKCAST: /* ..., objectref ==> ..., objectref        */
3422                                           /* op1: 1... resolved, 0... not resolved    */
3423
3424                         var_to_reg_int(s1, src, rd->argintregs[0]);
3425                         M_INTMOVE(s1, rd->argintregs[0]);
3426
3427                         bte = iptr->val.a;
3428
3429                         disp = dseg_addaddress(cd, iptr->target);
3430
3431                         if (!iptr->op1) {
3432                                 codegen_addpatchref(cd, mcodeptr, bte->fp, iptr->target, disp);
3433
3434                                 if (opt_showdisassemble)
3435                                         M_NOP;
3436
3437                                 a = 0;
3438
3439                         } else {
3440                                 a = (ptrint) bte->fp;
3441                         }
3442
3443                         M_ALD(rd->argintregs[1], REG_PV, disp);
3444
3445                         disp = dseg_addaddress(cd, a);
3446                         M_ALD(REG_PV, REG_PV, disp);
3447                         M_JSR(REG_RA, REG_PV);
3448                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3449                         M_LDA(REG_PV, REG_RA, -disp);
3450
3451                         M_BEQZ(REG_RESULT, 0);
3452                         codegen_addxcastrefs(cd, mcodeptr);
3453
3454                         var_to_reg_int(s1, src, REG_ITMP1);
3455                         d = reg_of_var(rd, iptr->dst, s1);
3456                         M_INTMOVE(s1, d);
3457                         store_reg_to_var_int(iptr->dst, d);
3458                         break;
3459
3460                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3461
3462                                       /* op1:   0 == array, 1 == class                */
3463                                       /* val.a: (classinfo*) superclass               */
3464
3465                         /*  superclass is an interface:
3466                          *
3467                          *  return (sub != NULL) &&
3468                          *         (sub->vftbl->interfacetablelength > super->index) &&
3469                          *         (sub->vftbl->interfacetable[-super->index] != NULL);
3470                          *
3471                          *  superclass is a class:
3472                          *
3473                          *  return ((sub != NULL) && (0
3474                          *          <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3475                          *          super->vftbl->diffvall));
3476                          */
3477
3478                         {
3479                         classinfo *super;
3480                         vftbl_t   *supervftbl;
3481                         s4         superindex;
3482
3483                         super = (classinfo *) iptr->val.a;
3484
3485                         if (!super) {
3486                                 superindex = 0;
3487                                 supervftbl = NULL;
3488
3489                         } else {
3490                                 superindex = super->index;
3491                                 supervftbl = super->vftbl;
3492                         }
3493
3494 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3495                         codegen_threadcritrestart(cd, (u1 *) mcodeptr - cd->mcodebase);
3496 #endif
3497                         var_to_reg_int(s1, src, REG_ITMP1);
3498                         d = reg_of_var(rd, iptr->dst, REG_ITMP2);
3499                         if (s1 == d) {
3500                                 M_MOV(s1, REG_ITMP1);
3501                                 s1 = REG_ITMP1;
3502                         }
3503
3504                         /* calculate interface instanceof code size */
3505
3506                         s2 = 6;
3507                         if (!super)
3508                                 s2 += (d == REG_ITMP2 ? 1 : 0) + (opt_showdisassemble ? 1 : 0);
3509
3510                         /* calculate class instanceof code size */
3511
3512                         s3 = 7;
3513                         if (!super)
3514                                 s3 += (opt_showdisassemble ? 1 : 0);
3515
3516                         /* if class is not resolved, check which code to call */
3517
3518                         if (!super) {
3519                                 M_CLR(d);
3520                                 M_BEQZ(s1, 4 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3521
3522                                 disp = dseg_adds4(cd, 0);                     /* super->flags */
3523
3524                                 codegen_addpatchref(cd, mcodeptr,
3525                                                                         PATCHER_checkcast_instanceof_flags,
3526                                                                         (constant_classref *) iptr->target, disp);
3527
3528                                 if (opt_showdisassemble)
3529                                         M_NOP;
3530
3531                                 M_ILD(REG_ITMP3, REG_PV, disp);
3532
3533                                 disp = dseg_adds4(cd, ACC_INTERFACE);
3534                                 M_ILD(REG_ITMP2, REG_PV, disp);
3535                                 M_AND(REG_ITMP3, REG_ITMP2, REG_ITMP3);
3536                                 M_BEQZ(REG_ITMP3, s2 + 1);
3537                         }
3538
3539                         /* interface instanceof code */
3540
3541                         if (!super || (super->flags & ACC_INTERFACE)) {
3542                                 if (super) {
3543                                         M_CLR(d);
3544                                         M_BEQZ(s1, s2);
3545
3546                                 } else {
3547                                         /* If d == REG_ITMP2, then it's destroyed in check code   */
3548                                         /* above.                                                 */
3549                                         if (d == REG_ITMP2)
3550                                                 M_CLR(d);
3551
3552                                         codegen_addpatchref(cd, mcodeptr,
3553                                                                                 PATCHER_checkcast_instanceof_interface,
3554                                                                                 (constant_classref *) iptr->target, 0);
3555
3556                                         if (opt_showdisassemble)
3557                                                 M_NOP;
3558                                 }
3559
3560                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3561                                 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3562                                 M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3563                                 M_BLEZ(REG_ITMP3, 2);
3564                                 M_ALD(REG_ITMP1, REG_ITMP1,
3565                                           (s4) (OFFSET(vftbl_t, interfacetable[0]) -
3566                                                         superindex * sizeof(methodptr*)));
3567                                 M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3568
3569                                 if (!super)
3570                                         M_BR(s3);
3571                         }
3572
3573                         /* class instanceof code */
3574
3575                         if (!super || !(super->flags & ACC_INTERFACE)) {
3576                                 disp = dseg_addaddress(cd, supervftbl);
3577
3578                                 if (super) {
3579                                         M_CLR(d);
3580                                         M_BEQZ(s1, s3);
3581
3582                                 } else {
3583                                         codegen_addpatchref(cd, mcodeptr,
3584                                                                                 PATCHER_checkcast_instanceof_class,
3585                                                                                 (constant_classref *) iptr->target,
3586                                                                                 disp);
3587
3588                                         if (opt_showdisassemble)
3589                                                 M_NOP;
3590                                 }
3591
3592                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3593                                 M_ALD(REG_ITMP2, REG_PV, disp);
3594 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3595                                 codegen_threadcritstart(cd, (u1 *) mcodeptr - cd->mcodebase);
3596 #endif
3597                                 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3598                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3599                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3600 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3601                                 codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase);
3602 #endif
3603                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3604                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3605                         }
3606                         store_reg_to_var_int(iptr->dst, d);
3607                         }
3608                         break;
3609
3610                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3611                                       /* op1 = dimension, val.a = array descriptor    */
3612
3613                         /* check for negative sizes and copy sizes to stack if necessary  */
3614
3615                         MCODECHECK((iptr->op1 << 1) + 64);
3616
3617                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3618                                 /* copy SAVEDVAR sizes to stack */
3619
3620                                 if (src->varkind != ARGVAR) {
3621                                         var_to_reg_int(s2, src, REG_ITMP1);
3622                                         M_LST(s2, REG_SP, s1 * 8);
3623                                 }
3624                         }
3625
3626                         /* a0 = dimension count */
3627
3628                         ICONST(rd->argintregs[0], iptr->op1);
3629
3630                         /* is patcher function set? */
3631
3632                         if (iptr->target) {
3633                                 disp = dseg_addaddress(cd, 0);
3634
3635                                 codegen_addpatchref(cd, mcodeptr,
3636                                                                         (functionptr) iptr->target, iptr->val.a,
3637                                                                         disp);
3638
3639                                 if (opt_showdisassemble)
3640                                         M_NOP;
3641
3642                         } else {
3643                                 disp = dseg_addaddress(cd, iptr->val.a);
3644                         }
3645
3646                         /* a1 = arraydescriptor */
3647
3648                         M_ALD(rd->argintregs[1], REG_PV, disp);
3649
3650                         /* a2 = pointer to dimensions = stack pointer */
3651
3652                         M_INTMOVE(REG_SP, rd->argintregs[2]);
3653
3654                         disp = dseg_addaddress(cd, (void *) BUILTIN_multianewarray);
3655                         M_ALD(REG_PV, REG_PV, disp);
3656                         M_JSR(REG_RA, REG_PV);
3657                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3658                         M_LDA(REG_PV, REG_RA, -disp);
3659
3660                         /* check for exception before result assignment */
3661
3662                         M_BEQZ(REG_RESULT, 0);
3663                         codegen_addxexceptionrefs(cd, mcodeptr);
3664
3665                         d = reg_of_var(rd, iptr->dst, REG_RESULT);
3666                         M_INTMOVE(REG_RESULT, d);
3667                         store_reg_to_var_int(iptr->dst, d);
3668                         break;
3669
3670                 default:
3671                         throw_cacao_exception_exit(string_java_lang_InternalError,
3672                                                                            "Unknown ICMD %d", iptr->opc);
3673         } /* switch */
3674
3675         } /* for instruction */
3676
3677         /* copy values to interface registers */
3678
3679         src = bptr->outstack;
3680         len = bptr->outdepth;
3681         MCODECHECK(64+len);
3682 #ifdef LSRA
3683         if (!opt_lsra)
3684 #endif
3685         while (src) {
3686                 len--;
3687                 if ((src->varkind != STACKVAR)) {
3688                         s2 = src->type;
3689                         if (IS_FLT_DBL_TYPE(s2)) {
3690                                 var_to_reg_flt(s1, src, REG_FTMP1);
3691                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3692                                         M_FLTMOVE(s1,rd->interfaces[len][s2].regoff);
3693                                         }
3694                                 else {
3695                                         M_DST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3696                                         }
3697                                 }
3698                         else {
3699                                 var_to_reg_int(s1, src, REG_ITMP1);
3700                                 if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
3701                                         M_INTMOVE(s1,rd->interfaces[len][s2].regoff);
3702                                         }
3703                                 else {
3704                                         M_LST(s1, REG_SP, 8 * rd->interfaces[len][s2].regoff);
3705                                         }
3706                                 }
3707                         }
3708                 src = src->prev;
3709                 }
3710         } /* if (bptr -> flags >= BBREACHED) */
3711         } /* for basic block */
3712
3713         codegen_createlinenumbertable(cd);
3714
3715         {
3716
3717         s4 *xcodeptr = NULL;
3718         branchref *bref;
3719
3720         /* generate ArithmeticException stubs */
3721
3722         for (bref = cd->xdivrefs; bref != NULL; bref = bref->next) {
3723                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3724                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3725                                                           bref->branchpos,
3726                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3727                         continue;
3728                 }
3729
3730                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3731                                   bref->branchpos,
3732                                                   (u1 *) mcodeptr - cd->mcodebase);
3733
3734                 MCODECHECK(16);
3735
3736                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3737
3738                 if (xcodeptr != NULL) {
3739                         disp = xcodeptr - mcodeptr - 1;
3740                         M_BR(disp);
3741
3742                 } else {
3743                         xcodeptr = mcodeptr;
3744
3745                         M_MOV(REG_PV, rd->argintregs[0]);
3746                         M_MOV(REG_SP, rd->argintregs[1]);
3747                         M_ALD(rd->argintregs[2],
3748                                   REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
3749                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3750
3751                         M_LDA(REG_SP, REG_SP, -1 * 8);
3752                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3753
3754                         disp = dseg_addaddress(cd, stacktrace_inline_arithmeticexception);
3755                         M_ALD(REG_PV, REG_PV, disp);
3756                         M_JSR(REG_RA, REG_PV);
3757                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3758                         M_LDA(REG_PV, REG_RA, -disp);
3759
3760                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3761
3762                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3763                         M_LDA(REG_SP, REG_SP, 1 * 8);
3764
3765                         disp = dseg_addaddress(cd, asm_handle_exception);
3766                         M_ALD(REG_ITMP3, REG_PV, disp);
3767                         M_JMP(REG_ZERO, REG_ITMP3);
3768                 }
3769         }
3770
3771         /* generate ArrayIndexOutOfBoundsException stubs */
3772
3773         xcodeptr = NULL;
3774
3775         for (bref = cd->xboundrefs; bref != NULL; bref = bref->next) {
3776                 gen_resolvebranch((u1*) cd->mcodebase + bref->branchpos,
3777                                   bref->branchpos,
3778                                                   (u1*) mcodeptr - cd->mcodebase);
3779
3780                 MCODECHECK(18);
3781
3782                 /* move index register into REG_ITMP1 */
3783
3784                 M_MOV(bref->reg, REG_ITMP1);
3785                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3786
3787                 if (xcodeptr != NULL) {
3788                         disp = xcodeptr - mcodeptr - 1;
3789                         M_BR(disp);
3790
3791                 } else {
3792                         xcodeptr = mcodeptr;
3793
3794                         M_MOV(REG_PV, rd->argintregs[0]);
3795                         M_MOV(REG_SP, rd->argintregs[1]);
3796
3797                         if (m->isleafmethod)
3798                                 M_MOV(REG_RA, rd->argintregs[2]);
3799                         else
3800                                 M_ALD(rd->argintregs[2],
3801                                           REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
3802
3803                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3804                         M_MOV(REG_ITMP1, rd->argintregs[4]);
3805
3806                         M_LDA(REG_SP, REG_SP, -2 * 8);
3807                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3808
3809                         if (m->isleafmethod)
3810                                 M_AST(REG_RA, REG_SP, 1 * 8);
3811
3812                         disp = dseg_addaddress(cd, stacktrace_inline_arrayindexoutofboundsexception);
3813                         M_ALD(REG_PV, REG_PV, disp);
3814                         M_JSR(REG_RA, REG_PV);
3815                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3816                         M_LDA(REG_PV, REG_RA, -disp);
3817
3818                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3819
3820                         if (m->isleafmethod)
3821                                 M_ALD(REG_RA, REG_SP, 1 * 8);
3822
3823                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3824                         M_LDA(REG_SP, REG_SP, 2 * 8);
3825
3826                         disp = dseg_addaddress(cd, asm_handle_exception);
3827                         M_ALD(REG_ITMP3, REG_PV, disp);
3828                         M_JMP(REG_ZERO, REG_ITMP3);
3829                 }
3830         }
3831
3832         /* generate ArrayStoreException stubs */
3833
3834         xcodeptr = NULL;
3835
3836         for (bref = cd->xstorerefs; bref != NULL; bref = bref->next) {
3837                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3838                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3839                                                           bref->branchpos,
3840                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3841                         continue;
3842                 }
3843
3844                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3845                                   bref->branchpos,
3846                                                   (u1 *) mcodeptr - cd->mcodebase);
3847
3848                 MCODECHECK(16);
3849
3850                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3851
3852                 if (xcodeptr != NULL) {
3853                         disp = xcodeptr - mcodeptr - 1;
3854                         M_BR(disp);
3855
3856                 } else {
3857                         xcodeptr = mcodeptr;
3858
3859                         M_MOV(REG_PV, rd->argintregs[0]);
3860                         M_MOV(REG_SP, rd->argintregs[1]);
3861                         M_ALD(rd->argintregs[2],
3862                                   REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
3863                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3864
3865                         M_LDA(REG_SP, REG_SP, -1 * 8);
3866                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3867
3868                         disp = dseg_addaddress(cd, stacktrace_inline_arraystoreexception);
3869                         M_ALD(REG_PV, REG_PV, disp);
3870                         M_JSR(REG_RA, REG_PV);
3871                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3872                         M_LDA(REG_PV, REG_RA, -disp);
3873
3874                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3875
3876                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3877                         M_LDA(REG_SP, REG_SP, 1 * 8);
3878
3879                         disp = dseg_addaddress(cd, asm_handle_exception);
3880                         M_ALD(REG_ITMP3, REG_PV, disp);
3881                         M_JMP(REG_ZERO, REG_ITMP3);
3882                 }
3883         }
3884
3885         /* generate ClassCastException stubs */
3886
3887         xcodeptr = NULL;
3888
3889         for (bref = cd->xcastrefs; bref != NULL; bref = bref->next) {
3890                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3891                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3892                                                           bref->branchpos,
3893                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3894                         continue;
3895                 }
3896
3897                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3898                                   bref->branchpos,
3899                                                   (u1 *) mcodeptr - cd->mcodebase);
3900
3901                 MCODECHECK(18);
3902
3903                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3904
3905                 if (xcodeptr != NULL) {
3906                         disp = xcodeptr - mcodeptr - 1;
3907                         M_BR(disp);
3908
3909                 } else {
3910                         xcodeptr = mcodeptr;
3911
3912                         M_MOV(REG_PV, rd->argintregs[0]);
3913                         M_MOV(REG_SP, rd->argintregs[1]);
3914
3915                         if (m->isleafmethod)
3916                                 M_MOV(REG_RA, rd->argintregs[2]);
3917                         else
3918                                 M_ALD(rd->argintregs[2],
3919                                           REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
3920
3921                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3922
3923                         M_LDA(REG_SP, REG_SP, -2 * 8);
3924                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3925
3926                         if (m->isleafmethod)
3927                                 M_AST(REG_RA, REG_SP, 1 * 8);
3928
3929                         disp = dseg_addaddress(cd, stacktrace_inline_classcastexception);
3930                         M_ALD(REG_PV, REG_PV, disp);
3931                         M_JSR(REG_RA, REG_PV);
3932                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3933                         M_LDA(REG_PV, REG_RA, -disp);
3934
3935                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3936
3937                         if (m->isleafmethod)
3938                                 M_ALD(REG_RA, REG_SP, 1 * 8);
3939
3940                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3941                         M_LDA(REG_SP, REG_SP, 2 * 8);
3942
3943                         disp = dseg_addaddress(cd, asm_handle_exception);
3944                         M_ALD(REG_ITMP3, REG_PV, disp);
3945                         M_JMP(REG_ZERO, REG_ITMP3);
3946                 }
3947         }
3948
3949         /* generate NullPointerException stubs */
3950
3951         xcodeptr = NULL;
3952
3953         for (bref = cd->xnullrefs; bref != NULL; bref = bref->next) {
3954                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3955                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3956                                                           bref->branchpos,
3957                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3958                         continue;
3959                 }
3960
3961                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3962                                   bref->branchpos,
3963                                                   (u1 *) mcodeptr - cd->mcodebase);
3964
3965                 MCODECHECK(18);
3966
3967                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3968
3969                 if (xcodeptr != NULL) {
3970                         disp = xcodeptr - mcodeptr - 1;
3971                         M_BR(disp);
3972
3973                 } else {
3974                         xcodeptr = mcodeptr;
3975
3976                         M_MOV(REG_PV, rd->argintregs[0]);
3977                         M_MOV(REG_SP, rd->argintregs[1]);
3978
3979                         if (m->isleafmethod)
3980                                 M_MOV(REG_RA, rd->argintregs[2]);
3981                         else
3982                                 M_ALD(rd->argintregs[2],
3983                                           REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
3984
3985                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
3986
3987                         M_LDA(REG_SP, REG_SP, -2 * 8);
3988                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3989
3990                         if (m->isleafmethod)
3991                                 M_AST(REG_RA, REG_SP, 1 * 8);
3992
3993                         disp = dseg_addaddress(cd, stacktrace_inline_nullpointerexception);
3994                         M_ALD(REG_PV, REG_PV, disp);
3995                         M_JSR(REG_RA, REG_PV);
3996                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3997                         M_LDA(REG_PV, REG_RA, -disp);
3998
3999                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
4000
4001                         if (m->isleafmethod)
4002                                 M_ALD(REG_RA, REG_SP, 1 * 8);
4003
4004                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
4005                         M_LDA(REG_SP, REG_SP, 2 * 8);
4006
4007                         disp = dseg_addaddress(cd, asm_handle_exception);
4008                         M_ALD(REG_ITMP3, REG_PV, disp);
4009                         M_JMP(REG_ZERO, REG_ITMP3);
4010                 }
4011         }
4012
4013         /* generate exception check stubs */
4014
4015         xcodeptr = NULL;
4016
4017         for (bref = cd->xexceptionrefs; bref != NULL; bref = bref->next) {
4018                 if ((cd->exceptiontablelength == 0) && (xcodeptr != NULL)) {
4019                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
4020                                                           bref->branchpos,
4021                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
4022                         continue;
4023                 }
4024
4025                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
4026                                   bref->branchpos,
4027                                                   (u1 *) mcodeptr - cd->mcodebase);
4028
4029                 MCODECHECK(16);
4030
4031                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
4032
4033                 if (xcodeptr != NULL) {
4034                         disp = xcodeptr - mcodeptr - 1;
4035                         M_BR(disp);
4036
4037                 } else {
4038                         xcodeptr = mcodeptr;
4039
4040                         M_MOV(REG_PV, rd->argintregs[0]);
4041                         M_MOV(REG_SP, rd->argintregs[1]);
4042                         M_ALD(rd->argintregs[2],
4043                                   REG_SP, parentargs_base * 8 - SIZEOF_VOID_P);
4044                         M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
4045
4046                         M_LDA(REG_SP, REG_SP, -1 * 8);
4047                         M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
4048
4049                         disp = dseg_addaddress(cd, stacktrace_inline_fillInStackTrace);
4050                         M_ALD(REG_PV, REG_PV, disp);
4051                         M_JSR(REG_RA, REG_PV);
4052                         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4053                         M_LDA(REG_PV, REG_RA, -disp);
4054
4055                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
4056
4057                         M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
4058                         M_LDA(REG_SP, REG_SP, 1 * 8);
4059
4060                         disp = dseg_addaddress(cd, asm_handle_exception);
4061                         M_ALD(REG_ITMP3, REG_PV, disp);
4062                         M_JMP(REG_ZERO, REG_ITMP3);
4063                 }
4064         }
4065
4066         /* generate patcher stub call code */
4067
4068         {
4069                 patchref *pref;
4070                 u4        mcode;
4071                 s4       *tmpmcodeptr;
4072
4073                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4074                         /* check code segment size */
4075
4076                         MCODECHECK(30);
4077
4078                         /* Get machine code which is patched back in later. The call is   */
4079                         /* 1 instruction word long.                                       */
4080
4081                         xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
4082                         mcode = *xcodeptr;
4083
4084                         /* patch in the call to call the following code (done at compile  */
4085                         /* time)                                                          */
4086
4087                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
4088                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
4089
4090                         M_BSR(REG_ITMP3, tmpmcodeptr - (xcodeptr + 1));
4091
4092                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
4093
4094                         /* create stack frame */
4095
4096                         M_LSUB_IMM(REG_SP, 6 * 8, REG_SP);
4097
4098                         /* move return address onto stack */
4099
4100                         M_AST(REG_ITMP3, REG_SP, 5 * 8);
4101
4102                         /* move pointer to java_objectheader onto stack */
4103
4104 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4105                         /* create a virtual java_objectheader */
4106
4107                         (void) dseg_addaddress(cd, get_dummyLR());          /* monitorPtr */
4108                         disp = dseg_addaddress(cd, NULL);                   /* vftbl      */
4109
4110                         M_LDA(REG_ITMP3, REG_PV, disp);
4111                         M_AST(REG_ITMP3, REG_SP, 4 * 8);
4112 #else
4113                         M_AST(REG_ZERO, REG_SP, 4 * 8);
4114 #endif
4115
4116                         /* move machine code onto stack */
4117
4118                         disp = dseg_adds4(cd, mcode);
4119                         M_ILD(REG_ITMP3, REG_PV, disp);
4120                         M_IST(REG_ITMP3, REG_SP, 3 * 8);
4121
4122                         /* move class/method/field reference onto stack */
4123
4124                         disp = dseg_addaddress(cd, pref->ref);
4125                         M_ALD(REG_ITMP3, REG_PV, disp);
4126                         M_AST(REG_ITMP3, REG_SP, 2 * 8);
4127
4128                         /* move data segment displacement onto stack */
4129
4130                         disp = dseg_adds4(cd, pref->disp);
4131                         M_ILD(REG_ITMP3, REG_PV, disp);
4132                         M_IST(REG_ITMP3, REG_SP, 1 * 8);
4133
4134                         /* move patcher function pointer onto stack */
4135
4136                         disp = dseg_addaddress(cd, pref->patcher);
4137                         M_ALD(REG_ITMP3, REG_PV, disp);
4138                         M_AST(REG_ITMP3, REG_SP, 0 * 8);
4139
4140                         disp = dseg_addaddress(cd, asm_wrapper_patcher);
4141                         M_ALD(REG_ITMP3, REG_PV, disp);
4142                         M_JMP(REG_ZERO, REG_ITMP3);
4143                 }
4144         }
4145         }
4146
4147         codegen_finish(m, cd, (s4) ((u1 *) mcodeptr - cd->mcodebase));
4148 }
4149
4150
4151 /* createcompilerstub **********************************************************
4152
4153    Creates a stub routine which calls the compiler.
4154
4155 *******************************************************************************/
4156
4157 #define COMPSTUBSIZE    3
4158
4159 functionptr createcompilerstub(methodinfo *m)
4160 {
4161         u8 *s = CNEW(u8, COMPSTUBSIZE);     /* memory to hold the stub            */
4162         s4 *mcodeptr = (s4 *) s;            /* code generation pointer            */
4163
4164                                             /* code for the stub                  */
4165         M_ALD(REG_PV, REG_PV, 16);          /* load pointer to the compiler       */
4166         M_JMP(0, REG_PV);                   /* jump to the compiler, return address
4167                                                in reg 0 is used as method pointer */
4168         s[1] = (ptrint) m;                  /* literals to be adressed            */
4169         s[2] = (ptrint) asm_call_jit_compiler; /* jump directly via PV from above */
4170
4171 #if defined(STATISTICS)
4172         if (opt_stat)
4173                 count_cstub_len += COMPSTUBSIZE * 8;
4174 #endif
4175
4176         return (functionptr) s;
4177 }
4178
4179
4180 /* createnativestub ************************************************************
4181
4182    Creates a stub routine which calls a native method.
4183
4184 *******************************************************************************/
4185
4186 functionptr createnativestub(functionptr f, methodinfo *m, codegendata *cd,
4187                                                          registerdata *rd, methoddesc *nmd)
4188 {
4189         s4         *mcodeptr;               /* code generation pointer            */
4190         s4          stackframesize;         /* size of stackframe if needed       */
4191         methoddesc *md;
4192         s4          nativeparams;
4193         s4          i, j;                   /* count variables                    */
4194         s4          t;
4195         s4          s1, s2, disp;
4196         s4          funcdisp;               /* displacement of the function       */
4197
4198         /* initialize variables */
4199
4200         md = m->parseddesc;
4201         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
4202
4203
4204         /* calculate stack frame size */
4205
4206         stackframesize =
4207                 1 +                             /* return address                     */
4208                 sizeof(stackframeinfo) / SIZEOF_VOID_P +
4209                 1 +                             /* methodinfo for call trace          */
4210                 (md->paramcount > INT_ARG_CNT ? INT_ARG_CNT : md->paramcount) +
4211                 nmd->memuse;
4212
4213
4214         /* create method header */
4215
4216         (void) dseg_addaddress(cd, m);                          /* MethodPointer  */
4217         (void) dseg_adds4(cd, stackframesize * 8);              /* FrameSize      */
4218         (void) dseg_adds4(cd, 0);                               /* IsSync         */
4219         (void) dseg_adds4(cd, 0);                               /* IsLeaf         */
4220         (void) dseg_adds4(cd, 0);                               /* IntSave        */
4221         (void) dseg_adds4(cd, 0);                               /* FltSave        */
4222         (void) dseg_addlinenumbertablesize(cd);
4223         (void) dseg_adds4(cd, 0);                               /* ExTableSize    */
4224
4225
4226         /* initialize mcode variables */
4227
4228         mcodeptr = (s4 *) cd->mcodebase;
4229         cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize);
4230
4231
4232         /* generate stub code */
4233
4234         M_LDA(REG_SP, REG_SP, -stackframesize * 8);
4235         M_AST(REG_RA, REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
4236
4237
4238         /* call trace function */
4239
4240         if (runverbose) {
4241                 /* save integer argument registers */
4242
4243                 for (i = 0, j = 1; i < md->paramcount && i < INT_ARG_CNT; i++) {
4244                         if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
4245                                 M_LST(rd->argintregs[i], REG_SP, j * 8);
4246                                 j++;
4247                         }
4248                 }
4249
4250                 /* save and copy float arguments into integer registers */
4251
4252                 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4253                         t = md->paramtypes[i].type;
4254
4255                         if (IS_FLT_DBL_TYPE(t)) {
4256                                 if (IS_2_WORD_TYPE(t)) {
4257                                         M_DST(rd->argfltregs[i], REG_SP, j * 8);
4258                                         M_LLD(rd->argintregs[i], REG_SP, j * 8);
4259                                 } else {
4260                                         M_FST(rd->argfltregs[i], REG_SP, j * 8);
4261                                         M_ILD(rd->argintregs[i], REG_SP, j * 8);
4262                                 }
4263                                 j++;
4264                         }
4265                 }
4266
4267                 disp = dseg_addaddress(cd, m);
4268                 M_ALD(REG_ITMP1, REG_PV, disp);
4269                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
4270                 disp = dseg_addaddress(cd, builtin_trace_args);
4271                 M_ALD(REG_PV, REG_PV, disp);
4272                 M_JSR(REG_RA, REG_PV);
4273                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4274                 M_LDA(REG_PV, REG_RA, -disp);
4275
4276                 for (i = 0, j = 1; i < md->paramcount && i < INT_ARG_CNT; i++) {
4277                         if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
4278                                 M_LLD(rd->argintregs[i], REG_SP, j * 8);
4279                                 j++;
4280                         }
4281                 }
4282
4283                 for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4284                         t = md->paramtypes[i].type;
4285
4286                         if (IS_FLT_DBL_TYPE(t)) {
4287                                 if (IS_2_WORD_TYPE(t)) {
4288                                         M_DLD(rd->argfltregs[i], REG_SP, j * 8);
4289                                 } else {
4290                                         M_FLD(rd->argfltregs[i], REG_SP, j * 8);
4291                                 }
4292                                 j++;
4293                         }
4294                 }
4295         }
4296
4297         /* get function address (this must happen before the stackframeinfo) */
4298
4299         funcdisp = dseg_addaddress(cd, f);
4300
4301 #if !defined(ENABLE_STATICVM)
4302         if (f == NULL) {
4303                 codegen_addpatchref(cd, mcodeptr, PATCHER_resolve_native, m, funcdisp);
4304
4305                 if (opt_showdisassemble)
4306                         M_NOP;
4307         }
4308 #endif
4309
4310
4311         /* save integer and float argument registers */
4312
4313         for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
4314                 if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
4315                         M_LST(rd->argintregs[i], REG_SP, j * 8);
4316                         j++;
4317                 }
4318         }
4319
4320         for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4321                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
4322                         M_DST(rd->argfltregs[i], REG_SP, j * 8);
4323                         j++;
4324                 }
4325         }
4326
4327         /* create native stackframe info */
4328
4329         M_AADD_IMM(REG_SP,
4330                            stackframesize * 8 - SIZEOF_VOID_P - sizeof(stackframeinfo),
4331                            rd->argintregs[0]);
4332         M_MOV(REG_PV, rd->argintregs[1]);
4333         M_AADD_IMM(REG_SP, stackframesize * 8, rd->argintregs[2]);
4334         M_ALD(rd->argintregs[3], REG_SP, stackframesize * 8 - SIZEOF_VOID_P);
4335         disp = dseg_addaddress(cd, stacktrace_create_native_stackframeinfo);
4336         M_ALD(REG_PV, REG_PV, disp);
4337         M_JSR(REG_RA, REG_PV);
4338         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4339         M_LDA(REG_PV, REG_RA, -disp);
4340
4341         /* restore integer and float argument registers */
4342
4343         for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
4344                 if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
4345                         M_LLD(rd->argintregs[i], REG_SP, j * 8);
4346                         j++;
4347                 }
4348         }
4349
4350         for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
4351                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
4352                         M_DLD(rd->argfltregs[i], REG_SP, j * 8);
4353                         j++;
4354                 }
4355         }
4356
4357
4358         /* copy or spill arguments to new locations */
4359
4360         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
4361                 t = md->paramtypes[i].type;
4362
4363                 if (IS_INT_LNG_TYPE(t)) {
4364                         if (!md->params[i].inmemory) {
4365                                 s1 = rd->argintregs[md->params[i].regoff];
4366
4367                                 if (!nmd->params[j].inmemory) {
4368                                         s2 = rd->argintregs[nmd->params[j].regoff];
4369                                         M_INTMOVE(s1, s2);
4370
4371                                 } else {
4372                                         s2 = nmd->params[j].regoff;
4373                                         M_LST(s1, REG_SP, s2 * 8);
4374                                 }
4375
4376                         } else {
4377                                 s1 = md->params[i].regoff + stackframesize;
4378                                 s2 = nmd->params[j].regoff;
4379                                 M_LLD(REG_ITMP1, REG_SP, s1 * 8);
4380                                 M_LST(REG_ITMP1, REG_SP, s2 * 8);
4381                         }
4382
4383                 } else {
4384                         if (!md->params[i].inmemory) {
4385                                 s1 = rd->argfltregs[md->params[i].regoff];
4386
4387                                 if (!nmd->params[j].inmemory) {
4388                                         s2 = rd->argfltregs[nmd->params[j].regoff];
4389                                         M_FLTMOVE(s1, s2);
4390
4391                                 } else {
4392                                         s2 = nmd->params[j].regoff;
4393                                         if (IS_2_WORD_TYPE(t))
4394                                                 M_DST(s1, REG_SP, s2 * 8);
4395                                         else
4396                                                 M_FST(s1, REG_SP, s2 * 8);
4397                                 }
4398
4399                         } else {
4400                                 s1 = md->params[i].regoff + stackframesize;
4401                                 s2 = nmd->params[j].regoff;
4402                                 M_DLD(REG_FTMP1, REG_SP, s1 * 8);
4403                                 if (IS_2_WORD_TYPE(t))
4404                                         M_DST(REG_FTMP1, REG_SP, s2 * 8);
4405                                 else
4406                                         M_FST(REG_FTMP1, REG_SP, s2 * 8);
4407                         }
4408                 }
4409         }
4410
4411         /* put class into second argument register */
4412
4413         if (m->flags & ACC_STATIC) {
4414                 disp = dseg_addaddress(cd, m->class);
4415                 M_ALD(rd->argintregs[1], REG_PV, disp);
4416         }
4417
4418         /* put env into first argument register */
4419
4420         disp = dseg_addaddress(cd, &env);
4421         M_ALD(rd->argintregs[0], REG_PV, disp);
4422
4423         /* do the native function call */
4424
4425         M_ALD(REG_PV, REG_PV, funcdisp);
4426         M_JSR(REG_RA, REG_PV);              /* call native method                 */
4427         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4428         M_LDA(REG_PV, REG_RA, -disp);       /* recompute pv from ra               */
4429
4430         /* save return value */
4431
4432         if (IS_INT_LNG_TYPE(md->returntype.type))
4433                 M_LST(REG_RESULT, REG_SP, 0 * 8);
4434         else
4435                 M_DST(REG_FRESULT, REG_SP, 0 * 8);
4436
4437         /* remove native stackframe info */
4438
4439         M_AADD_IMM(REG_SP,
4440                            stackframesize * 8 - SIZEOF_VOID_P - sizeof(stackframeinfo),
4441                            rd->argintregs[0]);
4442         disp = dseg_addaddress(cd, stacktrace_remove_stackframeinfo);
4443         M_ALD(REG_PV, REG_PV, disp);
4444         M_JSR(REG_RA, REG_PV);
4445         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4446         M_LDA(REG_PV, REG_RA, -disp);
4447
4448         /* call finished trace */
4449
4450         if (runverbose) {
4451                 disp = dseg_addaddress(cd, m);
4452                 M_ALD(rd->argintregs[0], REG_PV, disp);
4453
4454                 M_MOV(REG_RESULT, rd->argintregs[1]);
4455                 M_FMOV(REG_FRESULT, rd->argfltregs[2]);
4456                 M_FMOV(REG_FRESULT, rd->argfltregs[3]);
4457
4458                 disp = dseg_addaddress(cd, builtin_displaymethodstop);
4459                 M_ALD(REG_PV, REG_PV, disp);
4460                 M_JSR(REG_RA, REG_PV);
4461                 disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4462                 M_LDA(REG_PV, REG_RA, -disp);
4463         }
4464
4465         /* check for exception */
4466
4467 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4468         disp = dseg_addaddress(cd, builtin_get_exceptionptrptr);
4469         M_ALD(REG_PV, REG_PV, disp);
4470         M_JSR(REG_RA, REG_PV);
4471         disp = (s4) ((u1 *) mcodeptr - cd->mcodebase);
4472         M_LDA(REG_PV, REG_RA, -disp);
4473         M_MOV(REG_RESULT, REG_ITMP3);
4474 #else
4475         disp = dseg_addaddress(cd, &_exceptionptr);
4476         M_ALD(REG_RESULT, REG_PV, disp);    /* get address of exceptionptr        */
4477 #endif
4478         M_ALD(REG_ITMP1, REG_ITMP3, 0);     /* load exception into reg. itmp1     */
4479
4480         /* restore return value */
4481
4482         if (IS_INT_LNG_TYPE(md->returntype.type))
4483                 M_LLD(REG_RESULT, REG_SP, 0 * 8);
4484         else
4485                 M_DLD(REG_FRESULT, REG_SP, 0 * 8);
4486
4487         M_BNEZ(REG_ITMP1, 3);               /* if no exception then return        */
4488
4489         M_ALD(REG_RA, REG_SP, (stackframesize - 1) * 8); /* load return address   */
4490         M_LDA(REG_SP, REG_SP, stackframesize * 8);
4491         M_RET(REG_ZERO, REG_RA);            /* return to caller                   */
4492
4493         /* handle exception */
4494
4495         M_AST(REG_ZERO, REG_ITMP3, 0);      /* store NULL into exceptionptr       */
4496
4497         M_ALD(REG_RA, REG_SP, (stackframesize - 1) * 8); /* load return address   */
4498         M_LDA(REG_ITMP2, REG_RA, -4);       /* move fault address into reg. itmp2 */
4499
4500         M_LDA(REG_SP, REG_SP, stackframesize * 8);
4501
4502         disp = dseg_addaddress(cd, asm_handle_nat_exception);
4503         M_ALD(REG_ITMP3, REG_PV, disp);     /* load asm exception handler address */
4504         M_JMP(REG_ZERO, REG_ITMP3);         /* jump to asm exception handler      */
4505
4506
4507         /* process patcher calls **************************************************/
4508
4509         {
4510                 patchref *pref;
4511                 s4       *xcodeptr;
4512                 u4        mcode;
4513                 s4       *tmpmcodeptr;
4514
4515                 /* there can only be one <clinit> ref entry                           */
4516                 pref = cd->patchrefs;
4517
4518                 for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
4519                         /* Get machine code which is patched back in later. The call is   */
4520                         /* 1 instruction word long.                                       */
4521
4522                         xcodeptr = (s4 *) (cd->mcodebase + pref->branchpos);
4523                         mcode = (u4) *xcodeptr;
4524
4525                         /* patch in the call to call the following code (done at compile  */
4526                         /* time)                                                          */
4527
4528                         tmpmcodeptr = mcodeptr;         /* save current mcodeptr          */
4529                         mcodeptr = xcodeptr;            /* set mcodeptr to patch position */
4530
4531                         M_BSR(REG_ITMP3, tmpmcodeptr - (xcodeptr + 1));
4532
4533                         mcodeptr = tmpmcodeptr;         /* restore the current mcodeptr   */
4534
4535                         /* create stack frame                                             */
4536
4537                         M_LSUB_IMM(REG_SP, 6 * 8, REG_SP);
4538
4539                         /* move return address onto stack */
4540
4541                         M_AST(REG_ITMP3, REG_SP, 5 * 8);
4542
4543                         /* move pointer to java_objectheader onto stack */
4544
4545 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4546                         /* create a virtual java_objectheader */
4547
4548                         (void) dseg_addaddress(cd, get_dummyLR());          /* monitorPtr */
4549                         disp = dseg_addaddress(cd, NULL);                   /* vftbl      */
4550
4551                         M_LDA(REG_ITMP3, REG_PV, disp);
4552                         M_AST(REG_ITMP3, REG_SP, 4 * 8);
4553 #else
4554                         M_AST(REG_ZERO, REG_SP, 4 * 8);
4555 #endif
4556
4557                         /* move machine code onto stack */
4558
4559                         disp = dseg_adds4(cd, mcode);
4560                         M_ILD(REG_ITMP3, REG_PV, disp);
4561                         M_IST(REG_ITMP3, REG_SP, 3 * 8);
4562
4563                         /* move class/method/field reference onto stack */
4564
4565                         disp = dseg_addaddress(cd, pref->ref);
4566                         M_ALD(REG_ITMP3, REG_PV, disp);
4567                         M_AST(REG_ITMP3, REG_SP, 2 * 8);
4568
4569                         /* move data segment displacement onto stack */
4570
4571                         disp = dseg_adds4(cd, pref->disp);
4572                         M_ILD(REG_ITMP3, REG_PV, disp);
4573                         M_IST(REG_ITMP3, REG_SP, 1 * 8);
4574
4575                         /* move patcher function pointer onto stack */
4576
4577                         disp = dseg_addaddress(cd, pref->patcher);
4578                         M_ALD(REG_ITMP3, REG_PV, disp);
4579                         M_AST(REG_ITMP3, REG_SP, 0 * 8);
4580
4581                         disp = dseg_addaddress(cd, asm_wrapper_patcher);
4582                         M_ALD(REG_ITMP3, REG_PV, disp);
4583                         M_JMP(REG_ZERO, REG_ITMP3);
4584                 }
4585         }
4586
4587         codegen_finish(m, cd, (s4) ((u1 *) mcodeptr - cd->mcodebase));
4588
4589         return m->entrypoint;
4590 }
4591
4592
4593 /*
4594  * These are local overrides for various environment variables in Emacs.
4595  * Please do not remove this and leave it at the end of the file, where
4596  * Emacs will automagically detect them.
4597  * ---------------------------------------------------------------------
4598  * Local variables:
4599  * mode: c
4600  * indent-tabs-mode: t
4601  * c-basic-offset: 4
4602  * tab-width: 4
4603  * End:
4604  */