src/vm/jit/alpha/codegen.c

   1 /* jit/alpha/codegen.c - machine code generator for alpha
   2
   3    Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
   4    Institut f. Computersprachen, TU Wien
   5    R. Grafl, A. Krall, C. Kruegel, C. Oates, R. Obermaisser, M. Probst,
   6    S. Ring, E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich,
   7    J. Wenninger
   8
   9    This file is part of CACAO.
  10
  11    This program is free software; you can redistribute it and/or
  12    modify it under the terms of the GNU General Public License as
  13    published by the Free Software Foundation; either version 2, or (at
  14    your option) any later version.
  15
  16    This program is distributed in the hope that it will be useful, but
  17    WITHOUT ANY WARRANTY; without even the implied warranty of
  18    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19    General Public License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software
  23    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
  24    02111-1307, USA.
  25
  26    Contact: cacao@complang.tuwien.ac.at
  27
  28    Authors: Andreas Krall
  29             Reinhard Grafl
  30
  31    $Id: codegen.c 1347 2004-07-21 23:29:39Z twisti $
  32
  33 */
  34
  35
  36 #include "global.h"
  37 #include <stdio.h>
  38 #include <signal.h>
  39 #include "types.h"
  40 #include "main.h"
  41 #include "jit/alpha/codegen.h"
  42 #include "jit/jit.h"
  43 #include "jit/parse.h"
  44 #include "jit/reg.h"
  45 #include "builtin.h"
  46 #include "asmpart.h"
  47 #include "jni.h"
  48 #include "loader.h"
  49 #include "tables.h"
  50 #include "native.h"
  51 #include "main.h"
  52
  53 /* include independent code generation stuff */
  54 #include "jit/codegen.inc"
  55 #include "jit/reg.inc"
  56
  57
  58 /* *****************************************************************************
  59
  60 Datatypes and Register Allocations:
  61 -----------------------------------
  62
  63 On 64-bit-machines (like the Alpha) all operands are stored in the
  64 registers in a 64-bit form, even when the correspondig JavaVM  operands
  65 only need 32 bits. This is done by a canonical representation:
  66
  67 32-bit integers are allways stored as sign-extended 64-bit values (this
  68 approach is directly supported by the Alpha architecture and is very easy
  69 to implement).
  70
  71 32-bit-floats are stored in a 64-bit doubleprecision register by simply
  72 expanding the exponent and mantissa with zeroes. (also supported by the
  73 architecture)
  74
  75
  76 Stackframes:
  77
  78 The calling conventions and the layout of the stack is  explained in detail
  79 in the documention file: calling.doc
  80
  81 *******************************************************************************/
  82
  83
  84 /* register descripton - array ************************************************/
  85
  86 /* #define REG_RES   0         reserved register for OS or code generator     */
  87 /* #define REG_RET   1         return value register                          */
  88 /* #define REG_EXC   2         exception value register (only old jit)        */
  89 /* #define REG_SAV   3         (callee) saved register                        */
  90 /* #define REG_TMP   4         scratch temporary register (caller saved)      */
  91 /* #define REG_ARG   5         argument register (caller saved)               */
  92
  93 /* #define REG_END   -1        last entry in tables */
  94
  95 int nregdescint[] = {
  96         REG_RET, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
  97         REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
  98         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP,
  99         REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES, REG_RES,
 100         REG_END };
 101
 102 /* for use of reserved registers, see comment above */
 103
 104 int nregdescfloat[] = {
 105         REG_RET, REG_TMP, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV, REG_SAV,
 106         REG_SAV, REG_SAV, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_TMP,
 107         REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_ARG, REG_TMP, REG_TMP,
 108         REG_TMP, REG_TMP, REG_TMP, REG_TMP, REG_RES, REG_RES, REG_RES, REG_RES,
 109         REG_END };
 110
 111 /* for use of reserved registers, see comment above */
 112
 113
 114 /* NullPointerException handlers and exception handling initialisation        */
 115
 116 typedef struct sigctx_struct {
 117
 118         long          sc_onstack;           /* sigstack state to restore          */
 119         long          sc_mask;              /* signal mask to restore             */
 120         long          sc_pc;                /* pc at time of signal               */
 121         long          sc_ps;                /* psl to retore                      */
 122         long          sc_regs[32];          /* processor regs 0 to 31             */
 123         long          sc_ownedfp;           /* fp has been used                   */
 124         long          sc_fpregs[32];        /* fp regs 0 to 31                    */
 125         unsigned long sc_fpcr;              /* floating point control register    */
 126         unsigned long sc_fp_control;        /* software fpcr                      */
 127                                             /* rest is unused                     */
 128         unsigned long sc_reserved1, sc_reserved2;
 129         unsigned long sc_ssize;
 130         char          *sc_sbase;
 131         unsigned long sc_traparg_a0;
 132         unsigned long sc_traparg_a1;
 133         unsigned long sc_traparg_a2;
 134         unsigned long sc_fp_trap_pc;
 135         unsigned long sc_fp_trigger_sum;
 136         unsigned long sc_fp_trigger_inst;
 137         unsigned long sc_retcode[2];
 138 } sigctx_struct;
 139
 140
 141 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
 142 void thread_restartcriticalsection(ucontext_t *uc)
 143 {
 144         void *critical;
 145         if ((critical = thread_checkcritical((void*) uc->uc_mcontext.sc_pc)) != NULL)
 146                 uc->uc_mcontext.sc_pc = (u8) critical;
 147 }
 148 #endif
 149
 150 /* NullPointerException signal handler for hardware null pointer check */
 151
 152 void catch_NullPointerException(int sig, int code, sigctx_struct *sigctx)
 153 {
 154         sigset_t nsig;
 155         int      instr;
 156         long     faultaddr;
 157         java_objectheader *xptr;
 158
 159         /* Reset signal handler - necessary for SysV, does no harm for BSD */
 160
 161         instr = *((int*)(sigctx->sc_pc));
 162         faultaddr = sigctx->sc_regs[(instr >> 16) & 0x1f];
 163
 164         if (faultaddr == 0) {
 165                 signal(sig, (void*) catch_NullPointerException); /* reinstall handler */
 166                 sigemptyset(&nsig);
 167                 sigaddset(&nsig, sig);
 168                 sigprocmask(SIG_UNBLOCK, &nsig, NULL);           /* unblock signal    */
 169
 170                 xptr = new_exception(string_java_lang_NullPointerException);
 171
 172                 sigctx->sc_regs[REG_ITMP1_XPTR] = (u8) xptr;
 173                 sigctx->sc_regs[REG_ITMP2_XPC] = sigctx->sc_pc;
 174                 sigctx->sc_pc = (u8) asm_handle_exception;
 175                 return;
 176
 177         } else {
 178                 faultaddr += (long) ((instr << 16) >> 16);
 179                 fprintf(stderr, "faulting address: 0x%016lx\n", faultaddr);
 180                 panic("Stack overflow");
 181         }
 182 }
 183
 184
 185 #ifdef __osf__
 186
 187 void init_exceptions(void)
 188 {
 189
 190 #else /* Linux */
 191
 192 /* Linux on Digital Alpha needs an initialisation of the ieee floating point
 193         control for IEEE compliant arithmetic (option -mieee of GCC). Under
 194         Digital Unix this is done automatically.
 195 */
 196
 197 #include <asm/fpu.h>
 198
 199 extern unsigned long ieee_get_fp_control();
 200 extern void ieee_set_fp_control(unsigned long fp_control);
 201
 202 void init_exceptions(void)
 203 {
 204 /* initialize floating point control */
 205
 206 ieee_set_fp_control(ieee_get_fp_control()
 207                     & ~IEEE_TRAP_ENABLE_INV
 208                     & ~IEEE_TRAP_ENABLE_DZE
 209 /*                  & ~IEEE_TRAP_ENABLE_UNF   we dont want underflow */
 210                     & ~IEEE_TRAP_ENABLE_OVF);
 211 #endif
 212
 213         /* install signal handlers we need to convert to exceptions */
 214
 215         if (!checknull) {
 216 #if defined(SIGSEGV)
 217                 signal(SIGSEGV, (void*) catch_NullPointerException);
 218 #endif
 219
 220 #if defined(SIGBUS)
 221                 signal(SIGBUS, (void*) catch_NullPointerException);
 222 #endif
 223         }
 224 }
 225
 226
 227 /* function gen_mcode **********************************************************
 228
 229         generates machine code
 230
 231 *******************************************************************************/
 232
 233 void codegen(methodinfo *m)
 234 {
 235         s4 len, s1, s2, s3, d;
 236         s4 a;
 237         s4 parentargs_base;
 238         s4             *mcodeptr;
 239         stackptr        src;
 240         varinfo        *var;
 241         basicblock     *bptr;
 242         instruction    *iptr;
 243         exceptiontable *ex;
 244         registerdata   *r;
 245         codegendata    *cd;
 246
 247         /* keep code size smaller */
 248         r = m->registerdata;
 249         cd = m->codegendata;
 250
 251         {
 252         s4 i, p, pa, t, l;
 253         s4 savedregs_num;
 254
 255         savedregs_num = (m->isleafmethod) ? 0 : 1;        /* space to save the RA */
 256
 257         /* space to save used callee saved registers */
 258
 259         savedregs_num += (r->savintregcnt - r->maxsavintreguse);
 260         savedregs_num += (r->savfltregcnt - r->maxsavfltreguse);
 261
 262         parentargs_base = r->maxmemuse + savedregs_num;
 263
 264 #if defined(USE_THREADS)           /* space to save argument of monitor_enter */
 265
 266         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 267                 parentargs_base++;
 268
 269 #endif
 270
 271         /* create method header */
 272
 273         (void) dseg_addaddress(m, m);                           /* MethodPointer  */
 274         (void) dseg_adds4(m, parentargs_base * 8);                 /* FrameSize      */
 275
 276 #if defined(USE_THREADS)
 277
 278         /* IsSync contains the offset relative to the stack pointer for the
 279            argument of monitor_exit used in the exception handler. Since the
 280            offset could be zero and give a wrong meaning of the flag it is
 281            offset by one.
 282         */
 283
 284         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 285                 (void) dseg_adds4(m, (r->maxmemuse + 1) * 8);       /* IsSync         */
 286         else
 287
 288 #endif
 289
 290         (void) dseg_adds4(m, 0);                                /* IsSync         */
 291
 292         (void) dseg_adds4(m, m->isleafmethod);                  /* IsLeaf         */
 293         (void) dseg_adds4(m, r->savintregcnt - r->maxsavintreguse);/* IntSave     */
 294         (void) dseg_adds4(m, r->savfltregcnt - r->maxsavfltreguse);/* FltSave     */
 295
 296         dseg_addlinenumbertablesize(m);
 297
 298         (void) dseg_adds4(m, m->exceptiontablelength);          /* ExTableSize    */
 299
 300         /* create exception table */
 301
 302         for (ex = m->exceptiontable; ex != NULL; ex = ex->down) {
 303                 dseg_addtarget(m, ex->start);
 304                 dseg_addtarget(m, ex->end);
 305                 dseg_addtarget(m, ex->handler);
 306                 (void) dseg_addaddress(m, ex->catchtype);
 307         }
 308
 309         /* initialize mcode variables */
 310
 311         mcodeptr = (s4 *) cd->mcodebase;
 312         cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize);
 313         MCODECHECK(128 + m->paramcount);
 314
 315         /* create stack frame (if necessary) */
 316
 317         if (parentargs_base) {
 318                 M_LDA (REG_SP, REG_SP, -parentargs_base * 8);
 319         }
 320
 321         /* save return address and used callee saved registers */
 322
 323         p = parentargs_base;
 324         if (!m->isleafmethod) {
 325                 p--; M_AST(REG_RA, REG_SP, p * 8);
 326         }
 327         for (i = r->savintregcnt - 1; i >= r->maxsavintreguse; i--) {
 328                 p--; M_LST(r->savintregs[i], REG_SP, p * 8);
 329         }
 330         for (i = r->savfltregcnt - 1; i >= r->maxsavfltreguse; i--) {
 331                 p--; M_DST(r->savfltregs[i], REG_SP, p * 8);
 332         }
 333
 334         /* save monitorenter argument */
 335
 336 #if defined(USE_THREADS)
 337         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 338                 if (m->flags & ACC_STATIC) {
 339                         p = dseg_addaddress(m, m->class);
 340                         M_ALD(REG_ITMP1, REG_PV, p);
 341                         M_AST(REG_ITMP1, REG_SP, r->maxmemuse * 8);
 342
 343                 } else {
 344                         M_AST(r->argintregs[0], REG_SP, r->maxmemuse * 8);
 345                 }
 346         }
 347 #endif
 348
 349         /* copy argument registers to stack and call trace function with pointer
 350            to arguments on stack.
 351         */
 352
 353         if (runverbose) {
 354                 s4 disp;
 355                 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
 356                 M_AST(REG_RA, REG_SP, 1 * 8);
 357
 358                 /* save integer argument registers */
 359                 for (p = 0; /* p < m->paramcount && */ p < INT_ARG_CNT; p++) {
 360                         M_LST(r->argintregs[p], REG_SP,  (2 + p) * 8);
 361                 }
 362
 363                 /* save and copy float arguments into integer registers */
 364                 for (p = 0; /* p < m->paramcount && */ p < FLT_ARG_CNT; p++) {
 365                         t = m->paramtypes[p];
 366
 367                         if (IS_FLT_DBL_TYPE(t)) {
 368                                 if (IS_2_WORD_TYPE(t)) {
 369                                         M_DST(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 370
 371                                 } else {
 372                                         M_FST(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 373                                 }
 374
 375                                 M_LLD(r->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 376
 377                         } else {
 378                                 M_DST(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 379                         }
 380                 }
 381
 382                 p = dseg_addaddress(m, m);
 383                 M_ALD(REG_ITMP1, REG_PV, p);
 384                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
 385                 p = dseg_addaddress(m, (void *) builtin_trace_args);
 386                 M_ALD(REG_PV, REG_PV, p);
 387                 M_JSR(REG_RA, REG_PV);
 388                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 389                 M_LDA(REG_PV, REG_RA, disp);
 390                 M_ALD(REG_RA, REG_SP, 1 * 8);
 391
 392                 for (p = 0; /* p < mparamcount && */ p < INT_ARG_CNT; p++) {
 393                         M_LLD(r->argintregs[p], REG_SP,  (2 + p) * 8);
 394                 }
 395
 396                 for (p = 0; /* p < mparamcount && */ p < FLT_ARG_CNT; p++) {
 397                         t = m->paramtypes[p];
 398
 399                         if (IS_FLT_DBL_TYPE(t)) {
 400                                 if (IS_2_WORD_TYPE(t)) {
 401                                         M_DLD(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 402
 403                                 } else {
 404                                         M_FLD(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 405                                 }
 406
 407                         } else {
 408                                 M_DLD(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
 409                         }
 410                 }
 411
 412                 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
 413         }
 414
 415         /* take arguments out of register or stack frame */
 416
 417         for (p = 0, l = 0; p < m->paramcount; p++) {
 418                 t = m->paramtypes[p];
 419                 var = &(r->locals[l][t]);
 420                 l++;
 421                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 422                         l++;
 423                 if (var->type < 0)
 424                         continue;
 425                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 426                         if (p < INT_ARG_CNT) {                   /* register arguments    */
 427                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 428                                         M_INTMOVE(r->argintregs[p], var->regoff);
 429                                 } else {                             /* reg arg -> spilled    */
 430                                         M_LST(r->argintregs[p], REG_SP, 8 * var->regoff);
 431                                 }
 432
 433                         } else {                                 /* stack arguments       */
 434                                 pa = p - INT_ARG_CNT;
 435                                 if (!(var->flags & INMEMORY)) {      /* stack arg -> register */
 436                                         M_LLD(var->regoff, REG_SP, 8 * (parentargs_base + pa));
 437
 438                                 } else {                             /* stack arg -> spilled  */
 439                                         M_LLD(REG_ITMP1, REG_SP, 8 * (parentargs_base + pa));
 440                                         M_LST(REG_ITMP1, REG_SP, 8 * var->regoff);
 441                                 }
 442                         }
 443
 444                 } else {                                     /* floating args         */
 445                         if (p < FLT_ARG_CNT) {                   /* register arguments    */
 446                                 if (!(var->flags & INMEMORY)) {      /* reg arg -> register   */
 447                                         M_FLTMOVE(r->argfltregs[p], var->regoff);
 448
 449                                 } else {                                         /* reg arg -> spilled    */
 450                                         M_DST(r->argfltregs[p], REG_SP, 8 * var->regoff);
 451                                 }
 452
 453                         } else {                                 /* stack arguments       */
 454                                 pa = p - FLT_ARG_CNT;
 455                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 456                                         M_DLD(var->regoff, REG_SP, 8 * (parentargs_base + pa) );
 457
 458                                 } else {                             /* stack-arg -> spilled  */
 459                                         M_DLD(REG_FTMP1, REG_SP, 8 * (parentargs_base + pa));
 460                                         M_DST(REG_FTMP1, REG_SP, 8 * var->regoff);
 461                                 }
 462                         }
 463                 }
 464         } /* end for */
 465
 466         /* call monitorenter function */
 467
 468 #if defined(USE_THREADS)
 469         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 470                 s4 disp;
 471                 s8 func_enter = (m->flags & ACC_STATIC) ?
 472                         (s8) builtin_staticmonitorenter : (s8) builtin_monitorenter;
 473                 p = dseg_addaddress(m, (void*) func_enter);
 474                 M_ALD(REG_PV, REG_PV, p);
 475                 M_ALD(r->argintregs[0], REG_SP, r->maxmemuse * 8);
 476                 M_JSR(REG_RA, REG_PV);
 477                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
 478                 M_LDA(REG_PV, REG_RA, disp);
 479         }
 480 #endif
 481         }
 482
 483         /* end of header generation */
 484
 485         /* walk through all basic blocks */
 486         for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
 487
 488                 bptr->mpc = (s4) ((u1 *) mcodeptr - cd->mcodebase);
 489
 490                 if (bptr->flags >= BBREACHED) {
 491
 492                 /* branch resolving */
 493
 494                 {
 495                 branchref *brefs;
 496                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 497                         gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
 498                                           brefs->branchpos, bptr->mpc);
 499                         }
 500                 }
 501
 502                 /* copy interface registers to their destination */
 503
 504                 src = bptr->instack;
 505                 len = bptr->indepth;
 506                 MCODECHECK(64+len);
 507                 while (src != NULL) {
 508                         len--;
 509                         if ((len == 0) && (bptr->type != BBTYPE_STD)) {
 510                                 d = reg_of_var(m, src, REG_ITMP1);
 511                                 M_INTMOVE(REG_ITMP1, d);
 512                                 store_reg_to_var_int(src, d);
 513                                 }
 514                         else {
 515                                 d = reg_of_var(m, src, REG_IFTMP);
 516                                 if ((src->varkind != STACKVAR)) {
 517                                         s2 = src->type;
 518                                         if (IS_FLT_DBL_TYPE(s2)) {
 519                                                 if (!(r->interfaces[len][s2].flags & INMEMORY)) {
 520                                                         s1 = r->interfaces[len][s2].regoff;
 521                                                         M_FLTMOVE(s1,d);
 522                                                         }
 523                                                 else {
 524                                                         M_DLD(d, REG_SP, 8 * r->interfaces[len][s2].regoff);
 525                                                         }
 526                                                 store_reg_to_var_flt(src, d);
 527                                                 }
 528                                         else {
 529                                                 if (!(r->interfaces[len][s2].flags & INMEMORY)) {
 530                                                         s1 = r->interfaces[len][s2].regoff;
 531                                                         M_INTMOVE(s1,d);
 532                                                         }
 533                                                 else {
 534                                                         M_LLD(d, REG_SP, 8 * r->interfaces[len][s2].regoff);
 535                                                         }
 536                                                 store_reg_to_var_int(src, d);
 537                                                 }
 538                                         }
 539                                 }
 540                         src = src->prev;
 541                         }
 542
 543                 /* walk through all instructions */
 544
 545                 src = bptr->instack;
 546                 len = bptr->icount;
 547                 for (iptr = bptr->iinstr;
 548                     len > 0;
 549                     src = iptr->dst, len--, iptr++) {
 550
 551         MCODECHECK(64);           /* an instruction usually needs < 64 words      */
 552         switch (iptr->opc) {
 553
 554                 case ICMD_NOP:        /* ...  ==> ...                                 */
 555                         break;
 556
 557                 case ICMD_NULLCHECKPOP: /* ..., objectref  ==> ...                    */
 558
 559                         var_to_reg_int(s1, src, REG_ITMP1);
 560                         M_BEQZ(s1, 0);
 561                         codegen_addxnullrefs(m, mcodeptr);
 562                         break;
 563
 564                 /* constant operations ************************************************/
 565
 566                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 567                                       /* op1 = 0, val.i = constant                    */
 568
 569                         d = reg_of_var(m, iptr->dst, REG_ITMP1);
 570                         ICONST(d, iptr->val.i);
 571                         store_reg_to_var_int(iptr->dst, d);
 572                         break;
 573
 574                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 575                                       /* op1 = 0, val.l = constant                    */
 576
 577                         d = reg_of_var(m, iptr->dst, REG_ITMP1);
 578                         LCONST(d, iptr->val.l);
 579                         store_reg_to_var_int(iptr->dst, d);
 580                         break;
 581
 582                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 583                                       /* op1 = 0, val.f = constant                    */
 584
 585                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
 586                         a = dseg_addfloat(m, iptr->val.f);
 587                         M_FLD(d, REG_PV, a);
 588                         store_reg_to_var_flt(iptr->dst, d);
 589                         break;
 590
 591                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 592                                       /* op1 = 0, val.d = constant                    */
 593
 594                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
 595                         a = dseg_adddouble(m, iptr->val.d);
 596                         M_DLD(d, REG_PV, a);
 597                         store_reg_to_var_flt(iptr->dst, d);
 598                         break;
 599
 600                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 601                                       /* op1 = 0, val.a = constant                    */
 602
 603                         d = reg_of_var(m, iptr->dst, REG_ITMP1);
 604                         if (iptr->val.a) {
 605                                 a = dseg_addaddress(m, iptr->val.a);
 606                                 M_ALD(d, REG_PV, a);
 607                         } else {
 608                                 M_INTMOVE(REG_ZERO, d);
 609                         }
 610                         store_reg_to_var_int(iptr->dst, d);
 611                         break;
 612
 613
 614                 /* load/store operations **********************************************/
 615
 616                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 617                 case ICMD_LLOAD:      /* op1 = local variable                         */
 618                 case ICMD_ALOAD:
 619
 620                         d = reg_of_var(m, iptr->dst, REG_ITMP1);
 621                         if ((iptr->dst->varkind == LOCALVAR) &&
 622                             (iptr->dst->varnum == iptr->op1))
 623                                 break;
 624                         var = &(r->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 625                         if (var->flags & INMEMORY)
 626                                 M_LLD(d, REG_SP, 8 * var->regoff);
 627                         else
 628                                 {M_INTMOVE(var->regoff,d);}
 629                         store_reg_to_var_int(iptr->dst, d);
 630                         break;
 631
 632                 case ICMD_FLOAD:      /* ...  ==> ..., content of local variable      */
 633                 case ICMD_DLOAD:      /* op1 = local variable                         */
 634
 635                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
 636                         if ((iptr->dst->varkind == LOCALVAR) &&
 637                             (iptr->dst->varnum == iptr->op1))
 638                                 break;
 639                         var = &(r->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
 640                         if (var->flags & INMEMORY)
 641                                 M_DLD(d, REG_SP, 8 * var->regoff);
 642                         else
 643                                 {M_FLTMOVE(var->regoff,d);}
 644                         store_reg_to_var_flt(iptr->dst, d);
 645                         break;
 646
 647
 648                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 649                 case ICMD_LSTORE:     /* op1 = local variable                         */
 650                 case ICMD_ASTORE:
 651
 652                         if ((src->varkind == LOCALVAR) &&
 653                             (src->varnum == iptr->op1))
 654                                 break;
 655                         var = &(r->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 656                         if (var->flags & INMEMORY) {
 657                                 var_to_reg_int(s1, src, REG_ITMP1);
 658                                 M_LST(s1, REG_SP, 8 * var->regoff);
 659                                 }
 660                         else {
 661                                 var_to_reg_int(s1, src, var->regoff);
 662                                 M_INTMOVE(s1, var->regoff);
 663                                 }
 664                         break;
 665
 666                 case ICMD_FSTORE:     /* ..., value  ==> ...                          */
 667                 case ICMD_DSTORE:     /* op1 = local variable                         */
 668
 669                         if ((src->varkind == LOCALVAR) &&
 670                             (src->varnum == iptr->op1))
 671                                 break;
 672                         var = &(r->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
 673                         if (var->flags & INMEMORY) {
 674                                 var_to_reg_flt(s1, src, REG_FTMP1);
 675                                 M_DST(s1, REG_SP, 8 * var->regoff);
 676                                 }
 677                         else {
 678                                 var_to_reg_flt(s1, src, var->regoff);
 679                                 M_FLTMOVE(s1, var->regoff);
 680                                 }
 681                         break;
 682
 683
 684                 /* pop/dup/swap operations ********************************************/
 685
 686                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 687
 688                 case ICMD_POP:        /* ..., value  ==> ...                          */
 689                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 690                         break;
 691
 692                 case ICMD_DUP:        /* ..., a ==> ..., a, a                         */
 693                         M_COPY(src, iptr->dst);
 694                         break;
 695
 696                 case ICMD_DUP_X1:     /* ..., a, b ==> ..., b, a, b                   */
 697
 698                         M_COPY(src,       iptr->dst);
 699                         M_COPY(src->prev, iptr->dst->prev);
 700                         M_COPY(iptr->dst, iptr->dst->prev->prev);
 701                         break;
 702
 703                 case ICMD_DUP_X2:     /* ..., a, b, c ==> ..., c, a, b, c             */
 704
 705                         M_COPY(src,             iptr->dst);
 706                         M_COPY(src->prev,       iptr->dst->prev);
 707                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 708                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 709                         break;
 710
 711                 case ICMD_DUP2:       /* ..., a, b ==> ..., a, b, a, b                */
 712
 713                         M_COPY(src,       iptr->dst);
 714                         M_COPY(src->prev, iptr->dst->prev);
 715                         break;
 716
 717                 case ICMD_DUP2_X1:    /* ..., a, b, c ==> ..., b, c, a, b, c          */
 718
 719                         M_COPY(src,             iptr->dst);
 720                         M_COPY(src->prev,       iptr->dst->prev);
 721                         M_COPY(src->prev->prev, iptr->dst->prev->prev);
 722                         M_COPY(iptr->dst,       iptr->dst->prev->prev->prev);
 723                         M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
 724                         break;
 725
 726                 case ICMD_DUP2_X2:    /* ..., a, b, c, d ==> ..., c, d, a, b, c, d    */
 727
 728                         M_COPY(src,                   iptr->dst);
 729                         M_COPY(src->prev,             iptr->dst->prev);
 730                         M_COPY(src->prev->prev,       iptr->dst->prev->prev);
 731                         M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
 732                         M_COPY(iptr->dst,             iptr->dst->prev->prev->prev->prev);
 733                         M_COPY(iptr->dst->prev,       iptr->dst->prev->prev->prev->prev->prev);
 734                         break;
 735
 736                 case ICMD_SWAP:       /* ..., a, b ==> ..., b, a                      */
 737
 738                         M_COPY(src,       iptr->dst->prev);
 739                         M_COPY(src->prev, iptr->dst);
 740                         break;
 741
 742
 743                 /* integer operations *************************************************/
 744
 745                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 746
 747                         var_to_reg_int(s1, src, REG_ITMP1);
 748                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 749                         M_ISUB(REG_ZERO, s1, d);
 750                         store_reg_to_var_int(iptr->dst, d);
 751                         break;
 752
 753                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 754
 755                         var_to_reg_int(s1, src, REG_ITMP1);
 756                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 757                         M_LSUB(REG_ZERO, s1, d);
 758                         store_reg_to_var_int(iptr->dst, d);
 759                         break;
 760
 761                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 762
 763                         var_to_reg_int(s1, src, REG_ITMP1);
 764                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 765                         M_INTMOVE(s1, d);
 766                         store_reg_to_var_int(iptr->dst, d);
 767                         break;
 768
 769                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 770
 771                         var_to_reg_int(s1, src, REG_ITMP1);
 772                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 773                         M_IADD(s1, REG_ZERO, d );
 774                         store_reg_to_var_int(iptr->dst, d);
 775                         break;
 776
 777                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 778
 779                         var_to_reg_int(s1, src, REG_ITMP1);
 780                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 781                         if (has_ext_instr_set) {
 782                                 M_BSEXT(s1, d);
 783                                 }
 784                         else {
 785                                 M_SLL_IMM(s1, 56, d);
 786                                 M_SRA_IMM( d, 56, d);
 787                                 }
 788                         store_reg_to_var_int(iptr->dst, d);
 789                         break;
 790
 791                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 792
 793                         var_to_reg_int(s1, src, REG_ITMP1);
 794                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 795             M_CZEXT(s1, d);
 796                         store_reg_to_var_int(iptr->dst, d);
 797                         break;
 798
 799                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 800
 801                         var_to_reg_int(s1, src, REG_ITMP1);
 802                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 803                         if (has_ext_instr_set) {
 804                                 M_SSEXT(s1, d);
 805                                 }
 806                         else {
 807                                 M_SLL_IMM(s1, 48, d);
 808                                 M_SRA_IMM( d, 48, d);
 809                                 }
 810                         store_reg_to_var_int(iptr->dst, d);
 811                         break;
 812
 813
 814                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 815
 816                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 817                         var_to_reg_int(s2, src, REG_ITMP2);
 818                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 819                         M_IADD(s1, s2, d);
 820                         store_reg_to_var_int(iptr->dst, d);
 821                         break;
 822
 823                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 824                                       /* val.i = constant                             */
 825
 826                         var_to_reg_int(s1, src, REG_ITMP1);
 827                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 828                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 829                                 M_IADD_IMM(s1, iptr->val.i, d);
 830                                 }
 831                         else {
 832                                 ICONST(REG_ITMP2, iptr->val.i);
 833                                 M_IADD(s1, REG_ITMP2, d);
 834                                 }
 835                         store_reg_to_var_int(iptr->dst, d);
 836                         break;
 837
 838                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 839
 840                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 841                         var_to_reg_int(s2, src, REG_ITMP2);
 842                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 843                         M_LADD(s1, s2, d);
 844                         store_reg_to_var_int(iptr->dst, d);
 845                         break;
 846
 847                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 848                                       /* val.l = constant                             */
 849
 850                         var_to_reg_int(s1, src, REG_ITMP1);
 851                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 852                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 853                                 M_LADD_IMM(s1, iptr->val.l, d);
 854                                 }
 855                         else {
 856                                 LCONST(REG_ITMP2, iptr->val.l);
 857                                 M_LADD(s1, REG_ITMP2, d);
 858                                 }
 859                         store_reg_to_var_int(iptr->dst, d);
 860                         break;
 861
 862                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 863
 864                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 865                         var_to_reg_int(s2, src, REG_ITMP2);
 866                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 867                         M_ISUB(s1, s2, d);
 868                         store_reg_to_var_int(iptr->dst, d);
 869                         break;
 870
 871                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 872                                       /* val.i = constant                             */
 873
 874                         var_to_reg_int(s1, src, REG_ITMP1);
 875                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 876                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 877                                 M_ISUB_IMM(s1, iptr->val.i, d);
 878                                 }
 879                         else {
 880                                 ICONST(REG_ITMP2, iptr->val.i);
 881                                 M_ISUB(s1, REG_ITMP2, d);
 882                                 }
 883                         store_reg_to_var_int(iptr->dst, d);
 884                         break;
 885
 886                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 887
 888                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 889                         var_to_reg_int(s2, src, REG_ITMP2);
 890                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 891                         M_LSUB(s1, s2, d);
 892                         store_reg_to_var_int(iptr->dst, d);
 893                         break;
 894
 895                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 896                                       /* val.l = constant                             */
 897
 898                         var_to_reg_int(s1, src, REG_ITMP1);
 899                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 900                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 901                                 M_LSUB_IMM(s1, iptr->val.l, d);
 902                                 }
 903                         else {
 904                                 LCONST(REG_ITMP2, iptr->val.l);
 905                                 M_LSUB(s1, REG_ITMP2, d);
 906                                 }
 907                         store_reg_to_var_int(iptr->dst, d);
 908                         break;
 909
 910                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 911
 912                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 913                         var_to_reg_int(s2, src, REG_ITMP2);
 914                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 915                         M_IMUL(s1, s2, d);
 916                         store_reg_to_var_int(iptr->dst, d);
 917                         break;
 918
 919                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 920                                       /* val.i = constant                             */
 921
 922                         var_to_reg_int(s1, src, REG_ITMP1);
 923                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 924                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
 925                                 M_IMUL_IMM(s1, iptr->val.i, d);
 926                                 }
 927                         else {
 928                                 ICONST(REG_ITMP2, iptr->val.i);
 929                                 M_IMUL(s1, REG_ITMP2, d);
 930                                 }
 931                         store_reg_to_var_int(iptr->dst, d);
 932                         break;
 933
 934                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 935
 936                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 937                         var_to_reg_int(s2, src, REG_ITMP2);
 938                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 939                         M_LMUL (s1, s2, d);
 940                         store_reg_to_var_int(iptr->dst, d);
 941                         break;
 942
 943                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
 944                                       /* val.l = constant                             */
 945
 946                         var_to_reg_int(s1, src, REG_ITMP1);
 947                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 948                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
 949                                 M_LMUL_IMM(s1, iptr->val.l, d);
 950                                 }
 951                         else {
 952                                 LCONST(REG_ITMP2, iptr->val.l);
 953                                 M_LMUL(s1, REG_ITMP2, d);
 954                                 }
 955                         store_reg_to_var_int(iptr->dst, d);
 956                         break;
 957
 958                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
 959                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
 960
 961                         var_to_reg_int(s1, src, REG_ITMP1);
 962                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 963                         if (iptr->val.i <= 15) {
 964                                 M_LDA(REG_ITMP2, s1, (1 << iptr->val.i) -1);
 965                                 M_CMOVGE(s1, s1, REG_ITMP2);
 966                                 }
 967                         else {
 968                                 M_SRA_IMM(s1, 63, REG_ITMP2);
 969                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->val.i, REG_ITMP2);
 970                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
 971                                 }
 972                         M_SRA_IMM(REG_ITMP2, iptr->val.i, d);
 973                         store_reg_to_var_int(iptr->dst, d);
 974                         break;
 975
 976                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 977
 978                         var_to_reg_int(s1, src->prev, REG_ITMP1);
 979                         var_to_reg_int(s2, src, REG_ITMP2);
 980                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 981                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 982                         M_SLL(s1, REG_ITMP3, d);
 983                         M_IADD(d, REG_ZERO, d);
 984                         store_reg_to_var_int(iptr->dst, d);
 985                         break;
 986
 987                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
 988                                       /* val.i = constant                             */
 989
 990                         var_to_reg_int(s1, src, REG_ITMP1);
 991                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
 992                         M_SLL_IMM(s1, iptr->val.i & 0x1f, d);
 993                         M_IADD(d, REG_ZERO, d);
 994                         store_reg_to_var_int(iptr->dst, d);
 995                         break;
 996
 997                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
 998
 999                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1000                         var_to_reg_int(s2, src, REG_ITMP2);
1001                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1002                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
1003                         M_SRA(s1, REG_ITMP3, d);
1004                         store_reg_to_var_int(iptr->dst, d);
1005                         break;
1006
1007                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
1008                                       /* val.i = constant                             */
1009
1010                         var_to_reg_int(s1, src, REG_ITMP1);
1011                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1012                         M_SRA_IMM(s1, iptr->val.i & 0x1f, d);
1013                         store_reg_to_var_int(iptr->dst, d);
1014                         break;
1015
1016                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1017
1018                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1019                         var_to_reg_int(s2, src, REG_ITMP2);
1020                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1021                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
1022             M_IZEXT(s1, d);
1023                         M_SRL(d, REG_ITMP2, d);
1024                         M_IADD(d, REG_ZERO, d);
1025                         store_reg_to_var_int(iptr->dst, d);
1026                         break;
1027
1028                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1029                                       /* val.i = constant                             */
1030
1031                         var_to_reg_int(s1, src, REG_ITMP1);
1032                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1033             M_IZEXT(s1, d);
1034                         M_SRL_IMM(d, iptr->val.i & 0x1f, d);
1035                         M_IADD(d, REG_ZERO, d);
1036                         store_reg_to_var_int(iptr->dst, d);
1037                         break;
1038
1039                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
1040
1041                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1042                         var_to_reg_int(s2, src, REG_ITMP2);
1043                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1044                         M_SLL(s1, s2, d);
1045                         store_reg_to_var_int(iptr->dst, d);
1046                         break;
1047
1048                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
1049                                       /* val.i = constant                             */
1050
1051                         var_to_reg_int(s1, src, REG_ITMP1);
1052                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1053                         M_SLL_IMM(s1, iptr->val.i & 0x3f, d);
1054                         store_reg_to_var_int(iptr->dst, d);
1055                         break;
1056
1057                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
1058
1059                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1060                         var_to_reg_int(s2, src, REG_ITMP2);
1061                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1062                         M_SRA(s1, s2, d);
1063                         store_reg_to_var_int(iptr->dst, d);
1064                         break;
1065
1066                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
1067                                       /* val.i = constant                             */
1068
1069                         var_to_reg_int(s1, src, REG_ITMP1);
1070                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1071                         M_SRA_IMM(s1, iptr->val.i & 0x3f, d);
1072                         store_reg_to_var_int(iptr->dst, d);
1073                         break;
1074
1075                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
1076
1077                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1078                         var_to_reg_int(s2, src, REG_ITMP2);
1079                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1080                         M_SRL(s1, s2, d);
1081                         store_reg_to_var_int(iptr->dst, d);
1082                         break;
1083
1084                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
1085                                       /* val.i = constant                             */
1086
1087                         var_to_reg_int(s1, src, REG_ITMP1);
1088                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1089                         M_SRL_IMM(s1, iptr->val.i & 0x3f, d);
1090                         store_reg_to_var_int(iptr->dst, d);
1091                         break;
1092
1093                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
1094                 case ICMD_LAND:
1095
1096                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1097                         var_to_reg_int(s2, src, REG_ITMP2);
1098                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1099                         M_AND(s1, s2, d);
1100                         store_reg_to_var_int(iptr->dst, d);
1101                         break;
1102
1103                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
1104                                       /* val.i = constant                             */
1105
1106                         var_to_reg_int(s1, src, REG_ITMP1);
1107                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1108                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1109                                 M_AND_IMM(s1, iptr->val.i, d);
1110                                 }
1111                         else if (iptr->val.i == 0xffff) {
1112                                 M_CZEXT(s1, d);
1113                                 }
1114                         else if (iptr->val.i == 0xffffff) {
1115                                 M_ZAPNOT_IMM(s1, 0x07, d);
1116                                 }
1117                         else {
1118                                 ICONST(REG_ITMP2, iptr->val.i);
1119                                 M_AND(s1, REG_ITMP2, d);
1120                                 }
1121                         store_reg_to_var_int(iptr->dst, d);
1122                         break;
1123
1124                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
1125                                       /* val.i = constant                             */
1126
1127                         var_to_reg_int(s1, src, REG_ITMP1);
1128                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1129                         if (s1 == d) {
1130                                 M_MOV(s1, REG_ITMP1);
1131                                 s1 = REG_ITMP1;
1132                                 }
1133                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1134                                 M_AND_IMM(s1, iptr->val.i, d);
1135                                 M_BGEZ(s1, 3);
1136                                 M_ISUB(REG_ZERO, s1, d);
1137                                 M_AND_IMM(d, iptr->val.i, d);
1138                                 }
1139                         else if (iptr->val.i == 0xffff) {
1140                                 M_CZEXT(s1, d);
1141                                 M_BGEZ(s1, 3);
1142                                 M_ISUB(REG_ZERO, s1, d);
1143                                 M_CZEXT(d, d);
1144                                 }
1145                         else if (iptr->val.i == 0xffffff) {
1146                                 M_ZAPNOT_IMM(s1, 0x07, d);
1147                                 M_BGEZ(s1, 3);
1148                                 M_ISUB(REG_ZERO, s1, d);
1149                                 M_ZAPNOT_IMM(d, 0x07, d);
1150                                 }
1151                         else {
1152                                 ICONST(REG_ITMP2, iptr->val.i);
1153                                 M_AND(s1, REG_ITMP2, d);
1154                                 M_BGEZ(s1, 3);
1155                                 M_ISUB(REG_ZERO, s1, d);
1156                                 M_AND(d, REG_ITMP2, d);
1157                                 }
1158                         M_ISUB(REG_ZERO, d, d);
1159                         store_reg_to_var_int(iptr->dst, d);
1160                         break;
1161
1162                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
1163                                       /* val.l = constant                             */
1164
1165                         var_to_reg_int(s1, src, REG_ITMP1);
1166                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1167                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1168                                 M_AND_IMM(s1, iptr->val.l, d);
1169                                 }
1170                         else if (iptr->val.l == 0xffffL) {
1171                                 M_CZEXT(s1, d);
1172                                 }
1173                         else if (iptr->val.l == 0xffffffL) {
1174                                 M_ZAPNOT_IMM(s1, 0x07, d);
1175                                 }
1176                         else if (iptr->val.l == 0xffffffffL) {
1177                                 M_IZEXT(s1, d);
1178                                 }
1179                         else if (iptr->val.l == 0xffffffffffL) {
1180                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1181                                 }
1182                         else if (iptr->val.l == 0xffffffffffffL) {
1183                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1184                                 }
1185                         else if (iptr->val.l == 0xffffffffffffffL) {
1186                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1187                                 }
1188                         else {
1189                                 LCONST(REG_ITMP2, iptr->val.l);
1190                                 M_AND(s1, REG_ITMP2, d);
1191                                 }
1192                         store_reg_to_var_int(iptr->dst, d);
1193                         break;
1194
1195                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
1196                                       /* val.l = constant                             */
1197
1198                         var_to_reg_int(s1, src, REG_ITMP1);
1199                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1200                         if (s1 == d) {
1201                                 M_MOV(s1, REG_ITMP1);
1202                                 s1 = REG_ITMP1;
1203                                 }
1204                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1205                                 M_AND_IMM(s1, iptr->val.l, d);
1206                                 M_BGEZ(s1, 3);
1207                                 M_LSUB(REG_ZERO, s1, d);
1208                                 M_AND_IMM(d, iptr->val.l, d);
1209                                 }
1210                         else if (iptr->val.l == 0xffffL) {
1211                                 M_CZEXT(s1, d);
1212                                 M_BGEZ(s1, 3);
1213                                 M_LSUB(REG_ZERO, s1, d);
1214                                 M_CZEXT(d, d);
1215                                 }
1216                         else if (iptr->val.l == 0xffffffL) {
1217                                 M_ZAPNOT_IMM(s1, 0x07, d);
1218                                 M_BGEZ(s1, 3);
1219                                 M_LSUB(REG_ZERO, s1, d);
1220                                 M_ZAPNOT_IMM(d, 0x07, d);
1221                                 }
1222                         else if (iptr->val.l == 0xffffffffL) {
1223                                 M_IZEXT(s1, d);
1224                                 M_BGEZ(s1, 3);
1225                                 M_LSUB(REG_ZERO, s1, d);
1226                                 M_IZEXT(d, d);
1227                                 }
1228                         else if (iptr->val.l == 0xffffffffffL) {
1229                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1230                                 M_BGEZ(s1, 3);
1231                                 M_LSUB(REG_ZERO, s1, d);
1232                                 M_ZAPNOT_IMM(d, 0x1f, d);
1233                                 }
1234                         else if (iptr->val.l == 0xffffffffffffL) {
1235                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1236                                 M_BGEZ(s1, 3);
1237                                 M_LSUB(REG_ZERO, s1, d);
1238                                 M_ZAPNOT_IMM(d, 0x3f, d);
1239                                 }
1240                         else if (iptr->val.l == 0xffffffffffffffL) {
1241                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1242                                 M_BGEZ(s1, 3);
1243                                 M_LSUB(REG_ZERO, s1, d);
1244                                 M_ZAPNOT_IMM(d, 0x7f, d);
1245                                 }
1246                         else {
1247                                 LCONST(REG_ITMP2, iptr->val.l);
1248                                 M_AND(s1, REG_ITMP2, d);
1249                                 M_BGEZ(s1, 3);
1250                                 M_LSUB(REG_ZERO, s1, d);
1251                                 M_AND(d, REG_ITMP2, d);
1252                                 }
1253                         M_LSUB(REG_ZERO, d, d);
1254                         store_reg_to_var_int(iptr->dst, d);
1255                         break;
1256
1257                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1258                 case ICMD_LOR:
1259
1260                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1261                         var_to_reg_int(s2, src, REG_ITMP2);
1262                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1263                         M_OR( s1,s2, d);
1264                         store_reg_to_var_int(iptr->dst, d);
1265                         break;
1266
1267                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1268                                       /* val.i = constant                             */
1269
1270                         var_to_reg_int(s1, src, REG_ITMP1);
1271                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1272                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1273                                 M_OR_IMM(s1, iptr->val.i, d);
1274                                 }
1275                         else {
1276                                 ICONST(REG_ITMP2, iptr->val.i);
1277                                 M_OR(s1, REG_ITMP2, d);
1278                                 }
1279                         store_reg_to_var_int(iptr->dst, d);
1280                         break;
1281
1282                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1283                                       /* val.l = constant                             */
1284
1285                         var_to_reg_int(s1, src, REG_ITMP1);
1286                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1287                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1288                                 M_OR_IMM(s1, iptr->val.l, d);
1289                                 }
1290                         else {
1291                                 LCONST(REG_ITMP2, iptr->val.l);
1292                                 M_OR(s1, REG_ITMP2, d);
1293                                 }
1294                         store_reg_to_var_int(iptr->dst, d);
1295                         break;
1296
1297                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1298                 case ICMD_LXOR:
1299
1300                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1301                         var_to_reg_int(s2, src, REG_ITMP2);
1302                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1303                         M_XOR(s1, s2, d);
1304                         store_reg_to_var_int(iptr->dst, d);
1305                         break;
1306
1307                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1308                                       /* val.i = constant                             */
1309
1310                         var_to_reg_int(s1, src, REG_ITMP1);
1311                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1312                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1313                                 M_XOR_IMM(s1, iptr->val.i, d);
1314                                 }
1315                         else {
1316                                 ICONST(REG_ITMP2, iptr->val.i);
1317                                 M_XOR(s1, REG_ITMP2, d);
1318                                 }
1319                         store_reg_to_var_int(iptr->dst, d);
1320                         break;
1321
1322                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1323                                       /* val.l = constant                             */
1324
1325                         var_to_reg_int(s1, src, REG_ITMP1);
1326                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1327                         if ((iptr->val.l >= 0) && (iptr->val.l <= 255)) {
1328                                 M_XOR_IMM(s1, iptr->val.l, d);
1329                                 }
1330                         else {
1331                                 LCONST(REG_ITMP2, iptr->val.l);
1332                                 M_XOR(s1, REG_ITMP2, d);
1333                                 }
1334                         store_reg_to_var_int(iptr->dst, d);
1335                         break;
1336
1337
1338                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1339
1340                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1341                         var_to_reg_int(s2, src, REG_ITMP2);
1342                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1343                         M_CMPLT(s1, s2, REG_ITMP3);
1344                         M_CMPLT(s2, s1, REG_ITMP1);
1345                         M_LSUB (REG_ITMP1, REG_ITMP3, d);
1346                         store_reg_to_var_int(iptr->dst, d);
1347                         break;
1348
1349
1350                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1351                                       /* op1 = variable, val.i = constant             */
1352
1353                         var = &(r->locals[iptr->op1][TYPE_INT]);
1354                         if (var->flags & INMEMORY) {
1355                                 s1 = REG_ITMP1;
1356                                 M_LLD(s1, REG_SP, 8 * var->regoff);
1357                                 }
1358                         else
1359                                 s1 = var->regoff;
1360                         if ((iptr->val.i >= 0) && (iptr->val.i <= 255)) {
1361                                 M_IADD_IMM(s1, iptr->val.i, s1);
1362                                 }
1363                         else if ((iptr->val.i > -256) && (iptr->val.i < 0)) {
1364                                 M_ISUB_IMM(s1, (-iptr->val.i), s1);
1365                                 }
1366                         else {
1367                                 M_LDA (s1, s1, iptr->val.i);
1368                                 M_IADD(s1, REG_ZERO, s1);
1369                                 }
1370                         if (var->flags & INMEMORY)
1371                                 M_LST(s1, REG_SP, 8 * var->regoff);
1372                         break;
1373
1374
1375                 /* floating operations ************************************************/
1376
1377                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1378
1379                         var_to_reg_flt(s1, src, REG_FTMP1);
1380                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1381                         M_FMOVN(s1, d);
1382                         store_reg_to_var_flt(iptr->dst, d);
1383                         break;
1384
1385                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1386
1387                         var_to_reg_flt(s1, src, REG_FTMP1);
1388                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1389                         M_FMOVN(s1, d);
1390                         store_reg_to_var_flt(iptr->dst, d);
1391                         break;
1392
1393                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1394
1395                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1396                         var_to_reg_flt(s2, src, REG_FTMP2);
1397                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1398                         if (opt_noieee) {
1399                                 M_FADD(s1, s2, d);
1400                                 }
1401                         else {
1402                                 if (d == s1 || d == s2) {
1403                                         M_FADDS(s1, s2, REG_FTMP3);
1404                                         M_TRAPB;
1405                                         M_FMOV(REG_FTMP3, d);
1406                                         }
1407                                 else {
1408                                         M_FADDS(s1, s2, d);
1409                                         M_TRAPB;
1410                                         }
1411                                 }
1412                         store_reg_to_var_flt(iptr->dst, d);
1413                         break;
1414
1415                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1416
1417                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1418                         var_to_reg_flt(s2, src, REG_FTMP2);
1419                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1420                         if (opt_noieee) {
1421                                 M_DADD(s1, s2, d);
1422                                 }
1423                         else {
1424                                 if (d == s1 || d == s2) {
1425                                         M_DADDS(s1, s2, REG_FTMP3);
1426                                         M_TRAPB;
1427                                         M_FMOV(REG_FTMP3, d);
1428                                         }
1429                                 else {
1430                                         M_DADDS(s1, s2, d);
1431                                         M_TRAPB;
1432                                         }
1433                                 }
1434                         store_reg_to_var_flt(iptr->dst, d);
1435                         break;
1436
1437                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1438
1439                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1440                         var_to_reg_flt(s2, src, REG_FTMP2);
1441                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1442                         if (opt_noieee) {
1443                                 M_FSUB(s1, s2, d);
1444                                 }
1445                         else {
1446                                 if (d == s1 || d == s2) {
1447                                         M_FSUBS(s1, s2, REG_FTMP3);
1448                                         M_TRAPB;
1449                                         M_FMOV(REG_FTMP3, d);
1450                                         }
1451                                 else {
1452                                         M_FSUBS(s1, s2, d);
1453                                         M_TRAPB;
1454                                         }
1455                                 }
1456                         store_reg_to_var_flt(iptr->dst, d);
1457                         break;
1458
1459                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1460
1461                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1462                         var_to_reg_flt(s2, src, REG_FTMP2);
1463                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1464                         if (opt_noieee) {
1465                                 M_DSUB(s1, s2, d);
1466                                 }
1467                         else {
1468                                 if (d == s1 || d == s2) {
1469                                         M_DSUBS(s1, s2, REG_FTMP3);
1470                                         M_TRAPB;
1471                                         M_FMOV(REG_FTMP3, d);
1472                                         }
1473                                 else {
1474                                         M_DSUBS(s1, s2, d);
1475                                         M_TRAPB;
1476                                         }
1477                                 }
1478                         store_reg_to_var_flt(iptr->dst, d);
1479                         break;
1480
1481                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1482
1483                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1484                         var_to_reg_flt(s2, src, REG_FTMP2);
1485                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1486                         if (opt_noieee) {
1487                                 M_FMUL(s1, s2, d);
1488                                 }
1489                         else {
1490                                 if (d == s1 || d == s2) {
1491                                         M_FMULS(s1, s2, REG_FTMP3);
1492                                         M_TRAPB;
1493                                         M_FMOV(REG_FTMP3, d);
1494                                         }
1495                                 else {
1496                                         M_FMULS(s1, s2, d);
1497                                         M_TRAPB;
1498                                         }
1499                                 }
1500                         store_reg_to_var_flt(iptr->dst, d);
1501                         break;
1502
1503                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2        */
1504
1505                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1506                         var_to_reg_flt(s2, src, REG_FTMP2);
1507                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1508                         if (opt_noieee) {
1509                                 M_DMUL(s1, s2, d);
1510                                 }
1511                         else {
1512                                 if (d == s1 || d == s2) {
1513                                         M_DMULS(s1, s2, REG_FTMP3);
1514                                         M_TRAPB;
1515                                         M_FMOV(REG_FTMP3, d);
1516                                         }
1517                                 else {
1518                                         M_DMULS(s1, s2, d);
1519                                         M_TRAPB;
1520                                         }
1521                                 }
1522                         store_reg_to_var_flt(iptr->dst, d);
1523                         break;
1524
1525                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1526
1527                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1528                         var_to_reg_flt(s2, src, REG_FTMP2);
1529                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1530                         if (opt_noieee) {
1531                                 M_FDIV(s1, s2, d);
1532                                 }
1533                         else {
1534                                 if (d == s1 || d == s2) {
1535                                         M_FDIVS(s1, s2, REG_FTMP3);
1536                                         M_TRAPB;
1537                                         M_FMOV(REG_FTMP3, d);
1538                                         }
1539                                 else {
1540                                         M_FDIVS(s1, s2, d);
1541                                         M_TRAPB;
1542                                         }
1543                                 }
1544                         store_reg_to_var_flt(iptr->dst, d);
1545                         break;
1546
1547                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1548
1549                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1550                         var_to_reg_flt(s2, src, REG_FTMP2);
1551                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1552                         if (opt_noieee) {
1553                                 M_DDIV(s1, s2, d);
1554                                 }
1555                         else {
1556                                 if (d == s1 || d == s2) {
1557                                         M_DDIVS(s1, s2, REG_FTMP3);
1558                                         M_TRAPB;
1559                                         M_FMOV(REG_FTMP3, d);
1560                                         }
1561                                 else {
1562                                         M_DDIVS(s1, s2, d);
1563                                         M_TRAPB;
1564                                         }
1565                                 }
1566                         store_reg_to_var_flt(iptr->dst, d);
1567                         break;
1568
1569                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1570                 case ICMD_L2F:
1571                         var_to_reg_int(s1, src, REG_ITMP1);
1572                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1573                         a = dseg_adddouble(m, 0.0);
1574                         M_LST (s1, REG_PV, a);
1575                         M_DLD (d, REG_PV, a);
1576                         M_CVTLF(d, d);
1577                         store_reg_to_var_flt(iptr->dst, d);
1578                         break;
1579
1580                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1581                 case ICMD_L2D:
1582                         var_to_reg_int(s1, src, REG_ITMP1);
1583                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1584                         a = dseg_adddouble(m, 0.0);
1585                         M_LST (s1, REG_PV, a);
1586                         M_DLD (d, REG_PV, a);
1587                         M_CVTLD(d, d);
1588                         store_reg_to_var_flt(iptr->dst, d);
1589                         break;
1590
1591                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1592                 case ICMD_D2I:
1593                         var_to_reg_flt(s1, src, REG_FTMP1);
1594                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1595                         a = dseg_adddouble(m, 0.0);
1596                         M_CVTDL_C(s1, REG_FTMP2);
1597                         M_CVTLI(REG_FTMP2, REG_FTMP3);
1598                         M_DST (REG_FTMP3, REG_PV, a);
1599                         M_ILD (d, REG_PV, a);
1600                         store_reg_to_var_int(iptr->dst, d);
1601                         break;
1602
1603                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1604                 case ICMD_D2L:
1605                         var_to_reg_flt(s1, src, REG_FTMP1);
1606                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1607                         a = dseg_adddouble(m, 0.0);
1608                         M_CVTDL_C(s1, REG_FTMP2);
1609                         M_DST (REG_FTMP2, REG_PV, a);
1610                         M_LLD (d, REG_PV, a);
1611                         store_reg_to_var_int(iptr->dst, d);
1612                         break;
1613
1614                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1615
1616                         var_to_reg_flt(s1, src, REG_FTMP1);
1617                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1618                         M_CVTFDS(s1, d);
1619                         M_TRAPB;
1620                         store_reg_to_var_flt(iptr->dst, d);
1621                         break;
1622
1623                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1624
1625                         var_to_reg_flt(s1, src, REG_FTMP1);
1626                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1627                         if (opt_noieee) {
1628                                 M_CVTDF(s1, d);
1629                                 }
1630                         else {
1631                                 M_CVTDFS(s1, d);
1632                                 M_TRAPB;
1633                                 }
1634                         store_reg_to_var_flt(iptr->dst, d);
1635                         break;
1636
1637                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1638                 case ICMD_DCMPL:
1639                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1640                         var_to_reg_flt(s2, src, REG_FTMP2);
1641                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1642                         if (opt_noieee) {
1643                                 M_LSUB_IMM(REG_ZERO, 1, d);
1644                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1645                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1646                                 M_CLR   (d);
1647                                 M_FCMPLT(s2, s1, REG_FTMP3);
1648                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1649                                 M_LADD_IMM(REG_ZERO, 1, d);
1650                                 }
1651                         else {
1652                                 M_LSUB_IMM(REG_ZERO, 1, d);
1653                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1654                                 M_TRAPB;
1655                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1656                                 M_CLR   (d);
1657                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1658                                 M_TRAPB;
1659                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1660                                 M_LADD_IMM(REG_ZERO, 1, d);
1661                                 }
1662                         store_reg_to_var_int(iptr->dst, d);
1663                         break;
1664
1665                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1666                 case ICMD_DCMPG:
1667                         var_to_reg_flt(s1, src->prev, REG_FTMP1);
1668                         var_to_reg_flt(s2, src, REG_FTMP2);
1669                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1670                         if (opt_noieee) {
1671                                 M_LADD_IMM(REG_ZERO, 1, d);
1672                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1673                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1674                                 M_CLR   (d);
1675                                 M_FCMPLT(s1, s2, REG_FTMP3);
1676                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1677                                 M_LSUB_IMM(REG_ZERO, 1, d);
1678                                 }
1679                         else {
1680                                 M_LADD_IMM(REG_ZERO, 1, d);
1681                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1682                                 M_TRAPB;
1683                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1684                                 M_CLR   (d);
1685                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1686                                 M_TRAPB;
1687                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1688                                 M_LSUB_IMM(REG_ZERO, 1, d);
1689                                 }
1690                         store_reg_to_var_int(iptr->dst, d);
1691                         break;
1692
1693
1694                 /* memory operations **************************************************/
1695
1696                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1697
1698                         var_to_reg_int(s1, src, REG_ITMP1);
1699                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1700                         gen_nullptr_check(s1);
1701                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1702                         store_reg_to_var_int(iptr->dst, d);
1703                         break;
1704
1705                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1706
1707                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1708                         var_to_reg_int(s2, src, REG_ITMP2);
1709                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1710                         if (iptr->op1 == 0) {
1711                                 gen_nullptr_check(s1);
1712                                 gen_bound_check;
1713                                 }
1714                         M_SAADDQ(s2, s1, REG_ITMP1);
1715                         M_ALD( d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1716                         store_reg_to_var_int(iptr->dst, d);
1717                         break;
1718
1719                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1720
1721                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1722                         var_to_reg_int(s2, src, REG_ITMP2);
1723                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1724                         if (iptr->op1 == 0) {
1725                                 gen_nullptr_check(s1);
1726                                 gen_bound_check;
1727                                 }
1728                         M_S8ADDQ(s2, s1, REG_ITMP1);
1729                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1730                         store_reg_to_var_int(iptr->dst, d);
1731                         break;
1732
1733                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1734
1735                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1736                         var_to_reg_int(s2, src, REG_ITMP2);
1737                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1738                         if (iptr->op1 == 0) {
1739                                 gen_nullptr_check(s1);
1740                                 gen_bound_check;
1741                                 }
1742
1743                         M_S4ADDQ(s2, s1, REG_ITMP1);
1744                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1745                         store_reg_to_var_int(iptr->dst, d);
1746                         break;
1747
1748                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1749
1750                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1751                         var_to_reg_int(s2, src, REG_ITMP2);
1752                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1753                         if (iptr->op1 == 0) {
1754                                 gen_nullptr_check(s1);
1755                                 gen_bound_check;
1756                                 }
1757                         M_S4ADDQ(s2, s1, REG_ITMP1);
1758                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1759                         store_reg_to_var_flt(iptr->dst, d);
1760                         break;
1761
1762                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1763
1764                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1765                         var_to_reg_int(s2, src, REG_ITMP2);
1766                         d = reg_of_var(m, iptr->dst, REG_FTMP3);
1767                         if (iptr->op1 == 0) {
1768                                 gen_nullptr_check(s1);
1769                                 gen_bound_check;
1770                                 }
1771                         M_S8ADDQ(s2, s1, REG_ITMP1);
1772                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1773                         store_reg_to_var_flt(iptr->dst, d);
1774                         break;
1775
1776                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1777
1778                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1779                         var_to_reg_int(s2, src, REG_ITMP2);
1780                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1781                         if (iptr->op1 == 0) {
1782                                 gen_nullptr_check(s1);
1783                                 gen_bound_check;
1784                                 }
1785                         if (has_ext_instr_set) {
1786                                 M_LADD(s2, s1, REG_ITMP1);
1787                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1788                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1789                                 }
1790                         else {
1791                                 M_LADD (s2, s1, REG_ITMP1);
1792                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1793                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1794                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1795                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
1796                                 }
1797                         store_reg_to_var_int(iptr->dst, d);
1798                         break;
1799
1800                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1801
1802                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1803                         var_to_reg_int(s2, src, REG_ITMP2);
1804                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1805                         if (iptr->op1 == 0) {
1806                                 gen_nullptr_check(s1);
1807                                 gen_bound_check;
1808                                 }
1809                         if (has_ext_instr_set) {
1810                                 M_LADD(s2, s1, REG_ITMP1);
1811                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1812                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
1813                                 M_SSEXT(d, d);
1814                                 }
1815                         else {
1816                                 M_LADD(s2, s1, REG_ITMP1);
1817                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1818                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1819                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
1820                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1821                                 M_SRA_IMM(d, 48, d);
1822                                 }
1823                         store_reg_to_var_int(iptr->dst, d);
1824                         break;
1825
1826                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1827
1828                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1829                         var_to_reg_int(s2, src, REG_ITMP2);
1830                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
1831                         if (iptr->op1 == 0) {
1832                                 gen_nullptr_check(s1);
1833                                 gen_bound_check;
1834                                 }
1835                         if (has_ext_instr_set) {
1836                                 M_LADD   (s2, s1, REG_ITMP1);
1837                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
1838                                 M_BSEXT  (d, d);
1839                                 }
1840                         else {
1841                                 M_LADD(s2, s1, REG_ITMP1);
1842                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1843                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
1844                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1845                                 M_SRA_IMM(d, 56, d);
1846                                 }
1847                         store_reg_to_var_int(iptr->dst, d);
1848                         break;
1849
1850
1851                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1852
1853                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1854                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1855                         if (iptr->op1 == 0) {
1856                                 gen_nullptr_check(s1);
1857                                 gen_bound_check;
1858                                 }
1859                         var_to_reg_int(s3, src, REG_ITMP3);
1860                         M_SAADDQ(s2, s1, REG_ITMP1);
1861                         M_AST   (s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1862                         break;
1863
1864                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1865
1866                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1867                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1868                         if (iptr->op1 == 0) {
1869                                 gen_nullptr_check(s1);
1870                                 gen_bound_check;
1871                                 }
1872                         var_to_reg_int(s3, src, REG_ITMP3);
1873                         M_S8ADDQ(s2, s1, REG_ITMP1);
1874                         M_LST   (s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1875                         break;
1876
1877                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1878
1879                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1880                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1881                         if (iptr->op1 == 0) {
1882                                 gen_nullptr_check(s1);
1883                                 gen_bound_check;
1884                                 }
1885
1886                         var_to_reg_int(s3, src, REG_ITMP3);
1887                         M_S4ADDQ(s2, s1, REG_ITMP1);
1888                         M_IST   (s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1889                         break;
1890
1891                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1892
1893                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1894                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1895                         if (iptr->op1 == 0) {
1896                                 gen_nullptr_check(s1);
1897                                 gen_bound_check;
1898                                 }
1899                         var_to_reg_flt(s3, src, REG_FTMP3);
1900                         M_S4ADDQ(s2, s1, REG_ITMP1);
1901                         M_FST   (s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1902                         break;
1903
1904                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1905
1906                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1907                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1908                         if (iptr->op1 == 0) {
1909                                 gen_nullptr_check(s1);
1910                                 gen_bound_check;
1911                                 }
1912                         var_to_reg_flt(s3, src, REG_FTMP3);
1913                         M_S8ADDQ(s2, s1, REG_ITMP1);
1914                         M_DST   (s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1915                         break;
1916
1917                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1918
1919                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1920                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1921                         if (iptr->op1 == 0) {
1922                                 gen_nullptr_check(s1);
1923                                 gen_bound_check;
1924                                 }
1925                         var_to_reg_int(s3, src, REG_ITMP3);
1926                         if (has_ext_instr_set) {
1927                                 M_LADD(s2, s1, REG_ITMP1);
1928                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1929                                 M_SST (s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1930                                 }
1931                         else {
1932                                 M_LADD (s2, s1, REG_ITMP1);
1933                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1934                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1935                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1936                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1937                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1938                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
1939                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1940                                 }
1941                         break;
1942
1943                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1944
1945                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1946                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1947                         if (iptr->op1 == 0) {
1948                                 gen_nullptr_check(s1);
1949                                 gen_bound_check;
1950                                 }
1951                         var_to_reg_int(s3, src, REG_ITMP3);
1952                         if (has_ext_instr_set) {
1953                                 M_LADD(s2, s1, REG_ITMP1);
1954                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1955                                 M_SST (s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1956                                 }
1957                         else {
1958                                 M_LADD (s2, s1, REG_ITMP1);
1959                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1960                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1961                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1962                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1963                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1964                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
1965                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1966                                 }
1967                         break;
1968
1969                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1970
1971                         var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
1972                         var_to_reg_int(s2, src->prev, REG_ITMP2);
1973                         if (iptr->op1 == 0) {
1974                                 gen_nullptr_check(s1);
1975                                 gen_bound_check;
1976                                 }
1977                         var_to_reg_int(s3, src, REG_ITMP3);
1978                         if (has_ext_instr_set) {
1979                                 M_LADD(s2, s1, REG_ITMP1);
1980                                 M_BST (s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1981                                 }
1982                         else {
1983                                 M_LADD (s2, s1, REG_ITMP1);
1984                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1985                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1986                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
1987                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1988                                 M_OR   (REG_ITMP2, REG_ITMP3, REG_ITMP2);
1989                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1990                                 }
1991                         break;
1992
1993
1994                 case ICMD_IASTORECONST:   /* ..., arrayref, index  ==> ...            */
1995
1996                         var_to_reg_int(s1, src->prev, REG_ITMP1);
1997                         var_to_reg_int(s2, src, REG_ITMP2);
1998                         if (iptr->op1 == 0) {
1999                                 gen_nullptr_check(s1);
2000                                 gen_bound_check;
2001                         }
2002                         M_S4ADDQ(s2, s1, REG_ITMP1);
2003                         M_IST(REG_ZERO, REG_ITMP1, OFFSET(java_intarray, data[0]));
2004                         break;
2005
2006                 case ICMD_LASTORECONST:   /* ..., arrayref, index  ==> ...            */
2007
2008                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2009                         var_to_reg_int(s2, src, REG_ITMP2);
2010                         if (iptr->op1 == 0) {
2011                                 gen_nullptr_check(s1);
2012                                 gen_bound_check;
2013                         }
2014                         M_S8ADDQ(s2, s1, REG_ITMP1);
2015                         M_LST(REG_ZERO, REG_ITMP1, OFFSET(java_longarray, data[0]));
2016                         break;
2017
2018                 case ICMD_AASTORECONST:   /* ..., arrayref, index  ==> ...            */
2019
2020                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2021                         var_to_reg_int(s2, src, REG_ITMP2);
2022                         if (iptr->op1 == 0) {
2023                                 gen_nullptr_check(s1);
2024                                 gen_bound_check;
2025                         }
2026                         M_SAADDQ(s2, s1, REG_ITMP1);
2027                         M_AST(REG_ZERO, REG_ITMP1, OFFSET(java_objectarray, data[0]));
2028                         break;
2029
2030                 case ICMD_BASTORECONST:   /* ..., arrayref, index  ==> ...            */
2031
2032                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2033                         var_to_reg_int(s2, src, REG_ITMP2);
2034                         if (iptr->op1 == 0) {
2035                                 gen_nullptr_check(s1);
2036                                 gen_bound_check;
2037                         }
2038                         if (has_ext_instr_set) {
2039                                 M_LADD(s2, s1, REG_ITMP1);
2040                                 M_BST(REG_ZERO, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2041
2042                         } else {
2043                                 M_LADD(s2, s1, REG_ITMP1);
2044                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2045                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
2046                                 M_INSBL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2047                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2048                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2049                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2050                         }
2051                         break;
2052
2053                 case ICMD_CASTORECONST:   /* ..., arrayref, index  ==> ...            */
2054
2055                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2056                         var_to_reg_int(s2, src, REG_ITMP2);
2057                         if (iptr->op1 == 0) {
2058                                 gen_nullptr_check(s1);
2059                                 gen_bound_check;
2060                         }
2061                         if (has_ext_instr_set) {
2062                                 M_LADD(s2, s1, REG_ITMP1);
2063                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2064                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_chararray, data[0]));
2065
2066                         } else {
2067                                 M_LADD(s2, s1, REG_ITMP1);
2068                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2069                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
2070                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
2071                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2072                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2073                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2074                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2075                         }
2076                         break;
2077
2078                 case ICMD_SASTORECONST:   /* ..., arrayref, index  ==> ...            */
2079
2080                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2081                         var_to_reg_int(s2, src, REG_ITMP2);
2082                         if (iptr->op1 == 0) {
2083                                 gen_nullptr_check(s1);
2084                                 gen_bound_check;
2085                         }
2086                         if (has_ext_instr_set) {
2087                                 M_LADD(s2, s1, REG_ITMP1);
2088                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2089                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2090
2091                         } else {
2092                                 M_LADD(s2, s1, REG_ITMP1);
2093                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
2094                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2095                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
2096                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
2097                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
2098                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2099                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
2100                         }
2101                         break;
2102
2103
2104                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
2105                                       /* op1 = type, val.a = field address            */
2106
2107                         /* if class isn't yet initialized, do it */
2108                         if (!((fieldinfo *) iptr->val.a)->class->initialized) {
2109                                 /* call helper function which patches this code */
2110                                 a = dseg_addaddress(m, ((fieldinfo *) iptr->val.a)->class);
2111                                 M_ALD(REG_ITMP1, REG_PV, a);
2112                                 a = dseg_addaddress(m, asm_check_clinit);
2113                                 M_ALD(REG_PV, REG_PV, a);
2114                                 M_JSR(REG_RA, REG_PV);
2115
2116                                 /* recompute pv */
2117                                 s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2118                                 if (s1 <= 32768) {
2119                                         M_LDA(REG_PV, REG_RA, -s1);
2120                                         M_NOP;
2121
2122                                 } else {
2123                                         s4 ml = -s1, mh = 0;
2124                                         while (ml < -32768) { ml += 65536; mh--; }
2125                                         M_LDA(REG_PV, REG_RA, ml);
2126                                         M_LDAH(REG_PV, REG_PV, mh);
2127                                 }
2128                         }
2129
2130                         a = dseg_addaddress(m, &(((fieldinfo *)(iptr->val.a))->value));
2131                         M_ALD(REG_ITMP1, REG_PV, a);
2132                         switch (iptr->op1) {
2133                                 case TYPE_INT:
2134                                         var_to_reg_int(s2, src, REG_ITMP2);
2135                                         M_IST(s2, REG_ITMP1, 0);
2136                                         break;
2137                                 case TYPE_LNG:
2138                                         var_to_reg_int(s2, src, REG_ITMP2);
2139                                         M_LST(s2, REG_ITMP1, 0);
2140                                         break;
2141                                 case TYPE_ADR:
2142                                         var_to_reg_int(s2, src, REG_ITMP2);
2143                                         M_AST(s2, REG_ITMP1, 0);
2144                                         break;
2145                                 case TYPE_FLT:
2146                                         var_to_reg_flt(s2, src, REG_FTMP2);
2147                                         M_FST(s2, REG_ITMP1, 0);
2148                                         break;
2149                                 case TYPE_DBL:
2150                                         var_to_reg_flt(s2, src, REG_FTMP2);
2151                                         M_DST(s2, REG_ITMP1, 0);
2152                                         break;
2153                                 default: panic ("internal error");
2154                                 }
2155                         break;
2156
2157                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
2158                                       /* op1 = type, val.a = field address            */
2159
2160                         /* if class isn't yet initialized, do it */
2161                         if (!((fieldinfo *) iptr->val.a)->class->initialized) {
2162                                 /* call helper function which patches this code */
2163                                 a = dseg_addaddress(m, ((fieldinfo *) iptr->val.a)->class);
2164                                 M_ALD(REG_ITMP1, REG_PV, a);
2165                                 a = dseg_addaddress(m, asm_check_clinit);
2166                                 M_ALD(REG_PV, REG_PV, a);
2167                                 M_JSR(REG_RA, REG_PV);
2168
2169                                 /* recompute pv */
2170                                 s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2171                                 if (s1 <= 32768) {
2172                                         M_LDA(REG_PV, REG_RA, -s1);
2173                                         M_NOP;
2174
2175                                 } else {
2176                                         s4 ml = -s1, mh = 0;
2177                                         while (ml < -32768) { ml += 65536; mh--; }
2178                                         M_LDA(REG_PV, REG_RA, ml);
2179                                         M_LDAH(REG_PV, REG_PV, mh);
2180                                 }
2181                         }
2182
2183                         a = dseg_addaddress(m, &(((fieldinfo *) iptr->val.a)->value));
2184                         M_ALD(REG_ITMP1, REG_PV, a);
2185                         switch (iptr->op1) {
2186                                 case TYPE_INT:
2187                                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2188                                         M_ILD(d, REG_ITMP1, 0);
2189                                         store_reg_to_var_int(iptr->dst, d);
2190                                         break;
2191                                 case TYPE_LNG:
2192                                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2193                                         M_LLD(d, REG_ITMP1, 0);
2194                                         store_reg_to_var_int(iptr->dst, d);
2195                                         break;
2196                                 case TYPE_ADR:
2197                                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2198                                         M_ALD(d, REG_ITMP1, 0);
2199                                         store_reg_to_var_int(iptr->dst, d);
2200                                         break;
2201                                 case TYPE_FLT:
2202                                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
2203                                         M_FLD(d, REG_ITMP1, 0);
2204                                         store_reg_to_var_flt(iptr->dst, d);
2205                                         break;
2206                                 case TYPE_DBL:
2207                                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
2208                                         M_DLD(d, REG_ITMP1, 0);
2209                                         store_reg_to_var_flt(iptr->dst, d);
2210                                         break;
2211                                 default: panic ("internal error");
2212                                 }
2213                         break;
2214
2215
2216                 case ICMD_PUTFIELD:   /* ..., value  ==> ...                          */
2217                                       /* op1 = type, val.i = field offset             */
2218
2219                         a = ((fieldinfo *) iptr->val.a)->offset;
2220                         switch (iptr->op1) {
2221                                 case TYPE_INT:
2222                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2223                                         var_to_reg_int(s2, src, REG_ITMP2);
2224                                         gen_nullptr_check(s1);
2225                                         M_IST(s2, s1, a);
2226                                         break;
2227                                 case TYPE_LNG:
2228                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2229                                         var_to_reg_int(s2, src, REG_ITMP2);
2230                                         gen_nullptr_check(s1);
2231                                         M_LST(s2, s1, a);
2232                                         break;
2233                                 case TYPE_ADR:
2234                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2235                                         var_to_reg_int(s2, src, REG_ITMP2);
2236                                         gen_nullptr_check(s1);
2237                                         M_AST(s2, s1, a);
2238                                         break;
2239                                 case TYPE_FLT:
2240                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2241                                         var_to_reg_flt(s2, src, REG_FTMP2);
2242                                         gen_nullptr_check(s1);
2243                                         M_FST(s2, s1, a);
2244                                         break;
2245                                 case TYPE_DBL:
2246                                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2247                                         var_to_reg_flt(s2, src, REG_FTMP2);
2248                                         gen_nullptr_check(s1);
2249                                         M_DST(s2, s1, a);
2250                                         break;
2251                                 default: panic ("internal error");
2252                                 }
2253                         break;
2254
2255                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2256                                       /* op1 = type, val.i = field offset             */
2257
2258                         a = ((fieldinfo *)(iptr->val.a))->offset;
2259                         switch (iptr->op1) {
2260                                 case TYPE_INT:
2261                                         var_to_reg_int(s1, src, REG_ITMP1);
2262                                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2263                                         gen_nullptr_check(s1);
2264                                         M_ILD(d, s1, a);
2265                                         store_reg_to_var_int(iptr->dst, d);
2266                                         break;
2267                                 case TYPE_LNG:
2268                                         var_to_reg_int(s1, src, REG_ITMP1);
2269                                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2270                                         gen_nullptr_check(s1);
2271                                         M_LLD(d, s1, a);
2272                                         store_reg_to_var_int(iptr->dst, d);
2273                                         break;
2274                                 case TYPE_ADR:
2275                                         var_to_reg_int(s1, src, REG_ITMP1);
2276                                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2277                                         gen_nullptr_check(s1);
2278                                         M_ALD(d, s1, a);
2279                                         store_reg_to_var_int(iptr->dst, d);
2280                                         break;
2281                                 case TYPE_FLT:
2282                                         var_to_reg_int(s1, src, REG_ITMP1);
2283                                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
2284                                         gen_nullptr_check(s1);
2285                                         M_FLD(d, s1, a);
2286                                         store_reg_to_var_flt(iptr->dst, d);
2287                                         break;
2288                                 case TYPE_DBL:
2289                                         var_to_reg_int(s1, src, REG_ITMP1);
2290                                         d = reg_of_var(m, iptr->dst, REG_FTMP1);
2291                                         gen_nullptr_check(s1);
2292                                         M_DLD(d, s1, a);
2293                                         store_reg_to_var_flt(iptr->dst, d);
2294                                         break;
2295                                 default: panic ("internal error");
2296                                 }
2297                         break;
2298
2299
2300                 /* branch operations **************************************************/
2301
2302 #define ALIGNCODENOP {if((int)((long)mcodeptr&7)){M_NOP;}}
2303
2304                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2305
2306                         var_to_reg_int(s1, src, REG_ITMP1);
2307                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2308                         a = dseg_addaddress(m, asm_handle_exception);
2309                         M_ALD(REG_ITMP2, REG_PV, a);
2310                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2311                         M_NOP;              /* nop ensures that XPC is less than the end */
2312                                             /* of basic block                            */
2313                         ALIGNCODENOP;
2314                         break;
2315
2316                 case ICMD_GOTO:         /* ... ==> ...                                */
2317                                         /* op1 = target JavaVM pc                     */
2318                         M_BR(0);
2319                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2320                         ALIGNCODENOP;
2321                         break;
2322
2323                 case ICMD_JSR:          /* ... ==> ...                                */
2324                                         /* op1 = target JavaVM pc                     */
2325
2326                         M_BSR(REG_ITMP1, 0);
2327                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2328                         break;
2329
2330                 case ICMD_RET:          /* ... ==> ...                                */
2331                                         /* op1 = local variable                       */
2332
2333                         var = &(r->locals[iptr->op1][TYPE_ADR]);
2334                         if (var->flags & INMEMORY) {
2335                                 M_ALD(REG_ITMP1, REG_SP, 8 * var->regoff);
2336                                 M_RET(REG_ZERO, REG_ITMP1);
2337                                 }
2338                         else
2339                                 M_RET(REG_ZERO, var->regoff);
2340                         ALIGNCODENOP;
2341                         break;
2342
2343                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2344                                         /* op1 = target JavaVM pc                     */
2345
2346                         var_to_reg_int(s1, src, REG_ITMP1);
2347                         M_BEQZ(s1, 0);
2348                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2349                         break;
2350
2351                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2352                                         /* op1 = target JavaVM pc                     */
2353
2354                         var_to_reg_int(s1, src, REG_ITMP1);
2355                         M_BNEZ(s1, 0);
2356                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2357                         break;
2358
2359                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2360                                         /* op1 = target JavaVM pc, val.i = constant   */
2361
2362                         var_to_reg_int(s1, src, REG_ITMP1);
2363                         if (iptr->val.i == 0) {
2364                                 M_BEQZ(s1, 0);
2365                                 }
2366                         else {
2367                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2368                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2369                                         }
2370                                 else {
2371                                         ICONST(REG_ITMP2, iptr->val.i);
2372                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2373                                         }
2374                                 M_BNEZ(REG_ITMP1, 0);
2375                                 }
2376                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2377                         break;
2378
2379                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2380                                         /* op1 = target JavaVM pc, val.i = constant   */
2381
2382                         var_to_reg_int(s1, src, REG_ITMP1);
2383                         if (iptr->val.i == 0) {
2384                                 M_BLTZ(s1, 0);
2385                                 }
2386                         else {
2387                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2388                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2389                                         }
2390                                 else {
2391                                         ICONST(REG_ITMP2, iptr->val.i);
2392                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2393                                         }
2394                                 M_BNEZ(REG_ITMP1, 0);
2395                                 }
2396                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2397                         break;
2398
2399                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2400                                         /* op1 = target JavaVM pc, val.i = constant   */
2401
2402                         var_to_reg_int(s1, src, REG_ITMP1);
2403                         if (iptr->val.i == 0) {
2404                                 M_BLEZ(s1, 0);
2405                                 }
2406                         else {
2407                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2408                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2409                                         }
2410                                 else {
2411                                         ICONST(REG_ITMP2, iptr->val.i);
2412                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2413                                         }
2414                                 M_BNEZ(REG_ITMP1, 0);
2415                                 }
2416                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2417                         break;
2418
2419                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2420                                         /* op1 = target JavaVM pc, val.i = constant   */
2421
2422                         var_to_reg_int(s1, src, REG_ITMP1);
2423                         if (iptr->val.i == 0) {
2424                                 M_BNEZ(s1, 0);
2425                                 }
2426                         else {
2427                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2428                                         M_CMPEQ_IMM(s1, iptr->val.i, REG_ITMP1);
2429                                         }
2430                                 else {
2431                                         ICONST(REG_ITMP2, iptr->val.i);
2432                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2433                                         }
2434                                 M_BEQZ(REG_ITMP1, 0);
2435                                 }
2436                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2437                         break;
2438
2439                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2440                                         /* op1 = target JavaVM pc, val.i = constant   */
2441
2442                         var_to_reg_int(s1, src, REG_ITMP1);
2443                         if (iptr->val.i == 0) {
2444                                 M_BGTZ(s1, 0);
2445                                 }
2446                         else {
2447                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2448                                         M_CMPLE_IMM(s1, iptr->val.i, REG_ITMP1);
2449                                         }
2450                                 else {
2451                                         ICONST(REG_ITMP2, iptr->val.i);
2452                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2453                                         }
2454                                 M_BEQZ(REG_ITMP1, 0);
2455                                 }
2456                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2457                         break;
2458
2459                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2460                                         /* op1 = target JavaVM pc, val.i = constant   */
2461
2462                         var_to_reg_int(s1, src, REG_ITMP1);
2463                         if (iptr->val.i == 0) {
2464                                 M_BGEZ(s1, 0);
2465                                 }
2466                         else {
2467                                 if ((iptr->val.i > 0) && (iptr->val.i <= 255)) {
2468                                         M_CMPLT_IMM(s1, iptr->val.i, REG_ITMP1);
2469                                         }
2470                                 else {
2471                                         ICONST(REG_ITMP2, iptr->val.i);
2472                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2473                                         }
2474                                 M_BEQZ(REG_ITMP1, 0);
2475                                 }
2476                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2477                         break;
2478
2479                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2480                                         /* op1 = target JavaVM pc, val.l = constant   */
2481
2482                         var_to_reg_int(s1, src, REG_ITMP1);
2483                         if (iptr->val.l == 0) {
2484                                 M_BEQZ(s1, 0);
2485                                 }
2486                         else {
2487                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2488                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2489                                         }
2490                                 else {
2491                                         LCONST(REG_ITMP2, iptr->val.l);
2492                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2493                                         }
2494                                 M_BNEZ(REG_ITMP1, 0);
2495                                 }
2496                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2497                         break;
2498
2499                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2500                                         /* op1 = target JavaVM pc, val.l = constant   */
2501
2502                         var_to_reg_int(s1, src, REG_ITMP1);
2503                         if (iptr->val.l == 0) {
2504                                 M_BLTZ(s1, 0);
2505                                 }
2506                         else {
2507                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2508                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2509                                         }
2510                                 else {
2511                                         LCONST(REG_ITMP2, iptr->val.l);
2512                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2513                                         }
2514                                 M_BNEZ(REG_ITMP1, 0);
2515                                 }
2516                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2517                         break;
2518
2519                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2520                                         /* op1 = target JavaVM pc, val.l = constant   */
2521
2522                         var_to_reg_int(s1, src, REG_ITMP1);
2523                         if (iptr->val.l == 0) {
2524                                 M_BLEZ(s1, 0);
2525                                 }
2526                         else {
2527                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2528                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2529                                         }
2530                                 else {
2531                                         LCONST(REG_ITMP2, iptr->val.l);
2532                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2533                                         }
2534                                 M_BNEZ(REG_ITMP1, 0);
2535                                 }
2536                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2537                         break;
2538
2539                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2540                                         /* op1 = target JavaVM pc, val.l = constant   */
2541
2542                         var_to_reg_int(s1, src, REG_ITMP1);
2543                         if (iptr->val.l == 0) {
2544                                 M_BNEZ(s1, 0);
2545                                 }
2546                         else {
2547                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2548                                         M_CMPEQ_IMM(s1, iptr->val.l, REG_ITMP1);
2549                                         }
2550                                 else {
2551                                         LCONST(REG_ITMP2, iptr->val.l);
2552                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2553                                         }
2554                                 M_BEQZ(REG_ITMP1, 0);
2555                                 }
2556                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2557                         break;
2558
2559                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2560                                         /* op1 = target JavaVM pc, val.l = constant   */
2561
2562                         var_to_reg_int(s1, src, REG_ITMP1);
2563                         if (iptr->val.l == 0) {
2564                                 M_BGTZ(s1, 0);
2565                                 }
2566                         else {
2567                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2568                                         M_CMPLE_IMM(s1, iptr->val.l, REG_ITMP1);
2569                                         }
2570                                 else {
2571                                         LCONST(REG_ITMP2, iptr->val.l);
2572                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2573                                         }
2574                                 M_BEQZ(REG_ITMP1, 0);
2575                                 }
2576                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2577                         break;
2578
2579                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2580                                         /* op1 = target JavaVM pc, val.l = constant   */
2581
2582                         var_to_reg_int(s1, src, REG_ITMP1);
2583                         if (iptr->val.l == 0) {
2584                                 M_BGEZ(s1, 0);
2585                                 }
2586                         else {
2587                                 if ((iptr->val.l > 0) && (iptr->val.l <= 255)) {
2588                                         M_CMPLT_IMM(s1, iptr->val.l, REG_ITMP1);
2589                                         }
2590                                 else {
2591                                         LCONST(REG_ITMP2, iptr->val.l);
2592                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2593                                         }
2594                                 M_BEQZ(REG_ITMP1, 0);
2595                                 }
2596                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2597                         break;
2598
2599                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2600                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2601                 case ICMD_IF_ACMPEQ:
2602
2603                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2604                         var_to_reg_int(s2, src, REG_ITMP2);
2605                         M_CMPEQ(s1, s2, REG_ITMP1);
2606                         M_BNEZ(REG_ITMP1, 0);
2607                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2608                         break;
2609
2610                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2611                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2612                 case ICMD_IF_ACMPNE:
2613
2614                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2615                         var_to_reg_int(s2, src, REG_ITMP2);
2616                         M_CMPEQ(s1, s2, REG_ITMP1);
2617                         M_BEQZ(REG_ITMP1, 0);
2618                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2619                         break;
2620
2621                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2622                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2623
2624                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2625                         var_to_reg_int(s2, src, REG_ITMP2);
2626                         M_CMPLT(s1, s2, REG_ITMP1);
2627                         M_BNEZ(REG_ITMP1, 0);
2628                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2629                         break;
2630
2631                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2632                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2633
2634                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2635                         var_to_reg_int(s2, src, REG_ITMP2);
2636                         M_CMPLE(s1, s2, REG_ITMP1);
2637                         M_BEQZ(REG_ITMP1, 0);
2638                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2639                         break;
2640
2641                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2642                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2643
2644                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2645                         var_to_reg_int(s2, src, REG_ITMP2);
2646                         M_CMPLE(s1, s2, REG_ITMP1);
2647                         M_BNEZ(REG_ITMP1, 0);
2648                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2649                         break;
2650
2651                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2652                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2653
2654                         var_to_reg_int(s1, src->prev, REG_ITMP1);
2655                         var_to_reg_int(s2, src, REG_ITMP2);
2656                         M_CMPLT(s1, s2, REG_ITMP1);
2657                         M_BEQZ(REG_ITMP1, 0);
2658                         codegen_addreference(m, BlockPtrOfPC(iptr->op1), mcodeptr);
2659                         break;
2660
2661                 /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST                           */
2662
2663                 case ICMD_ELSE_ICONST:  /* handled by IFxx_ICONST                     */
2664                         break;
2665
2666                 case ICMD_IFEQ_ICONST:  /* ..., value ==> ..., constant               */
2667                                         /* val.i = constant                           */
2668
2669                         var_to_reg_int(s1, src, REG_ITMP1);
2670                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2671                         s3 = iptr->val.i;
2672                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2673                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2674                                         M_CMPEQ(s1, REG_ZERO, d);
2675                                         store_reg_to_var_int(iptr->dst, d);
2676                                         break;
2677                                         }
2678                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2679                                         M_CMPEQ(s1, REG_ZERO, d);
2680                                         M_XOR_IMM(d, 1, d);
2681                                         store_reg_to_var_int(iptr->dst, d);
2682                                         break;
2683                                         }
2684                                 if (s1 == d) {
2685                                         M_MOV(s1, REG_ITMP1);
2686                                         s1 = REG_ITMP1;
2687                                         }
2688                                 ICONST(d, iptr[1].val.i);
2689                                 }
2690                         if ((s3 >= 0) && (s3 <= 255)) {
2691                                 M_CMOVEQ_IMM(s1, s3, d);
2692                                 }
2693                         else {
2694                                 ICONST(REG_ITMP2, s3);
2695                                 M_CMOVEQ(s1, REG_ITMP2, d);
2696                                 }
2697                         store_reg_to_var_int(iptr->dst, d);
2698                         break;
2699
2700                 case ICMD_IFNE_ICONST:  /* ..., value ==> ..., constant               */
2701                                         /* val.i = constant                           */
2702
2703                         var_to_reg_int(s1, src, REG_ITMP1);
2704                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2705                         s3 = iptr->val.i;
2706                         if (iptr[1].opc == ICMD_ELSE_ICONST) {
2707                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2708                                         M_CMPEQ(s1, REG_ZERO, d);
2709                                         store_reg_to_var_int(iptr->dst, d);
2710                                         break;
2711                                         }
2712                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2713                                         M_CMPEQ(s1, REG_ZERO, d);
2714                                         M_XOR_IMM(d, 1, d);
2715                                         store_reg_to_var_int(iptr->dst, d);
2716                                         break;
2717                                         }
2718                                 if (s1 == d) {
2719                                         M_MOV(s1, REG_ITMP1);
2720                                         s1 = REG_ITMP1;
2721                                         }
2722                                 ICONST(d, iptr[1].val.i);
2723                                 }
2724                         if ((s3 >= 0) && (s3 <= 255)) {
2725                                 M_CMOVNE_IMM(s1, s3, d);
2726                                 }
2727                         else {
2728                                 ICONST(REG_ITMP2, s3);
2729                                 M_CMOVNE(s1, REG_ITMP2, d);
2730                                 }
2731                         store_reg_to_var_int(iptr->dst, d);
2732                         break;
2733
2734                 case ICMD_IFLT_ICONST:  /* ..., value ==> ..., constant               */
2735                                         /* val.i = constant                           */
2736
2737                         var_to_reg_int(s1, src, REG_ITMP1);
2738                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2739                         s3 = iptr->val.i;
2740                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2741                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2742                                         M_CMPLT(s1, REG_ZERO, d);
2743                                         store_reg_to_var_int(iptr->dst, d);
2744                                         break;
2745                                         }
2746                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2747                                         M_CMPLE(REG_ZERO, s1, d);
2748                                         store_reg_to_var_int(iptr->dst, d);
2749                                         break;
2750                                         }
2751                                 if (s1 == d) {
2752                                         M_MOV(s1, REG_ITMP1);
2753                                         s1 = REG_ITMP1;
2754                                         }
2755                                 ICONST(d, iptr[1].val.i);
2756                                 }
2757                         if ((s3 >= 0) && (s3 <= 255)) {
2758                                 M_CMOVLT_IMM(s1, s3, d);
2759                                 }
2760                         else {
2761                                 ICONST(REG_ITMP2, s3);
2762                                 M_CMOVLT(s1, REG_ITMP2, d);
2763                                 }
2764                         store_reg_to_var_int(iptr->dst, d);
2765                         break;
2766
2767                 case ICMD_IFGE_ICONST:  /* ..., value ==> ..., constant               */
2768                                         /* val.i = constant                           */
2769
2770                         var_to_reg_int(s1, src, REG_ITMP1);
2771                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2772                         s3 = iptr->val.i;
2773                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2774                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2775                                         M_CMPLE(REG_ZERO, s1, d);
2776                                         store_reg_to_var_int(iptr->dst, d);
2777                                         break;
2778                                         }
2779                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2780                                         M_CMPLT(s1, REG_ZERO, d);
2781                                         store_reg_to_var_int(iptr->dst, d);
2782                                         break;
2783                                         }
2784                                 if (s1 == d) {
2785                                         M_MOV(s1, REG_ITMP1);
2786                                         s1 = REG_ITMP1;
2787                                         }
2788                                 ICONST(d, iptr[1].val.i);
2789                                 }
2790                         if ((s3 >= 0) && (s3 <= 255)) {
2791                                 M_CMOVGE_IMM(s1, s3, d);
2792                                 }
2793                         else {
2794                                 ICONST(REG_ITMP2, s3);
2795                                 M_CMOVGE(s1, REG_ITMP2, d);
2796                                 }
2797                         store_reg_to_var_int(iptr->dst, d);
2798                         break;
2799
2800                 case ICMD_IFGT_ICONST:  /* ..., value ==> ..., constant               */
2801                                         /* val.i = constant                           */
2802
2803                         var_to_reg_int(s1, src, REG_ITMP1);
2804                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2805                         s3 = iptr->val.i;
2806                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2807                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2808                                         M_CMPLT(REG_ZERO, s1, d);
2809                                         store_reg_to_var_int(iptr->dst, d);
2810                                         break;
2811                                         }
2812                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2813                                         M_CMPLE(s1, REG_ZERO, d);
2814                                         store_reg_to_var_int(iptr->dst, d);
2815                                         break;
2816                                         }
2817                                 if (s1 == d) {
2818                                         M_MOV(s1, REG_ITMP1);
2819                                         s1 = REG_ITMP1;
2820                                         }
2821                                 ICONST(d, iptr[1].val.i);
2822                                 }
2823                         if ((s3 >= 0) && (s3 <= 255)) {
2824                                 M_CMOVGT_IMM(s1, s3, d);
2825                                 }
2826                         else {
2827                                 ICONST(REG_ITMP2, s3);
2828                                 M_CMOVGT(s1, REG_ITMP2, d);
2829                                 }
2830                         store_reg_to_var_int(iptr->dst, d);
2831                         break;
2832
2833                 case ICMD_IFLE_ICONST:  /* ..., value ==> ..., constant               */
2834                                         /* val.i = constant                           */
2835
2836                         var_to_reg_int(s1, src, REG_ITMP1);
2837                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
2838                         s3 = iptr->val.i;
2839                         if ((iptr[1].opc == ICMD_ELSE_ICONST)) {
2840                                 if ((s3 == 1) && (iptr[1].val.i == 0)) {
2841                                         M_CMPLE(s1, REG_ZERO, d);
2842                                         store_reg_to_var_int(iptr->dst, d);
2843                                         break;
2844                                         }
2845                                 if ((s3 == 0) && (iptr[1].val.i == 1)) {
2846                                         M_CMPLT(REG_ZERO, s1, d);
2847                                         store_reg_to_var_int(iptr->dst, d);
2848                                         break;
2849                                         }
2850                                 if (s1 == d) {
2851                                         M_MOV(s1, REG_ITMP1);
2852                                         s1 = REG_ITMP1;
2853                                         }
2854                                 ICONST(d, iptr[1].val.i);
2855                                 }
2856                         if ((s3 >= 0) && (s3 <= 255)) {
2857                                 M_CMOVLE_IMM(s1, s3, d);
2858                                 }
2859                         else {
2860                                 ICONST(REG_ITMP2, s3);
2861                                 M_CMOVLE(s1, REG_ITMP2, d);
2862                                 }
2863                         store_reg_to_var_int(iptr->dst, d);
2864                         break;
2865
2866
2867                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2868                 case ICMD_LRETURN:
2869                 case ICMD_ARETURN:
2870
2871                         var_to_reg_int(s1, src, REG_RESULT);
2872                         M_INTMOVE(s1, REG_RESULT);
2873
2874 #if defined(USE_THREADS)
2875                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2876                                 s4 disp;
2877                                 a = dseg_addaddress(m, (void *) (builtin_monitorexit));
2878                                 M_ALD(REG_PV, REG_PV, a);
2879                                 M_ALD(r->argintregs[0], REG_SP, r->maxmemuse * 8);
2880                                 M_LST(REG_RESULT, REG_SP, r->maxmemuse * 8);
2881                                 M_JSR(REG_RA, REG_PV);
2882                                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
2883                                 M_LDA(REG_PV, REG_RA, disp);
2884                                 M_LLD(REG_RESULT, REG_SP, r->maxmemuse * 8);
2885                         }
2886 #endif
2887
2888                         goto nowperformreturn;
2889
2890                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2891                 case ICMD_DRETURN:
2892
2893                         var_to_reg_flt(s1, src, REG_FRESULT);
2894                         M_FLTMOVE(s1, REG_FRESULT);
2895
2896 #if defined(USE_THREADS)
2897                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2898                                 s4 disp;
2899                                 a = dseg_addaddress(m, (void *) (builtin_monitorexit));
2900                                 M_ALD(REG_PV, REG_PV, a);
2901                                 M_ALD(r->argintregs[0], REG_SP, r->maxmemuse * 8);
2902                                 M_DST(REG_FRESULT, REG_SP, r->maxmemuse * 8);
2903                                 M_JSR(REG_RA, REG_PV);
2904                                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
2905                                 M_LDA(REG_PV, REG_RA, disp);
2906                                 M_DLD(REG_FRESULT, REG_SP, r->maxmemuse * 8);
2907                         }
2908 #endif
2909
2910                         goto nowperformreturn;
2911
2912                 case ICMD_RETURN:      /* ...  ==> ...                                */
2913
2914 #if defined(USE_THREADS)
2915                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2916                                 s4 disp;
2917                                 a = dseg_addaddress(m, (void *) (builtin_monitorexit));
2918                                 M_ALD(REG_PV, REG_PV, a);
2919                                 M_ALD(r->argintregs[0], REG_SP, r->maxmemuse * 8);
2920                                 M_JSR(REG_RA, REG_PV);
2921                                 disp = -(s4) ((u1 *) mcodeptr - cd->mcodebase);
2922                                 M_LDA(REG_PV, REG_RA, disp);
2923                         }
2924 #endif
2925
2926 nowperformreturn:
2927                         {
2928                         s4 i, p;
2929
2930                         p = parentargs_base;
2931
2932                         /* restore return address                                         */
2933
2934                         if (!m->isleafmethod) {
2935                                 p--; M_LLD(REG_RA, REG_SP, p * 8);
2936                         }
2937
2938                         /* restore saved registers                                        */
2939
2940                         for (i = r->savintregcnt - 1; i >= r->maxsavintreguse; i--) {
2941                                 p--; M_LLD(r->savintregs[i], REG_SP, p * 8);
2942                         }
2943                         for (i = r->savfltregcnt - 1; i >= r->maxsavfltreguse; i--) {
2944                                 p--; M_DLD(r->savfltregs[i], REG_SP, p * 8);
2945                         }
2946
2947                         /* deallocate stack                                               */
2948
2949                         if (parentargs_base) {
2950                                 M_LDA(REG_SP, REG_SP, parentargs_base * 8);
2951                         }
2952
2953                         /* call trace function */
2954
2955                         if (runverbose) {
2956                                 M_LDA(REG_SP, REG_SP, -3 * 8);
2957                                 M_AST(REG_RA, REG_SP, 0 * 8);
2958                                 M_LST(REG_RESULT, REG_SP, 1 * 8);
2959                                 M_DST(REG_FRESULT, REG_SP, 2 * 8);
2960                                 a = dseg_addaddress(m, m);
2961                                 M_ALD(r->argintregs[0], REG_PV, a);
2962                                 M_MOV(REG_RESULT, r->argintregs[1]);
2963                                 M_FLTMOVE(REG_FRESULT, r->argfltregs[2]);
2964                                 M_FLTMOVE(REG_FRESULT, r->argfltregs[3]);
2965                                 a = dseg_addaddress(m, (void *) builtin_displaymethodstop);
2966                                 M_ALD(REG_PV, REG_PV, a);
2967                                 M_JSR(REG_RA, REG_PV);
2968                                 s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
2969                                 if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
2970                                 else {
2971                                         s4 ml = -s1, mh = 0;
2972                                         while (ml < -32768) { ml += 65536; mh--; }
2973                                         M_LDA(REG_PV, REG_RA, ml);
2974                                         M_LDAH(REG_PV, REG_PV, mh);
2975                                 }
2976                                 M_DLD(REG_FRESULT, REG_SP, 2 * 8);
2977                                 M_LLD(REG_RESULT, REG_SP, 1 * 8);
2978                                 M_ALD(REG_RA, REG_SP, 0 * 8);
2979                                 M_LDA(REG_SP, REG_SP, 3 * 8);
2980                         }
2981
2982                         M_RET(REG_ZERO, REG_RA);
2983                         ALIGNCODENOP;
2984                         }
2985                         break;
2986
2987
2988                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2989                         {
2990                         s4 i, l, *s4ptr;
2991                         void **tptr;
2992
2993                         tptr = (void **) iptr->target;
2994
2995                         s4ptr = iptr->val.a;
2996                         l = s4ptr[1];                          /* low     */
2997                         i = s4ptr[2];                          /* high    */
2998
2999                         var_to_reg_int(s1, src, REG_ITMP1);
3000                         if (l == 0)
3001                                 {M_INTMOVE(s1, REG_ITMP1);}
3002                         else if (l <= 32768) {
3003                                 M_LDA(REG_ITMP1, s1, -l);
3004                                 }
3005                         else {
3006                                 ICONST(REG_ITMP2, l);
3007                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
3008                                 }
3009                         i = i - l + 1;
3010
3011                         /* range check */
3012
3013                         if (i <= 256)
3014                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
3015                         else {
3016                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
3017                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3018                                 }
3019                         M_BEQZ(REG_ITMP2, 0);
3020
3021
3022                         /* codegen_addreference(m, BlockPtrOfPC(s4ptr[0]), mcodeptr); */
3023                         codegen_addreference(m, (basicblock *) tptr[0], mcodeptr);
3024
3025                         /* build jump table top down and use address of lowest entry */
3026
3027                         /* s4ptr += 3 + i; */
3028                         tptr += i;
3029
3030                         while (--i >= 0) {
3031                                 /* dseg_addtarget(m, BlockPtrOfPC(*--s4ptr)); */
3032                                 dseg_addtarget(m, (basicblock *) tptr[0]);
3033                                 --tptr;
3034                                 }
3035                         }
3036
3037                         /* length of dataseg after last dseg_addtarget is used by load */
3038
3039                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
3040                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
3041                         M_JMP(REG_ZERO, REG_ITMP2);
3042                         ALIGNCODENOP;
3043                         break;
3044
3045
3046                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
3047                         {
3048                         s4 i, l, val, *s4ptr;
3049                         void **tptr;
3050
3051                         tptr = (void **) iptr->target;
3052
3053                         s4ptr = iptr->val.a;
3054                         l = s4ptr[0];                          /* default  */
3055                         i = s4ptr[1];                          /* count    */
3056
3057                         MCODECHECK((i<<2)+8);
3058                         var_to_reg_int(s1, src, REG_ITMP1);
3059                         while (--i >= 0) {
3060                                 s4ptr += 2;
3061                                 ++tptr;
3062
3063                                 val = s4ptr[0];
3064                                 if ((val >= 0) && (val <= 255)) {
3065                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
3066                                         }
3067                                 else {
3068                                         if ((val >= -32768) && (val <= 32767)) {
3069                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
3070                                                 }
3071                                         else {
3072                                                 a = dseg_adds4(m, val);
3073                                                 M_ILD(REG_ITMP2, REG_PV, a);
3074                                                 }
3075                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
3076                                         }
3077                                 M_BNEZ(REG_ITMP2, 0);
3078                                 /* codegen_addreference(m, BlockPtrOfPC(s4ptr[1]), mcodeptr); */
3079                                 codegen_addreference(m, (basicblock *) tptr[0], mcodeptr);
3080                                 }
3081
3082                         M_BR(0);
3083                         /* codegen_addreference(m, BlockPtrOfPC(l), mcodeptr); */
3084
3085                         tptr = (void **) iptr->target;
3086                         codegen_addreference(m, (basicblock *) tptr[0], mcodeptr);
3087
3088                         ALIGNCODENOP;
3089                         break;
3090                         }
3091
3092
3093                 case ICMD_BUILTIN3:     /* ..., arg1, arg2, arg3 ==> ...              */
3094                                         /* op1 = return type, val.a = function pointer*/
3095                         s3 = 3;
3096                         goto gen_method;
3097
3098                 case ICMD_BUILTIN2:     /* ..., arg1, arg2 ==> ...                    */
3099                                         /* op1 = return type, val.a = function pointer*/
3100                         s3 = 2;
3101                         goto gen_method;
3102
3103                 case ICMD_BUILTIN1:     /* ..., arg1 ==> ...                          */
3104                                         /* op1 = return type, val.a = function pointer*/
3105                         s3 = 1;
3106                         goto gen_method;
3107
3108                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
3109                                         /* op1 = arg count, val.a = method pointer    */
3110
3111                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3112                                         /* op1 = arg count, val.a = method pointer    */
3113
3114                 case ICMD_INVOKEVIRTUAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
3115                                         /* op1 = arg count, val.a = method pointer    */
3116
3117                 case ICMD_INVOKEINTERFACE:/*.., objectref, [arg1, [arg2 ...]] ==> ... */
3118                                         /* op1 = arg count, val.a = method pointer    */
3119
3120                         s3 = iptr->op1;
3121
3122 gen_method: {
3123                         methodinfo *lm;
3124
3125                         MCODECHECK((s3 << 1) + 64);
3126
3127                         /* copy arguments to registers or stack location                  */
3128
3129                         for (; --s3 >= 0; src = src->prev) {
3130                                 if (src->varkind == ARGVAR)
3131                                         continue;
3132                                 if (IS_INT_LNG_TYPE(src->type)) {
3133                                         if (s3 < INT_ARG_CNT) {
3134                                                 s1 = r->argintregs[s3];
3135                                                 var_to_reg_int(d, src, s1);
3136                                                 M_INTMOVE(d, s1);
3137
3138                                         } else {
3139                                                 var_to_reg_int(d, src, REG_ITMP1);
3140                                                 M_LST(d, REG_SP, 8 * (s3 - INT_ARG_CNT));
3141                                         }
3142
3143                                 } else {
3144                                         if (s3 < FLT_ARG_CNT) {
3145                                                 s1 = r->argfltregs[s3];
3146                                                 var_to_reg_flt(d, src, s1);
3147                                                 M_FLTMOVE(d, s1);
3148
3149                                         } else {
3150                                                 var_to_reg_flt(d, src, REG_FTMP1);
3151                                                 M_DST(d, REG_SP, 8 * (s3 - FLT_ARG_CNT));
3152                                         }
3153                                 }
3154                         } /* end of for */
3155
3156                         lm = iptr->val.a;
3157                         switch (iptr->opc) {
3158                         case ICMD_BUILTIN3:
3159                         case ICMD_BUILTIN2:
3160                         case ICMD_BUILTIN1:
3161                                 a = dseg_addaddress(m, (void *) lm);
3162                                 d = iptr->op1;
3163
3164                                 M_ALD(REG_PV, REG_PV, a);     /* Pointer to built-in-function */
3165                                 break;
3166
3167                         case ICMD_INVOKESTATIC:
3168                         case ICMD_INVOKESPECIAL:
3169                                 a = dseg_addaddress(m, lm->stubroutine);
3170                                 d = lm->returntype;
3171
3172                                 M_ALD(REG_PV, REG_PV, a);            /* method pointer in r27 */
3173                                 break;
3174
3175                         case ICMD_INVOKEVIRTUAL:
3176                                 d = lm->returntype;
3177
3178                                 gen_nullptr_check(r->argintregs[0]);
3179                                 M_ALD(REG_METHODPTR, r->argintregs[0],
3180                                           OFFSET(java_objectheader, vftbl));
3181                                 M_ALD(REG_PV, REG_METHODPTR, OFFSET(vftbl_t, table[0]) +
3182                                           sizeof(methodptr) * lm->vftblindex);
3183                                 break;
3184
3185                         case ICMD_INVOKEINTERFACE:
3186                                 d = lm->returntype;
3187
3188                                 gen_nullptr_check(r->argintregs[0]);
3189                                 M_ALD(REG_METHODPTR, r->argintregs[0],
3190                                           OFFSET(java_objectheader, vftbl));
3191                                 M_ALD(REG_METHODPTR, REG_METHODPTR,
3192                                           OFFSET(vftbl_t, interfacetable[0]) -
3193                                           sizeof(methodptr*) * lm->class->index);
3194                                 M_ALD(REG_PV, REG_METHODPTR,
3195                                           sizeof(methodptr) * (lm - lm->class->methods));
3196                                 break;
3197                         }
3198
3199                         M_JSR(REG_RA, REG_PV);
3200
3201                         /* recompute pv */
3202
3203                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3204                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3205                         else {
3206                                 s4 ml = -s1, mh = 0;
3207                                 while (ml < -32768) { ml += 65536; mh--; }
3208                                 M_LDA(REG_PV, REG_RA, ml);
3209                                 M_LDAH(REG_PV, REG_PV, mh);
3210                         }
3211
3212                         /* d contains return type */
3213
3214                         if (d != TYPE_VOID) {
3215                                 if (IS_INT_LNG_TYPE(iptr->dst->type)) {
3216                                         s1 = reg_of_var(m, iptr->dst, REG_RESULT);
3217                                         M_INTMOVE(REG_RESULT, s1);
3218                                         store_reg_to_var_int(iptr->dst, s1);
3219
3220                                 } else {
3221                                         s1 = reg_of_var(m, iptr->dst, REG_FRESULT);
3222                                         M_FLTMOVE(REG_FRESULT, s1);
3223                                         store_reg_to_var_flt(iptr->dst, s1);
3224                                 }
3225                         }
3226                         }
3227                         break;
3228
3229
3230                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3231
3232                                       /* op1:   0 == array, 1 == class                */
3233                                       /* val.a: (classinfo*) superclass               */
3234
3235 /*          superclass is an interface:
3236  *
3237  *          return (sub != NULL) &&
3238  *                 (sub->vftbl->interfacetablelength > super->index) &&
3239  *                 (sub->vftbl->interfacetable[-super->index] != NULL);
3240  *
3241  *          superclass is a class:
3242  *
3243  *          return ((sub != NULL) && (0
3244  *                  <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3245  *                  super->vftbl->diffvall));
3246  */
3247
3248                         {
3249                         classinfo *super = (classinfo*) iptr->val.a;
3250
3251 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3252                         codegen_threadcritrestart(m, (u1 *) mcodeptr - cd->mcodebase);
3253 #endif
3254                         var_to_reg_int(s1, src, REG_ITMP1);
3255                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
3256                         if (s1 == d) {
3257                                 M_MOV(s1, REG_ITMP1);
3258                                 s1 = REG_ITMP1;
3259                                 }
3260                         M_CLR(d);
3261                         if (iptr->op1) {                               /* class/interface */
3262                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3263                                         M_BEQZ(s1, 6);
3264                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3265                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3266                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3267                                         M_BLEZ(REG_ITMP2, 2);
3268                                         M_ALD(REG_ITMP1, REG_ITMP1,
3269                                               OFFSET(vftbl_t, interfacetable[0]) -
3270                                               super->index * sizeof(methodptr*));
3271                                         M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3272                                         }
3273                                 else {                                     /* class           */
3274 /*
3275                                         s2 = super->vftbl->diffval;
3276                                         M_BEQZ(s1, 4 + (s2 > 255));
3277                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3278                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3279                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3280                                         if (s2 <= 255)
3281                                                 M_CMPULE_IMM(REG_ITMP1, s2, d);
3282                                         else {
3283                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3284                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3285                                                 }
3286 */
3287                                         M_BEQZ(s1, 7);
3288                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3289                                         a = dseg_addaddress(m, (void*) super->vftbl);
3290                                         M_ALD(REG_ITMP2, REG_PV, a);
3291 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3292                                         codegen_threadcritstart(m, (u1 *) mcodeptr - cd->mcodebase);
3293 #endif
3294                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3295                                         M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3296                                         M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3297 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3298                                         codegen_threadcritstop(m, (u1 *) mcodeptr - cd->mcodebase);
3299 #endif
3300                                         M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3301                                         M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3302                                         }
3303                                 }
3304                         else
3305                                 panic ("internal error: no inlined array instanceof");
3306                         }
3307                         store_reg_to_var_int(iptr->dst, d);
3308                         break;
3309
3310                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
3311
3312                                       /* op1:   0 == array, 1 == class                */
3313                                       /* val.a: (classinfo*) superclass               */
3314
3315 /*          superclass is an interface:
3316  *
3317  *          OK if ((sub == NULL) ||
3318  *                 (sub->vftbl->interfacetablelength > super->index) &&
3319  *                 (sub->vftbl->interfacetable[-super->index] != NULL));
3320  *
3321  *          superclass is a class:
3322  *
3323  *          OK if ((sub == NULL) || (0
3324  *                 <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3325  *                 super->vftbl->diffvall));
3326  */
3327
3328                         {
3329                         classinfo *super = (classinfo *) iptr->val.a;
3330
3331 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3332                         codegen_threadcritrestart(m, (u1 *) mcodeptr - cd->mcodebase);
3333 #endif
3334                         d = reg_of_var(m, iptr->dst, REG_ITMP3);
3335                         var_to_reg_int(s1, src, d);
3336                         if (iptr->op1) {                               /* class/interface */
3337                                 if (super->flags & ACC_INTERFACE) {        /* interface       */
3338                                         M_BEQZ(s1, 6);
3339                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3340                                         M_ILD(REG_ITMP2, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3341                                         M_LDA(REG_ITMP2, REG_ITMP2, - super->index);
3342                                         M_BLEZ(REG_ITMP2, 0);
3343                                         codegen_addxcastrefs(m, mcodeptr);
3344                                         M_ALD(REG_ITMP2, REG_ITMP1,
3345                                               OFFSET(vftbl_t, interfacetable[0]) -
3346                                               super->index * sizeof(methodptr*));
3347                                         M_BEQZ(REG_ITMP2, 0);
3348                                         codegen_addxcastrefs(m, mcodeptr);
3349                                         }
3350                                 else {                                     /* class           */
3351 /*
3352                                         s2 = super->vftbl->diffval;
3353                                         M_BEQZ(s1, 4 + (s2 != 0) + (s2 > 255));
3354                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3355                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3356                                         M_LDA(REG_ITMP1, REG_ITMP1, - super->vftbl->baseval);
3357                                         if (s2 == 0) {
3358                                                 M_BNEZ(REG_ITMP1, 0);
3359                                                 }
3360                                         else if (s2 <= 255) {
3361                                                 M_CMPULE_IMM(REG_ITMP1, s2, REG_ITMP2);
3362                                                 M_BEQZ(REG_ITMP2, 0);
3363                                                 }
3364                                         else {
3365                                                 M_LDA(REG_ITMP2, REG_ZERO, s2);
3366                                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3367                                                 M_BEQZ(REG_ITMP2, 0);
3368                                                 }
3369 */
3370                                         M_BEQZ(s1, 8 + (d == REG_ITMP3));
3371                                         M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3372                                         a = dseg_addaddress(m, (void *) super->vftbl);
3373                                         M_ALD(REG_ITMP2, REG_PV, a);
3374 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3375                                         codegen_threadcritstart(m, (u1 *) mcodeptr - cd->mcodebase);
3376 #endif
3377                                         M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3378                                         if (d != REG_ITMP3) {
3379                                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3380                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3381 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3382                                                 codegen_threadcritstop(m, (u1 *) mcodeptr - cd->mcodebase);
3383 #endif
3384                                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3385                                                 }
3386                                         else {
3387                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3388                                                 M_ISUB(REG_ITMP1, REG_ITMP2, REG_ITMP1);
3389                                                 M_ALD(REG_ITMP2, REG_PV, a);
3390                                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3391 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3392                                                 codegen_threadcritstop(m, (u1 *) mcodeptr - cd->mcodebase);
3393 #endif
3394                                                 }
3395                                         M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
3396                                         M_BEQZ(REG_ITMP2, 0);
3397                                         codegen_addxcastrefs(m, mcodeptr);
3398                                         }
3399                                 }
3400                         else
3401                                 panic ("internal error: no inlined array checkcast");
3402                         }
3403                         M_INTMOVE(s1, d);
3404                         store_reg_to_var_int(iptr->dst, d);
3405                         break;
3406
3407                 case ICMD_CHECKASIZE:  /* ..., size ==> ..., size                     */
3408
3409                         var_to_reg_int(s1, src, REG_ITMP1);
3410                         M_BLTZ(s1, 0);
3411                         codegen_addxcheckarefs(m, mcodeptr);
3412                         break;
3413
3414                 case ICMD_CHECKEXCEPTION:    /* ... ==> ...                           */
3415
3416                         M_BEQZ(REG_RESULT, 0);
3417                         codegen_addxexceptionrefs(m, mcodeptr);
3418                         break;
3419
3420                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3421                                       /* op1 = dimension, val.a = array descriptor    */
3422
3423                         /* check for negative sizes and copy sizes to stack if necessary  */
3424
3425                         MCODECHECK((iptr->op1 << 1) + 64);
3426
3427                         for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
3428                                 var_to_reg_int(s2, src, REG_ITMP1);
3429                                 M_BLTZ(s2, 0);
3430                                 codegen_addxcheckarefs(m, mcodeptr);
3431
3432                                 /* copy sizes to stack (argument numbers >= INT_ARG_CNT)      */
3433
3434                                 if (src->varkind != ARGVAR) {
3435                                         M_LST(s2, REG_SP, 8 * (s1 + INT_ARG_CNT));
3436                                 }
3437                         }
3438
3439                         /* a0 = dimension count */
3440
3441                         ICONST(r->argintregs[0], iptr->op1);
3442
3443                         /* a1 = arraydescriptor */
3444
3445                         a = dseg_addaddress(m, iptr->val.a);
3446                         M_ALD(r->argintregs[1], REG_PV, a);
3447
3448                         /* a2 = pointer to dimensions = stack pointer */
3449
3450                         M_INTMOVE(REG_SP, r->argintregs[2]);
3451
3452                         a = dseg_addaddress(m, (void *) builtin_nmultianewarray);
3453                         M_ALD(REG_PV, REG_PV, a);
3454                         M_JSR(REG_RA, REG_PV);
3455                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3456                         if (s1 <= 32768)
3457                                 M_LDA(REG_PV, REG_RA, -s1);
3458                         else {
3459                                 s4 ml = -s1, mh = 0;
3460                                 while (ml < -32768) { ml += 65536; mh--; }
3461                                 M_LDA(REG_PV, REG_RA, ml);
3462                                 M_LDAH(REG_PV, REG_PV, mh);
3463                         }
3464                         s1 = reg_of_var(m, iptr->dst, REG_RESULT);
3465                         M_INTMOVE(REG_RESULT, s1);
3466                         store_reg_to_var_int(iptr->dst, s1);
3467                         break;
3468
3469
3470                 default: error ("Unknown pseudo command: %d", iptr->opc);
3471
3472
3473
3474         } /* switch */
3475
3476         } /* for instruction */
3477
3478         /* copy values to interface registers */
3479
3480         src = bptr->outstack;
3481         len = bptr->outdepth;
3482         MCODECHECK(64+len);
3483         while (src) {
3484                 len--;
3485                 if ((src->varkind != STACKVAR)) {
3486                         s2 = src->type;
3487                         if (IS_FLT_DBL_TYPE(s2)) {
3488                                 var_to_reg_flt(s1, src, REG_FTMP1);
3489                                 if (!(r->interfaces[len][s2].flags & INMEMORY)) {
3490                                         M_FLTMOVE(s1,r->interfaces[len][s2].regoff);
3491                                         }
3492                                 else {
3493                                         M_DST(s1, REG_SP, 8 * r->interfaces[len][s2].regoff);
3494                                         }
3495                                 }
3496                         else {
3497                                 var_to_reg_int(s1, src, REG_ITMP1);
3498                                 if (!(r->interfaces[len][s2].flags & INMEMORY)) {
3499                                         M_INTMOVE(s1,r->interfaces[len][s2].regoff);
3500                                         }
3501                                 else {
3502                                         M_LST(s1, REG_SP, 8 * r->interfaces[len][s2].regoff);
3503                                         }
3504                                 }
3505                         }
3506                 src = src->prev;
3507                 }
3508         } /* if (bptr -> flags >= BBREACHED) */
3509         } /* for basic block */
3510
3511         {
3512         /* generate bound check stubs */
3513
3514         s4 *xcodeptr = NULL;
3515         branchref *bref;
3516
3517         for (bref = cd->xboundrefs; bref != NULL; bref = bref->next) {
3518                 gen_resolvebranch((u1*) cd->mcodebase + bref->branchpos,
3519                                   bref->branchpos,
3520                                                   (u1*) mcodeptr - cd->mcodebase);
3521
3522                 MCODECHECK(8);
3523
3524                 /* move index register into REG_ITMP1 */
3525                 M_MOV(bref->reg, REG_ITMP1);
3526                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3527
3528                 if (xcodeptr != NULL) {
3529                         M_BR(xcodeptr - mcodeptr - 1);
3530
3531                 } else {
3532                         xcodeptr = mcodeptr;
3533
3534                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3535                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3536
3537                         a = dseg_addaddress(m, string_java_lang_ArrayIndexOutOfBoundsException);
3538                         M_ALD(r->argintregs[0], REG_PV, a);
3539                         M_MOV(REG_ITMP1, r->argintregs[1]);
3540
3541                         a = dseg_addaddress(m, new_exception_int);
3542                         M_ALD(REG_PV, REG_PV, a);
3543                         M_JSR(REG_RA, REG_PV);
3544
3545                         /* recompute pv */
3546                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3547                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3548                         else {
3549                                 s4 ml = -s1, mh = 0;
3550                                 while (ml < -32768) { ml += 65536; mh--; }
3551                                 M_LDA(REG_PV, REG_RA, ml);
3552                                 M_LDAH(REG_PV, REG_PV, mh);
3553                         }
3554
3555                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3556
3557                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3558                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3559
3560                         a = dseg_addaddress(m, asm_handle_exception);
3561                         M_ALD(REG_ITMP3, REG_PV, a);
3562
3563                         M_JMP(REG_ZERO, REG_ITMP3);
3564                 }
3565         }
3566
3567         /* generate negative array size check stubs */
3568
3569         xcodeptr = NULL;
3570
3571         for (bref = cd->xcheckarefs; bref != NULL; bref = bref->next) {
3572                 if ((m->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3573                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3574                                                           bref->branchpos,
3575                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3576                         continue;
3577                 }
3578
3579                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3580                                   bref->branchpos,
3581                                                   (u1 *) mcodeptr - cd->mcodebase);
3582
3583                 MCODECHECK(8);
3584
3585                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3586
3587                 if (xcodeptr != NULL) {
3588                         M_BR(xcodeptr - mcodeptr - 1);
3589
3590                 } else {
3591                         xcodeptr = mcodeptr;
3592
3593                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3594                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3595
3596                         a = dseg_addaddress(m, string_java_lang_NegativeArraySizeException);
3597                         M_ALD(r->argintregs[0], REG_PV, a);
3598
3599                         a = dseg_addaddress(m, new_exception);
3600                         M_ALD(REG_PV, REG_PV, a);
3601                         M_JSR(REG_RA, REG_PV);
3602
3603                         /* recompute pv */
3604                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3605                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3606                         else {
3607                                 s4 ml = -s1, mh = 0;
3608                                 while (ml < -32768) { ml += 65536; mh--; }
3609                                 M_LDA(REG_PV, REG_RA, ml);
3610                                 M_LDAH(REG_PV, REG_PV, mh);
3611                         }
3612
3613                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3614
3615                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3616                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3617
3618                         a = dseg_addaddress(m, asm_handle_exception);
3619                         M_ALD(REG_ITMP3, REG_PV, a);
3620
3621                         M_JMP(REG_ZERO, REG_ITMP3);
3622                 }
3623         }
3624
3625         /* generate cast check stubs */
3626
3627         xcodeptr = NULL;
3628
3629         for (bref = cd->xcastrefs; bref != NULL; bref = bref->next) {
3630                 if ((m->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3631                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3632                                                           bref->branchpos,
3633                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3634                         continue;
3635                 }
3636
3637                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3638                                   bref->branchpos,
3639                                                   (u1 *) mcodeptr - cd->mcodebase);
3640
3641                 MCODECHECK(8);
3642
3643                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3644
3645                 if (xcodeptr != NULL) {
3646                         M_BR(xcodeptr - mcodeptr - 1);
3647
3648                 } else {
3649                         xcodeptr = mcodeptr;
3650
3651                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3652                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3653
3654                         a = dseg_addaddress(m, string_java_lang_ClassCastException);
3655                         M_ALD(r->argintregs[0], REG_PV, a);
3656
3657                         a = dseg_addaddress(m, new_exception);
3658                         M_ALD(REG_PV, REG_PV, a);
3659                         M_JSR(REG_RA, REG_PV);
3660
3661                         /* recompute pv */
3662                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3663                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3664                         else {
3665                                 s4 ml = -s1, mh = 0;
3666                                 while (ml < -32768) { ml += 65536; mh--; }
3667                                 M_LDA(REG_PV, REG_RA, ml);
3668                                 M_LDAH(REG_PV, REG_PV, mh);
3669                         }
3670
3671                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3672
3673                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3674                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3675
3676                         a = dseg_addaddress(m, asm_handle_exception);
3677                         M_ALD(REG_ITMP3, REG_PV, a);
3678
3679                         M_JMP(REG_ZERO, REG_ITMP3);
3680                 }
3681         }
3682
3683         /* generate exception check stubs */
3684
3685         xcodeptr = NULL;
3686
3687         for (bref = cd->xexceptionrefs; bref != NULL; bref = bref->next) {
3688                 if ((m->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3689                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3690                                                           bref->branchpos,
3691                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3692                         continue;
3693                 }
3694
3695                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3696                                   bref->branchpos,
3697                                                   (u1 *) mcodeptr - cd->mcodebase);
3698
3699                 MCODECHECK(8);
3700
3701                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3702
3703                 if (xcodeptr != NULL) {
3704                         M_BR(xcodeptr - mcodeptr - 1);
3705
3706                 } else {
3707                         xcodeptr = mcodeptr;
3708
3709 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3710                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3711                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3712
3713                         a = dseg_addaddress(m, &builtin_get_exceptionptrptr);
3714                         M_ALD(REG_PV, REG_PV, a);
3715                         M_JSR(REG_RA, REG_PV);
3716
3717                         /* recompute pv */
3718                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3719                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3720                         else {
3721                                 s4 ml = -s1, mh = 0;
3722                                 while (ml < -32768) { ml += 65536; mh--; }
3723                                 M_LDA(REG_PV, REG_RA, ml);
3724                                 M_LDAH(REG_PV, REG_PV, mh);
3725                         }
3726
3727                         M_ALD(REG_ITMP1_XPTR, REG_RESULT, 0);
3728                         M_AST(REG_ZERO, REG_RESULT, 0);
3729
3730                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3731                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3732 #else
3733                         a = dseg_addaddress(m, &_exceptionptr);
3734                         M_ALD(REG_ITMP3, REG_PV, a);
3735                         M_ALD(REG_ITMP1_XPTR, REG_ITMP3, 0);
3736                         M_AST(REG_ZERO, REG_ITMP3, 0);
3737 #endif
3738
3739                         a = dseg_addaddress(m, asm_handle_exception);
3740                         M_ALD(REG_ITMP3, REG_PV, a);
3741
3742                         M_JMP(REG_ZERO, REG_ITMP3);
3743                 }
3744         }
3745
3746         /* generate null pointer check stubs */
3747
3748         xcodeptr = NULL;
3749
3750         for (bref = cd->xnullrefs; bref != NULL; bref = bref->next) {
3751                 if ((m->exceptiontablelength == 0) && (xcodeptr != NULL)) {
3752                         gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3753                                                           bref->branchpos,
3754                                                           (u1 *) xcodeptr - (u1 *) cd->mcodebase - 4);
3755                         continue;
3756                 }
3757
3758                 gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
3759                                   bref->branchpos,
3760                                                   (u1 *) mcodeptr - cd->mcodebase);
3761
3762                 MCODECHECK(8);
3763
3764                 M_LDA(REG_ITMP2_XPC, REG_PV, bref->branchpos - 4);
3765
3766                 if (xcodeptr != NULL) {
3767                         M_BR(xcodeptr - mcodeptr - 1);
3768
3769                 } else {
3770                         xcodeptr = mcodeptr;
3771
3772                         M_LSUB_IMM(REG_SP, 1 * 8, REG_SP);
3773                         M_LST(REG_ITMP2_XPC, REG_SP, 0 * 8);
3774
3775                         a = dseg_addaddress(m, string_java_lang_NullPointerException);
3776                         M_ALD(r->argintregs[0], REG_PV, a);
3777
3778                         a = dseg_addaddress(m, new_exception);
3779                         M_ALD(REG_PV, REG_PV, a);
3780                         M_JSR(REG_RA, REG_PV);
3781
3782                         /* recompute pv */
3783                         s1 = (s4) ((u1 *) mcodeptr - cd->mcodebase);
3784                         if (s1 <= 32768) M_LDA(REG_PV, REG_RA, -s1);
3785                         else {
3786                                 s4 ml = -s1, mh = 0;
3787                                 while (ml < -32768) { ml += 65536; mh--; }
3788                                 M_LDA(REG_PV, REG_RA, ml);
3789                                 M_LDAH(REG_PV, REG_PV, mh);
3790                         }
3791
3792                         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3793
3794                         M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8);
3795                         M_LADD_IMM(REG_SP, 1 * 8, REG_SP);
3796
3797                         a = dseg_addaddress(m, asm_handle_exception);
3798                         M_ALD(REG_ITMP3, REG_PV, a);
3799
3800                         M_JMP(REG_ZERO, REG_ITMP3);
3801                 }
3802         }
3803         }
3804
3805         codegen_finish(m, (s4) ((u1 *) mcodeptr - cd->mcodebase));
3806 }
3807
3808
3809 /* function createcompilerstub *************************************************
3810
3811         creates a stub routine which calls the compiler
3812
3813 *******************************************************************************/
3814
3815 #define COMPSTUBSIZE    3
3816
3817 u1 *createcompilerstub(methodinfo *m)
3818 {
3819         u8 *s = CNEW(u8, COMPSTUBSIZE);     /* memory to hold the stub            */
3820         s4 *mcodeptr = (s4 *) s;            /* code generation pointer            */
3821
3822                                             /* code for the stub                  */
3823         M_ALD(REG_PV, REG_PV, 16);          /* load pointer to the compiler       */
3824         M_JMP(0, REG_PV);                   /* jump to the compiler, return address
3825                                                in reg 0 is used as method pointer */
3826         s[1] = (u8) m;                      /* literals to be adressed            */
3827         s[2] = (u8) asm_call_jit_compiler;  /* jump directly via PV from above    */
3828
3829 #if defined(STATISTICS)
3830         if (opt_stat)
3831                 count_cstub_len += COMPSTUBSIZE * 8;
3832 #endif
3833
3834         return (u1 *) s;
3835 }
3836
3837
3838 /* function removecompilerstub *************************************************
3839
3840      deletes a compilerstub from memory  (simply by freeing it)
3841
3842 *******************************************************************************/
3843
3844 void removecompilerstub(u1 *stub)
3845 {
3846         CFREE(stub, COMPSTUBSIZE * 8);
3847 }
3848
3849
3850 /* function: createnativestub **************************************************
3851
3852         creates a stub routine which calls a native method
3853
3854 *******************************************************************************/
3855
3856 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3857 #define NATIVESTUBSTACK          2
3858 #define NATIVESTUBTHREADEXTRA    6
3859 #else
3860 #define NATIVESTUBSTACK          1
3861 #define NATIVESTUBTHREADEXTRA    1
3862 #endif
3863
3864 #define NATIVESTUBSIZE           (44 + NATIVESTUBTHREADEXTRA - 1)
3865 #define NATIVESTATICSIZE         5
3866 #define NATIVEVERBOSESIZE        (39 + 13)
3867 #define NATIVESTUBOFFSET         9
3868
3869 u1 *createnativestub(functionptr f, methodinfo *m)
3870 {
3871         u8 *s;                              /* memory pointer to hold the stub    */
3872         u8 *cs;
3873         s4 *mcodeptr;                       /* code generation pointer            */
3874         s4 stackframesize = 0;              /* size of stackframe if needed       */
3875         s4 disp;
3876         s4 stubsize;
3877         registerdata *r;
3878
3879         /* keep code size smaller */
3880         reg_init(m);
3881         r = m->registerdata;
3882
3883         descriptor2types(m);                /* set paramcount and paramtypes      */
3884
3885         stubsize = NATIVESTUBSIZE;          /* calculate nativestub size          */
3886         if ((m->flags & ACC_STATIC) && !m->class->initialized)
3887                 stubsize += NATIVESTATICSIZE;
3888
3889         if (runverbose)
3890                 stubsize += NATIVEVERBOSESIZE;
3891
3892         s = CNEW(u8, stubsize);             /* memory to hold the stub            */
3893         cs = s + NATIVESTUBOFFSET;
3894         mcodeptr = (s4 *) (cs);             /* code generation pointer            */
3895
3896         *(cs-1) = (u8) f;                   /* address of native method           */
3897 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
3898         *(cs-2) = (u8) &builtin_get_exceptionptrptr;
3899 #else
3900         *(cs-2) = (u8) (&_exceptionptr);    /* address of exceptionptr            */
3901 #endif
3902         *(cs-3) = (u8) asm_handle_nat_exception; /* addr of asm exception handler */
3903         *(cs-4) = (u8) (&env);              /* addr of jni_environement           */
3904         *(cs-5) = (u8) builtin_trace_args;
3905         *(cs-6) = (u8) m;
3906         *(cs-7) = (u8) builtin_displaymethodstop;
3907         *(cs-8) = (u8) m->class;
3908         *(cs-9) = (u8) asm_check_clinit;
3909
3910         M_LDA(REG_SP, REG_SP, -NATIVESTUBSTACK * 8);      /* build up stackframe  */
3911         M_AST(REG_RA, REG_SP, 0 * 8);       /* store return address               */
3912
3913         /* if function is static, check for initialized */
3914
3915         if (m->flags & ACC_STATIC) {
3916         /* if class isn't yet initialized, do it */
3917                 if (!m->class->initialized) {
3918                         /* call helper function which patches this code */
3919                         M_ALD(REG_ITMP1, REG_PV, -8 * 8);     /* class                    */
3920                         M_ALD(REG_PV, REG_PV, -9 * 8);        /* asm_check_clinit         */
3921                         M_JSR(REG_RA, REG_PV);
3922                         disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
3923                         M_LDA(REG_PV, REG_RA, disp);
3924                         M_NOP;                  /* this is essential for code patching    */
3925                 }
3926         }
3927
3928         /* max. 39 instructions */
3929         if (runverbose) {
3930                 s4 p;
3931                 s4 t;
3932                 M_LDA(REG_SP, REG_SP, -((INT_ARG_CNT + FLT_ARG_CNT + 2) * 8));
3933                 M_AST(REG_RA, REG_SP, 1 * 8);
3934
3935                 /* save integer argument registers */
3936                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
3937                         M_LST(r->argintregs[p], REG_SP, (2 + p) * 8);
3938                 }
3939
3940                 /* save and copy float arguments into integer registers */
3941                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
3942                         t = m->paramtypes[p];
3943
3944                         if (IS_FLT_DBL_TYPE(t)) {
3945                                 if (IS_2_WORD_TYPE(t)) {
3946                                         M_DST(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
3947                                         M_LLD(r->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
3948
3949                                 } else {
3950                                         M_FST(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
3951                                         M_ILD(r->argintregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
3952                                 }
3953
3954                         } else {
3955                                 M_DST(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
3956                         }
3957                 }
3958
3959                 M_ALD(REG_ITMP1, REG_PV, -6 * 8);
3960                 M_AST(REG_ITMP1, REG_SP, 0 * 8);
3961                 M_ALD(REG_PV, REG_PV, -5 * 8);
3962                 M_JSR(REG_RA, REG_PV);
3963                 disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
3964                 M_LDA(REG_PV, REG_RA, disp);
3965
3966                 for (p = 0; p < m->paramcount && p < INT_ARG_CNT; p++) {
3967                         M_LLD(r->argintregs[p], REG_SP, (2 + p) * 8);
3968                 }
3969
3970                 for (p = 0; p < m->paramcount && p < FLT_ARG_CNT; p++) {
3971                         t = m->paramtypes[p];
3972
3973                         if (IS_FLT_DBL_TYPE(t)) {
3974                                 if (IS_2_WORD_TYPE(t)) {
3975                                         M_DLD(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
3976
3977                                 } else {
3978                                         M_FLD(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
3979                                 }
3980
3981                         } else {
3982                                 M_DLD(r->argfltregs[p], REG_SP, (2 + INT_ARG_CNT + p) * 8);
3983                         }
3984                 }
3985
3986                 M_ALD(REG_RA, REG_SP, 1 * 8);
3987                 M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT + 2) * 8);
3988         }
3989
3990         /* save argument registers on stack -- if we have to */
3991         if ((m->flags & ACC_STATIC && m->paramcount > (INT_ARG_CNT - 2)) || m->paramcount > (INT_ARG_CNT - 1)) {
3992                 s4 i;
3993                 s4 paramshiftcnt = (m->flags & ACC_STATIC) ? 2 : 1;
3994                 s4 stackparamcnt = (m->paramcount > INT_ARG_CNT) ? m->paramcount - INT_ARG_CNT : 0;
3995
3996                 stackframesize = stackparamcnt + paramshiftcnt;
3997
3998                 M_LDA(REG_SP, REG_SP, -stackframesize * 8);
3999
4000                 /* copy stack arguments into new stack frame -- if any */
4001                 for (i = 0; i < stackparamcnt; i++) {
4002                         M_LLD(REG_ITMP1, REG_SP, (stackparamcnt + 1 + i) * 8);
4003                         M_LST(REG_ITMP1, REG_SP, (paramshiftcnt + i) * 8);
4004                 }
4005
4006                 if (m->flags & ACC_STATIC) {
4007                         if (IS_FLT_DBL_TYPE(m->paramtypes[5])) {
4008                                 M_DST(r->argfltregs[5], REG_SP, 1 * 8);
4009                         } else {
4010                                 M_LST(r->argintregs[5], REG_SP, 1 * 8);
4011                         }
4012
4013                         if (IS_FLT_DBL_TYPE(m->paramtypes[4])) {
4014                                 M_DST(r->argfltregs[4], REG_SP, 0 * 8);
4015                         } else {
4016                                 M_LST(r->argintregs[4], REG_SP, 0 * 8);
4017                         }
4018
4019                 } else {
4020                         if (IS_FLT_DBL_TYPE(m->paramtypes[5])) {
4021                                 M_DST(r->argfltregs[5], REG_SP, 0 * 8);
4022                         } else {
4023                                 M_LST(r->argintregs[5], REG_SP, 0 * 8);
4024                         }
4025                 }
4026         }
4027
4028         if (m->flags & ACC_STATIC) {
4029                 M_MOV(r->argintregs[3], r->argintregs[5]);
4030                 M_MOV(r->argintregs[2], r->argintregs[4]);
4031                 M_MOV(r->argintregs[1], r->argintregs[3]);
4032                 M_MOV(r->argintregs[0], r->argintregs[2]);
4033                 M_FMOV(r->argfltregs[3], r->argfltregs[5]);
4034                 M_FMOV(r->argfltregs[2], r->argfltregs[4]);
4035                 M_FMOV(r->argfltregs[1], r->argfltregs[3]);
4036                 M_FMOV(r->argfltregs[0], r->argfltregs[2]);
4037
4038                 /* put class into second argument register */
4039                 M_ALD(r->argintregs[1], REG_PV, -8 * 8);
4040
4041         } else {
4042                 M_MOV(r->argintregs[4], r->argintregs[5]);
4043                 M_MOV(r->argintregs[3], r->argintregs[4]);
4044                 M_MOV(r->argintregs[2], r->argintregs[3]);
4045                 M_MOV(r->argintregs[1], r->argintregs[2]);
4046                 M_MOV(r->argintregs[0], r->argintregs[1]);
4047                 M_FMOV(r->argfltregs[4], r->argfltregs[5]);
4048                 M_FMOV(r->argfltregs[3], r->argfltregs[4]);
4049                 M_FMOV(r->argfltregs[2], r->argfltregs[3]);
4050                 M_FMOV(r->argfltregs[1], r->argfltregs[2]);
4051                 M_FMOV(r->argfltregs[0], r->argfltregs[1]);
4052         }
4053
4054         /* put env into first argument register */
4055         M_ALD(r->argintregs[0], REG_PV, -4 * 8);
4056
4057         M_ALD(REG_PV, REG_PV, -1 * 8);      /* load adress of native method       */
4058         M_JSR(REG_RA, REG_PV);              /* call native method                 */
4059         disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4060         M_LDA(REG_PV, REG_RA, disp);        /* recompute pv from ra               */
4061
4062         /* remove stackframe if there is one */
4063         if (stackframesize) {
4064                 M_LDA(REG_SP, REG_SP, stackframesize * 8);
4065         }
4066
4067         /* 13 instructions */
4068         if (runverbose) {
4069                 M_LDA(REG_SP, REG_SP, -2 * 8);
4070                 M_ALD(r->argintregs[0], REG_PV, -6 * 8); /* load method adress        */
4071                 M_LST(REG_RESULT, REG_SP, 0 * 8);
4072                 M_DST(REG_FRESULT, REG_SP, 1 * 8);
4073                 M_MOV(REG_RESULT, r->argintregs[1]);
4074                 M_FMOV(REG_FRESULT, r->argfltregs[2]);
4075                 M_FMOV(REG_FRESULT, r->argfltregs[3]);
4076                 M_ALD(REG_PV, REG_PV, -7 * 8);  /* builtin_displaymethodstop          */
4077                 M_JSR(REG_RA, REG_PV);
4078                 disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4079                 M_LDA(REG_PV, REG_RA, disp);
4080                 M_LLD(REG_RESULT, REG_SP, 0 * 8);
4081                 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
4082                 M_LDA(REG_SP, REG_SP, 2 * 8);
4083         }
4084
4085 #if defined(USE_THREADS) && defined(NATIVE_THREADS)
4086         if (IS_FLT_DBL_TYPE(m->returntype))
4087                 M_DST(REG_FRESULT, REG_SP, 1 * 8);
4088         else
4089                 M_AST(REG_RESULT, REG_SP, 1 * 8);
4090         M_ALD(REG_PV, REG_PV, -2 * 8);      /* builtin_get_exceptionptrptr        */
4091         M_JSR(REG_RA, REG_PV);
4092         disp = -(s4) (mcodeptr - (s4 *) cs) * 4;
4093         M_LDA(REG_PV, REG_RA, disp);
4094         M_MOV(REG_RESULT, REG_ITMP3);
4095         if (IS_FLT_DBL_TYPE(m->returntype))
4096                 M_DLD(REG_FRESULT, REG_SP, 1 * 8);
4097         else
4098                 M_ALD(REG_RESULT, REG_SP, 1 * 8);
4099 #else
4100         M_ALD(REG_ITMP3, REG_PV, -2 * 8);   /* get address of exceptionptr        */
4101 #endif
4102         M_ALD(REG_ITMP1, REG_ITMP3, 0);     /* load exception into reg. itmp1     */
4103         M_BNEZ(REG_ITMP1, 3);               /* if no exception then return        */
4104
4105         M_ALD(REG_RA, REG_SP, 0 * 8);       /* load return address                */
4106         M_LDA(REG_SP, REG_SP, NATIVESTUBSTACK * 8); /* remove stackframe          */
4107         M_RET(REG_ZERO, REG_RA);            /* return to caller                   */
4108
4109         M_AST(REG_ZERO, REG_ITMP3, 0);      /* store NULL into exceptionptr       */
4110
4111         M_ALD(REG_RA, REG_SP, 0 * 8);       /* load return address                */
4112         M_LDA(REG_SP, REG_SP, NATIVESTUBSTACK * 8); /* remove stackframe          */
4113         M_LDA(REG_ITMP2, REG_RA, -4);       /* move fault address into reg. itmp2 */
4114         M_ALD(REG_ITMP3, REG_PV, -3 * 8);   /* load asm exception handler address */
4115         M_JMP(REG_ZERO, REG_ITMP3);         /* jump to asm exception handler      */
4116
4117 #if 0
4118         dolog_plain("stubsize: %d (for %d params)\n", (int) (mcodeptr - (s4*) s), m->paramcount);
4119 #endif
4120
4121 #if defined(STATISTICS)
4122         if (opt_stat)
4123                 count_nstub_len += NATIVESTUBSIZE * 8;
4124 #endif
4125
4126         return (u1 *) (s + NATIVESTUBOFFSET);
4127 }
4128
4129
4130 /* function: removenativestub **************************************************
4131
4132     removes a previously created native-stub from memory
4133
4134 *******************************************************************************/
4135
4136 void removenativestub(u1 *stub)
4137 {
4138         CFREE((u8 *) stub - NATIVESTUBOFFSET, NATIVESTUBSIZE * 8);
4139 }
4140
4141
4142 /*
4143  * These are local overrides for various environment variables in Emacs.
4144  * Please do not remove this and leave it at the end of the file, where
4145  * Emacs will automagically detect them.
4146  * ---------------------------------------------------------------------
4147  * Local variables:
4148  * mode: c
4149  * indent-tabs-mode: t
4150  * c-basic-offset: 4
4151  * tab-width: 4
4152  * End:
4153  */