src/vm/jit/alpha/codegen.c

   1 /* src/vm/jit/alpha/codegen.c - machine code generator for Alpha
   2
   3    Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
   4    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
   5    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
   6    J. Wenninger, Institut f. Computersprachen - TU Wien
   7
   8    This file is part of CACAO.
   9
  10    This program is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU General Public License as
  12    published by the Free Software Foundation; either version 2, or (at
  13    your option) any later version.
  14
  15    This program is distributed in the hope that it will be useful, but
  16    WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    General Public License for more details.
  19
  20    You should have received a copy of the GNU General Public License
  21    along with this program; if not, write to the Free Software
  22    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  23    02110-1301, USA.
  24
  25    Contact: cacao@cacaojvm.org
  26
  27    Authors: Andreas Krall
  28             Reinhard Grafl
  29
  30    Changes: Joseph Wenninger
  31             Christian Thalinger
  32             Christian Ullrich
  33             Edwin Steiner
  34
  35    $Id: codegen.c 5611 2006-10-01 20:37:33Z edwin $
  36
  37 */
  38
  39
  40 #include "config.h"
  41
  42 #include <assert.h>
  43 #include <stdio.h>
  44
  45 #include "vm/types.h"
  46
  47 #include "md.h"
  48 #include "md-abi.h"
  49
  50 #include "vm/jit/alpha/arch.h"
  51 #include "vm/jit/alpha/codegen.h"
  52
  53 #include "native/jni.h"
  54 #include "native/native.h"
  55
  56 #if defined(ENABLE_THREADS)
  57 # include "threads/native/lock.h"
  58 #endif
  59
  60 #include "vm/builtin.h"
  61 #include "vm/exceptions.h"
  62 #include "vm/global.h"
  63 #include "vm/loader.h"
  64 #include "vm/options.h"
  65 #include "vm/stringlocal.h"
  66 #include "vm/vm.h"
  67 #include "vm/jit/asmpart.h"
  68 #include "vm/jit/codegen-common.h"
  69 #include "vm/jit/dseg.h"
  70 #include "vm/jit/emit-common.h"
  71 #include "vm/jit/jit.h"
  72 #include "vm/jit/parse.h"
  73 #include "vm/jit/patcher.h"
  74 #include "vm/jit/reg.h"
  75 #include "vm/jit/replace.h"
  76
  77 #if defined(ENABLE_LSRA)
  78 # include "vm/jit/allocator/lsra.h"
  79 #endif
  80
  81
  82 /* codegen *********************************************************************
  83
  84    Generates machine code.
  85
  86 *******************************************************************************/
  87
  88 bool codegen(jitdata *jd)
  89 {
  90         methodinfo         *m;
  91         codeinfo           *code;
  92         codegendata        *cd;
  93         registerdata       *rd;
  94         s4                  len, s1, s2, s3, d, disp;
  95         varinfo            *var;
  96         basicblock         *bptr;
  97         instruction        *iptr;
  98         exceptiontable     *ex;
  99         u2                  currentline;
 100         methodinfo         *lm;             /* local methodinfo for ICMD_INVOKE*  */
 101         unresolved_method  *um;
 102         builtintable_entry *bte;
 103         methoddesc         *md;
 104         rplpoint           *replacementpoint;
 105         s4                  fieldtype;
 106         s4                 varindex;
 107
 108         /* get required compiler data */
 109
 110         m    = jd->m;
 111         code = jd->code;
 112         cd   = jd->cd;
 113         rd   = jd->rd;
 114
 115         /* prevent compiler warnings */
 116
 117         d = 0;
 118         currentline = 0;
 119         lm = NULL;
 120         bte = NULL;
 121
 122         {
 123         s4 i, p, t, l;
 124         s4 savedregs_num;
 125
 126         savedregs_num = (jd->isleafmethod) ? 0 : 1;       /* space to save the RA */
 127
 128         /* space to save used callee saved registers */
 129
 130         savedregs_num += (INT_SAV_CNT - rd->savintreguse);
 131         savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
 132
 133         cd->stackframesize = rd->memuse + savedregs_num;
 134
 135 #if defined(ENABLE_THREADS)        /* space to save argument of monitor_enter */
 136         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 137                 cd->stackframesize++;
 138 #endif
 139
 140         /* create method header */
 141
 142 #if 0
 143         cd->stackframesize = (cd->stackframesize + 1) & ~1; /* align stack to 16-bytes */
 144 #endif
 145
 146         (void) dseg_add_unique_address(cd, code);              /* CodeinfoPointer */
 147         (void) dseg_add_unique_s4(cd, cd->stackframesize * 8); /* FrameSize       */
 148
 149 #if defined(ENABLE_THREADS)
 150         /* IsSync contains the offset relative to the stack pointer for the
 151            argument of monitor_exit used in the exception handler. Since the
 152            offset could be zero and give a wrong meaning of the flag it is
 153            offset by one.
 154         */
 155
 156         if (checksync && (m->flags & ACC_SYNCHRONIZED))
 157                 (void) dseg_add_unique_s4(cd, (rd->memuse + 1) * 8);       /* IsSync  */
 158         else
 159 #endif
 160                 (void) dseg_add_unique_s4(cd, 0);                          /* IsSync  */
 161
 162         (void) dseg_add_unique_s4(cd, jd->isleafmethod);               /* IsLeaf  */
 163         (void) dseg_add_unique_s4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave */
 164         (void) dseg_add_unique_s4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave */
 165
 166         dseg_addlinenumbertablesize(cd);
 167
 168         (void) dseg_add_unique_s4(cd, cd->exceptiontablelength);   /* ExTableSize */
 169
 170         /* create exception table */
 171
 172         for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
 173                 dseg_add_target(cd, ex->start);
 174                 dseg_add_target(cd, ex->end);
 175                 dseg_add_target(cd, ex->handler);
 176                 (void) dseg_add_unique_address(cd, ex->catchtype.any);
 177         }
 178
 179         /* create stack frame (if necessary) */
 180
 181         if (cd->stackframesize)
 182                 M_LDA(REG_SP, REG_SP, -(cd->stackframesize * 8));
 183
 184         /* save return address and used callee saved registers */
 185
 186         p = cd->stackframesize;
 187         if (!jd->isleafmethod) {
 188                 p--; M_AST(REG_RA, REG_SP, p * 8);
 189         }
 190         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
 191                 p--; M_LST(rd->savintregs[i], REG_SP, p * 8);
 192         }
 193         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
 194                 p--; M_DST(rd->savfltregs[i], REG_SP, p * 8);
 195         }
 196
 197         /* take arguments out of register or stack frame */
 198
 199         md = m->parseddesc;
 200
 201         for (p = 0, l = 0; p < md->paramcount; p++) {
 202                 t = md->paramtypes[p].type;
 203
 204                 varindex = jd->local_map[l * 5 + t];
 205
 206                 l++;
 207                 if (IS_2_WORD_TYPE(t))    /* increment local counter for 2 word types */
 208                         l++;
 209
 210                 if (varindex == UNUSED)
 211                         continue;
 212
 213                 var = VAR(varindex);
 214
 215                 s1 = md->params[p].regoff;
 216
 217                 if (IS_INT_LNG_TYPE(t)) {                    /* integer args          */
 218                         if (!md->params[p].inmemory) {           /* register arguments    */
 219                                 s2 = rd->argintregs[s1];
 220                                 if (!IS_INMEMORY(var->flags)) {      /* reg arg -> register   */
 221                                         M_INTMOVE(s2, var->vv.regoff);
 222
 223                                 } else {                             /* reg arg -> spilled    */
 224                                         M_LST(s2, REG_SP, var->vv.regoff * 8);
 225                                 }
 226
 227                         } else {                                 /* stack arguments       */
 228                                 if (!IS_INMEMORY(var->flags)) {      /* stack arg -> register */
 229                                         M_LLD(var->vv.regoff, REG_SP, (cd->stackframesize + s1) *8);
 230
 231                                 } else {                             /* stack arg -> spilled  */
 232                                         var->vv.regoff = cd->stackframesize + s1;
 233                                 }
 234                         }
 235
 236                 } else {                                     /* floating args         */
 237                         if (!md->params[p].inmemory) {           /* register arguments    */
 238                                 s2 = rd->argfltregs[s1];
 239                                 if (!IS_INMEMORY(var->flags)) {      /* reg arg -> register   */
 240                                         M_FLTMOVE(s2, var->vv.regoff);
 241
 242                                 } else {                                         /* reg arg -> spilled    */
 243                                         M_DST(s2, REG_SP, var->vv.regoff * 8);
 244                                 }
 245
 246                         } else {                                 /* stack arguments       */
 247                                 if (!(var->flags & INMEMORY)) {      /* stack-arg -> register */
 248                                         M_DLD(var->vv.regoff, REG_SP, (cd->stackframesize + s1) * 8);
 249
 250                                 } else {                             /* stack-arg -> spilled  */
 251                                         var->vv.regoff = cd->stackframesize + s1;
 252                                 }
 253                         }
 254                 }
 255         } /* end for */
 256
 257         /* call monitorenter function */
 258
 259 #if defined(ENABLE_THREADS)
 260         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
 261                 /* stack offset for monitor argument */
 262
 263                 s1 = rd->memuse;
 264
 265 #if !defined(NDEBUG)
 266                 if (opt_verbosecall) {
 267                         M_LDA(REG_SP, REG_SP, -(INT_ARG_CNT + FLT_ARG_CNT) * 8);
 268
 269                         for (p = 0; p < INT_ARG_CNT; p++)
 270                                 M_LST(rd->argintregs[p], REG_SP, p * 8);
 271
 272                         for (p = 0; p < FLT_ARG_CNT; p++)
 273                                 M_DST(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
 274
 275                         s1 += INT_ARG_CNT + FLT_ARG_CNT;
 276                 }
 277 #endif /* !defined(NDEBUG) */
 278
 279                 /* decide which monitor enter function to call */
 280
 281                 if (m->flags & ACC_STATIC) {
 282                         disp = dseg_add_address(cd, &m->class->object.header);
 283                         M_ALD(REG_A0, REG_PV, disp);
 284                 }
 285                 else {
 286                         M_BEQZ(REG_A0, 0);
 287                         codegen_add_nullpointerexception_ref(cd);
 288                 }
 289
 290                 M_AST(REG_A0, REG_SP, s1 * 8);
 291                 disp = dseg_add_functionptr(cd, LOCK_monitor_enter);
 292                 M_ALD(REG_PV, REG_PV, disp);
 293                 M_JSR(REG_RA, REG_PV);
 294                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
 295                 M_LDA(REG_PV, REG_RA, -disp);
 296
 297 #if !defined(NDEBUG)
 298                 if (opt_verbosecall) {
 299                         for (p = 0; p < INT_ARG_CNT; p++)
 300                                 M_LLD(rd->argintregs[p], REG_SP, p * 8);
 301
 302                         for (p = 0; p < FLT_ARG_CNT; p++)
 303                                 M_DLD(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
 304
 305                         M_LDA(REG_SP, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT) * 8);
 306                 }
 307 #endif /* !defined(NDEBUG) */
 308         }
 309 #endif
 310
 311         /* call trace function */
 312
 313 #if !defined(NDEBUG)
 314         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
 315                 emit_verbosecall_enter(jd);
 316 #endif
 317
 318         }
 319
 320         /* end of header generation */
 321
 322         replacementpoint = jd->code->rplpoints;
 323
 324         /* walk through all basic blocks */
 325
 326         for (bptr = jd->new_basicblocks; bptr != NULL; bptr = bptr->next) {
 327
 328                 bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase);
 329
 330                 if (bptr->flags >= BBREACHED) {
 331
 332                 /* branch resolving */
 333
 334                 {
 335                 branchref *brefs;
 336                 for (brefs = bptr->branchrefs; brefs != NULL; brefs = brefs->next) {
 337                         gen_resolvebranch((u1*) cd->mcodebase + brefs->branchpos,
 338                                           brefs->branchpos, bptr->mpc);
 339                         }
 340                 }
 341
 342                 /* handle replacement points */
 343
 344 #if 0
 345                 if (bptr->bitflags & BBFLAG_REPLACEMENT) {
 346                         replacementpoint->pc = (u1*)(ptrint)bptr->mpc; /* will be resolved later */
 347
 348                         replacementpoint++;
 349                 }
 350 #endif
 351
 352                 /* copy interface registers to their destination */
 353
 354                 len = bptr->indepth;
 355                 MCODECHECK(64+len);
 356 #if defined(ENABLE_LSRA)
 357                 if (opt_lsra) {
 358                 while (len) {
 359                         len--;
 360                         src = bptr->invars[len];
 361                         if ((len == bptr->indepth-1) && (bptr->type != BBTYPE_STD)) {
 362                                         /*                              d = reg_of_var(m, src, REG_ITMP1); */
 363                                         if (!(src->flags & INMEMORY))
 364                                                 d = src->vv.regoff;
 365                                         else
 366                                                 d = REG_ITMP1;
 367                                         M_INTMOVE(REG_ITMP1, d);
 368                                         emit_store(jd, NULL, src, d);
 369                                 }
 370                         }
 371                 } else {
 372 #endif
 373                         while (len) {
 374                                 len--;
 375                                 var = VAR(bptr->invars[len]);
 376                                 if ((len == bptr->indepth-1) && (bptr->type != BBTYPE_STD)) {
 377                                         d = codegen_reg_of_var(0, var, REG_ITMP1);
 378                                         M_INTMOVE(REG_ITMP1, d);
 379                                         emit_store(jd, NULL, var, d);
 380
 381                                 }
 382                                 else {
 383                                         assert((var->flags & OUTVAR));
 384                                         d = codegen_reg_of_var(0, var, REG_ITMP1);
 385
 386                                 }
 387                         }
 388 #if defined(ENABLE_LSRA)
 389                 }
 390 #endif
 391
 392                 /* walk through all instructions */
 393
 394                 len = bptr->icount;
 395
 396                 for (iptr = bptr->iinstr; len > 0; len--, iptr++) {
 397                         if (iptr->line != currentline) {
 398                                 dseg_addlinenumber(cd, iptr->line);
 399                                 currentline = iptr->line;
 400                         }
 401
 402                 MCODECHECK(64);       /* an instruction usually needs < 64 words      */
 403                 switch (iptr->opc) {
 404
 405                 case ICMD_INLINE_START:
 406                 case ICMD_INLINE_END:
 407                         break;
 408
 409                 case ICMD_NOP:        /* ...  ==> ...                                 */
 410                         break;
 411
 412                 case ICMD_CHECKNULL:  /* ..., objectref  ==> ..., objectref           */
 413
 414                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 415                         M_BEQZ(s1, 0);
 416                         codegen_add_nullpointerexception_ref(cd);
 417                         break;
 418
 419                 /* constant operations ************************************************/
 420
 421                 case ICMD_ICONST:     /* ...  ==> ..., constant                       */
 422
 423                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 424                         ICONST(d, iptr->sx.val.i);
 425                         emit_store_dst(jd, iptr, d);
 426                         break;
 427
 428                 case ICMD_LCONST:     /* ...  ==> ..., constant                       */
 429
 430                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 431                         LCONST(d, iptr->sx.val.l);
 432                         emit_store_dst(jd, iptr, d);
 433                         break;
 434
 435                 case ICMD_FCONST:     /* ...  ==> ..., constant                       */
 436
 437                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
 438                         disp = dseg_add_float(cd, iptr->sx.val.f);
 439                         M_FLD(d, REG_PV, disp);
 440                         emit_store_dst(jd, iptr, d);
 441                         break;
 442
 443                 case ICMD_DCONST:     /* ...  ==> ..., constant                       */
 444
 445                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
 446                         disp = dseg_add_double(cd, iptr->sx.val.d);
 447                         M_DLD(d, REG_PV, disp);
 448                         emit_store_dst(jd, iptr, d);
 449                         break;
 450
 451                 case ICMD_ACONST:     /* ...  ==> ..., constant                       */
 452
 453                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 454
 455                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
 456                                 constant_classref *cr = iptr->sx.val.c.ref;
 457
 458                                 disp = dseg_add_unique_address(cd, cr);
 459
 460                                 /* XXX Only add the patcher, if this position needs to
 461                                    be patched.  If there was a previous position which
 462                                    resolved the same class, the returned displacement
 463                                    of dseg_addaddress is ok to use. */
 464
 465                                 codegen_addpatchref(cd, PATCHER_resolve_classref_to_classinfo,
 466                                                                         cr, disp);
 467
 468                                 if (opt_showdisassemble)
 469                                         M_NOP;
 470
 471                                 M_ALD(d, REG_PV, disp);
 472                         }
 473                         else {
 474                                 if (iptr->sx.val.anyptr == NULL)
 475                                         M_INTMOVE(REG_ZERO, d);
 476                                 else {
 477                                         disp = dseg_add_address(cd, iptr->sx.val.anyptr);
 478                                         M_ALD(d, REG_PV, disp);
 479                                 }
 480                         }
 481                         emit_store_dst(jd, iptr, d);
 482                         break;
 483
 484
 485                 /* load/store operations **********************************************/
 486
 487                 case ICMD_ILOAD:      /* ...  ==> ..., content of local variable      */
 488                 case ICMD_ALOAD:      /* s1 = local variable                          */
 489                 case ICMD_LLOAD:
 490                 case ICMD_FLOAD:
 491                 case ICMD_DLOAD:
 492                 case ICMD_ISTORE:     /* ..., value  ==> ...                          */
 493                 case ICMD_ASTORE:     /* dst = local variable                         */
 494                 case ICMD_LSTORE:
 495                 case ICMD_FSTORE:
 496                 case ICMD_DSTORE:
 497
 498                         emit_copy(jd, iptr, VAROP(iptr->s1), VAROP(iptr->dst));
 499                         break;
 500
 501                 /* pop/copy/move operations *******************************************/
 502
 503                 /* attention: double and longs are only one entry in CACAO ICMDs      */
 504
 505                 case ICMD_POP:        /* ..., value  ==> ...                          */
 506                 case ICMD_POP2:       /* ..., value, value  ==> ...                   */
 507
 508                         break;
 509
 510                 case ICMD_COPY:
 511                 case ICMD_MOVE:
 512
 513                         M_COPY(iptr->s1.varindex, iptr->dst.varindex);
 514                         break;
 515
 516
 517                 /* integer operations *************************************************/
 518
 519                 case ICMD_INEG:       /* ..., value  ==> ..., - value                 */
 520
 521                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 522                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 523                         M_ISUB(REG_ZERO, s1, d);
 524                         emit_store_dst(jd, iptr, d);
 525                         break;
 526
 527                 case ICMD_LNEG:       /* ..., value  ==> ..., - value                 */
 528
 529                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 530                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 531                         M_LSUB(REG_ZERO, s1, d);
 532                         emit_store_dst(jd, iptr, d);
 533                         break;
 534
 535                 case ICMD_I2L:        /* ..., value  ==> ..., value                   */
 536
 537                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 538                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
 539                         M_INTMOVE(s1, d);
 540                         emit_store_dst(jd, iptr, d);
 541                         break;
 542
 543                 case ICMD_L2I:        /* ..., value  ==> ..., value                   */
 544
 545                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 546                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 547                         M_IADD(s1, REG_ZERO, d);
 548                         emit_store_dst(jd, iptr, d);
 549                         break;
 550
 551                 case ICMD_INT2BYTE:   /* ..., value  ==> ..., value                   */
 552
 553                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 554                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 555                         if (has_ext_instr_set) {
 556                                 M_BSEXT(s1, d);
 557                         } else {
 558                                 M_SLL_IMM(s1, 56, d);
 559                                 M_SRA_IMM( d, 56, d);
 560                         }
 561                         emit_store_dst(jd, iptr, d);
 562                         break;
 563
 564                 case ICMD_INT2CHAR:   /* ..., value  ==> ..., value                   */
 565
 566                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 567                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 568             M_CZEXT(s1, d);
 569                         emit_store_dst(jd, iptr, d);
 570                         break;
 571
 572                 case ICMD_INT2SHORT:  /* ..., value  ==> ..., value                   */
 573
 574                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 575                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 576                         if (has_ext_instr_set) {
 577                                 M_SSEXT(s1, d);
 578                         } else {
 579                                 M_SLL_IMM(s1, 48, d);
 580                                 M_SRA_IMM( d, 48, d);
 581                         }
 582                         emit_store_dst(jd, iptr, d);
 583                         break;
 584
 585
 586                 case ICMD_IADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 587
 588                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 589                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 590                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 591                         M_IADD(s1, s2, d);
 592                         emit_store_dst(jd, iptr, d);
 593                         break;
 594
 595                 case ICMD_IADDCONST:  /* ..., value  ==> ..., value + constant        */
 596                                       /* sx.val.i = constant                             */
 597
 598                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 599                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 600                         if ((iptr->sx.val.i >= 0) && (iptr->sx.val.i <= 255)) {
 601                                 M_IADD_IMM(s1, iptr->sx.val.i, d);
 602                         } else {
 603                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 604                                 M_IADD(s1, REG_ITMP2, d);
 605                         }
 606                         emit_store_dst(jd, iptr, d);
 607                         break;
 608
 609                 case ICMD_LADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
 610
 611                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 612                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 613                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 614                         M_LADD(s1, s2, d);
 615                         emit_store_dst(jd, iptr, d);
 616                         break;
 617
 618                 case ICMD_LADDCONST:  /* ..., value  ==> ..., value + constant        */
 619                                       /* sx.val.l = constant                             */
 620
 621                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 622                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 623                         if ((iptr->sx.val.l >= 0) && (iptr->sx.val.l <= 255)) {
 624                                 M_LADD_IMM(s1, iptr->sx.val.l, d);
 625                         } else {
 626                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 627                                 M_LADD(s1, REG_ITMP2, d);
 628                         }
 629                         emit_store_dst(jd, iptr, d);
 630                         break;
 631
 632                 case ICMD_ISUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 633
 634                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 635                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 636                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 637                         M_ISUB(s1, s2, d);
 638                         emit_store_dst(jd, iptr, d);
 639                         break;
 640
 641                 case ICMD_ISUBCONST:  /* ..., value  ==> ..., value + constant        */
 642                                       /* sx.val.i = constant                             */
 643
 644                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 645                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 646                         if ((iptr->sx.val.i >= 0) && (iptr->sx.val.i <= 255)) {
 647                                 M_ISUB_IMM(s1, iptr->sx.val.i, d);
 648                         } else {
 649                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 650                                 M_ISUB(s1, REG_ITMP2, d);
 651                         }
 652                         emit_store_dst(jd, iptr, d);
 653                         break;
 654
 655                 case ICMD_LSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
 656
 657                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 658                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 659                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 660                         M_LSUB(s1, s2, d);
 661                         emit_store_dst(jd, iptr, d);
 662                         break;
 663
 664                 case ICMD_LSUBCONST:  /* ..., value  ==> ..., value - constant        */
 665                                       /* sx.val.l = constant                             */
 666
 667                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 668                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 669                         if ((iptr->sx.val.l >= 0) && (iptr->sx.val.l <= 255)) {
 670                                 M_LSUB_IMM(s1, iptr->sx.val.l, d);
 671                         } else {
 672                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 673                                 M_LSUB(s1, REG_ITMP2, d);
 674                         }
 675                         emit_store_dst(jd, iptr, d);
 676                         break;
 677
 678                 case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 679
 680                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 681                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 682                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 683                         M_IMUL(s1, s2, d);
 684                         emit_store_dst(jd, iptr, d);
 685                         break;
 686
 687                 case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant        */
 688                                       /* sx.val.i = constant                             */
 689
 690                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 691                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 692                         if ((iptr->sx.val.i >= 0) && (iptr->sx.val.i <= 255)) {
 693                                 M_IMUL_IMM(s1, iptr->sx.val.i, d);
 694                         } else {
 695                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 696                                 M_IMUL(s1, REG_ITMP2, d);
 697                         }
 698                         emit_store_dst(jd, iptr, d);
 699                         break;
 700
 701                 case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
 702
 703                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 704                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 705                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 706                         M_LMUL(s1, s2, d);
 707                         emit_store_dst(jd, iptr, d);
 708                         break;
 709
 710                 case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant        */
 711                                       /* sx.val.l = constant                             */
 712
 713                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 714                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 715                         if ((iptr->sx.val.l >= 0) && (iptr->sx.val.l <= 255)) {
 716                                 M_LMUL_IMM(s1, iptr->sx.val.l, d);
 717                         } else {
 718                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 719                                 M_LMUL(s1, REG_ITMP2, d);
 720                         }
 721                         emit_store_dst(jd, iptr, d);
 722                         break;
 723
 724                 case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 725                 case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 726
 727                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 728                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 729                         d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
 730                         M_BEQZ(s2, 0);
 731                         codegen_add_arithmeticexception_ref(cd);
 732
 733                         M_MOV(s1, REG_A0);
 734                         M_MOV(s2, REG_A1);
 735                         bte = iptr->sx.s23.s3.bte;
 736                         disp = dseg_add_functionptr(cd, bte->fp);
 737                         M_ALD(REG_PV, REG_PV, disp);
 738                         M_JSR(REG_RA, REG_PV);
 739                         disp = (s4) (cd->mcodeptr - cd->mcodebase);
 740                         M_LDA(REG_PV, REG_RA, -disp);
 741
 742                         M_IADD(REG_RESULT, REG_ZERO, d); /* sign extend (bugfix for gcc -O2) */
 743                         emit_store_dst(jd, iptr, d);
 744                         break;
 745
 746                 case ICMD_LDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
 747                 case ICMD_LREM:       /* ..., val1, val2  ==> ..., val1 % val2        */
 748
 749                         bte = iptr->sx.s23.s3.bte;
 750
 751                         s1 = emit_load_s1(jd, iptr, REG_A0);
 752                         s2 = emit_load_s2(jd, iptr, REG_A1);
 753                         d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
 754                         M_BEQZ(s2, 0);
 755                         codegen_add_arithmeticexception_ref(cd);
 756
 757                         M_INTMOVE(s1, REG_A0);
 758                         M_INTMOVE(s2, REG_A1);
 759                         disp = dseg_add_functionptr(cd, bte->fp);
 760                         M_ALD(REG_PV, REG_PV, disp);
 761                         M_JSR(REG_RA, REG_PV);
 762                         disp = (s4) (cd->mcodeptr - cd->mcodebase);
 763                         M_LDA(REG_PV, REG_RA, -disp);
 764
 765                         M_INTMOVE(REG_RESULT, d);
 766                         emit_store_dst(jd, iptr, d);
 767                         break;
 768
 769                 case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value << constant       */
 770                 case ICMD_LDIVPOW2:   /* val.i = constant                             */
 771
 772                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 773                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 774                         if (iptr->sx.val.i <= 15) {
 775                                 M_LDA(REG_ITMP2, s1, (1 << iptr->sx.val.i) -1);
 776                                 M_CMOVGE(s1, s1, REG_ITMP2);
 777                         } else {
 778                                 M_SRA_IMM(s1, 63, REG_ITMP2);
 779                                 M_SRL_IMM(REG_ITMP2, 64 - iptr->sx.val.i, REG_ITMP2);
 780                                 M_LADD(s1, REG_ITMP2, REG_ITMP2);
 781                         }
 782                         M_SRA_IMM(REG_ITMP2, iptr->sx.val.i, d);
 783                         emit_store_dst(jd, iptr, d);
 784                         break;
 785
 786                 case ICMD_ISHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 787
 788                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 789                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 790                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 791                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 792                         M_SLL(s1, REG_ITMP3, d);
 793                         M_IADD(d, REG_ZERO, d);
 794                         emit_store_dst(jd, iptr, d);
 795                         break;
 796
 797                 case ICMD_ISHLCONST:  /* ..., value  ==> ..., value << constant       */
 798                                       /* sx.val.i = constant                             */
 799
 800                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 801                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 802                         M_SLL_IMM(s1, iptr->sx.val.i & 0x1f, d);
 803                         M_IADD(d, REG_ZERO, d);
 804                         emit_store_dst(jd, iptr, d);
 805                         break;
 806
 807                 case ICMD_ISHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
 808
 809                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 810                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 811                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 812                         M_AND_IMM(s2, 0x1f, REG_ITMP3);
 813                         M_SRA(s1, REG_ITMP3, d);
 814                         emit_store_dst(jd, iptr, d);
 815                         break;
 816
 817                 case ICMD_ISHRCONST:  /* ..., value  ==> ..., value >> constant       */
 818                                       /* sx.val.i = constant                             */
 819
 820                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 821                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 822                         M_SRA_IMM(s1, iptr->sx.val.i & 0x1f, d);
 823                         emit_store_dst(jd, iptr, d);
 824                         break;
 825
 826                 case ICMD_IUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
 827
 828                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 829                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 830                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 831                         M_AND_IMM(s2, 0x1f, REG_ITMP2);
 832             M_IZEXT(s1, d);
 833                         M_SRL(d, REG_ITMP2, d);
 834                         M_IADD(d, REG_ZERO, d);
 835                         emit_store_dst(jd, iptr, d);
 836                         break;
 837
 838                 case ICMD_IUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
 839                                       /* sx.val.i = constant                             */
 840
 841                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 842                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 843             M_IZEXT(s1, d);
 844                         M_SRL_IMM(d, iptr->sx.val.i & 0x1f, d);
 845                         M_IADD(d, REG_ZERO, d);
 846                         emit_store_dst(jd, iptr, d);
 847                         break;
 848
 849                 case ICMD_LSHL:       /* ..., val1, val2  ==> ..., val1 << val2       */
 850
 851                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 852                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 853                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 854                         M_SLL(s1, s2, d);
 855                         emit_store_dst(jd, iptr, d);
 856                         break;
 857
 858                 case ICMD_LSHLCONST:  /* ..., value  ==> ..., value << constant       */
 859                                       /* sx.val.i = constant                             */
 860
 861                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 862                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 863                         M_SLL_IMM(s1, iptr->sx.val.i & 0x3f, d);
 864                         emit_store_dst(jd, iptr, d);
 865                         break;
 866
 867                 case ICMD_LSHR:       /* ..., val1, val2  ==> ..., val1 >> val2       */
 868
 869                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 870                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 871                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 872                         M_SRA(s1, s2, d);
 873                         emit_store_dst(jd, iptr, d);
 874                         break;
 875
 876                 case ICMD_LSHRCONST:  /* ..., value  ==> ..., value >> constant       */
 877                                       /* sx.val.i = constant                             */
 878
 879                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 880                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 881                         M_SRA_IMM(s1, iptr->sx.val.i & 0x3f, d);
 882                         emit_store_dst(jd, iptr, d);
 883                         break;
 884
 885                 case ICMD_LUSHR:      /* ..., val1, val2  ==> ..., val1 >>> val2      */
 886
 887                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 888                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 889                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 890                         M_SRL(s1, s2, d);
 891                         emit_store_dst(jd, iptr, d);
 892                         break;
 893
 894                 case ICMD_LUSHRCONST: /* ..., value  ==> ..., value >>> constant      */
 895                                       /* sx.val.i = constant                             */
 896
 897                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 898                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 899                         M_SRL_IMM(s1, iptr->sx.val.i & 0x3f, d);
 900                         emit_store_dst(jd, iptr, d);
 901                         break;
 902
 903                 case ICMD_IAND:       /* ..., val1, val2  ==> ..., val1 & val2        */
 904                 case ICMD_LAND:
 905
 906                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 907                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
 908                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 909                         M_AND(s1, s2, d);
 910                         emit_store_dst(jd, iptr, d);
 911                         break;
 912
 913                 case ICMD_IANDCONST:  /* ..., value  ==> ..., value & constant        */
 914                                       /* sx.val.i = constant                             */
 915
 916                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 917                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 918                         if ((iptr->sx.val.i >= 0) && (iptr->sx.val.i <= 255)) {
 919                                 M_AND_IMM(s1, iptr->sx.val.i, d);
 920                         } else if (iptr->sx.val.i == 0xffff) {
 921                                 M_CZEXT(s1, d);
 922                         } else if (iptr->sx.val.i == 0xffffff) {
 923                                 M_ZAPNOT_IMM(s1, 0x07, d);
 924                         } else {
 925                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 926                                 M_AND(s1, REG_ITMP2, d);
 927                         }
 928                         emit_store_dst(jd, iptr, d);
 929                         break;
 930
 931                 case ICMD_IREMPOW2:   /* ..., value  ==> ..., value % constant        */
 932                                       /* sx.val.i = constant                             */
 933
 934                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 935                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 936                         if (s1 == d) {
 937                                 M_MOV(s1, REG_ITMP1);
 938                                 s1 = REG_ITMP1;
 939                         }
 940                         if ((iptr->sx.val.i >= 0) && (iptr->sx.val.i <= 255)) {
 941                                 M_AND_IMM(s1, iptr->sx.val.i, d);
 942                                 M_BGEZ(s1, 3);
 943                                 M_ISUB(REG_ZERO, s1, d);
 944                                 M_AND_IMM(d, iptr->sx.val.i, d);
 945                         } else if (iptr->sx.val.i == 0xffff) {
 946                                 M_CZEXT(s1, d);
 947                                 M_BGEZ(s1, 3);
 948                                 M_ISUB(REG_ZERO, s1, d);
 949                                 M_CZEXT(d, d);
 950                         } else if (iptr->sx.val.i == 0xffffff) {
 951                                 M_ZAPNOT_IMM(s1, 0x07, d);
 952                                 M_BGEZ(s1, 3);
 953                                 M_ISUB(REG_ZERO, s1, d);
 954                                 M_ZAPNOT_IMM(d, 0x07, d);
 955                         } else {
 956                                 ICONST(REG_ITMP2, iptr->sx.val.i);
 957                                 M_AND(s1, REG_ITMP2, d);
 958                                 M_BGEZ(s1, 3);
 959                                 M_ISUB(REG_ZERO, s1, d);
 960                                 M_AND(d, REG_ITMP2, d);
 961                         }
 962                         M_ISUB(REG_ZERO, d, d);
 963                         emit_store_dst(jd, iptr, d);
 964                         break;
 965
 966                 case ICMD_LANDCONST:  /* ..., value  ==> ..., value & constant        */
 967                                       /* sx.val.l = constant                             */
 968
 969                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 970                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 971                         if ((iptr->sx.val.l >= 0) && (iptr->sx.val.l <= 255)) {
 972                                 M_AND_IMM(s1, iptr->sx.val.l, d);
 973                         } else if (iptr->sx.val.l == 0xffffL) {
 974                                 M_CZEXT(s1, d);
 975                         } else if (iptr->sx.val.l == 0xffffffL) {
 976                                 M_ZAPNOT_IMM(s1, 0x07, d);
 977                         } else if (iptr->sx.val.l == 0xffffffffL) {
 978                                 M_IZEXT(s1, d);
 979                         } else if (iptr->sx.val.l == 0xffffffffffL) {
 980                                 M_ZAPNOT_IMM(s1, 0x1f, d);
 981                         } else if (iptr->sx.val.l == 0xffffffffffffL) {
 982                                 M_ZAPNOT_IMM(s1, 0x3f, d);
 983                         } else if (iptr->sx.val.l == 0xffffffffffffffL) {
 984                                 M_ZAPNOT_IMM(s1, 0x7f, d);
 985                         } else {
 986                                 LCONST(REG_ITMP2, iptr->sx.val.l);
 987                                 M_AND(s1, REG_ITMP2, d);
 988                         }
 989                         emit_store_dst(jd, iptr, d);
 990                         break;
 991
 992                 case ICMD_LREMPOW2:   /* ..., value  ==> ..., value % constant        */
 993                                       /* sx.val.l = constant                             */
 994
 995                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
 996                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
 997                         if (s1 == d) {
 998                                 M_MOV(s1, REG_ITMP1);
 999                                 s1 = REG_ITMP1;
1000                         }
1001                         if ((iptr->sx.val.l >= 0) && (iptr->sx.val.l <= 255)) {
1002                                 M_AND_IMM(s1, iptr->sx.val.l, d);
1003                                 M_BGEZ(s1, 3);
1004                                 M_LSUB(REG_ZERO, s1, d);
1005                                 M_AND_IMM(d, iptr->sx.val.l, d);
1006                         } else if (iptr->sx.val.l == 0xffffL) {
1007                                 M_CZEXT(s1, d);
1008                                 M_BGEZ(s1, 3);
1009                                 M_LSUB(REG_ZERO, s1, d);
1010                                 M_CZEXT(d, d);
1011                         } else if (iptr->sx.val.l == 0xffffffL) {
1012                                 M_ZAPNOT_IMM(s1, 0x07, d);
1013                                 M_BGEZ(s1, 3);
1014                                 M_LSUB(REG_ZERO, s1, d);
1015                                 M_ZAPNOT_IMM(d, 0x07, d);
1016                         } else if (iptr->sx.val.l == 0xffffffffL) {
1017                                 M_IZEXT(s1, d);
1018                                 M_BGEZ(s1, 3);
1019                                 M_LSUB(REG_ZERO, s1, d);
1020                                 M_IZEXT(d, d);
1021                         } else if (iptr->sx.val.l == 0xffffffffffL) {
1022                                 M_ZAPNOT_IMM(s1, 0x1f, d);
1023                                 M_BGEZ(s1, 3);
1024                                 M_LSUB(REG_ZERO, s1, d);
1025                                 M_ZAPNOT_IMM(d, 0x1f, d);
1026                         } else if (iptr->sx.val.l == 0xffffffffffffL) {
1027                                 M_ZAPNOT_IMM(s1, 0x3f, d);
1028                                 M_BGEZ(s1, 3);
1029                                 M_LSUB(REG_ZERO, s1, d);
1030                                 M_ZAPNOT_IMM(d, 0x3f, d);
1031                         } else if (iptr->sx.val.l == 0xffffffffffffffL) {
1032                                 M_ZAPNOT_IMM(s1, 0x7f, d);
1033                                 M_BGEZ(s1, 3);
1034                                 M_LSUB(REG_ZERO, s1, d);
1035                                 M_ZAPNOT_IMM(d, 0x7f, d);
1036                         } else {
1037                                 LCONST(REG_ITMP2, iptr->sx.val.l);
1038                                 M_AND(s1, REG_ITMP2, d);
1039                                 M_BGEZ(s1, 3);
1040                                 M_LSUB(REG_ZERO, s1, d);
1041                                 M_AND(d, REG_ITMP2, d);
1042                         }
1043                         M_LSUB(REG_ZERO, d, d);
1044                         emit_store_dst(jd, iptr, d);
1045                         break;
1046
1047                 case ICMD_IOR:        /* ..., val1, val2  ==> ..., val1 | val2        */
1048                 case ICMD_LOR:
1049
1050                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1051                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1052                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1053                         M_OR( s1,s2, d);
1054                         emit_store_dst(jd, iptr, d);
1055                         break;
1056
1057                 case ICMD_IORCONST:   /* ..., value  ==> ..., value | constant        */
1058                                       /* sx.val.i = constant                          */
1059
1060                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1061                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1062                         if ((iptr->sx.val.i >= 0) && (iptr->sx.val.i <= 255)) {
1063                                 M_OR_IMM(s1, iptr->sx.val.i, d);
1064                         } else {
1065                                 ICONST(REG_ITMP2, iptr->sx.val.i);
1066                                 M_OR(s1, REG_ITMP2, d);
1067                         }
1068                         emit_store_dst(jd, iptr, d);
1069                         break;
1070
1071                 case ICMD_LORCONST:   /* ..., value  ==> ..., value | constant        */
1072                                       /* sx.val.l = constant                          */
1073
1074                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1075                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1076                         if ((iptr->sx.val.l >= 0) && (iptr->sx.val.l <= 255)) {
1077                                 M_OR_IMM(s1, iptr->sx.val.l, d);
1078                         } else {
1079                                 LCONST(REG_ITMP2, iptr->sx.val.l);
1080                                 M_OR(s1, REG_ITMP2, d);
1081                         }
1082                         emit_store_dst(jd, iptr, d);
1083                         break;
1084
1085                 case ICMD_IXOR:       /* ..., val1, val2  ==> ..., val1 ^ val2        */
1086                 case ICMD_LXOR:
1087
1088                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1089                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1090                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1091                         M_XOR(s1, s2, d);
1092                         emit_store_dst(jd, iptr, d);
1093                         break;
1094
1095                 case ICMD_IXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1096                                       /* sx.val.i = constant                          */
1097
1098                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1099                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1100                         if ((iptr->sx.val.i >= 0) && (iptr->sx.val.i <= 255)) {
1101                                 M_XOR_IMM(s1, iptr->sx.val.i, d);
1102                         } else {
1103                                 ICONST(REG_ITMP2, iptr->sx.val.i);
1104                                 M_XOR(s1, REG_ITMP2, d);
1105                         }
1106                         emit_store_dst(jd, iptr, d);
1107                         break;
1108
1109                 case ICMD_LXORCONST:  /* ..., value  ==> ..., value ^ constant        */
1110                                       /* sx.val.l = constant                          */
1111
1112                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1113                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1114                         if ((iptr->sx.val.l >= 0) && (iptr->sx.val.l <= 255)) {
1115                                 M_XOR_IMM(s1, iptr->sx.val.l, d);
1116                         } else {
1117                                 LCONST(REG_ITMP2, iptr->sx.val.l);
1118                                 M_XOR(s1, REG_ITMP2, d);
1119                         }
1120                         emit_store_dst(jd, iptr, d);
1121                         break;
1122
1123
1124                 case ICMD_LCMP:       /* ..., val1, val2  ==> ..., val1 cmp val2      */
1125
1126                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1127                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1128                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1129                         M_CMPLT(s1, s2, REG_ITMP3);
1130                         M_CMPLT(s2, s1, REG_ITMP1);
1131                         M_LSUB(REG_ITMP1, REG_ITMP3, d);
1132                         emit_store_dst(jd, iptr, d);
1133                         break;
1134
1135
1136                 case ICMD_IINC:       /* ..., value  ==> ..., value + constant        */
1137                                       /* s1.localindex = variable, sx.val.i = constant*/
1138
1139                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1140                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1141
1142                         if ((iptr->sx.val.i >= 0) && (iptr->sx.val.i <= 255)) {
1143                                 M_IADD_IMM(s1, iptr->sx.val.i, d);
1144                         } else if ((iptr->sx.val.i > -256) && (iptr->sx.val.i < 0)) {
1145                                 M_ISUB_IMM(s1, (-iptr->sx.val.i), d);
1146                         } else {
1147                                 M_LDA (s1, s1, iptr->sx.val.i);
1148                                 M_IADD(s1, REG_ZERO, d);
1149                         }
1150
1151                         emit_store_dst(jd, iptr, d);
1152                         break;
1153
1154
1155                 /* floating operations ************************************************/
1156
1157                 case ICMD_FNEG:       /* ..., value  ==> ..., - value                 */
1158
1159                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1160                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1161                         M_FMOVN(s1, d);
1162                         emit_store_dst(jd, iptr, d);
1163                         break;
1164
1165                 case ICMD_DNEG:       /* ..., value  ==> ..., - value                 */
1166
1167                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1168                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1169                         M_FMOVN(s1, d);
1170                         emit_store_dst(jd, iptr, d);
1171                         break;
1172
1173                 case ICMD_FADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1174
1175                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1176                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1177                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1178                         if (opt_noieee) {
1179                                 M_FADD(s1, s2, d);
1180                         } else {
1181                                 if (d == s1 || d == s2) {
1182                                         M_FADDS(s1, s2, REG_FTMP3);
1183                                         M_TRAPB;
1184                                         M_FMOV(REG_FTMP3, d);
1185                                 } else {
1186                                         M_FADDS(s1, s2, d);
1187                                         M_TRAPB;
1188                                 }
1189                         }
1190                         emit_store_dst(jd, iptr, d);
1191                         break;
1192
1193                 case ICMD_DADD:       /* ..., val1, val2  ==> ..., val1 + val2        */
1194
1195                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1196                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1197                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1198                         if (opt_noieee) {
1199                                 M_DADD(s1, s2, d);
1200                         } else {
1201                                 if (d == s1 || d == s2) {
1202                                         M_DADDS(s1, s2, REG_FTMP3);
1203                                         M_TRAPB;
1204                                         M_FMOV(REG_FTMP3, d);
1205                                 } else {
1206                                         M_DADDS(s1, s2, d);
1207                                         M_TRAPB;
1208                                 }
1209                         }
1210                         emit_store_dst(jd, iptr, d);
1211                         break;
1212
1213                 case ICMD_FSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1214
1215                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1216                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1217                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1218                         if (opt_noieee) {
1219                                 M_FSUB(s1, s2, d);
1220                         } else {
1221                                 if (d == s1 || d == s2) {
1222                                         M_FSUBS(s1, s2, REG_FTMP3);
1223                                         M_TRAPB;
1224                                         M_FMOV(REG_FTMP3, d);
1225                                 } else {
1226                                         M_FSUBS(s1, s2, d);
1227                                         M_TRAPB;
1228                                 }
1229                         }
1230                         emit_store_dst(jd, iptr, d);
1231                         break;
1232
1233                 case ICMD_DSUB:       /* ..., val1, val2  ==> ..., val1 - val2        */
1234
1235                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1236                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1237                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1238                         if (opt_noieee) {
1239                                 M_DSUB(s1, s2, d);
1240                         } else {
1241                                 if (d == s1 || d == s2) {
1242                                         M_DSUBS(s1, s2, REG_FTMP3);
1243                                         M_TRAPB;
1244                                         M_FMOV(REG_FTMP3, d);
1245                                 } else {
1246                                         M_DSUBS(s1, s2, d);
1247                                         M_TRAPB;
1248                                 }
1249                         }
1250                         emit_store_dst(jd, iptr, d);
1251                         break;
1252
1253                 case ICMD_FMUL:       /* ..., val1, val2  ==> ..., val1 * val2        */
1254
1255                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1256                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1257                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1258                         if (opt_noieee) {
1259                                 M_FMUL(s1, s2, d);
1260                         } else {
1261                                 if (d == s1 || d == s2) {
1262                                         M_FMULS(s1, s2, REG_FTMP3);
1263                                         M_TRAPB;
1264                                         M_FMOV(REG_FTMP3, d);
1265                                 } else {
1266                                         M_FMULS(s1, s2, d);
1267                                         M_TRAPB;
1268                                 }
1269                         }
1270                         emit_store_dst(jd, iptr, d);
1271                         break;
1272
1273                 case ICMD_DMUL:       /* ..., val1, val2  ==> ..., val1 *** val2      */
1274
1275                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1276                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1277                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1278                         if (opt_noieee) {
1279                                 M_DMUL(s1, s2, d);
1280                         } else {
1281                                 if (d == s1 || d == s2) {
1282                                         M_DMULS(s1, s2, REG_FTMP3);
1283                                         M_TRAPB;
1284                                         M_FMOV(REG_FTMP3, d);
1285                                 } else {
1286                                         M_DMULS(s1, s2, d);
1287                                         M_TRAPB;
1288                                 }
1289                         }
1290                         emit_store_dst(jd, iptr, d);
1291                         break;
1292
1293                 case ICMD_FDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1294
1295                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1296                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1297                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1298                         if (opt_noieee) {
1299                                 M_FDIV(s1, s2, d);
1300                         } else {
1301                                 if (d == s1 || d == s2) {
1302                                         M_FDIVS(s1, s2, REG_FTMP3);
1303                                         M_TRAPB;
1304                                         M_FMOV(REG_FTMP3, d);
1305                                 } else {
1306                                         M_FDIVS(s1, s2, d);
1307                                         M_TRAPB;
1308                                 }
1309                         }
1310                         emit_store_dst(jd, iptr, d);
1311                         break;
1312
1313                 case ICMD_DDIV:       /* ..., val1, val2  ==> ..., val1 / val2        */
1314
1315                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1316                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1317                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1318                         if (opt_noieee) {
1319                                 M_DDIV(s1, s2, d);
1320                         } else {
1321                                 if (d == s1 || d == s2) {
1322                                         M_DDIVS(s1, s2, REG_FTMP3);
1323                                         M_TRAPB;
1324                                         M_FMOV(REG_FTMP3, d);
1325                                 } else {
1326                                         M_DDIVS(s1, s2, d);
1327                                         M_TRAPB;
1328                                 }
1329                         }
1330                         emit_store_dst(jd, iptr, d);
1331                         break;
1332
1333                 case ICMD_I2F:       /* ..., value  ==> ..., (float) value            */
1334                 case ICMD_L2F:
1335                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1336                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1337                         disp = dseg_add_unique_double(cd, 0.0);
1338                         M_LST(s1, REG_PV, disp);
1339                         M_DLD(d, REG_PV, disp);
1340                         M_CVTLF(d, d);
1341                         emit_store_dst(jd, iptr, d);
1342                         break;
1343
1344                 case ICMD_I2D:       /* ..., value  ==> ..., (double) value           */
1345                 case ICMD_L2D:
1346                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1347                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1348                         disp = dseg_add_unique_double(cd, 0.0);
1349                         M_LST(s1, REG_PV, disp);
1350                         M_DLD(d, REG_PV, disp);
1351                         M_CVTLD(d, d);
1352                         emit_store_dst(jd, iptr, d);
1353                         break;
1354
1355                 case ICMD_F2I:       /* ..., value  ==> ..., (int) value              */
1356                 case ICMD_D2I:
1357                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1358                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1359                         disp = dseg_add_unique_double(cd, 0.0);
1360                         M_CVTDL_C(s1, REG_FTMP2);
1361                         M_CVTLI(REG_FTMP2, REG_FTMP3);
1362                         M_DST(REG_FTMP3, REG_PV, disp);
1363                         M_ILD(d, REG_PV, disp);
1364                         emit_store_dst(jd, iptr, d);
1365                         break;
1366
1367                 case ICMD_F2L:       /* ..., value  ==> ..., (long) value             */
1368                 case ICMD_D2L:
1369                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1370                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1371                         disp = dseg_add_unique_double(cd, 0.0);
1372                         M_CVTDL_C(s1, REG_FTMP2);
1373                         M_DST(REG_FTMP2, REG_PV, disp);
1374                         M_LLD(d, REG_PV, disp);
1375                         emit_store_dst(jd, iptr, d);
1376                         break;
1377
1378                 case ICMD_F2D:       /* ..., value  ==> ..., (double) value           */
1379
1380                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1381                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1382                         M_CVTFDS(s1, d);
1383                         M_TRAPB;
1384                         emit_store_dst(jd, iptr, d);
1385                         break;
1386
1387                 case ICMD_D2F:       /* ..., value  ==> ..., (float) value            */
1388
1389                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1390                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
1391                         if (opt_noieee) {
1392                                 M_CVTDF(s1, d);
1393                         } else {
1394                                 M_CVTDFS(s1, d);
1395                                 M_TRAPB;
1396                         }
1397                         emit_store_dst(jd, iptr, d);
1398                         break;
1399
1400                 case ICMD_FCMPL:      /* ..., val1, val2  ==> ..., val1 fcmpl val2    */
1401                 case ICMD_DCMPL:
1402                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1403                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1404                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1405                         if (opt_noieee) {
1406                                 M_LSUB_IMM(REG_ZERO, 1, d);
1407                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1408                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1409                                 M_CLR   (d);
1410                                 M_FCMPLT(s2, s1, REG_FTMP3);
1411                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1412                                 M_LADD_IMM(REG_ZERO, 1, d);
1413                         } else {
1414                                 M_LSUB_IMM(REG_ZERO, 1, d);
1415                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1416                                 M_TRAPB;
1417                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instructions */
1418                                 M_CLR   (d);
1419                                 M_FCMPLTS(s2, s1, REG_FTMP3);
1420                                 M_TRAPB;
1421                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1422                                 M_LADD_IMM(REG_ZERO, 1, d);
1423                         }
1424                         emit_store_dst(jd, iptr, d);
1425                         break;
1426
1427                 case ICMD_FCMPG:      /* ..., val1, val2  ==> ..., val1 fcmpg val2    */
1428                 case ICMD_DCMPG:
1429                         s1 = emit_load_s1(jd, iptr, REG_FTMP1);
1430                         s2 = emit_load_s2(jd, iptr, REG_FTMP2);
1431                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
1432                         if (opt_noieee) {
1433                                 M_LADD_IMM(REG_ZERO, 1, d);
1434                                 M_FCMPEQ(s1, s2, REG_FTMP3);
1435                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1436                                 M_CLR   (d);
1437                                 M_FCMPLT(s1, s2, REG_FTMP3);
1438                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1439                                 M_LSUB_IMM(REG_ZERO, 1, d);
1440                         } else {
1441                                 M_LADD_IMM(REG_ZERO, 1, d);
1442                                 M_FCMPEQS(s1, s2, REG_FTMP3);
1443                                 M_TRAPB;
1444                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1445                                 M_CLR   (d);
1446                                 M_FCMPLTS(s1, s2, REG_FTMP3);
1447                                 M_TRAPB;
1448                                 M_FBEQZ (REG_FTMP3, 1);        /* jump over next instruction  */
1449                                 M_LSUB_IMM(REG_ZERO, 1, d);
1450                         }
1451                         emit_store_dst(jd, iptr, d);
1452                         break;
1453
1454
1455                 /* memory operations **************************************************/
1456
1457                 case ICMD_ARRAYLENGTH: /* ..., arrayref  ==> ..., length              */
1458
1459                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1460                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1461                         gen_nullptr_check(s1);
1462                         M_ILD(d, s1, OFFSET(java_arrayheader, size));
1463                         emit_store_dst(jd, iptr, d);
1464                         break;
1465
1466                 case ICMD_BALOAD:     /* ..., arrayref, index  ==> ..., value         */
1467
1468                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1469                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1470                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1471                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1472                                 gen_nullptr_check(s1);
1473                                 gen_bound_check;
1474                         }
1475                         if (has_ext_instr_set) {
1476                                 M_LADD   (s2, s1, REG_ITMP1);
1477                                 M_BLDU   (d, REG_ITMP1, OFFSET (java_bytearray, data[0]));
1478                                 M_BSEXT  (d, d);
1479                         } else {
1480                                 M_LADD(s2, s1, REG_ITMP1);
1481                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1482                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0])+1);
1483                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1484                                 M_SRA_IMM(d, 56, d);
1485                         }
1486                         emit_store_dst(jd, iptr, d);
1487                         break;
1488
1489                 case ICMD_CALOAD:     /* ..., arrayref, index  ==> ..., value         */
1490
1491                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1492                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1493                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1494                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1495                                 gen_nullptr_check(s1);
1496                                 gen_bound_check;
1497                         }
1498                         if (has_ext_instr_set) {
1499                                 M_LADD(s2, s1, REG_ITMP1);
1500                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1501                                 M_SLDU(d, REG_ITMP1, OFFSET(java_chararray, data[0]));
1502                         } else {
1503                                 M_LADD (s2, s1, REG_ITMP1);
1504                                 M_LADD (s2, REG_ITMP1, REG_ITMP1);
1505                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1506                                 M_LDA  (REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1507                                 M_EXTWL(REG_ITMP2, REG_ITMP1, d);
1508                         }
1509                         emit_store_dst(jd, iptr, d);
1510                         break;
1511
1512                 case ICMD_SALOAD:     /* ..., arrayref, index  ==> ..., value         */
1513
1514                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1515                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1516                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1517                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1518                                 gen_nullptr_check(s1);
1519                                 gen_bound_check;
1520                         }
1521                         if (has_ext_instr_set) {
1522                                 M_LADD(s2, s1, REG_ITMP1);
1523                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1524                                 M_SLDU( d, REG_ITMP1, OFFSET (java_shortarray, data[0]));
1525                                 M_SSEXT(d, d);
1526                         } else {
1527                                 M_LADD(s2, s1, REG_ITMP1);
1528                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1529                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1530                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0])+2);
1531                                 M_EXTQH(REG_ITMP2, REG_ITMP1, d);
1532                                 M_SRA_IMM(d, 48, d);
1533                         }
1534                         emit_store_dst(jd, iptr, d);
1535                         break;
1536
1537                 case ICMD_IALOAD:     /* ..., arrayref, index  ==> ..., value         */
1538
1539                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1540                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1541                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1542                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1543                                 gen_nullptr_check(s1);
1544                                 gen_bound_check;
1545                         }
1546                         M_S4ADDQ(s2, s1, REG_ITMP1);
1547                         M_ILD(d, REG_ITMP1, OFFSET(java_intarray, data[0]));
1548                         emit_store_dst(jd, iptr, d);
1549                         break;
1550
1551                 case ICMD_LALOAD:     /* ..., arrayref, index  ==> ..., value         */
1552
1553                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1554                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1555                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1556                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1557                                 gen_nullptr_check(s1);
1558                                 gen_bound_check;
1559                         }
1560                         M_S8ADDQ(s2, s1, REG_ITMP1);
1561                         M_LLD(d, REG_ITMP1, OFFSET(java_longarray, data[0]));
1562                         emit_store_dst(jd, iptr, d);
1563                         break;
1564
1565                 case ICMD_FALOAD:     /* ..., arrayref, index  ==> ..., value         */
1566
1567                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1568                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1569                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1570                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1571                                 gen_nullptr_check(s1);
1572                                 gen_bound_check;
1573                         }
1574                         M_S4ADDQ(s2, s1, REG_ITMP1);
1575                         M_FLD(d, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1576                         emit_store_dst(jd, iptr, d);
1577                         break;
1578
1579                 case ICMD_DALOAD:     /* ..., arrayref, index  ==> ..., value         */
1580
1581                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1582                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1583                         d = codegen_reg_of_dst(jd, iptr, REG_FTMP2);
1584                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1585                                 gen_nullptr_check(s1);
1586                                 gen_bound_check;
1587                         }
1588                         M_S8ADDQ(s2, s1, REG_ITMP1);
1589                         M_DLD(d, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1590                         emit_store_dst(jd, iptr, d);
1591                         break;
1592
1593                 case ICMD_AALOAD:     /* ..., arrayref, index  ==> ..., value         */
1594
1595                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1596                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1597                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1598                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1599                                 gen_nullptr_check(s1);
1600                                 gen_bound_check;
1601                         }
1602                         M_SAADDQ(s2, s1, REG_ITMP1);
1603                         M_ALD(d, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1604                         emit_store_dst(jd, iptr, d);
1605                         break;
1606
1607
1608                 case ICMD_BASTORE:    /* ..., arrayref, index, value  ==> ...         */
1609
1610                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1611                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1612                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1613                                 gen_nullptr_check(s1);
1614                                 gen_bound_check;
1615                         }
1616                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1617                         if (has_ext_instr_set) {
1618                                 M_LADD(s2, s1, REG_ITMP1);
1619                                 M_BST(s3, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1620                         } else {
1621                                 M_LADD(s2, s1, REG_ITMP1);
1622                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1623                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1624                                 M_INSBL(s3, REG_ITMP1, REG_ITMP3);
1625                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1626                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1627                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1628                         }
1629                         break;
1630
1631                 case ICMD_CASTORE:    /* ..., arrayref, index, value  ==> ...         */
1632
1633                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1634                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1635                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1636                                 gen_nullptr_check(s1);
1637                                 gen_bound_check;
1638                         }
1639                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1640                         if (has_ext_instr_set) {
1641                                 M_LADD(s2, s1, REG_ITMP1);
1642                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1643                                 M_SST(s3, REG_ITMP1, OFFSET(java_chararray, data[0]));
1644                         } else {
1645                                 M_LADD(s2, s1, REG_ITMP1);
1646                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1647                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1648                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1649                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1650                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1651                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1652                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1653                         }
1654                         break;
1655
1656                 case ICMD_SASTORE:    /* ..., arrayref, index, value  ==> ...         */
1657
1658                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1659                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1660                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1661                                 gen_nullptr_check(s1);
1662                                 gen_bound_check;
1663                         }
1664                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1665                         if (has_ext_instr_set) {
1666                                 M_LADD(s2, s1, REG_ITMP1);
1667                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1668                                 M_SST(s3, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1669                         } else {
1670                                 M_LADD(s2, s1, REG_ITMP1);
1671                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1672                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1673                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1674                                 M_INSWL(s3, REG_ITMP1, REG_ITMP3);
1675                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1676                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1677                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1678                         }
1679                         break;
1680
1681                 case ICMD_IASTORE:    /* ..., arrayref, index, value  ==> ...         */
1682
1683                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1684                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1685                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1686                                 gen_nullptr_check(s1);
1687                                 gen_bound_check;
1688                         }
1689                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1690                         M_S4ADDQ(s2, s1, REG_ITMP1);
1691                         M_IST(s3, REG_ITMP1, OFFSET(java_intarray, data[0]));
1692                         break;
1693
1694                 case ICMD_LASTORE:    /* ..., arrayref, index, value  ==> ...         */
1695
1696                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1697                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1698                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1699                                 gen_nullptr_check(s1);
1700                                 gen_bound_check;
1701                         }
1702                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1703                         M_S8ADDQ(s2, s1, REG_ITMP1);
1704                         M_LST(s3, REG_ITMP1, OFFSET(java_longarray, data[0]));
1705                         break;
1706
1707                 case ICMD_FASTORE:    /* ..., arrayref, index, value  ==> ...         */
1708
1709                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1710                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1711                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1712                                 gen_nullptr_check(s1);
1713                                 gen_bound_check;
1714                         }
1715                         s3 = emit_load_s3(jd, iptr, REG_FTMP3);
1716                         M_S4ADDQ(s2, s1, REG_ITMP1);
1717                         M_FST(s3, REG_ITMP1, OFFSET(java_floatarray, data[0]));
1718                         break;
1719
1720                 case ICMD_DASTORE:    /* ..., arrayref, index, value  ==> ...         */
1721
1722                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1723                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1724                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1725                                 gen_nullptr_check(s1);
1726                                 gen_bound_check;
1727                         }
1728                         s3 = emit_load_s3(jd, iptr, REG_FTMP3);
1729                         M_S8ADDQ(s2, s1, REG_ITMP1);
1730                         M_DST(s3, REG_ITMP1, OFFSET(java_doublearray, data[0]));
1731                         break;
1732
1733                 case ICMD_AASTORE:    /* ..., arrayref, index, value  ==> ...         */
1734
1735                         s1 = emit_load_s1(jd, iptr, REG_A0);
1736                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1737                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1738                                 gen_nullptr_check(s1);
1739                                 gen_bound_check;
1740                         }
1741                         s3 = emit_load_s3(jd, iptr, REG_A1);
1742
1743                         M_INTMOVE(s1, REG_A0);
1744                         M_INTMOVE(s3, REG_A1);
1745
1746                         disp = dseg_add_functionptr(cd, BUILTIN_canstore);
1747                         M_ALD(REG_PV, REG_PV, disp);
1748                         M_JSR(REG_RA, REG_PV);
1749                         disp = (s4) (cd->mcodeptr - cd->mcodebase);
1750                         M_LDA(REG_PV, REG_RA, -disp);
1751
1752                         M_BEQZ(REG_RESULT, 0);
1753                         codegen_add_arraystoreexception_ref(cd);
1754
1755                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1756                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1757                         s3 = emit_load_s3(jd, iptr, REG_ITMP3);
1758                         M_SAADDQ(s2, s1, REG_ITMP1);
1759                         M_AST(s3, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1760                         break;
1761
1762
1763                 case ICMD_IASTORECONST:   /* ..., arrayref, index  ==> ...            */
1764
1765                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1766                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1767                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1768                                 gen_nullptr_check(s1);
1769                                 gen_bound_check;
1770                         }
1771                         M_S4ADDQ(s2, s1, REG_ITMP1);
1772                         M_IST(REG_ZERO, REG_ITMP1, OFFSET(java_intarray, data[0]));
1773                         break;
1774
1775                 case ICMD_LASTORECONST:   /* ..., arrayref, index  ==> ...            */
1776
1777                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1778                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1779                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1780                                 gen_nullptr_check(s1);
1781                                 gen_bound_check;
1782                         }
1783                         M_S8ADDQ(s2, s1, REG_ITMP1);
1784                         M_LST(REG_ZERO, REG_ITMP1, OFFSET(java_longarray, data[0]));
1785                         break;
1786
1787                 case ICMD_AASTORECONST:   /* ..., arrayref, index  ==> ...            */
1788
1789                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1790                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1791                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1792                                 gen_nullptr_check(s1);
1793                                 gen_bound_check;
1794                         }
1795                         M_SAADDQ(s2, s1, REG_ITMP1);
1796                         M_AST(REG_ZERO, REG_ITMP1, OFFSET(java_objectarray, data[0]));
1797                         break;
1798
1799                 case ICMD_BASTORECONST:   /* ..., arrayref, index  ==> ...            */
1800
1801                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1802                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1803                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1804                                 gen_nullptr_check(s1);
1805                                 gen_bound_check;
1806                         }
1807                         if (has_ext_instr_set) {
1808                                 M_LADD(s2, s1, REG_ITMP1);
1809                                 M_BST(REG_ZERO, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1810
1811                         } else {
1812                                 M_LADD(s2, s1, REG_ITMP1);
1813                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1814                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_bytearray, data[0]));
1815                                 M_INSBL(REG_ZERO, REG_ITMP1, REG_ITMP3);
1816                                 M_MSKBL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1817                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1818                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1819                         }
1820                         break;
1821
1822                 case ICMD_CASTORECONST:   /* ..., arrayref, index  ==> ...            */
1823
1824                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1825                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1826                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1827                                 gen_nullptr_check(s1);
1828                                 gen_bound_check;
1829                         }
1830                         if (has_ext_instr_set) {
1831                                 M_LADD(s2, s1, REG_ITMP1);
1832                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1833                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_chararray, data[0]));
1834
1835                         } else {
1836                                 M_LADD(s2, s1, REG_ITMP1);
1837                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1838                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_chararray, data[0]));
1839                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_chararray, data[0]));
1840                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
1841                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1842                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1843                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1844                         }
1845                         break;
1846
1847                 case ICMD_SASTORECONST:   /* ..., arrayref, index  ==> ...            */
1848
1849                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1850                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1851                         if (INSTRUCTION_MUST_CHECK(iptr)) {
1852                                 gen_nullptr_check(s1);
1853                                 gen_bound_check;
1854                         }
1855                         if (has_ext_instr_set) {
1856                                 M_LADD(s2, s1, REG_ITMP1);
1857                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1858                                 M_SST(REG_ZERO, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1859
1860                         } else {
1861                                 M_LADD(s2, s1, REG_ITMP1);
1862                                 M_LADD(s2, REG_ITMP1, REG_ITMP1);
1863                                 M_LLD_U(REG_ITMP2, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1864                                 M_LDA(REG_ITMP1, REG_ITMP1, OFFSET(java_shortarray, data[0]));
1865                                 M_INSWL(REG_ZERO, REG_ITMP1, REG_ITMP3);
1866                                 M_MSKWL(REG_ITMP2, REG_ITMP1, REG_ITMP2);
1867                                 M_OR(REG_ITMP2, REG_ITMP3, REG_ITMP2);
1868                                 M_LST_U(REG_ITMP2, REG_ITMP1, 0);
1869                         }
1870                         break;
1871
1872
1873                 case ICMD_GETSTATIC:  /* ...  ==> ..., value                          */
1874
1875                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1876                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1877
1878                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1879
1880                                 disp = dseg_add_unique_address(cd, uf);
1881
1882                                 codegen_addpatchref(cd, PATCHER_get_putstatic, uf, disp);
1883
1884                                 if (opt_showdisassemble)
1885                                         M_NOP;
1886                         }
1887                         else {
1888                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1889
1890                                 fieldtype = fi->type;
1891                                 disp = dseg_add_address(cd, &(fi->value));
1892
1893                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1894                                         codegen_addpatchref(cd, PATCHER_initialize_class, fi->class,
1895                                                                                 0);
1896
1897                                         if (opt_showdisassemble)
1898                                                 M_NOP;
1899                                 }
1900                         }
1901
1902                         M_ALD(REG_ITMP1, REG_PV, disp);
1903                         switch (fieldtype) {
1904                         case TYPE_INT:
1905                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1906                                 M_ILD(d, REG_ITMP1, 0);
1907                                 break;
1908                         case TYPE_LNG:
1909                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1910                                 M_LLD(d, REG_ITMP1, 0);
1911                                 break;
1912                         case TYPE_ADR:
1913                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1914                                 M_ALD(d, REG_ITMP1, 0);
1915                                 break;
1916                         case TYPE_FLT:
1917                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1918                                 M_FLD(d, REG_ITMP1, 0);
1919                                 break;
1920                         case TYPE_DBL:
1921                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1922                                 M_DLD(d, REG_ITMP1, 0);
1923                                 break;
1924                         }
1925                         emit_store_dst(jd, iptr, d);
1926                         break;
1927
1928                 case ICMD_PUTSTATIC:  /* ..., value  ==> ...                          */
1929
1930                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1931                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1932
1933                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1934
1935                                 disp = dseg_add_unique_address(cd, uf);
1936
1937                                 codegen_addpatchref(cd, PATCHER_get_putstatic, uf, disp);
1938
1939                                 if (opt_showdisassemble)
1940                                         M_NOP;
1941                         }
1942                         else {
1943                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
1944
1945                                 fieldtype = fi->type;
1946                                 disp = dseg_add_address(cd, &(fi->value));
1947
1948                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
1949                                         codegen_addpatchref(cd, PATCHER_initialize_class, fi->class,
1950                                                                                 0);
1951
1952                                         if (opt_showdisassemble)
1953                                                 M_NOP;
1954                                 }
1955                         }
1956
1957                         M_ALD(REG_ITMP1, REG_PV, disp);
1958                         switch (fieldtype) {
1959                         case TYPE_INT:
1960                                 s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1961                                 M_IST(s1, REG_ITMP1, 0);
1962                                 break;
1963                         case TYPE_LNG:
1964                                 s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1965                                 M_LST(s1, REG_ITMP1, 0);
1966                                 break;
1967                         case TYPE_ADR:
1968                                 s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1969                                 M_AST(s1, REG_ITMP1, 0);
1970                                 break;
1971                         case TYPE_FLT:
1972                                 s1 = emit_load_s1(jd, iptr, REG_FTMP2);
1973                                 M_FST(s1, REG_ITMP1, 0);
1974                                 break;
1975                         case TYPE_DBL:
1976                                 s1 = emit_load_s1(jd, iptr, REG_FTMP2);
1977                                 M_DST(s1, REG_ITMP1, 0);
1978                                 break;
1979                         }
1980                         break;
1981
1982                 case ICMD_PUTSTATICCONST: /* ...  ==> ...                             */
1983                                           /* val = value (in current instruction)     */
1984                                           /* following NOP)                           */
1985
1986                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1987                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
1988
1989                                 fieldtype = uf->fieldref->parseddesc.fd->type;
1990
1991                                 disp = dseg_add_unique_address(cd, uf);
1992
1993                                 codegen_addpatchref(cd, PATCHER_get_putstatic, uf, disp);
1994
1995                                 if (opt_showdisassemble)
1996                                         M_NOP;
1997                         }
1998                         else {
1999                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
2000
2001                                 fieldtype = fi->type;
2002                                 disp = dseg_add_address(cd, &(fi->value));
2003
2004                                 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
2005                                         codegen_addpatchref(cd, PATCHER_initialize_class, fi->class,
2006                                                                                 0);
2007
2008                                         if (opt_showdisassemble)
2009                                                 M_NOP;
2010                                 }
2011                         }
2012
2013                         M_ALD(REG_ITMP1, REG_PV, disp);
2014                         switch (fieldtype) {
2015                         case TYPE_INT:
2016                                 M_IST(REG_ZERO, REG_ITMP1, 0);
2017                                 break;
2018                         case TYPE_LNG:
2019                                 M_LST(REG_ZERO, REG_ITMP1, 0);
2020                                 break;
2021                         case TYPE_ADR:
2022                                 M_AST(REG_ZERO, REG_ITMP1, 0);
2023                                 break;
2024                         case TYPE_FLT:
2025                                 M_FST(REG_ZERO, REG_ITMP1, 0);
2026                                 break;
2027                         case TYPE_DBL:
2028                                 M_DST(REG_ZERO, REG_ITMP1, 0);
2029                                 break;
2030                         }
2031                         break;
2032
2033
2034                 case ICMD_GETFIELD:   /* ...  ==> ..., value                          */
2035
2036                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2037                         gen_nullptr_check(s1);
2038
2039                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2040                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
2041
2042                                 fieldtype = uf->fieldref->parseddesc.fd->type;
2043
2044                                 codegen_addpatchref(cd, PATCHER_get_putfield, uf, 0);
2045
2046                                 if (opt_showdisassemble)
2047                                         M_NOP;
2048
2049                                 disp = 0;
2050                         }
2051                         else {
2052                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
2053
2054                                 fieldtype = fi->type;
2055                                 disp = fi->offset;
2056                         }
2057
2058                         switch (fieldtype) {
2059                         case TYPE_INT:
2060                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
2061                                 M_ILD(d, s1, disp);
2062                                 break;
2063                         case TYPE_LNG:
2064                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
2065                                 M_LLD(d, s1, disp);
2066                                 break;
2067                         case TYPE_ADR:
2068                                 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
2069                                 M_ALD(d, s1, disp);
2070                                 break;
2071                         case TYPE_FLT:
2072                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
2073                                 M_FLD(d, s1, disp);
2074                                 break;
2075                         case TYPE_DBL:
2076                                 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
2077                                 M_DLD(d, s1, disp);
2078                                 break;
2079                         }
2080                         emit_store_dst(jd, iptr, d);
2081                         break;
2082
2083                 case ICMD_PUTFIELD:   /* ..., objectref, value  ==> ...               */
2084
2085                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2086                         gen_nullptr_check(s1);
2087
2088                         if (!IS_FLT_DBL_TYPE(fieldtype)) {
2089                                 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2090                         } else {
2091                                 s2 = emit_load_s2(jd, iptr, REG_FTMP2);
2092                         }
2093
2094                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2095                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
2096
2097                                 fieldtype = uf->fieldref->parseddesc.fd->type;
2098
2099                                 codegen_addpatchref(cd, PATCHER_get_putfield, uf, 0);
2100
2101                                 if (opt_showdisassemble)
2102                                         M_NOP;
2103
2104                                 disp = 0;
2105                         }
2106                         else {
2107                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
2108
2109                                 fieldtype = fi->type;
2110                                 disp = fi->offset;
2111                         }
2112
2113                         switch (fieldtype) {
2114                         case TYPE_INT:
2115                                 M_IST(s2, s1, disp);
2116                                 break;
2117                         case TYPE_LNG:
2118                                 M_LST(s2, s1, disp);
2119                                 break;
2120                         case TYPE_ADR:
2121                                 M_AST(s2, s1, disp);
2122                                 break;
2123                         case TYPE_FLT:
2124                                 M_FST(s2, s1, disp);
2125                                 break;
2126                         case TYPE_DBL:
2127                                 M_DST(s2, s1, disp);
2128                                 break;
2129                         }
2130                         break;
2131
2132                 case ICMD_PUTFIELDCONST:  /* ..., objectref  ==> ...                  */
2133                                           /* val = value (in current instruction)     */
2134                                           /* following NOP)                           */
2135
2136                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2137                         gen_nullptr_check(s1);
2138
2139                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2140                                 unresolved_field *uf = iptr->sx.s23.s3.uf;
2141
2142                                 fieldtype = uf->fieldref->parseddesc.fd->type;
2143
2144                                 codegen_addpatchref(cd, PATCHER_get_putfield, uf, 0);
2145
2146                                 if (opt_showdisassemble)
2147                                         M_NOP;
2148
2149                                 disp = 0;
2150                         }
2151                         else {
2152                                 fieldinfo *fi = iptr->sx.s23.s3.fmiref->p.field;
2153
2154                                 fieldtype = fi->type;
2155                                 disp = fi->offset;
2156                         }
2157
2158                         switch (fieldtype) {
2159                         case TYPE_INT:
2160                                 M_IST(REG_ZERO, s1, disp);
2161                                 break;
2162                         case TYPE_LNG:
2163                                 M_LST(REG_ZERO, s1, disp);
2164                                 break;
2165                         case TYPE_ADR:
2166                                 M_AST(REG_ZERO, s1, disp);
2167                                 break;
2168                         case TYPE_FLT:
2169                                 M_FST(REG_ZERO, s1, disp);
2170                                 break;
2171                         case TYPE_DBL:
2172                                 M_DST(REG_ZERO, s1, disp);
2173                                 break;
2174                         }
2175                         break;
2176
2177
2178                 /* branch operations **************************************************/
2179
2180                 case ICMD_ATHROW:       /* ..., objectref ==> ... (, objectref)       */
2181
2182                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2183                         M_INTMOVE(s1, REG_ITMP1_XPTR);
2184
2185 #ifdef ENABLE_VERIFIER
2186                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2187                                 unresolved_class *uc = iptr->sx.s23.s2.uc;
2188
2189                                 codegen_addpatchref(cd, PATCHER_resolve_class, uc, 0);
2190
2191                                 if (opt_showdisassemble)
2192                                         M_NOP;
2193                         }
2194 #endif /* ENABLE_VERIFIER */
2195
2196                         disp = dseg_add_functionptr(cd, asm_handle_exception);
2197                         M_ALD(REG_ITMP2, REG_PV, disp);
2198                         M_JMP(REG_ITMP2_XPC, REG_ITMP2);
2199                         M_NOP;              /* nop ensures that XPC is less than the end */
2200                                             /* of basic block                            */
2201                         ALIGNCODENOP;
2202                         break;
2203
2204                 case ICMD_GOTO:         /* ... ==> ...                                */
2205                         M_BR(0);
2206                         codegen_addreference(cd, iptr->dst.block);
2207                         ALIGNCODENOP;
2208                         break;
2209
2210                 case ICMD_JSR:          /* ... ==> ...                                */
2211
2212                         M_BSR(REG_ITMP1, 0);
2213                         codegen_addreference(cd, iptr->sx.s23.s3.jsrtarget.block);
2214                         break;
2215
2216                 case ICMD_RET:          /* ... ==> ...                                */
2217                                         /* s1.localindex = local variable                       */
2218
2219                         M_BR(0);
2220                         codegen_addreference(cd, iptr->dst.block);
2221 /*                      var = &(rd->locals[iptr->s1.localindex][TYPE_ADR]); */
2222 /*                      if (var->flags & INMEMORY) { */
2223 /*                              M_ALD(REG_ITMP1, REG_SP, 8 * var->vv.regoff); */
2224 /*                              M_RET(REG_ZERO, REG_ITMP1); */
2225 /*                              } */
2226 /*                      else */
2227 /*                              M_RET(REG_ZERO, var->vv.regoff); */
2228                         ALIGNCODENOP;
2229                         break;
2230
2231                 case ICMD_IFNULL:       /* ..., value ==> ...                         */
2232
2233                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2234                         M_BEQZ(s1, 0);
2235                         codegen_addreference(cd, iptr->dst.block);
2236                         break;
2237
2238                 case ICMD_IFNONNULL:    /* ..., value ==> ...                         */
2239
2240                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2241                         M_BNEZ(s1, 0);
2242                         codegen_addreference(cd, iptr->dst.block);
2243                         break;
2244
2245                 case ICMD_IFEQ:         /* ..., value ==> ...                         */
2246
2247                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2248                         if (iptr->sx.val.i == 0) {
2249                                 M_BEQZ(s1, 0);
2250                                 }
2251                         else {
2252                                 if ((iptr->sx.val.i > 0) && (iptr->sx.val.i <= 255)) {
2253                                         M_CMPEQ_IMM(s1, iptr->sx.val.i, REG_ITMP1);
2254                                         }
2255                                 else {
2256                                         ICONST(REG_ITMP2, iptr->sx.val.i);
2257                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2258                                         }
2259                                 M_BNEZ(REG_ITMP1, 0);
2260                                 }
2261                         codegen_addreference(cd, iptr->dst.block);
2262                         break;
2263
2264                 case ICMD_IFLT:         /* ..., value ==> ...                         */
2265
2266                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2267                         if (iptr->sx.val.i == 0) {
2268                                 M_BLTZ(s1, 0);
2269                                 }
2270                         else {
2271                                 if ((iptr->sx.val.i > 0) && (iptr->sx.val.i <= 255)) {
2272                                         M_CMPLT_IMM(s1, iptr->sx.val.i, REG_ITMP1);
2273                                         }
2274                                 else {
2275                                         ICONST(REG_ITMP2, iptr->sx.val.i);
2276                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2277                                         }
2278                                 M_BNEZ(REG_ITMP1, 0);
2279                                 }
2280                         codegen_addreference(cd, iptr->dst.block);
2281                         break;
2282
2283                 case ICMD_IFLE:         /* ..., value ==> ...                         */
2284
2285                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2286                         if (iptr->sx.val.i == 0) {
2287                                 M_BLEZ(s1, 0);
2288                                 }
2289                         else {
2290                                 if ((iptr->sx.val.i > 0) && (iptr->sx.val.i <= 255)) {
2291                                         M_CMPLE_IMM(s1, iptr->sx.val.i, REG_ITMP1);
2292                                         }
2293                                 else {
2294                                         ICONST(REG_ITMP2, iptr->sx.val.i);
2295                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2296                                         }
2297                                 M_BNEZ(REG_ITMP1, 0);
2298                                 }
2299                         codegen_addreference(cd, iptr->dst.block);
2300                         break;
2301
2302                 case ICMD_IFNE:         /* ..., value ==> ...                         */
2303
2304                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2305                         if (iptr->sx.val.i == 0) {
2306                                 M_BNEZ(s1, 0);
2307                                 }
2308                         else {
2309                                 if ((iptr->sx.val.i > 0) && (iptr->sx.val.i <= 255)) {
2310                                         M_CMPEQ_IMM(s1, iptr->sx.val.i, REG_ITMP1);
2311                                         }
2312                                 else {
2313                                         ICONST(REG_ITMP2, iptr->sx.val.i);
2314                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2315                                         }
2316                                 M_BEQZ(REG_ITMP1, 0);
2317                                 }
2318                         codegen_addreference(cd, iptr->dst.block);
2319                         break;
2320
2321                 case ICMD_IFGT:         /* ..., value ==> ...                         */
2322
2323                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2324                         if (iptr->sx.val.i == 0) {
2325                                 M_BGTZ(s1, 0);
2326                                 }
2327                         else {
2328                                 if ((iptr->sx.val.i > 0) && (iptr->sx.val.i <= 255)) {
2329                                         M_CMPLE_IMM(s1, iptr->sx.val.i, REG_ITMP1);
2330                                         }
2331                                 else {
2332                                         ICONST(REG_ITMP2, iptr->sx.val.i);
2333                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2334                                         }
2335                                 M_BEQZ(REG_ITMP1, 0);
2336                                 }
2337                         codegen_addreference(cd, iptr->dst.block);
2338                         break;
2339
2340                 case ICMD_IFGE:         /* ..., value ==> ...                         */
2341
2342                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2343                         if (iptr->sx.val.i == 0) {
2344                                 M_BGEZ(s1, 0);
2345                                 }
2346                         else {
2347                                 if ((iptr->sx.val.i > 0) && (iptr->sx.val.i <= 255)) {
2348                                         M_CMPLT_IMM(s1, iptr->sx.val.i, REG_ITMP1);
2349                                         }
2350                                 else {
2351                                         ICONST(REG_ITMP2, iptr->sx.val.i);
2352                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2353                                         }
2354                                 M_BEQZ(REG_ITMP1, 0);
2355                                 }
2356                         codegen_addreference(cd, iptr->dst.block);
2357                         break;
2358
2359                 case ICMD_IF_LEQ:       /* ..., value ==> ...                         */
2360
2361                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2362                         if (iptr->sx.val.l == 0) {
2363                                 M_BEQZ(s1, 0);
2364                                 }
2365                         else {
2366                                 if ((iptr->sx.val.l > 0) && (iptr->sx.val.l <= 255)) {
2367                                         M_CMPEQ_IMM(s1, iptr->sx.val.l, REG_ITMP1);
2368                                         }
2369                                 else {
2370                                         LCONST(REG_ITMP2, iptr->sx.val.l);
2371                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2372                                         }
2373                                 M_BNEZ(REG_ITMP1, 0);
2374                                 }
2375                         codegen_addreference(cd, iptr->dst.block);
2376                         break;
2377
2378                 case ICMD_IF_LLT:       /* ..., value ==> ...                         */
2379
2380                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2381                         if (iptr->sx.val.l == 0) {
2382                                 M_BLTZ(s1, 0);
2383                                 }
2384                         else {
2385                                 if ((iptr->sx.val.l > 0) && (iptr->sx.val.l <= 255)) {
2386                                         M_CMPLT_IMM(s1, iptr->sx.val.l, REG_ITMP1);
2387                                         }
2388                                 else {
2389                                         LCONST(REG_ITMP2, iptr->sx.val.l);
2390                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2391                                         }
2392                                 M_BNEZ(REG_ITMP1, 0);
2393                                 }
2394                         codegen_addreference(cd, iptr->dst.block);
2395                         break;
2396
2397                 case ICMD_IF_LLE:       /* ..., value ==> ...                         */
2398
2399                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2400                         if (iptr->sx.val.l == 0) {
2401                                 M_BLEZ(s1, 0);
2402                                 }
2403                         else {
2404                                 if ((iptr->sx.val.l > 0) && (iptr->sx.val.l <= 255)) {
2405                                         M_CMPLE_IMM(s1, iptr->sx.val.l, REG_ITMP1);
2406                                         }
2407                                 else {
2408                                         LCONST(REG_ITMP2, iptr->sx.val.l);
2409                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2410                                         }
2411                                 M_BNEZ(REG_ITMP1, 0);
2412                                 }
2413                         codegen_addreference(cd, iptr->dst.block);
2414                         break;
2415
2416                 case ICMD_IF_LNE:       /* ..., value ==> ...                         */
2417
2418                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2419                         if (iptr->sx.val.l == 0) {
2420                                 M_BNEZ(s1, 0);
2421                                 }
2422                         else {
2423                                 if ((iptr->sx.val.l > 0) && (iptr->sx.val.l <= 255)) {
2424                                         M_CMPEQ_IMM(s1, iptr->sx.val.l, REG_ITMP1);
2425                                         }
2426                                 else {
2427                                         LCONST(REG_ITMP2, iptr->sx.val.l);
2428                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP1);
2429                                         }
2430                                 M_BEQZ(REG_ITMP1, 0);
2431                                 }
2432                         codegen_addreference(cd, iptr->dst.block);
2433                         break;
2434
2435                 case ICMD_IF_LGT:       /* ..., value ==> ...                         */
2436
2437                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2438                         if (iptr->sx.val.l == 0) {
2439                                 M_BGTZ(s1, 0);
2440                                 }
2441                         else {
2442                                 if ((iptr->sx.val.l > 0) && (iptr->sx.val.l <= 255)) {
2443                                         M_CMPLE_IMM(s1, iptr->sx.val.l, REG_ITMP1);
2444                                         }
2445                                 else {
2446                                         LCONST(REG_ITMP2, iptr->sx.val.l);
2447                                         M_CMPLE(s1, REG_ITMP2, REG_ITMP1);
2448                                         }
2449                                 M_BEQZ(REG_ITMP1, 0);
2450                                 }
2451                         codegen_addreference(cd, iptr->dst.block);
2452                         break;
2453
2454                 case ICMD_IF_LGE:       /* ..., value ==> ...                         */
2455
2456                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2457                         if (iptr->sx.val.l == 0) {
2458                                 M_BGEZ(s1, 0);
2459                                 }
2460                         else {
2461                                 if ((iptr->sx.val.l > 0) && (iptr->sx.val.l <= 255)) {
2462                                         M_CMPLT_IMM(s1, iptr->sx.val.l, REG_ITMP1);
2463                                         }
2464                                 else {
2465                                         LCONST(REG_ITMP2, iptr->sx.val.l);
2466                                         M_CMPLT(s1, REG_ITMP2, REG_ITMP1);
2467                                         }
2468                                 M_BEQZ(REG_ITMP1, 0);
2469                                 }
2470                         codegen_addreference(cd, iptr->dst.block);
2471                         break;
2472
2473                 case ICMD_IF_ICMPEQ:    /* ..., value, value ==> ...                  */
2474                 case ICMD_IF_LCMPEQ:    /* op1 = target JavaVM pc                     */
2475                 case ICMD_IF_ACMPEQ:
2476
2477                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2478                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2479                         M_CMPEQ(s1, s2, REG_ITMP1);
2480                         M_BNEZ(REG_ITMP1, 0);
2481                         codegen_addreference(cd, iptr->dst.block);
2482                         break;
2483
2484                 case ICMD_IF_ICMPNE:    /* ..., value, value ==> ...                  */
2485                 case ICMD_IF_LCMPNE:    /* op1 = target JavaVM pc                     */
2486                 case ICMD_IF_ACMPNE:
2487
2488                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2489                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2490                         M_CMPEQ(s1, s2, REG_ITMP1);
2491                         M_BEQZ(REG_ITMP1, 0);
2492                         codegen_addreference(cd, iptr->dst.block);
2493                         break;
2494
2495                 case ICMD_IF_ICMPLT:    /* ..., value, value ==> ...                  */
2496                 case ICMD_IF_LCMPLT:    /* op1 = target JavaVM pc                     */
2497
2498                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2499                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2500                         M_CMPLT(s1, s2, REG_ITMP1);
2501                         M_BNEZ(REG_ITMP1, 0);
2502                         codegen_addreference(cd, iptr->dst.block);
2503                         break;
2504
2505                 case ICMD_IF_ICMPGT:    /* ..., value, value ==> ...                  */
2506                 case ICMD_IF_LCMPGT:    /* op1 = target JavaVM pc                     */
2507
2508                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2509                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2510                         M_CMPLE(s1, s2, REG_ITMP1);
2511                         M_BEQZ(REG_ITMP1, 0);
2512                         codegen_addreference(cd, iptr->dst.block);
2513                         break;
2514
2515                 case ICMD_IF_ICMPLE:    /* ..., value, value ==> ...                  */
2516                 case ICMD_IF_LCMPLE:    /* op1 = target JavaVM pc                     */
2517
2518                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2519                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2520                         M_CMPLE(s1, s2, REG_ITMP1);
2521                         M_BNEZ(REG_ITMP1, 0);
2522                         codegen_addreference(cd, iptr->dst.block);
2523                         break;
2524
2525                 case ICMD_IF_ICMPGE:    /* ..., value, value ==> ...                  */
2526                 case ICMD_IF_LCMPGE:    /* op1 = target JavaVM pc                     */
2527
2528                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2529                         s2 = emit_load_s2(jd, iptr, REG_ITMP2);
2530                         M_CMPLT(s1, s2, REG_ITMP1);
2531                         M_BEQZ(REG_ITMP1, 0);
2532                         codegen_addreference(cd, iptr->dst.block);
2533                         break;
2534
2535
2536                 case ICMD_IRETURN:      /* ..., retvalue ==> ...                      */
2537                 case ICMD_LRETURN:
2538
2539                         s1 = emit_load_s1(jd, iptr, REG_RESULT);
2540                         M_INTMOVE(s1, REG_RESULT);
2541                         goto nowperformreturn;
2542
2543                 case ICMD_ARETURN:      /* ..., retvalue ==> ...                      */
2544
2545                         s1 = emit_load_s1(jd, iptr, REG_RESULT);
2546                         M_INTMOVE(s1, REG_RESULT);
2547
2548 #ifdef ENABLE_VERIFIER
2549                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2550                                 unresolved_class *uc = iptr->sx.s23.s2.uc;
2551
2552                                 codegen_addpatchref(cd, PATCHER_resolve_class, uc, 0);
2553
2554                                 if (opt_showdisassemble)
2555                                         M_NOP;
2556                         }
2557 #endif /* ENABLE_VERIFIER */
2558                         goto nowperformreturn;
2559
2560                 case ICMD_FRETURN:      /* ..., retvalue ==> ...                      */
2561                 case ICMD_DRETURN:
2562
2563                         s1 = emit_load_s1(jd, iptr, REG_FRESULT);
2564                         M_FLTMOVE(s1, REG_FRESULT);
2565                         goto nowperformreturn;
2566
2567                 case ICMD_RETURN:       /* ...  ==> ...                               */
2568
2569 nowperformreturn:
2570                         {
2571                         s4 i, p;
2572
2573                         p = cd->stackframesize;
2574
2575                         /* call trace function */
2576
2577 #if !defined(NDEBUG)
2578                         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
2579                                 emit_verbosecall_exit(jd);
2580 #endif
2581
2582 #if defined(ENABLE_THREADS)
2583                         if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
2584                                 M_ALD(REG_A0, REG_SP, rd->memuse * 8);
2585
2586                                 switch (iptr->opc) {
2587                                 case ICMD_IRETURN:
2588                                 case ICMD_LRETURN:
2589                                 case ICMD_ARETURN:
2590                                         M_LST(REG_RESULT, REG_SP, rd->memuse * 8);
2591                                         break;
2592                                 case ICMD_FRETURN:
2593                                 case ICMD_DRETURN:
2594                                         M_DST(REG_FRESULT, REG_SP, rd->memuse * 8);
2595                                         break;
2596                                 }
2597
2598                                 disp = dseg_add_functionptr(cd, LOCK_monitor_exit);
2599                                 M_ALD(REG_PV, REG_PV, disp);
2600                                 M_JSR(REG_RA, REG_PV);
2601                                 disp = -(s4) (cd->mcodeptr - cd->mcodebase);
2602                                 M_LDA(REG_PV, REG_RA, disp);
2603
2604                                 switch (iptr->opc) {
2605                                 case ICMD_IRETURN:
2606                                 case ICMD_LRETURN:
2607                                 case ICMD_ARETURN:
2608                                         M_LLD(REG_RESULT, REG_SP, rd->memuse * 8);
2609                                         break;
2610                                 case ICMD_FRETURN:
2611                                 case ICMD_DRETURN:
2612                                         M_DLD(REG_FRESULT, REG_SP, rd->memuse * 8);
2613                                         break;
2614                                 }
2615                         }
2616 #endif
2617
2618                         /* restore return address                                         */
2619
2620                         if (!jd->isleafmethod) {
2621                                 p--; M_LLD(REG_RA, REG_SP, p * 8);
2622                         }
2623
2624                         /* restore saved registers                                        */
2625
2626                         for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
2627                                 p--; M_LLD(rd->savintregs[i], REG_SP, p * 8);
2628                         }
2629                         for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
2630                                 p--; M_DLD(rd->savfltregs[i], REG_SP, p * 8);
2631                         }
2632
2633                         /* deallocate stack                                               */
2634
2635                         if (cd->stackframesize)
2636                                 M_LDA(REG_SP, REG_SP, cd->stackframesize * 8);
2637
2638                         M_RET(REG_ZERO, REG_RA);
2639                         ALIGNCODENOP;
2640                         }
2641                         break;
2642
2643
2644                 case ICMD_TABLESWITCH:  /* ..., index ==> ...                         */
2645                         {
2646                         s4 i, l;
2647                         branch_target_t *table;
2648
2649                         table = iptr->dst.table;
2650
2651                         l = iptr->sx.s23.s2.tablelow;
2652                         i = iptr->sx.s23.s3.tablehigh;
2653
2654                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2655                         if (l == 0) {
2656                                 M_INTMOVE(s1, REG_ITMP1);
2657                         } else if (l <= 32768) {
2658                                 M_LDA(REG_ITMP1, s1, -l);
2659                         } else {
2660                                 ICONST(REG_ITMP2, l);
2661                                 M_ISUB(s1, REG_ITMP2, REG_ITMP1);
2662                         }
2663
2664                         /* number of targets */
2665                         i = i - l + 1;
2666
2667                         /* range check */
2668
2669                         if (i <= 256)
2670                                 M_CMPULE_IMM(REG_ITMP1, i - 1, REG_ITMP2);
2671                         else {
2672                                 M_LDA(REG_ITMP2, REG_ZERO, i - 1);
2673                                 M_CMPULE(REG_ITMP1, REG_ITMP2, REG_ITMP2);
2674                         }
2675                         M_BEQZ(REG_ITMP2, 0);
2676                         codegen_addreference(cd, table[0].block);
2677
2678                         /* build jump table top down and use address of lowest entry */
2679
2680                         table += i;
2681
2682                         while (--i >= 0) {
2683                                 dseg_add_target(cd, table->block);
2684                                 --table;
2685                         }
2686                         }
2687
2688                         /* length of dataseg after last dseg_add_target is used by load */
2689
2690                         M_SAADDQ(REG_ITMP1, REG_PV, REG_ITMP2);
2691                         M_ALD(REG_ITMP2, REG_ITMP2, -(cd->dseglen));
2692                         M_JMP(REG_ZERO, REG_ITMP2);
2693                         ALIGNCODENOP;
2694                         break;
2695
2696
2697                 case ICMD_LOOKUPSWITCH: /* ..., key ==> ...                           */
2698                         {
2699                         s4 i, val;
2700                         lookup_target_t *lookup;
2701
2702                         lookup = iptr->dst.lookup;
2703
2704                         i = iptr->sx.s23.s2.lookupcount;
2705
2706                         MCODECHECK((i<<2)+8);
2707                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2708
2709                         while (--i >= 0) {
2710                                 val = lookup->value;
2711                                 if ((val >= 0) && (val <= 255)) {
2712                                         M_CMPEQ_IMM(s1, val, REG_ITMP2);
2713                                 } else {
2714                                         if ((val >= -32768) && (val <= 32767)) {
2715                                                 M_LDA(REG_ITMP2, REG_ZERO, val);
2716                                         } else {
2717                                                 disp = dseg_add_s4(cd, val);
2718                                                 M_ILD(REG_ITMP2, REG_PV, disp);
2719                                         }
2720                                         M_CMPEQ(s1, REG_ITMP2, REG_ITMP2);
2721                                 }
2722                                 M_BNEZ(REG_ITMP2, 0);
2723                                 codegen_addreference(cd, lookup->target.block);
2724                                 lookup++;
2725                         }
2726
2727                         M_BR(0);
2728
2729                         codegen_addreference(cd, iptr->sx.s23.s3.lookupdefault.block);
2730
2731                         ALIGNCODENOP;
2732                         break;
2733                         }
2734
2735
2736                 case ICMD_BUILTIN:      /* ..., arg1, arg2, arg3 ==> ...              */
2737
2738                         bte = iptr->sx.s23.s3.bte;
2739                         md  = bte->md;
2740                         goto gen_method;
2741
2742                 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ...            */
2743
2744                 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
2745                 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer    */
2746                 case ICMD_INVOKEINTERFACE:
2747
2748                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2749                                 lm = NULL;
2750                                 um = iptr->sx.s23.s3.um;
2751                                 md = um->methodref->parseddesc.md;
2752                         }
2753                         else {
2754                                 lm = iptr->sx.s23.s3.fmiref->p.method;
2755                                 um = NULL;
2756                                 md = lm->parseddesc;
2757                         }
2758
2759 gen_method:
2760                         s3 = md->paramcount;
2761
2762                         MCODECHECK((s3 << 1) + 64);
2763
2764                         /* copy arguments to registers or stack location                  */
2765
2766                         for (s3 = s3 - 1; s3 >= 0; s3--) {
2767                                 var = VAR(iptr->sx.s23.s2.args[s3]);
2768
2769                                 /* Already Preallocated (ARGVAR) ? */
2770                                 if (var->flags & PREALLOC)
2771                                         continue;
2772
2773                                 if (IS_INT_LNG_TYPE(var->type)) {
2774                                         if (!md->params[s3].inmemory) {
2775                                                 s1 = rd->argintregs[md->params[s3].regoff];
2776                                                 d = emit_load(jd, iptr, var, s1);
2777                                                 M_INTMOVE(d, s1);
2778                                         }
2779                                         else {
2780                                                 d = emit_load(jd, iptr, var, REG_ITMP1);
2781                                                 M_LST(d, REG_SP, md->params[s3].regoff * 8);
2782                                         }
2783                                 }
2784                                 else {
2785                                         if (!md->params[s3].inmemory) {
2786                                                 s1 = rd->argfltregs[md->params[s3].regoff];
2787                                                 d = emit_load(jd, iptr, var, s1);
2788                                                 M_FLTMOVE(d, s1);
2789                                         }
2790                                         else {
2791                                                 d = emit_load(jd, iptr, var, REG_FTMP1);
2792                                                 M_DST(d, REG_SP, md->params[s3].regoff * 8);
2793                                         }
2794                                 }
2795                         }
2796
2797                         switch (iptr->opc) {
2798                         case ICMD_BUILTIN:
2799                                 disp = dseg_add_functionptr(cd, bte->fp);
2800
2801                                 M_ALD(REG_PV, REG_PV, disp);  /* Pointer to built-in-function */
2802                                 break;
2803
2804                         case ICMD_INVOKESPECIAL:
2805                                 M_BEQZ(REG_A0, 0);
2806                                 codegen_add_nullpointerexception_ref(cd);
2807                                 /* fall through */
2808
2809                         case ICMD_INVOKESTATIC:
2810                                 if (lm == NULL) {
2811                                         disp = dseg_add_unique_address(cd, um);
2812
2813                                         codegen_addpatchref(cd, PATCHER_invokestatic_special,
2814                                                                                 um, disp);
2815
2816                                         if (opt_showdisassemble)
2817                                                 M_NOP;
2818                                 }
2819                                 else
2820                                         disp = dseg_add_address(cd, lm->stubroutine);
2821
2822                                 M_ALD(REG_PV, REG_PV, disp);         /* method pointer in r27 */
2823                                 break;
2824
2825                         case ICMD_INVOKEVIRTUAL:
2826                                 gen_nullptr_check(REG_A0);
2827
2828                                 if (lm == NULL) {
2829                                         codegen_addpatchref(cd, PATCHER_invokevirtual, um, 0);
2830
2831                                         if (opt_showdisassemble)
2832                                                 M_NOP;
2833
2834                                         s1 = 0;
2835                                 }
2836                                 else
2837                                         s1 = OFFSET(vftbl_t, table[0]) +
2838                                                 sizeof(methodptr) * lm->vftblindex;
2839
2840                                 M_ALD(REG_METHODPTR, REG_A0,
2841                                           OFFSET(java_objectheader, vftbl));
2842                                 M_ALD(REG_PV, REG_METHODPTR, s1);
2843                                 break;
2844
2845                         case ICMD_INVOKEINTERFACE:
2846                                 gen_nullptr_check(REG_A0);
2847
2848                                 if (lm == NULL) {
2849                                         codegen_addpatchref(cd, PATCHER_invokeinterface, um, 0);
2850
2851                                         if (opt_showdisassemble)
2852                                                 M_NOP;
2853
2854                                         s1 = 0;
2855                                         s2 = 0;
2856                                 }
2857                                 else {
2858                                         s1 = OFFSET(vftbl_t, interfacetable[0]) -
2859                                                 sizeof(methodptr*) * lm->class->index;
2860
2861                                         s2 = sizeof(methodptr) * (lm - lm->class->methods);
2862                                 }
2863
2864                                 M_ALD(REG_METHODPTR, REG_A0,
2865                                           OFFSET(java_objectheader, vftbl));
2866                                 M_ALD(REG_METHODPTR, REG_METHODPTR, s1);
2867                                 M_ALD(REG_PV, REG_METHODPTR, s2);
2868                                 break;
2869                         }
2870
2871                         /* generate the actual call */
2872
2873                         M_JSR(REG_RA, REG_PV);
2874                         disp = (s4) (cd->mcodeptr - cd->mcodebase);
2875                         M_LDA(REG_PV, REG_RA, -disp);
2876
2877                         /* actually only used for ICMD_BUILTIN */
2878
2879                         if (INSTRUCTION_MUST_CHECK(iptr)) {
2880                                 M_BEQZ(REG_RESULT, 0);
2881                                 codegen_add_fillinstacktrace_ref(cd);
2882                         }
2883
2884                         /* store the return value */
2885
2886                         d = md->returntype.type;
2887
2888                         if (d != TYPE_VOID) {
2889                                 if (IS_INT_LNG_TYPE(d)) {
2890                                         s1 = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2891                                         M_INTMOVE(REG_RESULT, s1);
2892                                 }
2893                                 else {
2894                                         s1 = codegen_reg_of_dst(jd, iptr, REG_FRESULT);
2895                                         M_FLTMOVE(REG_FRESULT, s1);
2896                                 }
2897                                 emit_store_dst(jd, iptr, s1);
2898                         }
2899                         break;
2900
2901
2902                 case ICMD_CHECKCAST:  /* ..., objectref ==> ..., objectref            */
2903
2904                                       /* val.a: (classinfo*) superclass               */
2905
2906                         /*  superclass is an interface:
2907                          *
2908                          *  OK if ((sub == NULL) ||
2909                          *         (sub->vftbl->interfacetablelength > super->index) &&
2910                          *         (sub->vftbl->interfacetable[-super->index] != NULL));
2911                          *
2912                          *  superclass is a class:
2913                          *
2914                          *  OK if ((sub == NULL) || (0
2915                          *         <= (sub->vftbl->baseval - super->vftbl->baseval) <=
2916                          *         super->vftbl->diffval));
2917                          */
2918
2919                         if (!(iptr->flags.bits & INS_FLAG_ARRAY)) {
2920                                 /* object type cast-check */
2921
2922                                 classinfo *super;
2923                                 vftbl_t   *supervftbl;
2924                                 s4         superindex;
2925
2926                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
2927                                         super = NULL;
2928                                         superindex = 0;
2929                                         supervftbl = NULL;
2930                                 }
2931                                 else {
2932                                         super = iptr->sx.s23.s3.c.cls;
2933                                         superindex = super->index;
2934                                         supervftbl = super->vftbl;
2935                                 }
2936
2937 #if defined(ENABLE_THREADS)
2938                                 codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
2939 #endif
2940                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2941
2942                                 /* calculate interface checkcast code size */
2943
2944                                 s2 = 6;
2945                                 if (super == NULL)
2946                                         s2 += opt_showdisassemble ? 1 : 0;
2947
2948                                 /* calculate class checkcast code size */
2949
2950                                 s3 = 9 /* 8 + (s1 == REG_ITMP1) */;
2951                                 if (super == NULL)
2952                                         s3 += opt_showdisassemble ? 1 : 0;
2953
2954                                 /* if class is not resolved, check which code to call */
2955
2956                                 if (super == NULL) {
2957                                         M_BEQZ(s1, 4 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
2958
2959                                         disp = dseg_add_unique_s4(cd, 0);         /* super->flags */
2960
2961                                         codegen_addpatchref(cd, PATCHER_resolve_classref_to_flags,
2962                                                                                 iptr->sx.s23.s3.c.ref,
2963                                                                                 disp);
2964
2965                                         if (opt_showdisassemble)
2966                                                 M_NOP;
2967
2968                                         M_ILD(REG_ITMP2, REG_PV, disp);
2969                                         disp = dseg_add_s4(cd, ACC_INTERFACE);
2970                                         M_ILD(REG_ITMP3, REG_PV, disp);
2971                                         M_AND(REG_ITMP2, REG_ITMP3, REG_ITMP2);
2972                                         M_BEQZ(REG_ITMP2, s2 + 1);
2973                                 }
2974
2975                                 /* interface checkcast code */
2976
2977                                 if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
2978                                         if (super == NULL) {
2979                                                 codegen_addpatchref(cd,
2980                                                                                         PATCHER_checkcast_instanceof_interface,
2981                                                                                         iptr->sx.s23.s3.c.ref,
2982                                                                                         0);
2983
2984                                                 if (opt_showdisassemble)
2985                                                         M_NOP;
2986                                         }
2987                                         else
2988                                                 M_BEQZ(s1, s2);
2989
2990                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
2991                                         M_ILD(REG_ITMP3, REG_ITMP2,
2992                                                   OFFSET(vftbl_t, interfacetablelength));
2993                                         M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
2994                                         M_BLEZ(REG_ITMP3, 0);
2995                                         codegen_add_classcastexception_ref(cd, s1);
2996                                         M_ALD(REG_ITMP3, REG_ITMP2,
2997                                                   (s4) (OFFSET(vftbl_t, interfacetable[0]) -
2998                                                                 superindex * sizeof(methodptr*)));
2999                                         M_BEQZ(REG_ITMP3, 0);
3000                                         codegen_add_classcastexception_ref(cd, s1);
3001
3002                                         if (super == NULL)
3003                                                 M_BR(s3);
3004                                 }
3005
3006                                 /* class checkcast code */
3007
3008                                 if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
3009                                         if (super == NULL) {
3010                                                 disp = dseg_add_unique_address(cd, NULL);
3011
3012                                                 codegen_addpatchref(cd,
3013                                                                                         PATCHER_resolve_classref_to_vftbl,
3014                                                                                         iptr->sx.s23.s3.c.ref,
3015                                                                                         disp);
3016
3017                                                 if (opt_showdisassemble)
3018                                                         M_NOP;
3019                                         }
3020                                         else {
3021                                                 disp = dseg_add_address(cd, supervftbl);
3022
3023                                                 M_BEQZ(s1, s3);
3024                                         }
3025
3026                                         M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
3027                                         M_ALD(REG_ITMP3, REG_PV, disp);
3028 #if defined(ENABLE_THREADS)
3029                                         codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
3030 #endif
3031                                         M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, baseval));
3032                                         /*                              if (s1 != REG_ITMP1) { */
3033                                         /*                                      M_ILD(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, baseval)); */
3034                                         /*                                      M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval)); */
3035                                         /*  #if defined(ENABLE_THREADS) */
3036                                         /*                                      codegen_threadcritstop(cd, (u1 *) mcodeptr - cd->mcodebase); */
3037                                         /*  #endif */
3038                                         /*                                      M_ISUB(REG_ITMP2, REG_ITMP1, REG_ITMP2); */
3039
3040                                         /*                              } else { */
3041                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, baseval));
3042                                         M_ISUB(REG_ITMP2, REG_ITMP3, REG_ITMP2);
3043                                         M_ALD(REG_ITMP3, REG_PV, disp);
3044                                         M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval));
3045 #if defined(ENABLE_THREADS)
3046                                         codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
3047 #endif
3048                                         /*                              } */
3049                                         M_CMPULE(REG_ITMP2, REG_ITMP3, REG_ITMP3);
3050                                         M_BEQZ(REG_ITMP3, 0);
3051                                         codegen_add_classcastexception_ref(cd, s1);
3052                                 }
3053
3054                                 d = codegen_reg_of_dst(jd, iptr, s1);
3055                         }
3056                         else {
3057                                 /* array type cast-check */
3058
3059                                 s1 = emit_load_s1(jd, iptr, REG_A0);
3060                                 M_INTMOVE(s1, REG_A0);
3061
3062                                 disp = dseg_addaddress(cd, iptr->sx.s23.s3.c.cls);
3063
3064                                 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
3065                                         codegen_addpatchref(cd,
3066                                                                                 PATCHER_resolve_classref_to_classinfo,
3067                                                                                 iptr->sx.s23.s3.c.ref,
3068                                                                                 disp);
3069
3070                                         if (opt_showdisassemble)
3071                                                 M_NOP;
3072                                 }
3073
3074                                 M_ALD(REG_A1, REG_PV, disp);
3075                                 disp = dseg_addaddress(cd, BUILTIN_arraycheckcast);
3076                                 M_ALD(REG_PV, REG_PV, disp);
3077                                 M_JSR(REG_RA, REG_PV);
3078                                 disp = (s4) (cd->mcodeptr - cd->mcodebase);
3079                                 M_LDA(REG_PV, REG_RA, -disp);
3080
3081                                 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
3082                                 M_BEQZ(REG_RESULT, 0);
3083                                 codegen_add_classcastexception_ref(cd, s1);
3084
3085                                 d = codegen_reg_of_dst(jd, iptr, s1);
3086                         }
3087
3088                         M_INTMOVE(s1, d);
3089                         emit_store_dst(jd, iptr, d);
3090                         break;
3091
3092                 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult            */
3093
3094                                       /* val.a: (classinfo*) superclass               */
3095
3096                         /*  superclass is an interface:
3097                          *
3098                          *  return (sub != NULL) &&
3099                          *         (sub->vftbl->interfacetablelength > super->index) &&
3100                          *         (sub->vftbl->interfacetable[-super->index] != NULL);
3101                          *
3102                          *  superclass is a class:
3103                          *
3104                          *  return ((sub != NULL) && (0
3105                          *          <= (sub->vftbl->baseval - super->vftbl->baseval) <=
3106                          *          super->vftbl->diffvall));
3107                          */
3108
3109                         {
3110                         classinfo *super;
3111                         vftbl_t   *supervftbl;
3112                         s4         superindex;
3113
3114                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
3115                                 super = NULL;
3116                                 superindex = 0;
3117                                 supervftbl = NULL;
3118
3119                         } else {
3120                                 super = iptr->sx.s23.s3.c.cls;
3121                                 superindex = super->index;
3122                                 supervftbl = super->vftbl;
3123                         }
3124
3125 #if defined(ENABLE_THREADS)
3126                         codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
3127 #endif
3128                         s1 = emit_load_s1(jd, iptr, REG_ITMP1);
3129                         d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
3130                         if (s1 == d) {
3131                                 M_MOV(s1, REG_ITMP1);
3132                                 s1 = REG_ITMP1;
3133                         }
3134
3135                         /* calculate interface instanceof code size */
3136
3137                         s2 = 6;
3138                         if (super == NULL)
3139                                 s2 += (d == REG_ITMP2 ? 1 : 0) + (opt_showdisassemble ? 1 : 0);
3140
3141                         /* calculate class instanceof code size */
3142
3143                         s3 = 7;
3144                         if (super == NULL)
3145                                 s3 += (opt_showdisassemble ? 1 : 0);
3146
3147                         /* if class is not resolved, check which code to call */
3148
3149                         if (super == NULL) {
3150                                 M_CLR(d);
3151                                 M_BEQZ(s1, 4 + (opt_showdisassemble ? 1 : 0) + s2 + 1 + s3);
3152
3153                                 disp = dseg_add_unique_s4(cd, 0);             /* super->flags */
3154
3155                                 codegen_addpatchref(cd, PATCHER_resolve_classref_to_flags,
3156                                                                         iptr->sx.s23.s3.c.ref, disp);
3157
3158                                 if (opt_showdisassemble)
3159                                         M_NOP;
3160
3161                                 M_ILD(REG_ITMP3, REG_PV, disp);
3162
3163                                 disp = dseg_add_s4(cd, ACC_INTERFACE);
3164                                 M_ILD(REG_ITMP2, REG_PV, disp);
3165                                 M_AND(REG_ITMP3, REG_ITMP2, REG_ITMP3);
3166                                 M_BEQZ(REG_ITMP3, s2 + 1);
3167                         }
3168
3169                         /* interface instanceof code */
3170
3171                         if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
3172                                 if (super == NULL) {
3173                                         /* If d == REG_ITMP2, then it's destroyed in check
3174                                            code above. */
3175                                         if (d == REG_ITMP2)
3176                                                 M_CLR(d);
3177
3178                                         codegen_addpatchref(cd,
3179                                                                                 PATCHER_checkcast_instanceof_interface,
3180                                                                                 iptr->sx.s23.s3.c.ref, 0);
3181
3182                                         if (opt_showdisassemble)
3183                                                 M_NOP;
3184                                 }
3185                                 else {
3186                                         M_CLR(d);
3187                                         M_BEQZ(s1, s2);
3188                                 }
3189
3190                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3191                                 M_ILD(REG_ITMP3, REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
3192                                 M_LDA(REG_ITMP3, REG_ITMP3, -superindex);
3193                                 M_BLEZ(REG_ITMP3, 2);
3194                                 M_ALD(REG_ITMP1, REG_ITMP1,
3195                                           (s4) (OFFSET(vftbl_t, interfacetable[0]) -
3196                                                         superindex * sizeof(methodptr*)));
3197                                 M_CMPULT(REG_ZERO, REG_ITMP1, d);      /* REG_ITMP1 != 0  */
3198
3199                                 if (super == NULL)
3200                                         M_BR(s3);
3201                         }
3202
3203                         /* class instanceof code */
3204
3205                         if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
3206                                 if (super == NULL) {
3207                                         disp = dseg_add_unique_address(cd, NULL);
3208
3209                                         codegen_addpatchref(cd, PATCHER_resolve_classref_to_vftbl,
3210                                                                                 iptr->sx.s23.s3.c.ref,
3211                                                                                 disp);
3212
3213                                         if (opt_showdisassemble)
3214                                                 M_NOP;
3215                                 }
3216                                 else {
3217                                         disp = dseg_add_address(cd, supervftbl);
3218
3219                                         M_CLR(d);
3220                                         M_BEQZ(s1, s3);
3221                                 }
3222
3223                                 M_ALD(REG_ITMP1, s1, OFFSET(java_objectheader, vftbl));
3224                                 M_ALD(REG_ITMP2, REG_PV, disp);
3225 #if defined(ENABLE_THREADS)
3226                                 codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
3227 #endif
3228                                 M_ILD(REG_ITMP1, REG_ITMP1, OFFSET(vftbl_t, baseval));
3229                                 M_ILD(REG_ITMP3, REG_ITMP2, OFFSET(vftbl_t, baseval));
3230                                 M_ILD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, diffval));
3231 #if defined(ENABLE_THREADS)
3232                                 codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
3233 #endif
3234                                 M_ISUB(REG_ITMP1, REG_ITMP3, REG_ITMP1);
3235                                 M_CMPULE(REG_ITMP1, REG_ITMP2, d);
3236                         }
3237                         emit_store_dst(jd, iptr, d);
3238                         }
3239                         break;
3240
3241                 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref  */
3242
3243                         /* check for negative sizes and copy sizes to stack if necessary  */
3244
3245                         MCODECHECK((iptr->s1.argcount << 1) + 64);
3246
3247                         for (s1 = iptr->s1.argcount; --s1 >= 0; ) {
3248
3249                                 var = VAR(iptr->sx.s23.s2.args[s1]);
3250
3251                                 /* copy SAVEDVAR sizes to stack */
3252
3253                                 /* Already Preallocated? */
3254
3255                                 if (!(var->flags & PREALLOC)) {
3256                                         s2 = emit_load(jd, iptr, var, REG_ITMP1);
3257                                         M_LST(s2, REG_SP, s1 * 8);
3258                                 }
3259                         }
3260
3261                         /* a0 = dimension count */
3262
3263                         ICONST(REG_A0, iptr->s1.argcount);
3264
3265                         /* is patcher function set? */
3266
3267                         if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
3268                                 disp = dseg_add_unique_address(cd, 0);
3269
3270                                 codegen_addpatchref(cd, PATCHER_resolve_classref_to_classinfo,
3271                                                                         iptr->sx.s23.s3.c.ref,
3272                                                                         disp);
3273
3274                                 if (opt_showdisassemble)
3275                                         M_NOP;
3276                         }
3277                         else
3278                                 disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
3279
3280                         /* a1 = arraydescriptor */
3281
3282                         M_ALD(REG_A1, REG_PV, disp);
3283
3284                         /* a2 = pointer to dimensions = stack pointer */
3285
3286                         M_INTMOVE(REG_SP, REG_A2);
3287
3288                         disp = dseg_add_functionptr(cd, BUILTIN_multianewarray);
3289                         M_ALD(REG_PV, REG_PV, disp);
3290                         M_JSR(REG_RA, REG_PV);
3291                         disp = (s4) (cd->mcodeptr - cd->mcodebase);
3292                         M_LDA(REG_PV, REG_RA, -disp);
3293
3294                         /* check for exception before result assignment */
3295
3296                         M_BEQZ(REG_RESULT, 0);
3297                         codegen_add_fillinstacktrace_ref(cd);
3298
3299                         d = codegen_reg_of_dst(jd, iptr, REG_RESULT);
3300                         M_INTMOVE(REG_RESULT, d);
3301                         emit_store_dst(jd, iptr, d);
3302                         break;
3303
3304                 default:
3305                         *exceptionptr =
3306                                 new_internalerror("Unknown ICMD %d", iptr->opc);
3307                         return false;
3308         } /* switch */
3309
3310         } /* for instruction */
3311
3312         } /* if (bptr -> flags >= BBREACHED) */
3313         } /* for basic block */
3314
3315         dseg_createlinenumbertable(cd);
3316
3317         /* generate stubs */
3318
3319         emit_exception_stubs(jd);
3320         emit_patcher_stubs(jd);
3321 #if 0
3322         emit_replacement_stubs(jd);
3323 #endif
3324
3325         codegen_finish(jd);
3326
3327         /* everything's ok */
3328
3329         return true;
3330 }
3331
3332
3333 /* createcompilerstub **********************************************************
3334
3335    Creates a stub routine which calls the compiler.
3336
3337 *******************************************************************************/
3338
3339 #define COMPILERSTUB_DATASIZE    3 * SIZEOF_VOID_P
3340 #define COMPILERSTUB_CODESIZE    3 * 4
3341
3342 #define COMPILERSTUB_SIZE        COMPILERSTUB_DATASIZE + COMPILERSTUB_CODESIZE
3343
3344
3345 u1 *createcompilerstub(methodinfo *m)
3346 {
3347         u1          *s;                     /* memory to hold the stub            */
3348         ptrint      *d;
3349         codeinfo    *code;
3350         codegendata *cd;
3351         s4           dumpsize;              /* code generation pointer            */
3352
3353         s = CNEW(u1, COMPILERSTUB_SIZE);
3354
3355         /* set data pointer and code pointer */
3356
3357         d = (ptrint *) s;
3358         s = s + COMPILERSTUB_DATASIZE;
3359
3360         /* mark start of dump memory area */
3361
3362         dumpsize = dump_size();
3363
3364         cd = DNEW(codegendata);
3365         cd->mcodeptr = s;
3366
3367         /* Store the codeinfo pointer in the same place as in the
3368            methodheader for compiled methods. */
3369
3370         code = code_codeinfo_new(m);
3371
3372         d[0] = (ptrint) asm_call_jit_compiler;
3373         d[1] = (ptrint) m;
3374         d[2] = (ptrint) code;
3375
3376         /* code for the stub */
3377
3378         M_ALD(REG_ITMP1, REG_PV, -2 * 8);   /* load codeinfo pointer              */
3379         M_ALD(REG_PV, REG_PV, -3 * 8);      /* load pointer to the compiler       */
3380         M_JMP(REG_ZERO, REG_PV);            /* jump to the compiler               */
3381
3382 #if defined(ENABLE_STATISTICS)
3383         if (opt_stat)
3384                 count_cstub_len += COMPILERSTUB_SIZE;
3385 #endif
3386
3387         /* release dump area */
3388
3389         dump_release(dumpsize);
3390
3391         return s;
3392 }
3393
3394
3395 /* createnativestub ************************************************************
3396
3397    Creates a stub routine which calls a native method.
3398
3399 *******************************************************************************/
3400
3401 u1 *createnativestub(functionptr f, jitdata *jd, methoddesc *nmd)
3402 {
3403         methodinfo   *m;
3404         codeinfo     *code;
3405         codegendata  *cd;
3406         registerdata *rd;
3407         methoddesc   *md;
3408         s4            nativeparams;
3409         s4            i, j;                 /* count variables                    */
3410         s4            t;
3411         s4            s1, s2, disp;
3412         s4            funcdisp;             /* displacement of the function       */
3413
3414         /* get required compiler data */
3415
3416         m    = jd->m;
3417         code = jd->code;
3418         cd   = jd->cd;
3419         rd   = jd->rd;
3420
3421         /* initialize variables */
3422
3423         md = m->parseddesc;
3424         nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
3425
3426         /* calculate stack frame size */
3427
3428         cd->stackframesize =
3429                 1 +                             /* return address                     */
3430                 sizeof(stackframeinfo) / SIZEOF_VOID_P +
3431                 sizeof(localref_table) / SIZEOF_VOID_P +
3432                 1 +                             /* methodinfo for call trace          */
3433                 (md->paramcount > INT_ARG_CNT ? INT_ARG_CNT : md->paramcount) +
3434                 nmd->memuse;
3435
3436         /* create method header */
3437
3438         (void) dseg_add_unique_address(cd, code);              /* CodeinfoPointer */
3439         (void) dseg_add_unique_s4(cd, cd->stackframesize * 8); /* FrameSize       */
3440         (void) dseg_add_unique_s4(cd, 0);                      /* IsSync          */
3441         (void) dseg_add_unique_s4(cd, 0);                      /* IsLeaf          */
3442         (void) dseg_add_unique_s4(cd, 0);                      /* IntSave         */
3443         (void) dseg_add_unique_s4(cd, 0);                      /* FltSave         */
3444         (void) dseg_addlinenumbertablesize(cd);
3445         (void) dseg_add_unique_s4(cd, 0);                      /* ExTableSize     */
3446
3447         /* generate stub code */
3448
3449         M_LDA(REG_SP, REG_SP, -(cd->stackframesize * 8));
3450         M_AST(REG_RA, REG_SP, cd->stackframesize * 8 - SIZEOF_VOID_P);
3451
3452         /* call trace function */
3453
3454 #if !defined(NDEBUG)
3455         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
3456                 emit_verbosecall_enter(jd);
3457 #endif
3458
3459         /* get function address (this must happen before the stackframeinfo) */
3460
3461         funcdisp = dseg_add_functionptr(cd, f);
3462
3463 #if !defined(WITH_STATIC_CLASSPATH)
3464         if (f == NULL) {
3465                 codegen_addpatchref(cd, PATCHER_resolve_native_function, m, funcdisp);
3466
3467                 if (opt_showdisassemble)
3468                         M_NOP;
3469         }
3470 #endif
3471
3472         /* save integer and float argument registers */
3473
3474         for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
3475                 if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
3476                         M_LST(rd->argintregs[i], REG_SP, j * 8);
3477                         j++;
3478                 }
3479         }
3480
3481         for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
3482                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3483                         M_DST(rd->argfltregs[i], REG_SP, j * 8);
3484                         j++;
3485                 }
3486         }
3487
3488         /* prepare data structures for native function call */
3489
3490         M_LDA(REG_A0, REG_SP, cd->stackframesize * 8 - SIZEOF_VOID_P);
3491         M_MOV(REG_PV, REG_A1);
3492         M_LDA(REG_A2, REG_SP, cd->stackframesize * 8);
3493         M_ALD(REG_A3, REG_SP, cd->stackframesize * 8 - SIZEOF_VOID_P);
3494         disp = dseg_add_functionptr(cd, codegen_start_native_call);
3495         M_ALD(REG_PV, REG_PV, disp);
3496         M_JSR(REG_RA, REG_PV);
3497         disp = (s4) (cd->mcodeptr - cd->mcodebase);
3498         M_LDA(REG_PV, REG_RA, -disp);
3499
3500         /* restore integer and float argument registers */
3501
3502         for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
3503                 if (IS_INT_LNG_TYPE(md->paramtypes[i].type)) {
3504                         M_LLD(rd->argintregs[i], REG_SP, j * 8);
3505                         j++;
3506                 }
3507         }
3508
3509         for (i = 0; i < md->paramcount && i < FLT_ARG_CNT; i++) {
3510                 if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
3511                         M_DLD(rd->argfltregs[i], REG_SP, j * 8);
3512                         j++;
3513                 }
3514         }
3515
3516         /* copy or spill arguments to new locations */
3517
3518         for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
3519                 t = md->paramtypes[i].type;
3520
3521                 if (IS_INT_LNG_TYPE(t)) {
3522                         if (!md->params[i].inmemory) {
3523                                 s1 = rd->argintregs[md->params[i].regoff];
3524
3525                                 if (!nmd->params[j].inmemory) {
3526                                         s2 = rd->argintregs[nmd->params[j].regoff];
3527                                         M_INTMOVE(s1, s2);
3528
3529                                 } else {
3530                                         s2 = nmd->params[j].regoff;
3531                                         M_LST(s1, REG_SP, s2 * 8);
3532                                 }
3533
3534                         } else {
3535                                 s1 = md->params[i].regoff + cd->stackframesize;
3536                                 s2 = nmd->params[j].regoff;
3537                                 M_LLD(REG_ITMP1, REG_SP, s1 * 8);
3538                                 M_LST(REG_ITMP1, REG_SP, s2 * 8);
3539                         }
3540
3541                 } else {
3542                         if (!md->params[i].inmemory) {
3543                                 s1 = rd->argfltregs[md->params[i].regoff];
3544
3545                                 if (!nmd->params[j].inmemory) {
3546                                         s2 = rd->argfltregs[nmd->params[j].regoff];
3547                                         M_FLTMOVE(s1, s2);
3548
3549                                 } else {
3550                                         s2 = nmd->params[j].regoff;
3551                                         if (IS_2_WORD_TYPE(t))
3552                                                 M_DST(s1, REG_SP, s2 * 8);
3553                                         else
3554                                                 M_FST(s1, REG_SP, s2 * 8);
3555                                 }
3556
3557                         } else {
3558                                 s1 = md->params[i].regoff + cd->stackframesize;
3559                                 s2 = nmd->params[j].regoff;
3560                                 M_DLD(REG_FTMP1, REG_SP, s1 * 8);
3561                                 if (IS_2_WORD_TYPE(t))
3562                                         M_DST(REG_FTMP1, REG_SP, s2 * 8);
3563                                 else
3564                                         M_FST(REG_FTMP1, REG_SP, s2 * 8);
3565                         }
3566                 }
3567         }
3568
3569         /* put class into second argument register */
3570
3571         if (m->flags & ACC_STATIC) {
3572                 disp = dseg_add_address(cd, m->class);
3573                 M_ALD(REG_A1, REG_PV, disp);
3574         }
3575
3576         /* put env into first argument register */
3577
3578         disp = dseg_add_address(cd, _Jv_env);
3579         M_ALD(REG_A0, REG_PV, disp);
3580
3581         /* do the native function call */
3582
3583         M_ALD(REG_PV, REG_PV, funcdisp);
3584         M_JSR(REG_RA, REG_PV);              /* call native method                 */
3585         disp = (s4) (cd->mcodeptr - cd->mcodebase);
3586         M_LDA(REG_PV, REG_RA, -disp);       /* recompute pv from ra               */
3587
3588         /* save return value */
3589
3590         if (md->returntype.type != TYPE_VOID) {
3591                 if (IS_INT_LNG_TYPE(md->returntype.type))
3592                         M_LST(REG_RESULT, REG_SP, 0 * 8);
3593                 else
3594                         M_DST(REG_FRESULT, REG_SP, 0 * 8);
3595         }
3596
3597         /* call finished trace */
3598
3599 #if !defined(NDEBUG)
3600         if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
3601                 emit_verbosecall_exit(jd);
3602 #endif
3603
3604         /* remove native stackframe info */
3605
3606         M_LDA(REG_A0, REG_SP, cd->stackframesize * 8 - SIZEOF_VOID_P);
3607         disp = dseg_add_functionptr(cd, codegen_finish_native_call);
3608         M_ALD(REG_PV, REG_PV, disp);
3609         M_JSR(REG_RA, REG_PV);
3610         disp = (s4) (cd->mcodeptr - cd->mcodebase);
3611         M_LDA(REG_PV, REG_RA, -disp);
3612         M_MOV(REG_RESULT, REG_ITMP1_XPTR);
3613
3614         /* restore return value */
3615
3616         if (md->returntype.type != TYPE_VOID) {
3617                 if (IS_INT_LNG_TYPE(md->returntype.type))
3618                         M_LLD(REG_RESULT, REG_SP, 0 * 8);
3619                 else
3620                         M_DLD(REG_FRESULT, REG_SP, 0 * 8);
3621         }
3622
3623         M_ALD(REG_RA, REG_SP, (cd->stackframesize - 1) * 8); /* get RA            */
3624         M_LDA(REG_SP, REG_SP, cd->stackframesize * 8);
3625
3626         /* check for exception */
3627
3628         M_BNEZ(REG_ITMP1_XPTR, 1);          /* if no exception then return        */
3629         M_RET(REG_ZERO, REG_RA);            /* return to caller                   */
3630
3631         /* handle exception */
3632
3633         M_ASUB_IMM(REG_RA, 4, REG_ITMP2_XPC); /* get exception address            */
3634
3635         disp = dseg_add_functionptr(cd, asm_handle_nat_exception);
3636         M_ALD(REG_ITMP3, REG_PV, disp);     /* load asm exception handler address */
3637         M_JMP(REG_ZERO, REG_ITMP3);         /* jump to asm exception handler      */
3638
3639
3640         /* generate patcher stubs */
3641
3642         emit_patcher_stubs(jd);
3643
3644         codegen_finish(jd);
3645
3646         return code->entrypoint;
3647 }
3648
3649
3650 /*
3651  * These are local overrides for various environment variables in Emacs.
3652  * Please do not remove this and leave it at the end of the file, where
3653  * Emacs will automagically detect them.
3654  * ---------------------------------------------------------------------
3655  * Local variables:
3656  * mode: c
3657  * indent-tabs-mode: t
3658  * c-basic-offset: 4
3659  * tab-width: 4
3660  * End:
3661  * vim:noexpandtab:sw=4:ts=4:
3662  */