1 /*;********************************************************************************
3 ; Copyright (c) 2011, Advanced Micro Devices, Inc.
6 ; Redistribution and use in source and binary forms, with or without
7 ; modification, are permitted provided that the following conditions are met:
8 ; * Redistributions of source code must retain the above copyright
9 ; notice, this list of conditions and the following disclaimer.
10 ; * Redistributions in binary form must reproduce the above copyright
11 ; notice, this list of conditions and the following disclaimer in the
12 ; documentation and/or other materials provided with the distribution.
13 ; * Neither the name of Advanced Micro Devices, Inc. nor the names of
14 ; its contributors may be used to endorse or promote products derived
15 ; from this software without specific prior written permission.
17 ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
18 ; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
19 ; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
20 ; DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
21 ; DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22 ; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
23 ; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
24 ; ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
26 ; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 ;*********************************************************************************/
31 //AMD Library Routines (AMDLIB.C)
32 void InitSerialOut (void);
33 unsigned char getNumberOfCpuCores (OUT void);
34 unsigned int readAlink (IN unsigned int Index);
35 void writeAlink (IN unsigned int Index, IN unsigned int Data);
36 void rwAlink (IN unsigned int Index, IN unsigned int AndMask, IN unsigned int OrMask);
38 //AMD Library Routines (LEGACY.C)
39 unsigned int GetFixUp (OUT void);
41 //AMD Library Routines (IOLIB.C)
42 void ReadIO (IN unsigned short Address, IN unsigned char OpFlag, IN void *Value);
43 void WriteIO (IN unsigned short Address, IN unsigned char OpFlag, IN void *Value);
44 void RWIO (IN unsigned short Address, IN unsigned char OpFlag, IN unsigned int Mask, IN unsigned int Data);
46 /// CPUID data received registers format
47 typedef struct _SB_CPUID_DATA {
48 IN OUT unsigned int EAX_Reg; ///< CPUID instruction result in EAX
49 IN OUT unsigned int EBX_Reg; ///< CPUID instruction result in EBX
50 IN OUT unsigned int ECX_Reg; ///< CPUID instruction result in ECX
51 IN OUT unsigned int EDX_Reg; ///< CPUID instruction result in EDX
54 //AMD Library Routines (AMDLIB32.ASM)
55 unsigned char ReadIo8 (IN unsigned short Address);
56 unsigned short ReadIo16 (IN unsigned short Address);
57 unsigned int ReadIo32 (IN unsigned short Address);
58 void WriteIo8 (IN unsigned short Address, IN unsigned char Data);
59 void WriteIo16 (IN unsigned short Address, IN unsigned short Data);
60 void WriteIo32 (IN unsigned short Address, IN unsigned int Data);
61 unsigned char ReadNumberOfCpuCores (void);
62 unsigned long long ReadTSC (void);
63 void CpuidRead (IN unsigned int CpuidFcnAddress, OUT SB_CPUID_DATA *Value);
66 //AMD Library Routines (MEMLIB.C)
67 void ReadMEM (IN unsigned int Address, IN unsigned char OpFlag, IN void* Value);
68 void WriteMEM (IN unsigned int Address, IN unsigned char OpFlag, IN void* Value);
69 void RWMEM (IN unsigned int Address, IN unsigned char OpFlag, IN unsigned int Mask, IN unsigned int Data);
72 IN unsigned char *Dest,
73 IN unsigned char *Source,
77 //AMD Library Routines (PCILIB.C)
78 void ReadPCI (IN unsigned int Address, IN unsigned char OpFlag, IN void *Value);
79 void WritePCI (IN unsigned int Address, IN unsigned char OpFlag, IN void *Value);
80 void RWPCI (IN unsigned int Address, IN unsigned char OpFlag, IN unsigned int Mask, IN unsigned int Data);
82 //AMD Library Routines (SBPELIB.C)
84 * Read Southbridge Revision ID cie Base
87 * @retval 0xXXXXXXXX Revision ID
90 unsigned char getRevisionID (OUT void);
92 //AMD Library Routines (SBPELIB.C)
97 * @retval TRUE or FALSE
100 unsigned char IsSbA11 (OUT void);
102 //AMD Library Routines (SBPELIB.C)
107 * @retval TRUE or FALSE
110 unsigned char IsSbA12 (OUT void);
112 //AMD Library Routines (SBPELIB.C)
117 * @retval TRUE or FALSE
120 unsigned char IsSbA12Plus (OUT void);
122 //AMD Library Routines (SBPELIB.C)
127 * @retval TRUE or FALSE
130 unsigned char IsSbA13Plus (OUT void);
136 * @retval TRUE or FALSE
139 unsigned char IsExternalClockMode (OUT void);
142 * Is External Clock Mode?
145 * @retval TRUE or FALSE
148 unsigned char IsLpcRom (OUT void);
154 * @retval TRUE or FALSE
162 //AMD Library Routines (SBPELIB.C)
164 * Assert/deassert Hudson-2 pins used to toggle SB GPP reset or NB PCIE reset
167 * @param[in] ResetBlock - PCIE reset for SB GPP or NB PCIE
168 * @param[in] ResetOp - Assert or deassert PCIE reset
171 void SbResetPcie (IN RESET_BLOCK ResetBlock, IN RESET_OP ResetOp);
174 * sbGppTogglePcieReset - Toggle PCIE_RST2#
180 void sbGppTogglePcieReset (IN AMDSBCFG* pConfig);
183 * sbSpiUnlock - Sb SPI Unlock
189 void sbSpiUnlock (IN AMDSBCFG* pConfig);
192 * sbSpilock - Sb SPI lock
198 void sbSpilock (IN AMDSBCFG* pConfig);
201 * programPciByteTable - Program PCI register by table (8 bits data)
205 * @param[in] pPciByteTable - Table data pointer
206 * @param[in] dwTableSize - Table length
209 void programPciByteTable (IN REG8MASK* pPciByteTable, IN unsigned short dwTableSize);
212 * programSbAcpiMmioTbl - Program SB ACPI MMIO register by table (8 bits data)
216 * @param[in] pAcpiTbl - Table data pointer
219 void programSbAcpiMmioTbl (IN AcpiRegWrite *pAcpiTbl);
222 * getChipSysMode - Get Chip status
225 * @param[in] Value - Return Chip strap status
226 * StrapStatus [15.0] - Hudson-2 chip Strap Status
227 * @li <b>0001</b> - Not USED FWH
228 * @li <b>0002</b> - Not USED LPC ROM
229 * @li <b>0004</b> - EC enabled
230 * @li <b>0008</b> - Reserved
231 * @li <b>0010</b> - Internal Clock mode
234 void getChipSysMode (IN void* Value);
237 * isImcEnabled - Is IMC Enabled
238 * @retval TRUE for IMC Enabled; FALSE for IMC Disabled
240 unsigned char isImcEnabled (void);
243 * Read Southbridge CIMx configuration structure pointer
247 * @retval 0xXXXXXXXX CIMx configuration structure pointer.
250 AMDSBCFG* getConfigPointer (OUT void);
252 //AMD Library Routines (PMIOLIB.C)
258 * @param[in] Address - PMIO Offset value
259 * @param[in] OpFlag - Access sizes
260 * @param[in] Value - Read Data Buffer
263 void ReadPMIO (IN unsigned char Address, IN unsigned char OpFlag, IN void* Value);
270 * @param[in] Address - PMIO Offset value
271 * @param[in] OpFlag - Access sizes
272 * @param[in] Value - Write Data Buffer
275 void WritePMIO (IN unsigned char Address, IN unsigned char OpFlag, IN void* Value);
278 * RWPMIO - Read/Write PMIO
282 * @param[in] Address - PMIO Offset value
283 * @param[in] OpFlag - Access sizes
284 * @param[in] AndMask - Data And Mask 32 bits
285 * @param[in] OrMask - Data OR Mask 32 bits
288 void RWPMIO (IN unsigned char Address, IN unsigned char OpFlag, IN unsigned int AndMask, IN unsigned int OrMask);
290 //AMD Library Routines (PMIO2LIB.C)
297 * @param[in] Address - PMIO2 Offset value
298 * @param[in] OpFlag - Access sizes
299 * @param[in] Value - Read Data Buffer
302 void ReadPMIO2 (IN unsigned char Address, IN unsigned char OpFlag, IN void* Value);
309 * @param[in] Address - PMIO2 Offset value
310 * @param[in] OpFlag - Access sizes
311 * @param[in] Value - Write Data Buffer
314 void WritePMIO2 (IN unsigned char Address, IN unsigned char OpFlag, IN void* Value);
317 * RWPMIO2 - Read/Write PMIO2
321 * @param[in] Address - PMIO2 Offset value
322 * @param[in] OpFlag - Access sizes
323 * @param[in] AndMask - Data And Mask 32 bits
324 * @param[in] OrMask - Data OR Mask 32 bits
327 void RWPMIO2 (IN unsigned char Address, IN unsigned char OpFlag, IN unsigned int AndMask, IN unsigned int OrMask);
328 //AMD Library Routines (ECLIB.C)
331 // #ifndef NO_EC_SUPPORT
334 * EnterEcConfig - Force EC into Config mode
340 void EnterEcConfig (void);
343 * ExitEcConfig - Force EC exit Config mode
349 void ExitEcConfig (void);
352 * ReadEC8 - Read EC register data
356 * @param[in] Address - EC Register Offset Value
357 * @param[in] Value - Read Data Buffer
360 void ReadEC8 (IN unsigned char Address, IN unsigned char* Value);
363 * WriteEC8 - Write date into EC register
367 * @param[in] Address - EC Register Offset Value
368 * @param[in] Value - Write Data Buffer
371 void WriteEC8 (IN unsigned char Address, IN unsigned char* Value);
374 * RWEC8 - Read/Write EC register
378 * @param[in] Address - EC Register Offset Value
379 * @param[in] AndMask - Data And Mask 8 bits
380 * @param[in] OrMask - Data OR Mask 8 bits
383 void RWEC8 (IN unsigned char Address, IN unsigned char AndMask, IN unsigned char OrMask);
385 unsigned char IsZoneFuncEnable (IN unsigned short Flag, IN unsigned char func, IN unsigned char Zone);
386 void sbECfancontrolservice (IN AMDSBCFG* pConfig);
387 void hwmImcInit (IN AMDSBCFG* pConfig);
388 void GetSbAcpiMmioBase (OUT unsigned int* AcpiMmioBase);
389 void GetSbAcpiPmBase (OUT unsigned short* AcpiPmBase);
390 void SetAcpiPma (IN unsigned char pmaControl);
391 void imcEnableSurebootTimer (IN AMDSBCFG* pConfig);
392 void imcDisableSurebootTimer (IN AMDSBCFG* pConfig);
393 void imcDisarmSurebootTimer (IN AMDSBCFG* pConfig);
394 void hwmSbtsiAutoPolling (IN AMDSBCFG* pConfig);
395 void hwmSbtsiAutoPollingOff (IN AMDSBCFG* pConfig);
396 void hwmSbtsiAutoPollingPause (IN AMDSBCFG* pConfig);
397 void imcSleep (IN AMDSBCFG* pConfig);
398 void imcWakeup (IN AMDSBCFG* pConfig);
399 void imcIdle (IN AMDSBCFG* pConfig);
400 void imcThermalZoneEnable (IN AMDSBCFG* pConfig);
401 void ValidateFchVariant (IN AMDSBCFG* pConfig);
402 void CheckEfuse (IN AMDSBCFG* pConfig);
405 * Is UMI One Lane GEN1 Mode?
408 * @retval TRUE or FALSE
411 unsigned char IsUmiOneLaneGen1Mode ( OUT void );
420 void RecordSmiStatus ( OUT void );