7 * Technology ECC byte support
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: (Mem/Tech)
12 * @e \$Revision: 56279 $ @e \$Date: 2011-07-11 13:11:28 -0600 (Mon, 11 Jul 2011) $
15 /*****************************************************************************
17 * Copyright (C) 2012 Advanced Micro Devices, Inc.
18 * All rights reserved.
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions are met:
22 * * Redistributions of source code must retain the above copyright
23 * notice, this list of conditions and the following disclaimer.
24 * * Redistributions in binary form must reproduce the above copyright
25 * notice, this list of conditions and the following disclaimer in the
26 * documentation and/or other materials provided with the distribution.
27 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
28 * its contributors may be used to endorse or promote products derived
29 * from this software without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
35 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
38 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 * ***************************************************************************
47 *----------------------------------------------------------------------------
50 *----------------------------------------------------------------------------
63 #define FILECODE PROC_MEM_TECH_MTTECC_FILECODE
64 /*----------------------------------------------------------------------------
65 * DEFINITIONS AND MACROS
67 *----------------------------------------------------------------------------
70 /*----------------------------------------------------------------------------
71 * TYPEDEFS AND STRUCTURES
73 *----------------------------------------------------------------------------
76 /*----------------------------------------------------------------------------
77 * PROTOTYPES OF LOCAL FUNCTIONS
79 *----------------------------------------------------------------------------
85 IN OUT MEM_TECH_BLOCK *TechPtr,
91 /*----------------------------------------------------------------------------
94 *----------------------------------------------------------------------------
97 /* -----------------------------------------------------------------------------*/
100 * This function sets the DQS ECC timings
102 * @param[in,out] *TechPtr - Pointer to the MEM_TECH_BLOCK
104 * @return TRUE - No fatal error occurs.
105 * @return FALSE - Fatal error occurs.
110 IN OUT MEM_TECH_BLOCK *TechPtr
118 CH_DEF_STRUCT *ChannelPtr;
120 NBPtr = TechPtr->NBPtr;
121 if (NBPtr->MCTPtr->NodeMemSize) {
122 for (Dct = 0; Dct < NBPtr->DctCount; Dct++) {
123 NBPtr->SwitchDCT (NBPtr, Dct);
124 if (NBPtr->DCTPtr->Timings.DctMemSize != 0) {
125 ChannelPtr = NBPtr->ChannelPtr;
126 for (Dimm = 0; Dimm < MAX_DIMMS_PER_CHANNEL; Dimm++) {
127 if (NBPtr->DCTPtr->Timings.CsEnabled & ((UINT16)1 << (Dimm * 2))) {
128 i = Dimm * TechPtr->DlyTableWidth ();
129 MemTCalcDQSEccTmg (TechPtr, Dimm, AccessRcvEnDly, &ChannelPtr->RcvEnDlys[i]);
130 MemTCalcDQSEccTmg (TechPtr, Dimm, AccessRdDqsDly, &ChannelPtr->RdDqsDlys[i]);
131 MemTCalcDQSEccTmg (TechPtr, Dimm, AccessWrDatDly, &ChannelPtr->WrDatDlys[i]);
137 return (BOOLEAN) (NBPtr->MCTPtr->ErrCode < AGESA_FATAL);
140 /*----------------------------------------------------------------------------
143 *----------------------------------------------------------------------------
146 /* -----------------------------------------------------------------------------*/
149 * This function calculates the DQS ECC timings
151 * @param[in,out] *TechPtr - Pointer to the MEM_TECH_BLOCK
152 * @param[in] Dimm - Dimm number
153 * @param[in] Type - Type of DQS timing
154 * @param[in,out] *DlyArray - Pointer to the array of delays per this Dimm
161 IN OUT MEM_TECH_BLOCK *TechPtr,
164 IN OUT VOID *DlyArray
176 CH_DEF_STRUCT *ChannelPtr;
178 NBPtr = TechPtr->NBPtr;
179 ChannelPtr = NBPtr->ChannelPtr;
181 EccByte = TechPtr->MaxByteLanes ();
182 i = (UINT8) (ChannelPtr->DctEccDqsLike & 0xFF);
183 j = (UINT8) (ChannelPtr->DctEccDqsLike >> 8);
184 Scale = ChannelPtr->DctEccDqsScale;
185 WrDqsDly = &ChannelPtr->WrDqsDlys[Dimm * TechPtr->DlyTableWidth ()];
187 if (Type == AccessRcvEnDly) {
188 ByteiDly = ((UINT16 *) DlyArray)[i];
189 BytejDly = ((UINT16 *) DlyArray)[j];
191 ByteiDly = ((UINT8 *) DlyArray)[i];
192 BytejDly = ((UINT8 *) DlyArray)[j];
196 // For WrDatDly, Subtract TxDqs Delay to get
197 // TxDq-TxDqs Delta, which is what should be averaged.
199 if (Type == AccessWrDatDly) {
200 ByteiDly = ByteiDly - WrDqsDly[i];
201 BytejDly = BytejDly - WrDqsDly[j];
204 if (BytejDly > ByteiDly) {
205 EccDly = ByteiDly + (UINT8) (((UINT16) (BytejDly - ByteiDly) * Scale + 0x77) / 0xFF);
208 EccDly = BytejDly + (UINT8) (((UINT16) (ByteiDly - BytejDly) * (0xFF - Scale) + 0x77) / 0xFF);
212 if (Type == AccessRcvEnDly) {
213 ((UINT16 *) DlyArray)[EccByte] = EccDly;
215 ((UINT8 *) DlyArray)[EccByte] = (UINT8) EccDly;
219 // For WrDatDly, Add back the TxDqs value for ECC bytelane
221 if (Type == AccessWrDatDly) {
222 EccDly = EccDly + WrDqsDly[EccByte];
225 NBPtr->SetTrainDly (NBPtr, Type, DIMM_BYTE_ACCESS (Dimm, EccByte), EccDly);