7 * Platform specific settings for DR DDR3 SO-DIMM system
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: (Mem/Ps)
12 * @e \$Revision: 52286 $ @e \$Date: 2011-05-04 03:48:21 -0600 (Wed, 04 May 2011) $
15 /*****************************************************************************
17 * Copyright (C) 2012 Advanced Micro Devices, Inc.
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21 * modification, are permitted provided that the following conditions are met:
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23 * notice, this list of conditions and the following disclaimer.
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26 * documentation and/or other materials provided with the distribution.
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42 * ***************************************************************************
46 /* This file contains routine that add platform specific support L1 */
50 #include "AdvancedApi.h"
54 #include "cpuFamRegisters.h"
59 #include "OptionMemory.h"
60 #include "PlatformMemoryConfiguration.h"
65 #define FILECODE PROC_MEM_PS_DR_MPSDR3_FILECODE
66 /*----------------------------------------------------------------------------
67 * DEFINITIONS AND MACROS
69 *----------------------------------------------------------------------------
72 /*----------------------------------------------------------------------------
73 * TYPEDEFS AND STRUCTURES
75 *----------------------------------------------------------------------------
78 /*----------------------------------------------------------------------------
79 * PROTOTYPES OF LOCAL FUNCTIONS
81 *----------------------------------------------------------------------------
86 IN OUT MEM_NB_BLOCK *NBPtr
90 *-----------------------------------------------------------------------------
93 *-----------------------------------------------------------------------------
95 STATIC CONST DRAM_TERM_ENTRY DrSDdr3DramTerm1D[] = {
96 {DDR800, ONE_DIMM, NO_DIMM, 2, 0, 0},
97 {DDR1066 + DDR1333 + DDR1600, ONE_DIMM, NO_DIMM, 1, 0, 0}
100 STATIC CONST DRAM_TERM_ENTRY DrSDdr3DramTerm2D[] = {
101 {DDR800 + DDR1066 + DDR1333 + DDR1600, ONE_DIMM, NO_DIMM, 1, 0, 0},
102 {DDR800, TWO_DIMM, NO_DIMM, 3, 0, 2},
103 {DDR1066 + DDR1333, TWO_DIMM, NO_DIMM, 5, 0, 2},
104 {DDR1600, TWO_DIMM, NO_DIMM, 5, 0, 1}
106 /* -----------------------------------------------------------------------------*/
109 * This function is the constructor the platform specific settings for SO SIMM-DDR3 DR DDR3
111 * @param[in,out] *MemPtr Pointer to MEM_DATA_STRUCTURE
112 * @param[in,out] *ChannelPtr Pointer to CH_DEF_STRUCT
113 * @param[in,out] *PsPtr Pointer to MEM_PS_BLOCK
115 * @return AGESA_SUCCESS
120 MemPConstructPsSDr3 (
121 IN OUT MEM_DATA_STRUCT *MemPtr,
122 IN OUT CH_DEF_STRUCT *ChannelPtr,
123 IN OUT MEM_PS_BLOCK *PsPtr
126 ASSERT (MemPtr != 0);
127 ASSERT (ChannelPtr != 0);
129 if ((ChannelPtr->MCTPtr->LogicalCpuid.Family & AMD_FAMILY_10_RB) == 0) {
130 return AGESA_UNSUPPORTED;
132 if (ChannelPtr->TechType != DDR3_TECHNOLOGY) {
133 return AGESA_UNSUPPORTED;
135 if (ChannelPtr->SODimmPresent != ChannelPtr->ChDimmValid) {
136 return AGESA_UNSUPPORTED;
138 PsPtr->MemPDoPs = MemPDoPsSDr3;
139 PsPtr->MemPGetPORFreqLimit = MemPGetPORFreqLimitDef;
140 return AGESA_SUCCESS;
143 /* -----------------------------------------------------------------------------*/
146 * This is function sets the platform specific settings for S-DDR3 DR DDR3
148 * @param[in,out] *NBPtr Pointer to MEM_NB_BLOCK
150 * @return TRUE - Find settings for corresponding platform and dimm population.
151 * @return FALSE - Fail to find settings for corresponding platform and dimm population.
158 IN OUT MEM_NB_BLOCK *NBPtr
161 CONST DRAM_TERM_ENTRY *DramTermPtr;
162 UINT8 MaxDimmsPerChannel;
163 UINT8 *DimmsPerChPtr;
168 DimmsPerChPtr = FindPSOverrideEntry (NBPtr->RefPtr->PlatformMemoryConfiguration, PSO_MAX_DIMMS, NBPtr->MCTPtr->SocketId, NBPtr->ChannelPtr->ChannelID, 0, NULL, NULL);
169 if (DimmsPerChPtr != NULL) {
170 MaxDimmsPerChannel = *DimmsPerChPtr;
172 MaxDimmsPerChannel = 2;
175 if (MaxDimmsPerChannel == 1) {
176 DramTermSize = GET_SIZE_OF (DrSDdr3DramTerm1D);
177 DramTermPtr = DrSDdr3DramTerm1D;
178 } else if (MaxDimmsPerChannel == 2) {
179 DramTermSize = GET_SIZE_OF (DrSDdr3DramTerm2D);
180 DramTermPtr = DrSDdr3DramTerm2D;
185 if (!MemPGetDramTerm (NBPtr, DramTermSize, DramTermPtr)) {