7 * Northbridge PH MCT supporting functions
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: (Mem/NB/PH)
12 * @e \$Revision: 51634 $ @e \$Date: 2011-04-26 17:12:52 +0800 (Tue, 26 Apr 2011) $
15 /*****************************************************************************
17 * Copyright (C) 2012 Advanced Micro Devices, Inc.
18 * All rights reserved.
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21 * modification, are permitted provided that the following conditions are met:
22 * * Redistributions of source code must retain the above copyright
23 * notice, this list of conditions and the following disclaimer.
24 * * Redistributions in binary form must reproduce the above copyright
25 * notice, this list of conditions and the following disclaimer in the
26 * documentation and/or other materials provided with the distribution.
27 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
28 * its contributors may be used to endorse or promote products derived
29 * from this software without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
35 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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38 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 * ***************************************************************************
47 *----------------------------------------------------------------------------
50 *----------------------------------------------------------------------------
61 #include "OptionMemory.h" // need def for MEM_FEAT_BLOCK_NB
67 #define FILECODE PROC_MEM_NB_PH_MNMCTPH_FILECODE
68 /*----------------------------------------------------------------------------
69 * DEFINITIONS AND MACROS
71 *----------------------------------------------------------------------------
74 /*----------------------------------------------------------------------------
75 * TYPEDEFS AND STRUCTURES
77 *----------------------------------------------------------------------------
80 /*----------------------------------------------------------------------------
81 * PROTOTYPES OF LOCAL FUNCTIONS
83 *----------------------------------------------------------------------------
87 /*----------------------------------------------------------------------------
90 *----------------------------------------------------------------------------
93 extern BUILD_OPT_CFG UserOptions;
96 /* -----------------------------------------------------------------------------*/
100 * This function sets final values in BUCFG and BUCFG2
102 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
104 * @return TRUE - No fatal error occurs.
105 * @return FALSE - Fatal error occurs.
110 IN OUT MEM_NB_BLOCK *NBPtr
114 MEM_DATA_STRUCT *MemPtr;
115 DRAM_PREFETCH_MODE DramPrefetchMode;
118 MemPtr = NBPtr->MemPtr;
119 DramPrefetchMode = MemPtr->PlatFormConfig->PlatformProfile.AdvancedPerformanceProfile.DramPrefetchMode;
120 // Recommended settings for F2x1B0
121 MemNSetBitFieldNb (NBPtr, BFAdapPrefMissRatio, 1);
122 MemNSetBitFieldNb (NBPtr, BFAdapPrefPosStep, 0);
123 MemNSetBitFieldNb (NBPtr, BFAdapPrefNegStep, 0);
124 MemNSetBitFieldNb (NBPtr, BFCohPrefPrbLmt, 1);
125 MemNSetBitFieldNb (NBPtr, BFPrefFourConf, 7);
126 MemNSetBitFieldNb (NBPtr, BFPrefFiveConf, 7);
127 if (!NBPtr->Ganged) {
128 MemNSetBitFieldNb (NBPtr, BFEnSplitDctLimits, 1);
130 // Recommended settings for F2x11C
131 MemNSetBitFieldNb (NBPtr, BFPrefThreeConf, 6);
132 MemNSetBitFieldNb (NBPtr, BFMctWrLimit, 16);
133 MemNSetBitFieldNb (NBPtr, BFPrefCpuDis, 0);
134 MemNSetBitFieldNb (NBPtr, BFPrefIoDis, 0);
135 MemNSetBitFieldNb (NBPtr, BFFlushWrOnStpGnt, 1);
137 if (DramPrefetchMode == DISABLE_DRAM_PREFETCH_FOR_IO || DramPrefetchMode == DISABLE_DRAM_PREFETCHER) {
138 MemNSetBitFieldNb (NBPtr, BFPrefIoDis, 1);
141 if (DramPrefetchMode == DISABLE_DRAM_PREFETCH_FOR_CPU || DramPrefetchMode == DISABLE_DRAM_PREFETCHER) {
142 MemNSetBitFieldNb (NBPtr, BFPrefCpuDis, 1);
145 for (Dct = 0; Dct < NBPtr->DctCount; Dct++) {
146 NBPtr->SwitchDCT (NBPtr, Dct);
147 if (NBPtr->DCTPtr->Timings.DctMemSize != 0) {
148 if (NBPtr->ChannelPtr->Dimmx4Present == 0) {
149 MemNSetBitFieldNb (NBPtr, BFPhy0x0D0F0F13, (MemNGetBitFieldNb (NBPtr, BFPhy0x0D0F0F13) | 0x80));
151 if (!NBPtr->MCTPtr->Status[SbEccDimms]) {
152 MemNSetBitFieldNb (NBPtr, BFPhy0x0D0F0830, (MemNGetBitFieldNb (NBPtr, BFPhy0x0D0F0830) | 0x10));
154 MemNSetBitFieldNb (NBPtr, BFPhy0x0D07812F, (MemNGetBitFieldNb (NBPtr, BFPhy0x0D07812F) | 0x01));
158 if (NBPtr->Node == BSP_DIE) {
159 if (!NBPtr->ClToNbFlag) {
160 LibAmdMsrRead (BU_CFG2, (UINT64 *)&SMsr, &MemPtr->StdHeader);
161 SMsr.lo &= ~((UINT32)1 << 15); // ClLinesToNbDis
162 LibAmdMsrWrite (BU_CFG2, (UINT64 *)&SMsr, &MemPtr->StdHeader);
165 LibAmdMsrRead (BU_CFG, (UINT64 *)&SMsr, &MemPtr->StdHeader);
166 SMsr.hi &= ~((UINT32)1 << (48 - 32)); // WbEnhWsbDis
167 LibAmdMsrWrite (BU_CFG, (UINT64 *)&SMsr, &MemPtr->StdHeader);
170 return (BOOLEAN) (NBPtr->MCTPtr->ErrCode < AGESA_FATAL);
173 /*----------------------------------------------------------------------------
176 *----------------------------------------------------------------------------