AGESA F15: AMD family15 AGESA code
[coreboot.git] / src / vendorcode / amd / agesa / f15 / Proc / CPU / Feature / cpuMsgBasedC1e.c
1 /* $NoKeywords:$ */
2 /**
3  * @file
4  *
5  * AMD AGESA CPU Message-based C1e feature support code.
6  *
7  * Contains code that declares the AGESA CPU C1e related APIs
8  *
9  * @xrefitem bom "File Content Label" "Release Content"
10  * @e project:      AGESA
11  * @e sub-project:  CPU/Feature
12  * @e \$Revision: 56279 $   @e \$Date: 2011-07-11 13:11:28 -0600 (Mon, 11 Jul 2011) $
13  *
14  */
15 /*
16  ******************************************************************************
17  *
18  * Copyright (C) 2012 Advanced Micro Devices, Inc.
19  * All rights reserved.
20  *
21  * Redistribution and use in source and binary forms, with or without
22  * modification, are permitted provided that the following conditions are met:
23  *     * Redistributions of source code must retain the above copyright
24  *       notice, this list of conditions and the following disclaimer.
25  *     * Redistributions in binary form must reproduce the above copyright
26  *       notice, this list of conditions and the following disclaimer in the
27  *       documentation and/or other materials provided with the distribution.
28  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
29  *       its contributors may be used to endorse or promote products derived
30  *       from this software without specific prior written permission.
31  *
32  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
33  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
34  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
36  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
37  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
38  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
39  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
41  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42  *
43  ******************************************************************************
44  */
45
46 /*----------------------------------------------------------------------------------------
47  *                             M O D U L E S    U S E D
48  *----------------------------------------------------------------------------------------
49  */
50 #include "AGESA.h"
51 #include "amdlib.h"
52 #include "Ids.h"
53 #include "OptionMultiSocket.h"
54 #include "cpuRegisters.h"
55 #include "cpuApicUtilities.h"
56 #include "cpuServices.h"
57 #include "cpuFamilyTranslation.h"
58 #include "cpuFeatures.h"
59 #include "cpuMsgBasedC1e.h"
60 #include "Filecode.h"
61 CODE_GROUP (G1_PEICC)
62 RDATA_GROUP (G2_PEI)
63
64 #define FILECODE PROC_CPU_FEATURE_CPUMSGBASEDC1E_FILECODE
65 /*----------------------------------------------------------------------------------------
66  *                   D E F I N I T I O N S    A N D    M A C R O S
67  *----------------------------------------------------------------------------------------
68  */
69
70 /*----------------------------------------------------------------------------------------
71  *                  T Y P E D E F S     A N D     S T R U C T U  R E S
72  *----------------------------------------------------------------------------------------
73  */
74
75 /*----------------------------------------------------------------------------------------
76  *           P R O T O T Y P E S     O F     L O C A L     F U  N C T I O N S
77  *----------------------------------------------------------------------------------------
78  */
79 VOID
80 STATIC
81 EnableMsgC1eOnSocket (
82   IN       VOID *EntryPoint,
83   IN       AMD_CONFIG_PARAMS *StdHeader,
84   IN       AMD_CPU_EARLY_PARAMS *CpuEarlyParams
85   );
86
87 /*----------------------------------------------------------------------------------------
88  *                          E X P O R T E D    F U N C T I O N S
89  *----------------------------------------------------------------------------------------
90  */
91 extern CPU_FAMILY_SUPPORT_TABLE MsgBasedC1eFamilyServiceTable;
92 extern OPTION_MULTISOCKET_CONFIGURATION OptionMultiSocketConfiguration;
93
94 /*---------------------------------------------------------------------------------------*/
95 /**
96  *  Should message-based C1e be enabled
97  *
98  * @param[in]    PlatformConfig     Contains the runtime modifiable feature input data.
99  * @param[in]    StdHeader          Config Handle for library, services.
100  *
101  * @retval       TRUE               Message-based C1e is supported.
102  * @retval       FALSE              Message-based C1e cannot be enabled.
103  *
104  */
105 BOOLEAN
106 STATIC
107 IsMsgBasedC1eFeatureEnabled (
108   IN       PLATFORM_CONFIGURATION *PlatformConfig,
109   IN       AMD_CONFIG_PARAMS      *StdHeader
110   )
111 {
112   BOOLEAN          IsEnabled;
113   UINT32           Socket;
114   MSG_BASED_C1E_FAMILY_SERVICES *FamilyServices;
115
116   ASSERT (PlatformConfig->C1eMode < MaxC1eMode);
117
118   IsEnabled = FALSE;
119   if ((PlatformConfig->C1eMode == C1eModeMsgBased) || (PlatformConfig->C1eMode == C1eModeAuto)) {
120     ASSERT (PlatformConfig->C1ePlatformData < 0x10000);
121     ASSERT (PlatformConfig->C1ePlatformData != 0);
122     if ((PlatformConfig->C1ePlatformData != 0) && (PlatformConfig->C1ePlatformData < 0xFFFE)) {
123       IsEnabled = TRUE;
124       if (IsNonCoherentHt1 (StdHeader)) {
125         IsEnabled = FALSE;
126       } else {
127         for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) {
128           if (IsProcessorPresent (Socket, StdHeader)) {
129             GetFeatureServicesOfSocket (&MsgBasedC1eFamilyServiceTable, Socket, (CONST VOID **)&FamilyServices, StdHeader);
130             if ((FamilyServices == NULL) || !FamilyServices->IsMsgBasedC1eSupported (FamilyServices, Socket, StdHeader)) {
131               IsEnabled = FALSE;
132               break;
133             }
134           }
135         }
136       }
137     }
138   }
139   return IsEnabled;
140 }
141
142 /*---------------------------------------------------------------------------------------*/
143 /**
144  *  Enable Message-based C1e
145  *
146  * @param[in]    EntryPoint         Timepoint designator.
147  * @param[in]    PlatformConfig     Contains the runtime modifiable feature input data.
148  * @param[in]    StdHeader          Config Handle for library, services.
149  *
150  * @return       AGESA_SUCCESS      Always succeeds.
151  *
152  */
153 AGESA_STATUS
154 STATIC
155 InitializeMsgBasedC1eFeature (
156   IN       UINT64                 EntryPoint,
157   IN       PLATFORM_CONFIGURATION *PlatformConfig,
158   IN       AMD_CONFIG_PARAMS      *StdHeader
159   )
160 {
161   AP_TASK      TaskPtr;
162   AMD_CPU_EARLY_PARAMS CpuEarlyParams;
163
164   IDS_HDT_CONSOLE (CPU_TRACE, "    MT C1e is enabled\n");
165
166   if ((EntryPoint != CPU_FEAT_AFTER_PM_INIT) || (IsWarmReset (StdHeader))) {
167     CpuEarlyParams.PlatformConfig = *PlatformConfig;
168
169     TaskPtr.FuncAddress.PfApTaskIC = EnableMsgC1eOnSocket;
170     TaskPtr.DataTransfer.DataSizeInDwords = 2;
171     TaskPtr.DataTransfer.DataPtr = &EntryPoint;
172     TaskPtr.DataTransfer.DataTransferFlags = 0;
173     TaskPtr.ExeFlags = PASS_EARLY_PARAMS;
174     OptionMultiSocketConfiguration.BscRunCodeOnAllSystemCore0s (&TaskPtr, StdHeader, &CpuEarlyParams);
175   }
176   return AGESA_SUCCESS;
177 }
178
179
180 /*---------------------------------------------------------------------------------------*/
181 /**
182  *  'Local' core 0 task to enable message-based C1e on it's socket.
183  *
184  * @param[in]    EntryPoint         Timepoint designator.
185  * @param[in]    StdHeader          Config Handle for library, services.
186  * @param[in]    CpuEarlyParams     Service parameters.
187  *
188  */
189 VOID
190 STATIC
191 EnableMsgC1eOnSocket (
192   IN       VOID *EntryPoint,
193   IN       AMD_CONFIG_PARAMS *StdHeader,
194   IN       AMD_CPU_EARLY_PARAMS *CpuEarlyParams
195   )
196 {
197   MSG_BASED_C1E_FAMILY_SERVICES *FamilyServices;
198
199   GetFeatureServicesOfCurrentCore (&MsgBasedC1eFamilyServiceTable, (CONST VOID **)&FamilyServices, StdHeader);
200   FamilyServices->InitializeMsgBasedC1e (FamilyServices,
201                                          *((UINT64 *) EntryPoint),
202                                          &CpuEarlyParams->PlatformConfig,
203                                          StdHeader);
204 }
205
206 CONST CPU_FEATURE_DESCRIPTOR ROMDATA CpuFeatureMsgBasedC1e =
207 {
208   MsgBasedC1e,
209   (CPU_FEAT_AFTER_PM_INIT | CPU_FEAT_AFTER_POST_MTRR_SYNC | CPU_FEAT_AFTER_RESUME_MTRR_SYNC),
210   IsMsgBasedC1eFeatureEnabled,
211   InitializeMsgBasedC1eFeature
212 };