5 * AMD Family_15 Models 0x00 - 0x0F Power Management related initialization table
7 * @xrefitem bom "File Content Label" "Release Content"
9 * @e sub-project: CPU/Family/0x15/OR
10 * @e \$Revision: 55600 $ @e \$Date: 2011-06-23 12:39:18 -0600 (Thu, 23 Jun 2011) $
14 ******************************************************************************
16 * Copyright (C) 2012 Advanced Micro Devices, Inc.
17 * All rights reserved.
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20 * modification, are permitted provided that the following conditions are met:
21 * * Redistributions of source code must retain the above copyright
22 * notice, this list of conditions and the following disclaimer.
23 * * Redistributions in binary form must reproduce the above copyright
24 * notice, this list of conditions and the following disclaimer in the
25 * documentation and/or other materials provided with the distribution.
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27 * its contributors may be used to endorse or promote products derived
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30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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39 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 ******************************************************************************
44 /*----------------------------------------------------------------------------------------
45 * M O D U L E S U S E D
46 *----------------------------------------------------------------------------------------
50 #include "cpuRegisters.h"
51 #include "cpuApicUtilities.h"
52 #include "cpuFamilyTranslation.h"
53 #include "cpuPowerMgmtSystemTables.h"
54 #include "cpuF15OrCoreAfterReset.h"
55 #include "cpuF15OrNbAfterReset.h"
56 #include "cpuF15OrSoftwareThermal.h"
57 #include "F15OrPowerPlane.h"
58 #include "cpuF15PowerCheck.h"
59 #include "F15OrPmNbCofVidInit.h"
60 #include "F15OrUtilities.h"
66 #define FILECODE PROC_CPU_FAMILY_0X15_OR_F15ORPOWERMGMTSYSTEMTABLES_FILECODE
68 /*----------------------------------------------------------------------------------------
69 * D E F I N I T I O N S A N D M A C R O S
70 *----------------------------------------------------------------------------------------
73 /*----------------------------------------------------------------------------------------
74 * T Y P E D E F S A N D S T R U C T U R E S
75 *----------------------------------------------------------------------------------------
78 /*----------------------------------------------------------------------------------------
79 * P R O T O T Y P E S O F L O C A L F U N C T I O N S
80 *----------------------------------------------------------------------------------------
84 IN CPU_SPECIFIC_SERVICES *FamilySpecificServices,
85 OUT CONST VOID **SysPmTblPtr,
86 OUT UINT8 *NumberOfElements,
87 IN AMD_CONFIG_PARAMS *StdHeader
90 /*----------------------------------------------------------------------------------------
91 * E X P O R T E D F U N C T I O N S
92 *----------------------------------------------------------------------------------------
95 /* Family 15h Only Table */
96 /* ---------------------- */
97 CONST SYS_PM_TBL_STEP ROMDATA CpuF15OrSysPmTableArray[] =
100 IDS_INITIAL_F15_OR_PM_STEP
102 // Step 1 - Configure F3x[84:80]. Handled by PCI register table.
103 // Step 2 - Power Plane Initialization
104 // Execute both cold & warm
107 F15OrPmPwrPlaneInit // Function Pointer
110 // Step x - Disable NB Pstate, if required
111 // Execute both cold & warm
114 F15OrNbPstateDis // Function Pointer
117 // Step 3 - Configure Northbridge COF and VID.
118 // Execute only after warm reset
120 PM_EXEFLAGS_WARM_ONLY, // ExeFlags
121 F15OrPmNbCofVidInit // Function Pointer
124 // Step 4 - Core Minimum P-state Transition Sequence After Warm Reset
125 // Execute only after warm reset
127 PM_EXEFLAGS_WARM_ONLY, // ExeFlags
128 F15OrPmCoreAfterReset // Function Pointer
131 // Step 5 - NB COF and VID Transition Sequence After Warm Reset
132 // Execute only after warm reset
134 PM_EXEFLAGS_WARM_ONLY, // ExeFlags
135 F15OrPmNbAfterReset // Function Pointer
138 // Step 6 - Power Check
139 // Execute only after warm reset
141 PM_EXEFLAGS_WARM_ONLY, // ExeFlags
142 F15PmPwrCheck // Function Pointer
145 // Step 7 - Software Thermal Control Init
146 // Execute only after warm reset
148 PM_EXEFLAGS_WARM_ONLY, // ExeFlags
149 F15OrPmThermalInit // Function Pointer
154 /*---------------------------------------------------------------------------------------*/
156 * Returns the appropriate table of steps to perform to initialize the power management
159 * @CpuServiceMethod{::F_CPU_GET_FAMILY_SPECIFIC_ARRAY}.
161 * @param[in] FamilySpecificServices The current Family Specific Services.
162 * @param[out] SysPmTblPtr Points to the first entry in the table.
163 * @param[out] NumberOfElements Number of valid entries in the table.
164 * @param[in] StdHeader Header for library and services.
169 IN CPU_SPECIFIC_SERVICES *FamilySpecificServices,
170 OUT CONST VOID **SysPmTblPtr,
171 OUT UINT8 *NumberOfElements,
172 IN AMD_CONFIG_PARAMS *StdHeader
175 *NumberOfElements = (sizeof (CpuF15OrSysPmTableArray) / sizeof (SYS_PM_TBL_STEP));
176 *SysPmTblPtr = CpuF15OrSysPmTableArray;