5 * AMD Multi-socket option API.
7 * Contains structures and values used to control the multi-socket option code.
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: OPTION
12 * @e \$Revision: 51891 $ @e \$Date: 2011-04-28 12:39:55 -0600 (Thu, 28 Apr 2011) $
15 /*****************************************************************************
17 * Copyright (C) 2012 Advanced Micro Devices, Inc.
18 * All rights reserved.
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions are met:
22 * * Redistributions of source code must retain the above copyright
23 * notice, this list of conditions and the following disclaimer.
24 * * Redistributions in binary form must reproduce the above copyright
25 * notice, this list of conditions and the following disclaimer in the
26 * documentation and/or other materials provided with the distribution.
27 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
28 * its contributors may be used to endorse or promote products derived
29 * from this software without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
35 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
38 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 ******************************************************************************
45 #ifndef _OPTION_MULTISOCKET_H_
46 #define _OPTION_MULTISOCKET_H_
48 /*----------------------------------------------------------------------------------------
49 * M I X E D (Definitions And Macros / Typedefs, Structures, Enums)
50 *----------------------------------------------------------------------------------------
53 /*----------------------------------------------------------------------------------------
54 * D E F I N I T I O N S A N D M A C R O S
55 *----------------------------------------------------------------------------------------
59 /*----------------------------------------------------------------------------------------
60 * T Y P E D E F S, S T R U C T U R E S, E N U M S
61 *----------------------------------------------------------------------------------------
65 * This function loops through all possible socket locations, gathering the number
66 * of power management steps each populated socket requires, and returns the
69 * @param[out] NumSystemSteps Maximum number of system steps required
70 * @param[in] StdHeader Config handle for library and services
73 typedef VOID OPTION_MULTISOCKET_PM_STEPS (
74 OUT UINT8 *NumSystemSteps,
75 IN AMD_CONFIG_PARAMS *StdHeader
79 * This function loops through all possible socket locations, starting core 0 of
80 * each populated socket to perform the passed in AP_TASK. After starting all
81 * other core 0s, the BSC will perform the AP_TASK as well. This must be run by
82 * the system BSC only.
84 * @param[in] TaskPtr Function descriptor
85 * @param[in] StdHeader Config handle for library and services
86 * @param[in] ConfigParams AMD entry point's CPU parameter structure
89 typedef VOID OPTION_MULTISOCKET_PM_CORE0_TASK (
91 IN AMD_CONFIG_PARAMS *StdHeader,
96 * This function loops through all possible socket locations, comparing the
97 * maximum NB frequencies to determine the slowest. This function also
98 * determines if all coherent NB frequencies are equivalent.
100 * @param[in] NbPstate NB P-state number to check (0 = fastest)
101 * @param[in] PlatformConfig Platform profile/build option config structure.
102 * @param[out] SystemNbCofNumerator NB frequency numerator for the system in MHz
103 * @param[out] SystemNbCofDenominator NB frequency denominator for the system
104 * @param[out] SystemNbCofsMatch Whether or not all NB frequencies are equivalent
105 * @param[out] NbPstateIsEnabledOnAllCPUs Whether or not NbPstate is valid on all CPUs
106 * @param[in] StdHeader Config handle for library and services
108 * @retval TRUE At least one processor has NbPstate enabled.
109 * @retval FALSE NbPstate is disabled on all CPUs
111 typedef BOOLEAN OPTION_MULTISOCKET_PM_NB_COF (
113 IN PLATFORM_CONFIGURATION *PlatformConfig,
114 OUT UINT32 *SystemNbCofNumerator,
115 OUT UINT32 *SystemNbCofDenominator,
116 OUT BOOLEAN *SystemNbCofsMatch,
117 OUT BOOLEAN *NbPstateIsEnabledOnAllCPUs,
118 IN AMD_CONFIG_PARAMS *StdHeader
122 * This function loops through all possible socket locations, checking whether
123 * any populated sockets require NB COF VID programming.
125 * @param[in] StdHeader Config handle for library and services
128 typedef BOOLEAN OPTION_MULTISOCKET_PM_NB_COF_UPDATE (
129 IN AMD_CONFIG_PARAMS *StdHeader
133 * This function loops through all possible socket locations, collecting any
134 * power management initialization errors that may have occurred. These errors
135 * are transferred from the core 0s of the socket in which the errors occurred
136 * to the BSC's heap. The BSC's heap is then searched for the most severe error
137 * that occurred, and returns it. This function must be called by the BSC only.
139 * @param[in] StdHeader Config handle for library and services
142 typedef AGESA_STATUS OPTION_MULTISOCKET_PM_GET_EVENTS (
143 IN AMD_CONFIG_PARAMS *StdHeader
147 * This function loops through all possible socket locations and Nb Pstates,
148 * comparing the NB frequencies to determine the slowest NB P0 and NB Pmin in
151 * @param[in] PlatformConfig Platform profile/build option config structure.
152 * @param[out] MinSysNbFreq NB frequency numerator for the system in MHz
153 * @param[out] MinP0NbFreq NB frequency numerator for P0 in MHz
154 * @param[in] StdHeader Config handle for library and services
156 typedef VOID OPTION_MULTISOCKET_PM_NB_MIN_COF (
157 IN PLATFORM_CONFIGURATION *PlatformConfig,
158 OUT UINT32 *MinSysNbFreq,
159 OUT UINT32 *MinP0NbFreq,
160 IN AMD_CONFIG_PARAMS *StdHeader
164 * This function returns the current running core's PCI Config Space address.
166 * @param[out] PciAddress The Processor's PCI Config Space address (Function 0, Register 0)
167 * @param[in] StdHeader Header for library and services.
169 typedef BOOLEAN OPTION_MULTISOCKET_GET_PCI_ADDRESS (
170 OUT PCI_ADDR *PciAddress,
171 IN AMD_CONFIG_PARAMS *StdHeader
175 * This function writes to all nodes on the executing core's socket.
177 * @param[in] PciAddress The Function and Register to update
178 * @param[in] Mask The bitwise AND mask to apply to the current register value
179 * @param[in] Data The bitwise OR mask to apply to the current register value
180 * @param[in] StdHeader Header for library and services.
183 typedef VOID OPTION_MULTISOCKET_MODIFY_CURR_SOCKET_PCI (
184 IN PCI_ADDR *PciAddress,
187 IN AMD_CONFIG_PARAMS *StdHeader
190 #define MULTISOCKET_STRUCT_VERSION 0x01
193 * Provide build configuration of cpu multi-socket or single socket support.
197 UINT16 OptMultiSocketVersion; ///< Table version
198 OPTION_MULTISOCKET_PM_STEPS *GetNumberOfSystemPmSteps; ///< Method: Get number of power mgt tasks
199 OPTION_MULTISOCKET_PM_CORE0_TASK *BscRunCodeOnAllSystemCore0s; ///< Method: Perform tasks on Core 0 of each processor
200 OPTION_MULTISOCKET_PM_NB_COF *GetSystemNbPstateSettings; ///< Method: Find the Northbridge frequency for the specified Nb Pstate in the system.
201 OPTION_MULTISOCKET_PM_NB_COF_UPDATE *GetSystemNbCofVidUpdate; ///< Method: Determine if any Northbridges in the system need to update their COF/VID.
202 OPTION_MULTISOCKET_PM_GET_EVENTS *BscRetrievePmEarlyInitErrors; ///< Method: Gathers error information from all Core 0s.
203 OPTION_MULTISOCKET_PM_NB_MIN_COF *GetMinNbCof; ///< Method: Get the minimum system and minimum P0 Northbridge frequency.
204 OPTION_MULTISOCKET_GET_PCI_ADDRESS *GetCurrPciAddr; ///< Method: Get PCI Config Space Address for the current running core.
205 OPTION_MULTISOCKET_MODIFY_CURR_SOCKET_PCI *ModifyCurrSocketPci; ///< Method: Writes to all nodes on the executing core's socket.
206 } OPTION_MULTISOCKET_CONFIGURATION;
208 /*----------------------------------------------------------------------------------------
209 * F U N C T I O N P R O T O T Y P E
210 *----------------------------------------------------------------------------------------
214 #endif // _OPTION_MULTISOCKET_H_