5 * Install of all appropriate CPU family specific support.
7 * This file generates the defaults tables for all family specific
10 * @xrefitem bom "File Content Label" "Release Content"
12 * @e sub-project: Core
13 * @e \$Revision: 50628 $ @e \$Date: 2011-04-12 15:18:38 -0600 (Tue, 12 Apr 2011) $
15 /*****************************************************************************
17 * Copyright (C) 2012 Advanced Micro Devices, Inc.
18 * All rights reserved.
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions are met:
22 * * Redistributions of source code must retain the above copyright
23 * notice, this list of conditions and the following disclaimer.
24 * * Redistributions in binary form must reproduce the above copyright
25 * notice, this list of conditions and the following disclaimer in the
26 * documentation and/or other materials provided with the distribution.
27 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
28 * its contributors may be used to endorse or promote products derived
29 * from this software without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
35 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
38 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 ***************************************************************************/
45 /* Default all CPU Specific Service members to off. They
46 will be enabled as needed by cross referencing families
47 with entry points in the family / model install files. */
48 #define GET_PSTATE_POWER FALSE
49 #define GET_PSTATE_FREQ FALSE
50 #define DISABLE_PSTATE FALSE
51 #define TRANSITION_PSTATE FALSE
52 #define PROC_IDD_MAX FALSE
53 #define GET_TSC_RATE FALSE
54 #define PSTATE_TRANSITION_LATENCY FALSE
55 #define GET_PSTATE_REGISTER_INFO FALSE
56 #define GET_PSTATE_MAX_STATE FALSE
57 #define SET_PSTATE_LEVELING_REG FALSE
58 #define GET_NB_FREQ FALSE
59 #define GET_NB_IDD_MAX FALSE
60 #define IS_NBCOF_INIT_NEEDED FALSE
61 #define AP_INITIAL_LAUNCH FALSE
62 #define GET_AP_MAILBOX_FROM_HW FALSE
63 #define SET_AP_CORE_NUMBER FALSE
64 #define GET_AP_CORE_NUMBER FALSE
65 #define TRANSFER_AP_CORE_NUMBER FALSE
66 #define ID_POSITION_INITIAL_APICID FALSE
67 #define SAVE_FEATURES FALSE
68 #define WRITE_FEATURES FALSE
69 #define SET_DOWN_CORE_REG FALSE
70 #define SET_WARM_RESET_FLAG FALSE
71 #define GET_WARM_RESET_FLAG FALSE
72 #define USES_REGISTER_TABLES FALSE
73 #define BASE_FAMILY_PCI FALSE
74 #define MODEL_SPECIFIC_PCI FALSE
75 #define BASE_FAMILY_MSR FALSE
76 #define MODEL_SPECIFIC_MSR FALSE
77 #define BRAND_STRING1 FALSE
78 #define BRAND_STRING2 FALSE
79 #define BASE_FAMILY_HT_PCI FALSE
80 #define MODEL_SPECIFIC_HT_PCI FALSE
81 #define BASE_FAMILY_WORKAROUNDS FALSE
82 #define GET_PATCHES FALSE
83 #define GET_PATCHES_EQUIVALENCE_TABLE FALSE
84 #define GET_CACHE_INFO FALSE
85 #define GET_SYSTEM_PM_TABLE FALSE
86 #define GET_WHEA_INIT FALSE
87 #define GET_CFOH_REG FALSE
88 #define GET_PLATFORM_TYPE_SPECIFIC_INFO FALSE
89 #define IS_NB_PSTATE_ENABLED FALSE
92 * Pull in family specific services based on entry point
94 #if AGESA_ENTRY_INIT_RESET == TRUE
95 #undef ID_POSITION_INITIAL_APICID
96 #define ID_POSITION_INITIAL_APICID TRUE
97 #undef GET_AP_MAILBOX_FROM_HW
98 #define GET_AP_MAILBOX_FROM_HW TRUE
99 #undef SET_WARM_RESET_FLAG
100 #define SET_WARM_RESET_FLAG TRUE
101 #undef GET_WARM_RESET_FLAG
102 #define GET_WARM_RESET_FLAG TRUE
103 #undef GET_CACHE_INFO
104 #define GET_CACHE_INFO TRUE
105 #undef GET_AP_CORE_NUMBER
106 #define GET_AP_CORE_NUMBER TRUE
107 #undef TRANSFER_AP_CORE_NUMBER
108 #define TRANSFER_AP_CORE_NUMBER TRUE
111 #if AGESA_ENTRY_INIT_RECOVERY == TRUE
112 #undef ID_POSITION_INITIAL_APICID
113 #define ID_POSITION_INITIAL_APICID TRUE
114 #undef USES_REGISTER_TABLES
115 #define USES_REGISTER_TABLES TRUE
116 #undef BASE_FAMILY_PCI
117 #define BASE_FAMILY_PCI TRUE
118 #undef MODEL_SPECIFIC_PCI
119 #define MODEL_SPECIFIC_PCI TRUE
120 #undef BASE_FAMILY_MSR
121 #define BASE_FAMILY_MSR TRUE
122 #undef MODEL_SPECIFIC_MSR
123 #define MODEL_SPECIFIC_MSR TRUE
124 #undef GET_CACHE_INFO
125 #define GET_CACHE_INFO TRUE
126 #undef GET_PLATFORM_TYPE_SPECIFIC_INFO
127 #define GET_PLATFORM_TYPE_SPECIFIC_INFO TRUE
128 #undef IS_NB_PSTATE_ENABLED
129 #define IS_NB_PSTATE_ENABLED TRUE
131 #define GET_PATCHES TRUE
132 #undef GET_PATCHES_EQUIVALENCE_TABLE
133 #define GET_PATCHES_EQUIVALENCE_TABLE TRUE
136 #if AGESA_ENTRY_INIT_EARLY == TRUE
137 #undef TRANSITION_PSTATE
138 #define TRANSITION_PSTATE TRUE
139 #undef DISABLE_PSTATE
140 #define DISABLE_PSTATE TRUE
142 #define PROC_IDD_MAX TRUE
144 #define GET_TSC_RATE TRUE
146 #define GET_NB_FREQ TRUE
147 #undef GET_NB_IDD_MAX
148 #define GET_NB_IDD_MAX TRUE
149 #undef IS_NBCOF_INIT_NEEDED
150 #define IS_NBCOF_INIT_NEEDED TRUE
151 #undef AP_INITIAL_LAUNCH
152 #define AP_INITIAL_LAUNCH TRUE
153 #undef GET_AP_MAILBOX_FROM_HW
154 #define GET_AP_MAILBOX_FROM_HW TRUE
155 #undef SET_AP_CORE_NUMBER
156 #define SET_AP_CORE_NUMBER TRUE
157 #undef GET_AP_CORE_NUMBER
158 #define GET_AP_CORE_NUMBER TRUE
159 #undef TRANSFER_AP_CORE_NUMBER
160 #define TRANSFER_AP_CORE_NUMBER TRUE
161 #undef ID_POSITION_INITIAL_APICID
162 #define ID_POSITION_INITIAL_APICID TRUE
163 #undef SET_DOWN_CORE_REG
164 #define SET_DOWN_CORE_REG TRUE
165 #undef SET_WARM_RESET_FLAG
166 #define SET_WARM_RESET_FLAG TRUE
167 #undef GET_WARM_RESET_FLAG
168 #define GET_WARM_RESET_FLAG TRUE
169 #undef USES_REGISTER_TABLES
170 #define USES_REGISTER_TABLES TRUE
171 #undef BASE_FAMILY_PCI
172 #define BASE_FAMILY_PCI TRUE
173 #undef MODEL_SPECIFIC_PCI
174 #define MODEL_SPECIFIC_PCI TRUE
175 #undef BASE_FAMILY_MSR
176 #define BASE_FAMILY_MSR TRUE
177 #undef MODEL_SPECIFIC_MSR
178 #define MODEL_SPECIFIC_MSR TRUE
180 #define BRAND_STRING1 TRUE
182 #define BRAND_STRING2 TRUE
183 #undef BASE_FAMILY_HT_PCI
184 #define BASE_FAMILY_HT_PCI TRUE
185 #undef MODEL_SPECIFIC_HT_PCI
186 #define MODEL_SPECIFIC_HT_PCI TRUE
187 #undef BASE_FAMILY_WORKAROUNDS
188 #define BASE_FAMILY_WORKAROUNDS TRUE
190 #define GET_PATCHES TRUE
191 #undef GET_PATCHES_EQUIVALENCE_TABLE
192 #define GET_PATCHES_EQUIVALENCE_TABLE TRUE
193 #undef GET_SYSTEM_PM_TABLE
194 #define GET_SYSTEM_PM_TABLE TRUE
195 #undef GET_CACHE_INFO
196 #define GET_CACHE_INFO TRUE
197 #undef GET_PLATFORM_TYPE_SPECIFIC_INFO
198 #define GET_PLATFORM_TYPE_SPECIFIC_INFO TRUE
199 #undef IS_NB_PSTATE_ENABLED
200 #define IS_NB_PSTATE_ENABLED TRUE
203 #if AGESA_ENTRY_INIT_POST == TRUE
204 #undef ID_POSITION_INITIAL_APICID
205 #define ID_POSITION_INITIAL_APICID TRUE
206 #undef GET_PSTATE_POWER
207 #define GET_PSTATE_POWER TRUE
208 #undef GET_PSTATE_FREQ
209 #define GET_PSTATE_FREQ TRUE
210 #undef TRANSITION_PSTATE
211 #define TRANSITION_PSTATE TRUE
213 #define PROC_IDD_MAX TRUE
214 #undef GET_AP_CORE_NUMBER
215 #define GET_AP_CORE_NUMBER TRUE
216 #undef GET_PSTATE_REGISTER_INFO
217 #define GET_PSTATE_REGISTER_INFO TRUE
218 #undef GET_PSTATE_MAX_STATE
219 #define GET_PSTATE_MAX_STATE TRUE
220 #undef SET_PSTATE_LEVELING_REG
221 #define SET_PSTATE_LEVELING_REG TRUE
222 #undef SET_WARM_RESET_FLAG
223 #define SET_WARM_RESET_FLAG TRUE
224 #undef GET_WARM_RESET_FLAG
225 #define GET_WARM_RESET_FLAG TRUE
227 #define SAVE_FEATURES TRUE
228 #undef WRITE_FEATURES
229 #define WRITE_FEATURES TRUE
231 #define GET_CFOH_REG TRUE
232 #undef IS_NB_PSTATE_ENABLED
233 #define IS_NB_PSTATE_ENABLED TRUE
236 #if AGESA_ENTRY_INIT_ENV == TRUE
239 #if AGESA_ENTRY_INIT_MID == TRUE
242 #if AGESA_ENTRY_INIT_LATE == TRUE
243 #undef GET_AP_CORE_NUMBER
244 #define GET_AP_CORE_NUMBER TRUE
245 #undef GET_PSTATE_FREQ
246 #define GET_PSTATE_FREQ TRUE
247 #undef TRANSITION_PSTATE
248 #define TRANSITION_PSTATE TRUE
249 #undef PSTATE_TRANSITION_LATENCY
250 #define PSTATE_TRANSITION_LATENCY TRUE
252 #define GET_WHEA_INIT TRUE
253 #undef GET_PLATFORM_TYPE_SPECIFIC_INFO
254 #define GET_PLATFORM_TYPE_SPECIFIC_INFO TRUE
256 #define GET_TSC_RATE TRUE
258 #define BRAND_STRING1 TRUE
260 #define BRAND_STRING2 TRUE
263 #if AGESA_ENTRY_INIT_S3SAVE == TRUE
266 #if AGESA_ENTRY_INIT_RESUME == TRUE
268 #define GET_CFOH_REG TRUE
271 #if AGESA_ENTRY_INIT_LATE_RESTORE == TRUE
274 #if AGESA_ENTRY_INIT_GENERAL_SERVICES == TRUE
275 #undef ID_POSITION_INITIAL_APICID
276 #define ID_POSITION_INITIAL_APICID TRUE
280 * Initialize PCI MMIO mask to 0
282 #define FAMILY_MMIO_BASE_MASK (0ull)
286 * Initialize all families to disabled
288 #define OPT_F10_TABLE
289 #define OPT_F12_TABLE
290 #define OPT_F14_TABLE
291 #define OPT_F15_TABLE
293 #define OPT_F10_ID_TABLE
294 #define OPT_F12_ID_TABLE
295 #define OPT_F14_ID_TABLE
296 #define OPT_F15_ID_TABLE
300 * Install family specific support
302 #if (OPTION_FAMILY10H == TRUE)
303 #include "OptionFamily10hInstall.h"
306 #if (OPTION_FAMILY12H == TRUE)
307 #include "OptionFamily12hInstall.h"
310 #if (OPTION_FAMILY14H == TRUE)
311 #include "OptionFamily14hInstall.h"
314 #if (OPTION_FAMILY15H_OR == TRUE) || (OPTION_FAMILY15H_TN == TRUE) || (OPTION_FAMILY15H_KM == TRUE)
315 #include "OptionFamily15hInstall.h"
320 * Process PCI MMIO mask
323 // If size is 0, but base is not, break the build.
324 #if (CFG_PCI_MMIO_BASE != 0) && (CFG_PCI_MMIO_SIZE == 0)
325 #error BLDCFG: Invalid PCI MMIO size -- acceptable values are 1, 2, 4, 8, 16, 32, 64, 128, and 256
328 // If base is 0, but size is not, break the build.
329 #if (CFG_PCI_MMIO_BASE == 0) && (CFG_PCI_MMIO_SIZE != 0)
330 #error BLDCFG: Invalid PCI MMIO base -- must be 8MB or greater
333 #if (CFG_PCI_MMIO_BASE != 0) && (CFG_PCI_MMIO_SIZE != 0)
334 // Both are non-zero, begin further processing.
336 // Heap runs from 4MB to 8MB. Disallow any addresses below 8MB.
337 #if (CFG_PCI_MMIO_BASE < 0x800000)
338 #error BLDCFG: Invalid PCI MMIO base -- must be 8MB or greater
341 // Break the build if the address is too high for the enabled families.
342 #if ((CFG_PCI_MMIO_BASE & FAMILY_MMIO_BASE_MASK) != 0)
343 #error BLDCFG: Invalid PCI MMIO base address for the installed CPU families
346 // If the size parameter is not valid, break the build.
347 #if (CFG_PCI_MMIO_SIZE != 1) && (CFG_PCI_MMIO_SIZE != 2) && (CFG_PCI_MMIO_SIZE != 4) && (CFG_PCI_MMIO_SIZE != 8) && (CFG_PCI_MMIO_SIZE != 16)
348 #if (CFG_PCI_MMIO_SIZE != 32) && (CFG_PCI_MMIO_SIZE != 64) && (CFG_PCI_MMIO_SIZE != 128) && (CFG_PCI_MMIO_SIZE != 256)
349 #error BLDCFG: Invalid PCI MMIO size -- acceptable values are 1, 2, 4, 8, 16, 32, 64, 128, and 256
353 #define PCI_MMIO_ALIGNMENT ((0x100000 * CFG_PCI_MMIO_SIZE) - 1)
354 // If the base is not aligned according to size, break the build.
355 #if ((CFG_PCI_MMIO_BASE & PCI_MMIO_ALIGNMENT) != 0)
356 #error BLDCFG: Invalid PCI MMIO base -- must be properly aligned according to MMIO size
358 #undef PCI_MMIO_ALIGNMENT
362 * Process sockets / modules
364 #ifndef ADVCFG_PLATFORM_SOCKETS
365 #error BLDOPT Set Family supported sockets.
367 #ifndef ADVCFG_PLATFORM_MODULES
368 #error BLDOPT Set Family supported modules.
371 CONST OPTIONS_CONFIG_TOPOLOGY ROMDATA TopologyConfiguration =
373 ADVCFG_PLATFORM_SOCKETS,
374 ADVCFG_PLATFORM_MODULES
378 * Instantiate global data needed for processor identification
380 CONST CPU_SPECIFIC_SERVICES_XLAT ROMDATA CpuSupportedFamiliesArray[] =
388 CONST CPU_FAMILY_SUPPORT_TABLE ROMDATA CpuSupportedFamiliesTable =
390 (sizeof (CpuSupportedFamiliesArray) / sizeof (CPU_SPECIFIC_SERVICES_XLAT)),
391 &CpuSupportedFamiliesArray[0]
395 CONST CPU_LOGICAL_ID_FAMILY_XLAT ROMDATA CpuSupportedFamilyIdArray[] =
403 CONST CPU_FAMILY_ID_XLAT_TABLE ROMDATA CpuSupportedFamilyIdTable =
405 (sizeof (CpuSupportedFamilyIdArray) / sizeof (CPU_LOGICAL_ID_FAMILY_XLAT)),
406 CpuSupportedFamilyIdArray