5 * AMD CPU Power Management Single Socket Functions.
7 * Contains code for doing power management for single socket CPU
9 * @xrefitem bom "File Content Label" "Release Content"
12 * @e \$Revision: 48937 $ @e \$Date: 2011-03-15 03:37:15 +0800 (Tue, 15 Mar 2011) $
16 ******************************************************************************
18 * Copyright (c) 2011, Advanced Micro Devices, Inc.
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42 ******************************************************************************
45 /*----------------------------------------------------------------------------------------
46 * M O D U L E S U S E D
47 *----------------------------------------------------------------------------------------
52 #include "GeneralServices.h"
53 #include "cpuRegisters.h"
54 #include "cpuApicUtilities.h"
55 #include "cpuFamilyTranslation.h"
56 #include "cpuPowerMgmtSystemTables.h"
57 #include "cpuPowerMgmtSingleSocket.h"
60 RDATA_GROUP (G1_PEICC)
62 #define FILECODE PROC_CPU_CPUPOWERMGMTSINGLESOCKET_FILECODE
63 /*----------------------------------------------------------------------------------------
64 * D E F I N I T I O N S A N D M A C R O S
65 *----------------------------------------------------------------------------------------
68 /*----------------------------------------------------------------------------------------
69 * T Y P E D E F S A N D S T R U C T U R E S
70 *----------------------------------------------------------------------------------------
73 /*----------------------------------------------------------------------------------------
74 * P R O T O T Y P E S O F L O C A L F U N C T I O N S
75 *----------------------------------------------------------------------------------------
78 /*----------------------------------------------------------------------------------------
79 * E X P O R T E D F U N C T I O N S
80 *----------------------------------------------------------------------------------------
83 /*---------------------------------------------------------------------------------------*/
85 * Single socket BSC call to start all system core 0s to perform a standard AP_TASK.
87 * This function will simply invoke the task on the executing core. This must be
88 * run by the system BSC only.
90 * @param[in] TaskPtr Function descriptor
91 * @param[in] StdHeader Config handle for library and services
92 * @param[in] ConfigParams AMD entry point's CPU parameter structure
96 RunCodeOnAllSystemCore0sSingle (
98 IN AMD_CONFIG_PARAMS *StdHeader,
102 ApUtilTaskOnExecutingCore (TaskPtr, StdHeader, ConfigParams);
106 /*---------------------------------------------------------------------------------------*/
108 * Single socket BSC call to determine the maximum number of steps that any single
109 * processor needs to execute.
111 * This function simply returns the number of steps that the BSC needs.
113 * @param[out] NumSystemSteps Maximum number of system steps required
114 * @param[in] StdHeader Config handle for library and services
118 GetNumberOfSystemPmStepsPtrSingle (
119 OUT UINT8 *NumSystemSteps,
120 IN AMD_CONFIG_PARAMS *StdHeader
123 SYS_PM_TBL_STEP *Ignored;
124 CPU_SPECIFIC_SERVICES *FamilySpecificServices;
126 GetCpuServicesOfCurrentCore ((const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
127 FamilySpecificServices->GetSysPmTableStruct (FamilySpecificServices, (const VOID **)&Ignored, NumSystemSteps, StdHeader);
131 /*---------------------------------------------------------------------------------------*/
133 * Single socket call to determine the frequency that the northbridges must run.
135 * This function simply returns the executing core's NB frequency, and that all
136 * NB frequencies are equivalent.
138 * @param[in] NbPstate NB P-state number to check (0 = fastest)
139 * @param[in] PlatformConfig Platform profile/build option config structure.
140 * @param[out] SystemNbCofNumerator NB frequency numerator for the system in MHz
141 * @param[out] SystemNbCofDenominator NB frequency denominator for the system
142 * @param[out] SystemNbCofsMatch Whether or not all NB frequencies are equivalent
143 * @param[out] NbPstateIsEnabledOnAllCPUs Whether or not NbPstate is valid on all CPUs
144 * @param[in] StdHeader Config handle for library and services
146 * @retval TRUE At least one processor has NbPstate enabled.
147 * @retval FALSE NbPstate is disabled on all CPUs
151 GetSystemNbCofSingle (
153 IN PLATFORM_CONFIGURATION *PlatformConfig,
154 OUT UINT32 *SystemNbCofNumerator,
155 OUT UINT32 *SystemNbCofDenominator,
156 OUT BOOLEAN *SystemNbCofsMatch,
157 OUT BOOLEAN *NbPstateIsEnabledOnAllCPUs,
158 IN AMD_CONFIG_PARAMS *StdHeader
163 CPU_SPECIFIC_SERVICES *FamilySpecificServices;
165 PciAddress.AddressValue = MAKE_SBDFO (0, 0, 24, 0, 0);
166 *SystemNbCofsMatch = TRUE;
167 GetCpuServicesOfCurrentCore ((const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
168 *NbPstateIsEnabledOnAllCPUs = FamilySpecificServices->GetNbPstateInfo (FamilySpecificServices,
172 SystemNbCofNumerator,
173 SystemNbCofDenominator,
176 return *NbPstateIsEnabledOnAllCPUs;
180 /*---------------------------------------------------------------------------------------*/
182 * Single socket call to determine if the BIOS is responsible for updating the
183 * northbridge operating frequency and voltage.
185 * This function simply returns whether or not the executing core needs NB COF
188 * @param[in] StdHeader Config handle for library and services
190 * @retval TRUE BIOS needs to set up NB frequency and voltage
191 * @retval FALSE BIOS does not need to set up NB frequency and voltage
195 GetSystemNbCofVidUpdateSingle (
196 IN AMD_CONFIG_PARAMS *StdHeader
201 CPU_SPECIFIC_SERVICES *FamilySpecificServices;
203 PciAddress.AddressValue = MAKE_SBDFO (0, 0, 24, 0, 0);
204 GetCpuServicesOfCurrentCore ((const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
205 return (FamilySpecificServices->IsNbCofInitNeeded (FamilySpecificServices, &PciAddress, &Ignored, StdHeader));
209 /*---------------------------------------------------------------------------------------*/
211 * Single socket call to determine the most severe AGESA_STATUS return value after
212 * processing the power management initialization tables.
214 * This function searches the event log for the most severe error and returns
215 * the status code. This function must be called by the BSC only.
217 * @param[in] StdHeader Config handle for library and services
219 * @return The most severe error code from power management init
223 GetEarlyPmErrorsSingle (
224 IN AMD_CONFIG_PARAMS *StdHeader
228 AGESA_EVENT EventLogEntry;
229 AGESA_STATUS ReturnCode;
231 ASSERT (IsBsp (StdHeader, &ReturnCode));
233 ReturnCode = AGESA_SUCCESS;
234 for (i = 0; PeekEventLog (&EventLogEntry, i, StdHeader); i++) {
235 if ((EventLogEntry.EventInfo & CPU_EVENT_PM_EVENT_MASK) == CPU_EVENT_PM_EVENT_CLASS) {
236 if (EventLogEntry.EventClass > ReturnCode) {
237 ReturnCode = EventLogEntry.EventClass;
246 * Single socket call to loop through all Nb Pstates, comparing the NB frequencies
247 * to determine the slowest in the system. This routine also returns the NB P0 frequency.
249 * @param[in] PlatformConfig Platform profile/build option config structure.
250 * @param[out] MinSysNbFreq NB frequency numerator for the system in MHz
251 * @param[out] MinP0NbFreq NB frequency numerator for P0 in MHz
252 * @param[in] StdHeader Config handle for library and services
256 IN PLATFORM_CONFIGURATION *PlatformConfig,
257 OUT UINT32 *MinSysNbFreq,
258 OUT UINT32 *MinP0NbFreq,
259 IN AMD_CONFIG_PARAMS *StdHeader
263 CPU_SPECIFIC_SERVICES *FamilySpecificServices;
265 PciAddress.AddressValue = MAKE_SBDFO (0, 0, 24, 0, 0);
266 GetCpuServicesOfCurrentCore ((const CPU_SPECIFIC_SERVICES **) &FamilySpecificServices, StdHeader);
267 FamilySpecificServices->GetMinMaxNbFrequency (FamilySpecificServices,