5 * AMD CPU Power Management Multisocket Functions.
7 * Contains code for doing power management for multisocket CPUs
9 * @xrefitem bom "File Content Label" "Release Content"
12 * @e \$Revision: 48937 $ @e \$Date: 2011-03-15 03:37:15 +0800 (Tue, 15 Mar 2011) $
16 ******************************************************************************
18 * Copyright (c) 2011, Advanced Micro Devices, Inc.
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42 ******************************************************************************
45 /*----------------------------------------------------------------------------------------
46 * M O D U L E S U S E D
47 *----------------------------------------------------------------------------------------
53 #include "cpuRegisters.h"
54 #include "GeneralServices.h"
55 #include "cpuServices.h"
56 #include "cpuApicUtilities.h"
57 #include "cpuFamilyTranslation.h"
58 #include "cpuPowerMgmtSystemTables.h"
59 #include "cpuPowerMgmtMultiSocket.h"
60 #include "GeneralServices.h"
63 RDATA_GROUP (G1_PEICC)
65 #define FILECODE PROC_CPU_CPUPOWERMGMTMULTISOCKET_FILECODE
66 /*----------------------------------------------------------------------------------------
67 * D E F I N I T I O N S A N D M A C R O S
68 *----------------------------------------------------------------------------------------
71 /*----------------------------------------------------------------------------------------
72 * T Y P E D E F S A N D S T R U C T U R E S
73 *----------------------------------------------------------------------------------------
76 /*----------------------------------------------------------------------------------------
77 * P R O T O T Y P E S O F L O C A L F U N C T I O N S
78 *----------------------------------------------------------------------------------------
83 IN OUT VOID *EventLogEntryPtr,
84 IN AMD_CONFIG_PARAMS *StdHeader
87 /*----------------------------------------------------------------------------------------
88 * E X P O R T E D F U N C T I O N S
89 *----------------------------------------------------------------------------------------
92 /*---------------------------------------------------------------------------------------*/
94 * Multisocket BSC call to start all system core 0s to perform a standard AP_TASK.
96 * This function loops through all possible socket locations, starting core 0 of
97 * each populated socket to perform the passed in AP_TASK. After starting all
98 * other core 0s, the BSC will perform the AP_TASK as well. This must be run by
99 * the system BSC only.
101 * @param[in] TaskPtr Function descriptor
102 * @param[in] StdHeader Config handle for library and services
103 * @param[in] ConfigParams AMD entry point's CPU parameter structure
107 RunCodeOnAllSystemCore0sMulti (
109 IN AMD_CONFIG_PARAMS *StdHeader,
110 IN VOID *ConfigParams
117 UINT32 NumberOfSockets;
118 AGESA_STATUS DummyStatus;
120 ASSERT (IsBsp (StdHeader, &DummyStatus));
122 NumberOfSockets = GetPlatformNumberOfSockets ();
124 IdentifyCore (StdHeader, &BscSocket, &BscModule, &BscCoreNum, &DummyStatus);
126 for (Socket = 0; Socket < NumberOfSockets; Socket++) {
127 if (Socket != BscSocket) {
128 if (IsProcessorPresent (Socket, StdHeader)) {
129 ApUtilRunCodeOnSocketCore (Socket, 0, TaskPtr, StdHeader);
133 ApUtilTaskOnExecutingCore (TaskPtr, StdHeader, ConfigParams);
137 /*---------------------------------------------------------------------------------------*/
139 * Multisocket BSC call to determine the maximum number of steps that any single
140 * processor needs to execute.
142 * This function loops through all possible socket locations, gathering the number
143 * of power management steps each populated socket requires, and returns the
146 * @param[out] NumSystemSteps Maximum number of system steps required
147 * @param[in] StdHeader Config handle for library and services
151 GetNumberOfSystemPmStepsPtrMulti (
152 OUT UINT8 *NumSystemSteps,
153 IN AMD_CONFIG_PARAMS *StdHeader
157 UINT32 NumberOfSockets;
159 SYS_PM_TBL_STEP *Ignored;
160 CPU_SPECIFIC_SERVICES *FamilySpecificServices;
162 NumberOfSockets = GetPlatformNumberOfSockets ();
165 for (Socket = 0; Socket < NumberOfSockets; Socket++) {
166 if (IsProcessorPresent (Socket, StdHeader)) {
167 GetCpuServicesOfSocket (Socket, (const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
168 FamilySpecificServices->GetSysPmTableStruct (FamilySpecificServices, (const VOID **)&Ignored, &NumberOfSteps, StdHeader);
169 if (NumberOfSteps > *NumSystemSteps) {
170 *NumSystemSteps = NumberOfSteps;
177 /*---------------------------------------------------------------------------------------*/
179 * Multisocket call to determine the frequency that the northbridges must run.
181 * This function loops through all possible socket locations, comparing the
182 * maximum NB frequencies to determine the slowest. This function also
183 * determines if all coherent NB frequencies are equivalent.
185 * @param[in] NbPstate NB P-state number to check (0 = fastest)
186 * @param[in] PlatformConfig Platform profile/build option config structure.
187 * @param[out] SystemNbCofNumerator NB frequency numerator for the system in MHz
188 * @param[out] SystemNbCofDenominator NB frequency denominator for the system
189 * @param[out] SystemNbCofsMatch Whether or not all NB frequencies are equivalent
190 * @param[out] NbPstateIsEnabledOnAllCPUs Whether or not NbPstate is valid on all CPUs
191 * @param[in] StdHeader Config handle for library and services
193 * @retval TRUE At least one processor has NbPstate enabled.
194 * @retval FALSE NbPstate is disabled on all CPUs
198 GetSystemNbCofMulti (
200 IN PLATFORM_CONFIGURATION *PlatformConfig,
201 OUT UINT32 *SystemNbCofNumerator,
202 OUT UINT32 *SystemNbCofDenominator,
203 OUT BOOLEAN *SystemNbCofsMatch,
204 OUT BOOLEAN *NbPstateIsEnabledOnAllCPUs,
205 IN AMD_CONFIG_PARAMS *StdHeader
211 UINT32 CurrentDivisor;
215 BOOLEAN FirstCofNotFound;
216 BOOLEAN NbPstateDisabled;
217 BOOLEAN IsNbPstateEnabledOnAny;
219 AGESA_STATUS Ignored;
220 CPU_SPECIFIC_SERVICES *FamilySpecificServices;
222 // Find the slowest NB COF in the system & whether or not all are equivalent
223 LowFrequency = 0xFFFFFFFF;
224 *SystemNbCofsMatch = TRUE;
225 *NbPstateIsEnabledOnAllCPUs = FALSE;
226 IsNbPstateEnabledOnAny = FALSE;
227 FirstCofNotFound = TRUE;
228 NbPstateDisabled = FALSE;
229 for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) {
230 if (IsProcessorPresent (Socket, StdHeader)) {
231 GetCpuServicesOfSocket (Socket, (const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
232 for (Module = 0; Module < GetPlatformNumberOfModules (); Module++) {
233 if (GetPciAddress (StdHeader, Socket, Module, &PciAddress, &Ignored)) {
237 if (FamilySpecificServices->GetNbPstateInfo (FamilySpecificServices,
245 ASSERT (CurrentDivisor != 0);
246 CurrentFreq = (CurrentNbCof / CurrentDivisor);
247 if (FirstCofNotFound) {
248 *SystemNbCofNumerator = CurrentNbCof;
249 *SystemNbCofDenominator = CurrentDivisor;
250 LowFrequency = CurrentFreq;
251 IsNbPstateEnabledOnAny = TRUE;
252 if (!NbPstateDisabled) {
253 *NbPstateIsEnabledOnAllCPUs = TRUE;
255 FirstCofNotFound = FALSE;
257 if (CurrentFreq != LowFrequency) {
258 *SystemNbCofsMatch = FALSE;
259 if (CurrentFreq < LowFrequency) {
260 LowFrequency = CurrentFreq;
261 *SystemNbCofNumerator = CurrentNbCof;
262 *SystemNbCofDenominator = CurrentDivisor;
267 NbPstateDisabled = TRUE;
268 *NbPstateIsEnabledOnAllCPUs = FALSE;
272 return IsNbPstateEnabledOnAny;
276 /*---------------------------------------------------------------------------------------*/
278 * Multisocket call to determine if the BIOS is responsible for updating the
279 * northbridge operating frequency and voltage.
281 * This function loops through all possible socket locations, checking whether
282 * any populated sockets require NB COF VID programming.
284 * @param[in] StdHeader Config handle for library and services
286 * @retval TRUE BIOS needs to set up NB frequency and voltage
287 * @retval FALSE BIOS does not need to set up NB frequency and voltage
291 GetSystemNbCofVidUpdateMulti (
292 IN AMD_CONFIG_PARAMS *StdHeader
297 UINT32 NumberOfSockets;
299 BOOLEAN AtLeast1RequiresUpdate;
301 AGESA_STATUS Ignored;
302 CPU_SPECIFIC_SERVICES *FamilySpecificServices;
304 NumberOfSockets = GetPlatformNumberOfSockets ();
306 AtLeast1RequiresUpdate = FALSE;
307 for (Socket = 0; Socket < NumberOfSockets; Socket++) {
308 if (IsProcessorPresent (Socket, StdHeader)) {
309 GetCpuServicesOfSocket (Socket, (const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
310 for (Module = 0; Module < GetPlatformNumberOfModules (); Module++) {
311 if (GetPciAddress (StdHeader, (UINT8) Socket, Module, &PciAddress, &Ignored)) {
315 if (FamilySpecificServices->IsNbCofInitNeeded (FamilySpecificServices, &PciAddress, &IgnoredBool, StdHeader)) {
316 AtLeast1RequiresUpdate = TRUE;
321 return AtLeast1RequiresUpdate;
325 /*---------------------------------------------------------------------------------------*/
327 * Multisocket call to determine the most severe AGESA_STATUS return value after
328 * processing the power management initialization tables.
330 * This function loops through all possible socket locations, collecting any
331 * power management initialization errors that may have occurred. These errors
332 * are transferred from the core 0s of the socket in which the errors occurred
333 * to the BSC's heap. The BSC's heap is then searched for the most severe error
334 * that occurred, and returns it. This function must be called by the BSC only.
336 * @param[in] StdHeader Config handle for library and services
338 * @return The most severe error code from power management init
342 GetEarlyPmErrorsMulti (
343 IN AMD_CONFIG_PARAMS *StdHeader
351 UINT32 NumberOfSockets;
353 AGESA_EVENT EventLogEntry;
354 AGESA_STATUS ReturnCode;
355 AGESA_STATUS DummyStatus;
357 ASSERT (IsBsp (StdHeader, &ReturnCode));
359 ReturnCode = AGESA_SUCCESS;
360 EventLogEntry.EventClass = AGESA_SUCCESS;
361 EventLogEntry.EventInfo = 0;
362 EventLogEntry.DataParam1 = 0;
363 EventLogEntry.DataParam2 = 0;
364 EventLogEntry.DataParam3 = 0;
365 EventLogEntry.DataParam4 = 0;
367 NumberOfSockets = GetPlatformNumberOfSockets ();
368 IdentifyCore (StdHeader, &BscSocket, &BscModule, &BscCoreNum, &DummyStatus);
370 TaskPtr.FuncAddress.PfApTaskI = GetNextEvent;
371 TaskPtr.DataTransfer.DataSizeInDwords = SIZE_IN_DWORDS (AGESA_EVENT);
372 TaskPtr.DataTransfer.DataPtr = &EventLogEntry;
373 TaskPtr.DataTransfer.DataTransferFlags = 0;
374 TaskPtr.ExeFlags = WAIT_FOR_CORE | RETURN_PARAMS;
375 for (Socket = 0; Socket < NumberOfSockets; Socket++) {
376 if (Socket != BscSocket) {
377 if (IsProcessorPresent (Socket, StdHeader)) {
379 ApUtilRunCodeOnSocketCore ((UINT8)Socket, (UINT8) 0, &TaskPtr, StdHeader);
380 if ((EventLogEntry.EventInfo & CPU_EVENT_PM_EVENT_MASK) == CPU_EVENT_PM_EVENT_CLASS) {
382 EventLogEntry.EventClass,
383 EventLogEntry.EventInfo,
384 EventLogEntry.DataParam1,
385 EventLogEntry.DataParam2,
386 EventLogEntry.DataParam3,
387 EventLogEntry.DataParam4,
391 } while (EventLogEntry.EventInfo != 0);
396 for (i = 0; PeekEventLog (&EventLogEntry, i, StdHeader); i++) {
397 if ((EventLogEntry.EventInfo & CPU_EVENT_PM_EVENT_MASK) == CPU_EVENT_PM_EVENT_CLASS) {
398 if (EventLogEntry.EventClass > ReturnCode) {
399 ReturnCode = EventLogEntry.EventClass;
407 * Multisocket call to loop through all possible socket locations and Nb Pstates,
408 * comparing the NB frequencies to determine the slowest system and P0 frequency
410 * @param[in] PlatformConfig Platform profile/build option config structure.
411 * @param[out] MinSysNbFreq NB frequency numerator for the system in MHz
412 * @param[out] MinP0NbFreq NB frequency numerator for P0 in MHz
413 * @param[in] StdHeader Config handle for library and services
417 IN PLATFORM_CONFIGURATION *PlatformConfig,
418 OUT UINT32 *MinSysNbFreq,
419 OUT UINT32 *MinP0NbFreq,
420 IN AMD_CONFIG_PARAMS *StdHeader
428 AGESA_STATUS Ignored;
429 CPU_SPECIFIC_SERVICES *FamilySpecificServices;
431 *MinSysNbFreq = 0xFFFFFFFF;
432 *MinP0NbFreq = 0xFFFFFFFF;
434 for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) {
435 if (IsProcessorPresent (Socket, StdHeader)) {
436 GetCpuServicesOfSocket (Socket, (const CPU_SPECIFIC_SERVICES **) &FamilySpecificServices, StdHeader);
437 for (Module = 0; Module < GetPlatformNumberOfModules (); Module++) {
438 if (GetPciAddress (StdHeader, Socket, Module, &PciAddress, &Ignored )) {
444 FamilySpecificServices->GetMinMaxNbFrequency (FamilySpecificServices,
450 // Determine the slowest NB Pmin frequency
451 if (CurrMinFreq < *MinSysNbFreq) {
452 *MinSysNbFreq = CurrMinFreq;
455 // Determine the slowest NB P0 frequency
456 if (CurrMaxFreq < *MinP0NbFreq) {
457 *MinP0NbFreq = CurrMaxFreq;
463 /*---------------------------------------------------------------------------------------
464 * L O C A L F U N C T I O N S
465 *---------------------------------------------------------------------------------------
468 /*---------------------------------------------------------------------------------------*/
470 * AP task to return the next event log entry to the BSC.
472 * This function calls to the event log manager to retrieve the next error out
475 * @param[out] EventLogEntryPtr The AP's next event log entry
476 * @param[in] StdHeader Config handle for library and services
482 IN OUT VOID *EventLogEntryPtr,
483 IN AMD_CONFIG_PARAMS *StdHeader
486 GetEventLog ((AGESA_EVENT *) EventLogEntryPtr, StdHeader);