5 * AMD CPU Power Management functions.
7 * Contains code for doing early power management
9 * @xrefitem bom "File Content Label" "Release Content"
12 * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $
16 ****************************************************************************
18 * Copyright (c) 2011, Advanced Micro Devices, Inc.
19 * All rights reserved.
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22 * modification, are permitted provided that the following conditions are met:
23 * * Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * * Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
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29 * its contributors may be used to endorse or promote products derived
30 * from this software without specific prior written permission.
32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
34 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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36 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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41 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 ******************************************************************************
45 /*----------------------------------------------------------------------------------------
46 * M O D U L E S U S E D
47 *----------------------------------------------------------------------------------------
52 #include "cpuRegisters.h"
53 #include "cpuFamilyTranslation.h"
54 #include "OptionMultiSocket.h"
55 #include "cpuApicUtilities.h"
56 #include "cpuEarlyInit.h"
57 #include "cpuPowerMgmtSystemTables.h"
58 #include "cpuServices.h"
61 RDATA_GROUP (G1_PEICC)
63 #define FILECODE PROC_CPU_CPUPOWERMGMT_FILECODE
64 /*----------------------------------------------------------------------------------------
65 * D E F I N I T I O N S A N D M A C R O S
66 *----------------------------------------------------------------------------------------
69 /*----------------------------------------------------------------------------------------
70 * T Y P E D E F S A N D S T R U C T U R E S
71 *----------------------------------------------------------------------------------------
74 /*----------------------------------------------------------------------------------------
75 * P R O T O T Y P E S O F L O C A L F U N C T I O N S
76 *----------------------------------------------------------------------------------------
82 IN AMD_CONFIG_PARAMS *StdHeader,
83 IN AMD_CPU_EARLY_PARAMS *CpuEarlyParamsPtr
88 GoToMemInitPstateCore0 (
89 IN AMD_CONFIG_PARAMS *StdHeader,
90 IN AMD_CPU_EARLY_PARAMS *CpuEarlyParamsPtr
95 GoToMemInitPstateCore (
96 IN AMD_CONFIG_PARAMS *StdHeader,
97 IN AMD_CPU_EARLY_PARAMS *CpuEarlyParamsPtr
100 /*----------------------------------------------------------------------------------------
101 * E X P O R T E D F U N C T I O N S
102 *----------------------------------------------------------------------------------------
104 extern OPTION_MULTISOCKET_CONFIGURATION OptionMultiSocketConfiguration;
106 /*---------------------------------------------------------------------------------------*/
108 * Perform the "BIOS Requirements for P-State Initialization and Transitions."
110 * This is the generic arbiter code to be executed by the BSC. The system power
111 * management init tables will be traversed. This must be run by the system BSC
114 * @param[in] CpuEarlyParams Required input parameters for early CPU initialization
115 * @param[in] StdHeader Config handle for library and services
117 * @return Most severe AGESA_STATUS level that any system processor encountered
121 PmInitializationAtEarly (
122 IN AMD_CPU_EARLY_PARAMS *CpuEarlyParams,
123 IN AMD_CONFIG_PARAMS *StdHeader
127 UINT8 NumberOfSystemWideSteps;
129 AGESA_STATUS ReturnCode;
130 WARM_RESET_REQUEST Request;
132 // Determine the number of steps to perform
133 OptionMultiSocketConfiguration.GetNumberOfSystemPmSteps (&NumberOfSystemWideSteps, StdHeader);
135 // Traverse the PM init table
136 TaskPtr.FuncAddress.PfApTaskIC = PerformThisPmStep;
137 TaskPtr.DataTransfer.DataSizeInDwords = 1;
138 TaskPtr.DataTransfer.DataPtr = &i;
139 TaskPtr.DataTransfer.DataTransferFlags = 0;
140 TaskPtr.ExeFlags = PASS_EARLY_PARAMS;
141 for (i = 0; i < NumberOfSystemWideSteps; ++i) {
142 IDS_HDT_CONSOLE (CPU_TRACE, " Perform PM init step %d\n", i);
143 OptionMultiSocketConfiguration.BscRunCodeOnAllSystemCore0s (&TaskPtr, StdHeader, CpuEarlyParams);
146 // GoToMemInitPstateCore0 only if there is no pending warm reset.
147 GetWarmResetFlag (StdHeader, &Request);
148 if (Request.RequestBit == FALSE) {
149 TaskPtr.FuncAddress.PfApTaskC = GoToMemInitPstateCore0;
150 TaskPtr.DataTransfer.DataSizeInDwords = 0;
151 TaskPtr.ExeFlags = PASS_EARLY_PARAMS;
152 IDS_HDT_CONSOLE (CPU_TRACE, " Transition all cores to POST P-state\n");
153 OptionMultiSocketConfiguration.BscRunCodeOnAllSystemCore0s (&TaskPtr, StdHeader, CpuEarlyParams);
156 // Retrieve/Process any errors
157 ReturnCode = OptionMultiSocketConfiguration.BscRetrievePmEarlyInitErrors (StdHeader);
163 /*---------------------------------------------------------------------------------------*/
165 * Performs the next step in the executing core 0's family specific power
168 * This function determines if the input step is valid, and invokes the power
169 * management step if appropriate. This must be run by processor core 0s only.
171 * @param[in] Step Zero based step number
172 * @param[in] StdHeader Config handle for library and services
173 * @param[in] CpuEarlyParamsPtr Required input parameters for early CPU initialization
180 IN AMD_CONFIG_PARAMS *StdHeader,
181 IN AMD_CPU_EARLY_PARAMS *CpuEarlyParamsPtr
184 UINT8 MyNumberOfSteps;
185 SYS_PM_TBL_STEP *FamilyTablePtr;
186 CPU_SPECIFIC_SERVICES *FamilySpecificServices;
188 GetCpuServicesOfCurrentCore ((const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
189 FamilySpecificServices->GetSysPmTableStruct (FamilySpecificServices, (const VOID **)&FamilyTablePtr, &MyNumberOfSteps, StdHeader);
191 if (*(UINT8 *)Step < MyNumberOfSteps) {
192 if (FamilyTablePtr[*(UINT8 *)Step].FuncPtr != NULL) {
193 if (!(BOOLEAN) (FamilyTablePtr[*(UINT8 *)Step].ExeFlags & PM_EXEFLAGS_WARM_ONLY) ||
194 IsWarmReset (StdHeader)) {
195 FamilyTablePtr[*(UINT8 *)Step].FuncPtr (FamilySpecificServices, CpuEarlyParamsPtr, StdHeader);
202 /*---------------------------------------------------------------------------------------*/
204 * Transitions the executing processor to the desired P-state.
206 * This function implements the AMD_CPU_EARLY_PARAMS.MemInitPState parameter, and is
207 * run by all processor core 0s.
209 * @param[in] StdHeader Config handle for library and services
210 * @param[in] CpuEarlyParamsPtr Required input parameters for early CPU initialization
215 GoToMemInitPstateCore0 (
216 IN AMD_CONFIG_PARAMS *StdHeader,
217 IN AMD_CPU_EARLY_PARAMS *CpuEarlyParamsPtr
222 TaskPtr.FuncAddress.PfApTaskC = GoToMemInitPstateCore;
223 TaskPtr.DataTransfer.DataSizeInDwords = 0;
224 TaskPtr.ExeFlags = WAIT_FOR_CORE | PASS_EARLY_PARAMS;
225 ApUtilRunCodeOnAllLocalCoresAtEarly (&TaskPtr, StdHeader, CpuEarlyParamsPtr);
229 /*---------------------------------------------------------------------------------------*/
231 * Transitions the executing core to the desired P-state.
233 * This function implements the AMD_CPU_EARLY_PARAMS.MemInitPState parameter, and is
234 * run by all system cores.
236 * @param[in] StdHeader Config handle for library and services
237 * @param[in] CpuEarlyParamsPtr Required input parameters for early CPU initialization
242 GoToMemInitPstateCore (
243 IN AMD_CONFIG_PARAMS *StdHeader,
244 IN AMD_CPU_EARLY_PARAMS *CpuEarlyParamsPtr
247 CPU_SPECIFIC_SERVICES *FamilySpecificServices;
249 GetCpuServicesOfCurrentCore ((const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
250 FamilySpecificServices->TransitionPstate (FamilySpecificServices, CpuEarlyParamsPtr->MemInitPState, (BOOLEAN) FALSE, StdHeader);