1 /*********************************************************************************
3 * Copyright (c) 2011, Advanced Micro Devices, Inc.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
14 * its contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
19 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
20 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
21 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
24 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
26 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 ;*********************************************************************************/
29 #ifndef _OPTION_FCH_INSTALL_H_
30 #define _OPTION_FCH_INSTALL_H_
35 #define FCH_SUPPORT FALSE
39 /* ACPI block register offset definitions */
40 #define PM1_STATUS_OFFSET 0x00
41 #define PM1_ENABLE_OFFSET 0x02
42 #define PM_CONTROL_OFFSET 0x04
43 #define PM_TIMER_OFFSET 0x08
44 #define CPU_CONTROL_OFFSET 0x10
45 #define EVENT_STATUS_OFFSET 0x20
46 #define EVENT_ENABLE_OFFSET 0x24
49 #if FCH_SUPPORT == TRUE
53 #ifdef AGESA_ENTRY_INIT_RESET
54 #if AGESA_ENTRY_INIT_RESET == TRUE
55 extern FCH_TASK_ENTRY FchInitResetHwAcpiP;
56 extern FCH_TASK_ENTRY FchInitResetHwAcpi;
57 extern FCH_TASK_ENTRY FchInitResetAb;
58 extern FCH_TASK_ENTRY FchInitResetSpi;
59 extern FCH_TASK_ENTRY FchInitResetGec;
60 extern FCH_TASK_ENTRY FchInitResetSata;
61 extern FCH_TASK_ENTRY FchInitResetLpc;
62 extern FCH_TASK_ENTRY FchInitResetPcib;
63 extern FCH_TASK_ENTRY FchInitResetPcie;
64 extern FCH_TASK_ENTRY FchInitResetGpp;
65 extern FCH_TASK_ENTRY FchInitResetUsb;
66 extern FCH_TASK_ENTRY FchInitResetEhci;
67 extern FCH_TASK_ENTRY FchInitResetOhci;
68 extern FCH_TASK_ENTRY FchInitResetXhci;
69 extern FCH_TASK_ENTRY FchInitResetImc;
73 #ifdef AGESA_ENTRY_INIT_ENV
74 #if AGESA_ENTRY_INIT_ENV == TRUE
75 extern FCH_TASK_ENTRY FchInitEnvUsbXhci;
76 extern FCH_TASK_ENTRY FchInitEnvUsbOhci;
77 extern FCH_TASK_ENTRY FchInitEnvUsbEhci;
78 extern FCH_TASK_ENTRY FchInitEnvUsb;
79 extern FCH_TASK_ENTRY FchInitEnvAb;
80 extern FCH_TASK_ENTRY FchInitEnvGpp;
81 extern FCH_TASK_ENTRY FchInitEnvPcie;
82 extern FCH_TASK_ENTRY FchInitEnvPcib;
83 extern FCH_TASK_ENTRY FchInitEnvHwAcpiP;
84 extern FCH_TASK_ENTRY FchInitEnvHwAcpi;
85 extern FCH_TASK_ENTRY FchInitEnvAbSpecial;
86 extern FCH_TASK_ENTRY FchInitEnvSpi;
87 extern FCH_TASK_ENTRY FchInitEnvGec;
88 extern FCH_TASK_ENTRY FchInitEnvSata;
89 extern FCH_TASK_ENTRY FchInitEnvIde;
90 extern FCH_TASK_ENTRY FchInitEnvSd;
91 extern FCH_TASK_ENTRY FchInitEnvIr;
92 extern FCH_TASK_ENTRY FchInitEnvAzalia;
93 extern FCH_TASK_ENTRY FchInitEnvHwm;
94 extern FCH_TASK_ENTRY FchInitEnvImc;
98 #ifdef AGESA_ENTRY_INIT_MID
99 #if AGESA_ENTRY_INIT_MID == TRUE
100 extern FCH_TASK_ENTRY FchInitMidHwm;
101 extern FCH_TASK_ENTRY FchInitMidAzalia;
102 extern FCH_TASK_ENTRY FchInitMidGec;
103 extern FCH_TASK_ENTRY FchInitMidSata;
104 extern FCH_TASK_ENTRY FchInitMidIde;
105 extern FCH_TASK_ENTRY FchInitMidAb;
106 extern FCH_TASK_ENTRY FchInitMidUsb;
107 extern FCH_TASK_ENTRY FchInitMidUsbEhci;
108 extern FCH_TASK_ENTRY FchInitMidUsbOhci;
109 extern FCH_TASK_ENTRY FchInitMidUsbXhci;
110 extern FCH_TASK_ENTRY FchInitMidImc;
114 #ifdef AGESA_ENTRY_INIT_LATE
115 #if AGESA_ENTRY_INIT_LATE == TRUE
116 extern FCH_TASK_ENTRY FchInitLateHwAcpi;
117 extern FCH_TASK_ENTRY FchInitLateSpi;
118 extern FCH_TASK_ENTRY FchInitLateGec;
119 extern FCH_TASK_ENTRY FchInitLateSata;
120 extern FCH_TASK_ENTRY FchInitLateIde;
121 extern FCH_TASK_ENTRY FchInitLatePcib;
122 extern FCH_TASK_ENTRY FchInitLateAb;
123 extern FCH_TASK_ENTRY FchInitLatePcie;
124 extern FCH_TASK_ENTRY FchInitLateGpp;
125 extern FCH_TASK_ENTRY FchInitLateUsb;
126 extern FCH_TASK_ENTRY FchInitLateUsbEhci;
127 extern FCH_TASK_ENTRY FchInitLateUsbOhci;
128 extern FCH_TASK_ENTRY FchInitLateUsbXhci;
129 extern FCH_TASK_ENTRY FchInitLateImc;
130 extern FCH_TASK_ENTRY FchInitLateAzalia;
131 extern FCH_TASK_ENTRY FchInitLateHwm;
135 extern FCH_TASK_ENTRY FchTaskDummy;
136 /* FCH Interface entries */
137 extern FCH_INIT CommonFchInitStub;
139 /* FCH Interface entries */
140 #ifdef AGESA_ENTRY_INIT_RESET
141 #if AGESA_ENTRY_INIT_RESET == TRUE
142 extern FCH_INIT FchInitReset;
143 extern FCH_INIT FchResetConstructor;
145 #define FP_FCH_INIT_RESET &FchInitReset
146 #define FP_FCH_INIT_RESET_CONSTRUCT &FchResetConstructor
148 #define FP_FCH_INIT_RESET &CommonFchInitStub
149 #define FP_FCH_INIT_RESET_CONSTRUCT &CommonFchInitStub
153 #ifdef AGESA_ENTRY_INIT_ENV
154 #if AGESA_ENTRY_INIT_ENV == TRUE
155 extern FCH_INIT FchInitEnv;
156 extern FCH_INIT FchEnvConstructor;
158 #define FP_FCH_INIT_ENV &FchInitEnv
159 #define FP_FCH_INIT_ENV_CONSTRUCT &FchEnvConstructor
161 #define FP_FCH_INIT_ENV &CommonFchInitStub
162 #define FP_FCH_INIT_ENV_CONSTRUCT &CommonFchInitStub
166 #ifdef AGESA_ENTRY_INIT_MID
167 #if AGESA_ENTRY_INIT_MID == TRUE
168 extern FCH_INIT FchInitMid;
169 extern FCH_INIT FchMidConstructor;
171 #define FP_FCH_INIT_MID &FchInitMid
172 #define FP_FCH_INIT_MID_CONSTRUCT &FchMidConstructor
174 #define FP_FCH_INIT_MID &CommonFchInitStub
175 #define FP_FCH_INIT_MID_CONSTRUCT &CommonFchInitStub
179 #ifdef AGESA_ENTRY_INIT_LATE
180 #if AGESA_ENTRY_INIT_LATE == TRUE
181 extern FCH_INIT FchInitLate;
182 extern FCH_INIT FchLateConstructor;
184 #define FP_FCH_INIT_LATE &FchInitLate
185 #define FP_FCH_INIT_LATE_CONSTRUCT &FchLateConstructor
187 #define FP_FCH_INIT_LATE &CommonFchInitStub
188 #define FP_FCH_INIT_LATE_CONSTRUCT &CommonFchInitStub
192 /* FCH subcomponent build options */
193 #undef FCH_NO_HWACPI_SUPPORT
194 #undef FCH_NO_AB_SUPPORT
195 #undef FCH_NO_SPI_SUPPORT
196 #undef FCH_NO_GEC_SUPPORT
197 #undef FCH_NO_SATA_SUPPORT
198 #undef FCH_NO_IDE_SUPPORT
199 #undef FCH_NO_LPC_SUPPORT
200 #undef FCH_NO_PCIB_SUPPORT
201 #undef FCH_NO_PCIE_SUPPORT
202 #undef FCH_NO_GPP_SUPPORT
203 #undef FCH_NO_USB_SUPPORT
204 #undef FCH_NO_EHCI_SUPPORT
205 #undef FCH_NO_OHCI_SUPPORT
206 #undef FCH_NO_XHCI_SUPPORT
207 #undef FCH_NO_IMC_SUPPORT
208 #undef FCH_NO_SD_SUPPORT
209 #undef FCH_NO_IR_SUPPORT
210 #undef FCH_NO_AZALIA_SUPPORT
211 #undef FCH_NO_HWM_SUPPORT
213 // Following are determined by silicon characteristics
214 #if (OPTION_FAMILY14H_KR == TRUE)
215 #define FCH_NO_GPP_SUPPORT TRUE
216 #define FCH_NO_PCIB_SUPPORT TRUE
217 #define FCH_NO_PCIE_SUPPORT TRUE
220 #if (OPTION_FAMILY15H_TN == TRUE)
221 //#define FCH_NO_GEC_SUPPORT TRUE
223 #error FCH_SUPPORT: No chip type selected.
229 // Installable blocks depending on build switches
231 #ifndef FCH_NO_HWACPI_SUPPORT
232 #define BLOCK_HWACPI_SIZE sizeof (FCH_ACPI)
233 #define InstallFchInitResetHwAcpiP &FchInitResetHwAcpiP
234 #define InstallFchInitResetHwAcpi &FchInitResetHwAcpi
235 #define InstallFchInitEnvHwAcpiP &FchInitEnvHwAcpiP
236 #define InstallFchInitEnvHwAcpi &FchInitEnvHwAcpi
237 #define InstallFchInitMidHwAcpi &FchTaskDummy
238 #define InstallFchInitLateHwAcpi &FchInitLateHwAcpi
240 #define BLOCK_HWACPI_SIZE 0
241 #define InstallFchInitResetHwAcpiP &FchTaskDummy
242 #define InstallFchInitResetHwAcpi &FchTaskDummy
243 #define InstallFchInitEnvHwAcpi &FchTaskDummy
244 #define InstallFchInitMidHwAcpi &FchTaskDummy
245 #define InstallFchInitLateHwAcpi &FchTaskDummy
248 #ifndef FCH_NO_AB_SUPPORT
249 #define BLOCK_AB_SIZE sizeof (FCH_AB)
250 #define InstallFchInitResetAb &FchInitResetAb
251 #define InstallFchInitEnvAb &FchInitEnvAb
252 #define InstallFchInitEnvAbS &FchInitEnvAbSpecial
253 #define InstallFchInitMidAb &FchInitMidAb
254 #define InstallFchInitLateAb &FchInitLateAb
256 #define BLOCK_AB_SIZE 0
257 #define InstallFchInitResetAb &FchTaskDummy
258 #define InstallFchInitEnvAb &FchTaskDummy
259 #define InstallFchInitEnvAbS &FchTaskDummy
260 #define InstallFchInitMidAb &FchTaskDummy
261 #define InstallFchInitLateAb &FchTaskDummy
264 #ifndef FCH_NO_SPI_SUPPORT
265 #define BLOCK_SPI_SIZE sizeof (FCH_SPI)
266 #define InstallFchInitResetSpi &FchInitResetSpi
267 #define InstallFchInitEnvSpi &FchInitEnvSpi
268 #define InstallFchInitMidSpi &FchTaskDummy
269 #define InstallFchInitLateSpi &FchInitLateSpi
271 #define BLOCK_SPI_SIZE 0
272 #define InstallFchInitResetSpi &FchTaskDummy
273 #define InstallFchInitEnvSpi &FchTaskDummy
274 #define InstallFchInitMidSpi &FchTaskDummy
275 #define InstallFchInitLateSpi &FchTaskDummy
278 #ifndef FCH_NO_GEC_SUPPORT
279 #define BLOCK_GEC_SIZE sizeof (FCH_GEC)
280 #define InstallFchInitResetGec &FchInitResetGec
281 #define InstallFchInitEnvGec &FchInitEnvGec
282 #define InstallFchInitMidGec &FchInitMidGec
283 #define InstallFchInitLateGec &FchInitLateGec
285 #define BLOCK_GEC_SIZE 0
286 #define InstallFchInitResetGec &FchTaskDummy
287 #define InstallFchInitEnvGec &FchTaskDummy
288 #define InstallFchInitMidGec &FchTaskDummy
289 #define InstallFchInitLateGec &FchTaskDummy
292 #ifndef FCH_NO_SATA_SUPPORT
293 #define BLOCK_SATA_SIZE sizeof (FCH_SATA)
294 #define InstallFchInitResetSata &FchInitResetSata
295 #define InstallFchInitEnvSata &FchInitEnvSata
296 #define InstallFchInitMidSata &FchInitMidSata
297 #define InstallFchInitLateSata &FchInitLateSata
299 #define BLOCK_SATA_SIZE 0
300 #define InstallFchInitResetSata &FchTaskDummy
301 #define InstallFchInitEnvSata &FchTaskDummy
302 #define InstallFchInitMidSata &FchTaskDummy
303 #define InstallFchInitLateSata &FchTaskDummy
306 #ifndef FCH_NO_IDE_SUPPORT
307 #define BLOCK_IDE_SIZE sizeof (FCH_IDE)
308 #define InstallFchInitResetIde &FchTaskDummy
309 #define InstallFchInitEnvIde &FchInitEnvIde
310 #define InstallFchInitMidIde &FchInitMidIde
311 #define InstallFchInitLateIde &FchInitLateIde
313 #define BLOCK_IDE_SIZE 0
314 #define InstallFchInitResetIde &FchTaskDummy
315 #define InstallFchInitEnvIde &FchTaskDummy
316 #define InstallFchInitMidIde &FchTaskDummy
317 #define InstallFchInitLateIde &FchTaskDummy
320 #ifndef FCH_NO_LPC_SUPPORT
321 #define BLOCK_LPC_SIZE sizeof (FCH_LPC)
322 #define InstallFchInitResetLpc &FchInitResetLpc
323 #define InstallFchInitEnvLpc &FchTaskDummy
324 #define InstallFchInitMidLpc &FchTaskDummy
325 #define InstallFchInitLateLpc &FchTaskDummy
327 #define BLOCK_LPC_SIZE 0
328 #define InstallFchInitResetLpc &FchTaskDummy
329 #define InstallFchInitEnvLpc &FchTaskDummy
330 #define InstallFchInitMidLpc &FchTaskDummy
331 #define InstallFchInitLateLpc &FchTaskDummy
334 #ifndef FCH_NO_PCIB_SUPPORT
335 #define BLOCK_PCIB_SIZE sizeof (FCH_PCIB)
336 #define InstallFchInitResetPcib &FchInitResetPcib
337 #define InstallFchInitEnvPcib &FchInitEnvPcib
338 #define InstallFchInitMidPcib &FchTaskDummy
339 #define InstallFchInitLatePcib &FchInitLatePcib
341 #define BLOCK_PCIB_SIZE 0
342 #define InstallFchInitResetPcib &FchTaskDummy
343 #define InstallFchInitEnvPcib &FchTaskDummy
344 #define InstallFchInitMidPcib &FchTaskDummy
345 #define InstallFchInitLatePcib &FchTaskDummy
348 #ifndef FCH_NO_PCIE_SUPPORT
349 #define InstallFchInitResetPcie &FchInitResetPcie
350 #define InstallFchInitEnvPcie &FchInitEnvPcie
351 #define InstallFchInitMidPcie &FchTaskDummy
352 #define InstallFchInitLatePcie &FchInitLatePcie
354 #define InstallFchInitResetPcie &FchTaskDummy
355 #define InstallFchInitEnvPcie &FchTaskDummy
356 #define InstallFchInitMidPcie &FchTaskDummy
357 #define InstallFchInitLatePcie &FchTaskDummy
360 #ifndef FCH_NO_GPP_SUPPORT
361 #define BLOCK_GPP_SIZE sizeof (FCH_GPP)
362 #define InstallFchInitResetGpp &FchInitResetGpp
363 #define InstallFchInitEnvGpp &FchInitEnvGpp
364 #define InstallFchInitMidGpp &FchTaskDummy
365 #define InstallFchInitLateGpp &FchInitLateGpp
367 #define BLOCK_GPP_SIZE 0
368 #define InstallFchInitResetGpp &FchTaskDummy
369 #define InstallFchInitEnvGpp &FchTaskDummy
370 #define InstallFchInitMidGpp &FchTaskDummy
371 #define InstallFchInitLateGpp &FchTaskDummy
374 #ifndef FCH_NO_USB_SUPPORT
375 #define BLOCK_USB_SIZE sizeof (FCH_USB)
376 #define InstallFchInitResetUsb &FchInitResetUsb
377 #define InstallFchInitEnvUsb &FchInitEnvUsb
378 #define InstallFchInitMidUsb &FchInitMidUsb
379 #define InstallFchInitLateUsb &FchInitLateUsb
381 #define BLOCK_USB_SIZE 0
382 #define InstallFchInitResetUsb &FchTaskDummy
383 #define InstallFchInitEnvUsb &FchTaskDummy
384 #define InstallFchInitMidUsb &FchTaskDummy
385 #define InstallFchInitLateUsb &FchTaskDummy
388 #ifndef FCH_NO_EHCI_SUPPORT
389 #define InstallFchInitResetUsbEhci &FchInitResetEhci
390 #define InstallFchInitEnvUsbEhci &FchInitEnvUsbEhci
391 #define InstallFchInitMidUsbEhci &FchInitMidUsbEhci
392 #define InstallFchInitLateUsbEhci &FchInitLateUsbEhci
394 #define InstallFchInitResetUsbEhci &FchTaskDummy
395 #define InstallFchInitEnvUsbEhci &FchTaskDummy
396 #define InstallFchInitMidUsbEhci &FchTaskDummy
397 #define InstallFchInitLateUsbEhci &FchTaskDummy
400 #ifndef FCH_NO_OHCI_SUPPORT
401 #define InstallFchInitResetUsbOhci &FchInitResetOhci
402 #define InstallFchInitEnvUsbOhci &FchInitEnvUsbOhci
403 #define InstallFchInitMidUsbOhci &FchInitMidUsbOhci
404 #define InstallFchInitLateUsbOhci &FchInitLateUsbOhci
406 #define InstallFchInitResetUsbOhci &FchTaskDummy
407 #define InstallFchInitEnvUsbOhci &FchTaskDummy
408 #define InstallFchInitMidUsbOhci &FchTaskDummy
409 #define InstallFchInitLateUsbOhci &FchTaskDummy
412 #ifndef FCH_NO_XHCI_SUPPORT
413 #define InstallFchInitResetUsbXhci &FchInitResetXhci
414 #define InstallFchInitEnvUsbXhci &FchInitEnvUsbXhci
415 #define InstallFchInitMidUsbXhci &FchInitMidUsbXhci
416 #define InstallFchInitLateUsbXhci &FchInitLateUsbXhci
418 #define InstallFchInitResetUsbXhci &FchTaskDummy
419 #define InstallFchInitEnvUsbXhci &FchTaskDummy
420 #define InstallFchInitMidUsbXhci &FchTaskDummy
421 #define InstallFchInitLateUsbXhci &FchTaskDummy
424 #ifndef FCH_NO_IMC_SUPPORT
425 #define BLOCK_IMC_SIZE sizeof (FCH_IMC)
426 #define InstallFchInitResetImc &FchInitResetImc
427 #define InstallFchInitEnvImc &FchInitEnvImc
428 #define InstallFchInitMidImc &FchInitMidImc
429 #define InstallFchInitLateImc &FchInitLateImc
431 #define BLOCK_IMC_SIZE 0
432 #define InstallFchInitResetImc &FchTaskDummy
433 #define InstallFchInitEnvImc &FchTaskDummy
434 #define InstallFchInitMidImc &FchTaskDummy
435 #define InstallFchInitLateImc &FchTaskDummy
439 #ifndef FCH_NO_SD_SUPPORT
440 #define BLOCK_SD_SIZE sizeof (FCH_SD)
441 #define InstallFchInitResetSd &FchTaskDummy
442 #define InstallFchInitEnvSd &FchInitEnvSd
443 #define InstallFchInitMidSd &FchTaskDummy
444 #define InstallFchInitLateSd &FchTaskDummy
446 #define BLOCK_SD_SIZE 0
447 #define InstallFchInitResetSd &FchTaskDummy
448 #define InstallFchInitEnvSd &FchTaskDummy
449 #define InstallFchInitMidSd &FchTaskDummy
450 #define InstallFchInitLateSd &FchTaskDummy
453 #ifndef FCH_NO_IR_SUPPORT
454 #define BLOCK_IR_SIZE sizeof (FCH_IR)
455 #define InstallFchInitResetIr &FchTaskDummy
456 #define InstallFchInitEnvIr &FchInitEnvIr
457 #define InstallFchInitMidIr &FchTaskDummy
458 #define InstallFchInitLateIr &FchTaskDummy
460 #define BLOCK_IR_SIZE 0
461 #define InstallFchInitResetIr &FchTaskDummy
462 #define InstallFchInitEnvIr &FchTaskDummy
463 #define InstallFchInitMidIr &FchTaskDummy
464 #define InstallFchInitLateIr &FchTaskDummy
467 #ifndef FCH_NO_AZALIA_SUPPORT
468 #define BLOCK_AZALIA_SIZE sizeof (FCH_AZALIA)
469 #define InstallFchInitResetAzalia &FchTaskDummy
470 #define InstallFchInitEnvAzalia &FchInitEnvAzalia
471 #define InstallFchInitMidAzalia &FchInitMidAzalia
472 #define InstallFchInitLateAzalia &FchInitLateAzalia
474 #define BLOCK_AZALIA_SIZE 0
475 #define InstallFchInitResetAzalia &FchTaskDummy
476 #define InstallFchInitEnvAzalia &FchTaskDummy
477 #define InstallFchInitMidAzalia &FchTaskDummy
478 #define InstallFchInitLateAzalia &FchTaskDummy
481 #ifndef FCH_NO_HWM_SUPPORT
482 #define BLOCK_HWM_SIZE sizeof (FCH_HWM)
483 #define InstallFchInitResetHwm &FchTaskDummy
484 #define InstallFchInitEnvHwm &FchInitEnvHwm
485 #define InstallFchInitMidHwm &FchInitMidHwm
486 #define InstallFchInitLateHwm &FchInitLateHwm
488 #define InstallFchInitResetHwm &FchTaskDummy
489 #define InstallFchInitEnvHwm &FchTaskDummy
490 #define InstallFchInitMidHwm &FchTaskDummy
491 #define InstallFchInitLateHwm &FchTaskDummy
495 #define BLOCK_SMBUS_SIZE sizeof (FCH_SMBUS)
496 #define BLOCK_HPET_SIZE sizeof (FCH_HPET)
497 #define BLOCK_GCPU_SIZE sizeof (FCH_GCPU)
498 #define BLOCK_SDB_SIZE sizeof (FCH_SERIALDB)
499 #define BLOCK_MISC_SIZE sizeof (FCH_MISC)
502 // Optionally declare OEM hooks after each phase
503 #ifndef FCH_INIT_RESET_HOOK
504 #define InstallFchInitResetHook FchTaskDummy
506 #define InstallFchInitResetHook OemFchInitResetHook
511 // Define FCH build time options and configurations
513 #ifdef BLDCFG_SMBUS0_BASE_ADDRESS
514 #define CFG_SMBUS0_BASE_ADDRESS BLDCFG_SMBUS0_BASE_ADDRESS
516 #define CFG_SMBUS0_BASE_ADDRESS DFLT_SMBUS0_BASE_ADDRESS
519 #ifdef BLDCFG_SMBUS1_BASE_ADDRESS
520 #define CFG_SMBUS1_BASE_ADDRESS BLDCFG_SMBUS1_BASE_ADDRESS
522 #define CFG_SMBUS1_BASE_ADDRESS DFLT_SMBUS1_BASE_ADDRESS
525 #ifdef BLDCFG_SIO_PME_BASE_ADDRESS
526 #define CFG_SIO_PME_BASE_ADDRESS BLDCFG_SIO_PME_BASE_ADDRESS
528 #define CFG_SIO_PME_BASE_ADDRESS DFLT_SIO_PME_BASE_ADDRESS
531 #ifdef BLDCFG_ACPI_PM1_EVT_BLOCK_ADDRESS
532 #define CFG_ACPI_PM1_EVT_BLOCK_ADDRESS BLDCFG_ACPI_PM1_EVT_BLOCK_ADDRESS
534 #define CFG_ACPI_PM1_EVT_BLOCK_ADDRESS DFLT_ACPI_PM1_EVT_BLOCK_ADDRESS
536 #ifdef BLDCFG_ACPI_PM1_CNT_BLOCK_ADDRESS
537 #define CFG_ACPI_PM1_CNT_BLOCK_ADDRESS BLDCFG_ACPI_PM1_CNT_BLOCK_ADDRESS
539 #define CFG_ACPI_PM1_CNT_BLOCK_ADDRESS DFLT_ACPI_PM1_CNT_BLOCK_ADDRESS
541 #ifdef BLDCFG_ACPI_PM_TMR_BLOCK_ADDRESS
542 #define CFG_ACPI_PM_TMR_BLOCK_ADDRESS BLDCFG_ACPI_PM_TMR_BLOCK_ADDRESS
544 #define CFG_ACPI_PM_TMR_BLOCK_ADDRESS DFLT_ACPI_PM_TMR_BLOCK_ADDRESS
546 #ifdef BLDCFG_ACPI_CPU_CNT_BLOCK_ADDRESS
547 #define CFG_ACPI_CPU_CNT_BLOCK_ADDRESS BLDCFG_ACPI_CPU_CNT_BLOCK_ADDRESS
549 #define CFG_ACPI_CPU_CNT_BLOCK_ADDRESS DFLT_ACPI_CPU_CNT_BLOCK_ADDRESS
551 #ifdef BLDCFG_ACPI_GPE0_BLOCK_ADDRESS
552 #define CFG_ACPI_GPE0_BLOCK_ADDRESS BLDCFG_ACPI_GPE0_BLOCK_ADDRESS
554 #define CFG_ACPI_GPE0_BLOCK_ADDRESS DFLT_ACPI_GPE0_BLOCK_ADDRESS
558 #ifdef BLDCFG_WATCHDOG_TIMER_BASE
559 #define CFG_WATCHDOG_TIMER_BASE BLDCFG_WATCHDOG_TIMER_BASE
561 #define CFG_WATCHDOG_TIMER_BASE DFLT_WATCHDOG_TIMER_BASE_ADDRESS
564 #ifdef BLDCFG_ACPI_PMA_BLK_ADDRESS
565 #define CFG_ACPI_PMA_CNTBLK_ADDRESS BLDCFG_ACPI_PMA_BLK_ADDRESS
567 #define CFG_ACPI_PMA_CNTBLK_ADDRESS DFLT_ACPI_PMA_CNT_BLK_ADDRESS
570 #ifdef BLDCFG_SMI_CMD_PORT_ADDRESS
571 #define CFG_SMI_CMD_PORT_ADDRESS BLDCFG_SMI_CMD_PORT_ADDRESS
573 #define CFG_SMI_CMD_PORT_ADDRESS DFLT_SMI_CMD_PORT
576 #ifdef BLDCFG_ROM_BASE_ADDRESS
577 #define CFG_SPI_ROM_BASE_ADDRESS BLDCFG_ROM_BASE_ADDRESS
579 #define CFG_SPI_ROM_BASE_ADDRESS DFLT_SPI_BASE_ADDRESS
582 #ifdef BLDCFG_GEC_SHADOW_ROM_BASE
583 #define CFG_GEC_SHADOW_ROM_BASE BLDCFG_GEC_SHADOW_ROM_BASE
585 #define CFG_GEC_SHADOW_ROM_BASE DFLT_GEC_BASE_ADDRESS
588 #ifdef BLDCFG_HPET_BASE_ADDRESS
589 #define CFG_HPET_BASE_ADDRESS BLDCFG_HPET_BASE_ADDRESS
591 #define CFG_HPET_BASE_ADDRESS DFLT_HPET_BASE_ADDRESS
594 #ifdef BLDCFG_AZALIA_SSID
595 #define CFG_AZALIA_SSID BLDCFG_AZALIA_SSID
597 #define CFG_AZALIA_SSID DFLT_AZALIA_SSID
600 #ifdef BLDCFG_SMBUS_SSID
601 #define CFG_SMBUS_SSID BLDCFG_SMBUS_SSID
603 #define CFG_SMBUS_SSID DFLT_SMBUS_SSID
606 #ifdef BLDCFG_IDE_SSID
607 #define CFG_IDE_SSID BLDCFG_IDE_SSID
609 #define CFG_IDE_SSID DFLT_IDE_SSID
612 #ifdef BLDCFG_SATA_AHCI_SSID
613 #define CFG_SATA_AHCI_SSID BLDCFG_SATA_AHCI_SSID
615 #define CFG_SATA_AHCI_SSID DFLT_SATA_AHCI_SSID
618 #ifdef BLDCFG_SATA_IDE_SSID
619 #define CFG_SATA_IDE_SSID BLDCFG_SATA_IDE_SSID
621 #define CFG_SATA_IDE_SSID DFLT_SATA_IDE_SSID
624 #ifdef BLDCFG_SATA_RAID5_SSID
625 #define CFG_SATA_RAID5_SSID BLDCFG_SATA_RAID5_SSID
627 #define CFG_SATA_RAID5_SSID DFLT_SATA_RAID5_SSID
630 #ifdef BLDCFG_SATA_RAID_SSID
631 #define CFG_SATA_RAID_SSID BLDCFG_SATA_RAID_SSID
633 #define CFG_SATA_RAID_SSID DFLT_SATA_RAID_SSID
636 #ifdef BLDCFG_EHCI_SSID
637 #define CFG_EHCI_SSID BLDCFG_EHCI_SSID
639 #define CFG_EHCI_SSID DFLT_EHCI_SSID
642 #ifdef BLDCFG_OHCI_SSID
643 #define CFG_OHCI_SSID BLDCFG_OHCI_SSID
645 #define CFG_OHCI_SSID DFLT_OHCI_SSID
648 #ifdef BLDCFG_LPC_SSID
649 #define CFG_LPC_SSID BLDCFG_LPC_SSID
651 #define CFG_LPC_SSID DFLT_LPC_SSID
654 #ifdef BLDCFG_FCH_GPP_LINK_CONFIG
655 #define CFG_FCH_GPP_LINK_CONFIG BLDCFG_FCH_GPP_LINK_CONFIG
657 #define CFG_FCH_GPP_LINK_CONFIG DFLT_FCH_GPP_LINK_CONFIG
660 #ifdef BLDCFG_FCH_GPP_PORT0_PRESENT
661 #define CFG_FCH_GPP_PORT0_PRESENT BLDCFG_FCH_GPP_PORT0_PRESENT
663 #define CFG_FCH_GPP_PORT0_PRESENT DFLT_FCH_GPP_PORT0_PRESENT
666 #ifdef BLDCFG_FCH_GPP_PORT1_PRESENT
667 #define CFG_FCH_GPP_PORT1_PRESENT BLDCFG_FCH_GPP_PORT1_PRESENT
669 #define CFG_FCH_GPP_PORT1_PRESENT DFLT_FCH_GPP_PORT1_PRESENT
672 #ifdef BLDCFG_FCH_GPP_PORT2_PRESENT
673 #define CFG_FCH_GPP_PORT2_PRESENT BLDCFG_FCH_GPP_PORT2_PRESENT
675 #define CFG_FCH_GPP_PORT2_PRESENT DFLT_FCH_GPP_PORT2_PRESENT
678 #ifdef BLDCFG_FCH_GPP_PORT3_PRESENT
679 #define CFG_FCH_GPP_PORT3_PRESENT BLDCFG_FCH_GPP_PORT3_PRESENT
681 #define CFG_FCH_GPP_PORT3_PRESENT DFLT_FCH_GPP_PORT3_PRESENT
684 #ifdef BLDCFG_FCH_GPP_PORT0_HOTPLUG
685 #define CFG_FCH_GPP_PORT0_HOTPLUG BLDCFG_FCH_GPP_PORT0_HOTPLUG
687 #define CFG_FCH_GPP_PORT0_HOTPLUG DFLT_FCH_GPP_PORT0_HOTPLUG
690 #ifdef BLDCFG_FCH_GPP_PORT1_HOTPLUG
691 #define CFG_FCH_GPP_PORT1_HOTPLUG BLDCFG_FCH_GPP_PORT1_HOTPLUG
693 #define CFG_FCH_GPP_PORT1_HOTPLUG DFLT_FCH_GPP_PORT1_HOTPLUG
696 #ifdef BLDCFG_FCH_GPP_PORT2_HOTPLUG
697 #define CFG_FCH_GPP_PORT2_HOTPLUG BLDCFG_FCH_GPP_PORT2_HOTPLUG
699 #define CFG_FCH_GPP_PORT2_HOTPLUG DFLT_FCH_GPP_PORT2_HOTPLUG
702 #ifdef BLDCFG_FCH_GPP_PORT3_HOTPLUG
703 #define CFG_FCH_GPP_PORT3_HOTPLUG BLDCFG_FCH_GPP_PORT3_HOTPLUG
705 #define CFG_FCH_GPP_PORT3_HOTPLUG DFLT_FCH_GPP_PORT3_HOTPLUG
709 #ifdef AGESA_ENTRY_INIT_RESET
710 #if AGESA_ENTRY_INIT_RESET == TRUE
712 // Define task list for InitReset phase
714 FCH_TASK_ENTRY ROMDATA *FchInitResetTaskTable[] = {
715 InstallFchInitResetHwAcpiP,
716 InstallFchInitResetAb,
717 InstallFchInitResetSpi,
718 InstallFchInitResetGec,
719 InstallFchInitResetHwAcpi,
720 InstallFchInitResetSata,
721 InstallFchInitResetLpc,
722 InstallFchInitResetPcib,
723 InstallFchInitResetPcie,
724 InstallFchInitResetGpp,
725 InstallFchInitResetUsb,
726 InstallFchInitResetUsbEhci,
727 InstallFchInitResetUsbOhci,
728 InstallFchInitResetUsbXhci,
729 InstallFchInitResetImc,
735 #ifdef AGESA_ENTRY_INIT_ENV
736 #if AGESA_ENTRY_INIT_ENV == TRUE
738 // Define task list for InitEnv phase
740 FCH_TASK_ENTRY ROMDATA *FchInitEnvTaskTable[] = {
741 InstallFchInitEnvHwAcpiP,
742 InstallFchInitEnvPcib,
743 InstallFchInitEnvPcie,
745 InstallFchInitEnvHwAcpi,
746 InstallFchInitEnvSpi,
748 InstallFchInitEnvImc,
749 InstallFchInitEnvUsb,
750 InstallFchInitEnvUsbEhci,
751 InstallFchInitEnvUsbOhci,
752 InstallFchInitEnvUsbXhci,
753 InstallFchInitEnvSata,
754 InstallFchInitEnvIde,
755 InstallFchInitEnvGec,
756 InstallFchInitEnvAzalia,
758 InstallFchInitEnvGpp,
759 InstallFchInitEnvAbS,
760 InstallFchInitEnvHwm,
767 #ifdef AGESA_ENTRY_INIT_MID
768 #if AGESA_ENTRY_INIT_MID == TRUE
770 // Define task list for InitMid phase
772 FCH_TASK_ENTRY ROMDATA *FchInitMidTaskTable[] = {
773 InstallFchInitMidImc,
774 InstallFchInitMidUsb,
775 InstallFchInitMidUsbEhci,
776 InstallFchInitMidUsbOhci,
777 InstallFchInitMidUsbXhci,
778 InstallFchInitMidSata,
779 InstallFchInitMidIde,
780 InstallFchInitMidGec,
781 InstallFchInitMidAzalia,
782 InstallFchInitMidHwm,
788 #ifdef AGESA_ENTRY_INIT_LATE
789 #if AGESA_ENTRY_INIT_LATE == TRUE
791 // Define task list for InitLate phase
793 FCH_TASK_ENTRY ROMDATA *FchInitLateTaskTable[] = {
794 InstallFchInitLatePcie,
795 InstallFchInitLatePcib,
796 InstallFchInitLateSpi,
797 InstallFchInitLateUsb,
798 InstallFchInitLateUsbEhci,
799 InstallFchInitLateUsbOhci,
800 InstallFchInitLateUsbXhci,
801 InstallFchInitLateSata,
802 InstallFchInitLateIde,
803 InstallFchInitLateGec,
804 InstallFchInitLateAzalia,
805 InstallFchInitLateImc,
806 InstallFchInitLateHwm,
807 InstallFchInitLateGpp,
808 InstallFchInitLateHwAcpi,
815 #ifdef AGESA_ENTRY_INIT_ENV
816 #if AGESA_ENTRY_INIT_ENV == TRUE
818 // Define task list for S3 resume before PCI phase
820 FCH_TASK_ENTRY ROMDATA *FchInitS3EarlyTaskTable[] = {
821 InstallFchInitEnvPcie,
822 InstallFchInitEnvPcib,
824 InstallFchInitEnvHwAcpi,
825 InstallFchInitEnvSpi,
827 InstallFchInitEnvUsb,
828 InstallFchInitEnvSata,
829 InstallFchInitEnvIde,
830 InstallFchInitEnvGec,
831 InstallFchInitEnvAzalia,
833 InstallFchInitEnvGpp,
834 InstallFchInitEnvAbS,
840 #ifdef AGESA_ENTRY_INIT_LATE
841 #if AGESA_ENTRY_INIT_LATE == TRUE
843 // Define task list for S3 resume after PCI phase
845 FCH_TASK_ENTRY ROMDATA *FchInitS3LateTaskTable[] = {
846 InstallFchInitLatePcie,
847 InstallFchInitLatePcib,
848 InstallFchInitLateSpi,
849 InstallFchInitLateUsb,
850 InstallFchInitLateUsbEhci,
851 InstallFchInitLateUsbOhci,
852 InstallFchInitLateUsbXhci,
853 InstallFchInitMidSata,
854 InstallFchInitMidIde,
855 InstallFchInitMidGec,
856 InstallFchInitMidAzalia,
857 InstallFchInitLateSata,
858 InstallFchInitLateIde,
859 InstallFchInitLateHwAcpi,
860 InstallFchInitEnvHwm,
861 InstallFchInitLateHwm,
867 #else // FCH_SUPPORT == FALSE
868 /* FCH Interface entries */
869 extern FCH_INIT CommonFchInitStub;
871 #define FP_FCH_INIT_RESET &CommonFchInitStub
872 #define FP_FCH_INIT_RESET_CONSTRUCT &CommonFchInitStub
873 #define FP_FCH_INIT_ENV &CommonFchInitStub
874 #define FP_FCH_INIT_ENV_CONSTRUCT &CommonFchInitStub
875 #define FP_FCH_INIT_MID &CommonFchInitStub
876 #define FP_FCH_INIT_MID_CONSTRUCT &CommonFchInitStub
877 #define FP_FCH_INIT_LATE &CommonFchInitStub
878 #define FP_FCH_INIT_LATE_CONSTRUCT &CommonFchInitStub
880 #define CFG_SMBUS0_BASE_ADDRESS 0
881 #define CFG_SMBUS1_BASE_ADDRESS 0
882 #define CFG_SIO_PME_BASE_ADDRESS 0
883 #define CFG_ACPI_PM1_EVT_BLOCK_ADDRESS 0
884 #define CFG_ACPI_PM1_CNT_BLOCK_ADDRESS 0
885 #define CFG_ACPI_PM_TMR_BLOCK_ADDRESS 0
886 #define CFG_ACPI_CPU_CNT_BLOCK_ADDRESS 0
887 #define CFG_ACPI_GPE0_BLOCK_ADDRESS 0
888 #define CFG_SPI_ROM_BASE_ADDRESS 0
889 #define CFG_WATCHDOG_TIMER_BASE 0
890 #define CFG_HPET_BASE_ADDRESS 0
891 #define CFG_SMI_CMD_PORT_ADDRESS 0
892 #define CFG_ACPI_PMA_CNTBLK_ADDRESS 0
893 #define CFG_GEC_SHADOW_ROM_BASE 0
894 #define CFG_AZALIA_SSID 0
895 #define CFG_SMBUS_SSID 0
896 #define CFG_IDE_SSID 0
897 #define CFG_SATA_AHCI_SSID 0
898 #define CFG_SATA_IDE_SSID 0
899 #define CFG_SATA_RAID5_SSID 0
900 #define CFG_SATA_RAID_SSID 0
901 #define CFG_EHCI_SSID 0
902 #define CFG_OHCI_SSID 0
903 #define CFG_LPC_SSID 0
904 #define CFG_FCH_GPP_LINK_CONFIG 0
905 #define CFG_FCH_GPP_PORT0_PRESENT 0
906 #define CFG_FCH_GPP_PORT1_PRESENT 0
907 #define CFG_FCH_GPP_PORT2_PRESENT 0
908 #define CFG_FCH_GPP_PORT3_PRESENT 0
909 #define CFG_FCH_GPP_PORT0_HOTPLUG 0
910 #define CFG_FCH_GPP_PORT1_HOTPLUG 0
911 #define CFG_FCH_GPP_PORT2_HOTPLUG 0
912 #define CFG_FCH_GPP_PORT3_HOTPLUG 0
917 CONST BLDOPT_FCH_FUNCTION ROMDATA BldoptFchFunction = {
919 FP_FCH_INIT_RESET_CONSTRUCT,
921 FP_FCH_INIT_ENV_CONSTRUCT,
923 FP_FCH_INIT_MID_CONSTRUCT,
925 FP_FCH_INIT_LATE_CONSTRUCT,
928 #endif // _OPTION_FCH_INSTALL_H_