1 // Code for handling UHCI USB controllers.
3 // Copyright (C) 2009 Kevin O'Connor <kevin@koconnor.net>
5 // This file may be distributed under the terms of the GNU LGPLv3 license.
7 #include "util.h" // dprintf
8 #include "pci.h" // pci_bdf_to_bus
9 #include "config.h" // CONFIG_*
10 #include "ioport.h" // outw
11 #include "usb-uhci.h" // USBLEGSUP
12 #include "pci_regs.h" // PCI_BASE_ADDRESS_4
13 #include "usb.h" // struct usb_s
14 #include "farptr.h" // GET_FLATPTR
15 #include "biosvar.h" // GET_GLOBAL
18 reset_uhci(struct usb_s *cntl)
20 // XXX - don't reset if not needed.
23 pci_config_writew(cntl->bdf, USBLEGSUP, USBLEGSUP_RWC);
26 outw(USBCMD_HCRESET, cntl->iobase + USBCMD);
29 // Disable interrupts and commands (just to be safe).
30 outw(0, cntl->iobase + USBINTR);
31 outw(0, cntl->iobase + USBCMD);
35 configure_uhci(struct usb_s *cntl)
37 // Allocate ram for schedule storage
38 struct uhci_td *term_td = malloc_high(sizeof(*term_td));
39 struct uhci_framelist *fl = memalign_high(sizeof(*fl), sizeof(*fl));
40 struct uhci_qh *data_qh = malloc_low(sizeof(*data_qh));
41 struct uhci_qh *term_qh = malloc_high(sizeof(*term_qh));
42 if (!term_td || !fl || !data_qh || !term_qh) {
43 dprintf(1, "No ram for uhci init");
47 // Work around for PIIX errata
48 memset(term_td, 0, sizeof(*term_td));
49 term_td->link = UHCI_PTR_TERM;
50 term_td->token = (uhci_explen(0) | (0x7f << TD_TOKEN_DEVADDR_SHIFT)
52 memset(term_qh, 0, sizeof(*term_qh));
53 term_qh->element = (u32)term_td;
54 term_qh->link = UHCI_PTR_TERM;
56 // Setup primary queue head.
57 memset(data_qh, 0, sizeof(*data_qh));
58 data_qh->element = UHCI_PTR_TERM;
59 data_qh->link = (u32)term_qh | UHCI_PTR_QH;
62 // Set schedule to point to primary queue head
64 for (i=0; i<ARRAY_SIZE(fl->links); i++) {
65 fl->links[i] = (u32)data_qh | UHCI_PTR_QH;
68 // Set the frame length to the default: 1 ms exactly
69 outb(USBSOF_DEFAULT, cntl->iobase + USBSOF);
71 // Store the frame list base address
72 outl((u32)fl->links, cntl->iobase + USBFLBASEADD);
74 // Set the current frame number
75 outw(0, cntl->iobase + USBFRNUM);
79 start_uhci(struct usb_s *cntl)
81 // Mark as configured and running with a 64-byte max packet.
82 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, cntl->iobase + USBCMD);
85 // Find any devices connected to the root hub.
87 check_ports(struct usb_s *cntl)
89 u16 port1 = inw(cntl->iobase + USBPORTSC1);
90 u16 port2 = inw(cntl->iobase + USBPORTSC2);
92 if (!((port1 & USBPORTSC_CCS) || (port2 & USBPORTSC_CCS)))
97 if (port1 & USBPORTSC_CCS)
98 outw(USBPORTSC_PR, cntl->iobase + USBPORTSC1);
99 if (port2 & USBPORTSC_CCS)
100 outw(USBPORTSC_PR, cntl->iobase + USBPORTSC2);
102 outw(0, cntl->iobase + USBPORTSC1);
103 outw(0, cntl->iobase + USBPORTSC2);
108 port1 = inw(cntl->iobase + USBPORTSC1);
109 if (port1 & USBPORTSC_CCS) {
110 outw(USBPORTSC_PE, cntl->iobase + USBPORTSC1);
111 int count = configure_usb_device(cntl, !!(port1 & USBPORTSC_LSDA));
113 outw(0, cntl->iobase + USBPORTSC1);
116 port2 = inw(cntl->iobase + USBPORTSC2);
117 if (port2 & USBPORTSC_CCS) {
118 outw(USBPORTSC_PE, cntl->iobase + USBPORTSC2);
119 int count = configure_usb_device(cntl, !!(port2 & USBPORTSC_LSDA));
121 outw(0, cntl->iobase + USBPORTSC2);
128 uhci_init(struct usb_s *cntl)
130 if (! CONFIG_USB_UHCI)
133 cntl->iobase = (pci_config_readl(cntl->bdf, PCI_BASE_ADDRESS_4)
134 & PCI_BASE_ADDRESS_IO_MASK);
136 dprintf(3, "UHCI init on dev %02x:%02x.%x (io=%x)\n"
137 , pci_bdf_to_bus(cntl->bdf), pci_bdf_to_dev(cntl->bdf)
138 , pci_bdf_to_fn(cntl->bdf), cntl->iobase);
140 pci_set_bus_master(cntl->bdf);
143 configure_uhci(cntl);
146 int count = check_ports(cntl);
148 // XXX - no devices; free data structures.
156 wait_qh(struct uhci_qh *qh)
158 // XXX - 500ms just a guess
159 u64 end = calc_future_tsc(500);
161 if (qh->element & UHCI_PTR_TERM)
163 if (rdtscll() > end) {
164 dprintf(1, "Timeout on wait_qh %p\n", qh);
172 uhci_control(u32 endp, int dir, const void *cmd, int cmdsize
173 , void *data, int datasize)
175 if (! CONFIG_USB_UHCI)
178 dprintf(5, "uhci_control %x\n", endp);
179 struct usb_s *cntl = endp2cntl(endp);
180 int maxpacket = endp2maxsize(endp);
181 int lowspeed = endp2speed(endp);
182 int devaddr = endp2devaddr(endp) | (endp2ep(endp) << 7);
184 // Setup transfer descriptors
185 int count = 2 + DIV_ROUND_UP(datasize, maxpacket);
186 struct uhci_td *tds = malloc_tmphigh(sizeof(*tds) * count);
188 tds[0].link = (u32)&tds[1] | UHCI_PTR_DEPTH;
189 tds[0].status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
191 tds[0].token = (uhci_explen(cmdsize) | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
193 tds[0].buffer = (void*)cmd;
194 int toggle = TD_TOKEN_TOGGLE;
196 for (i=1; i<count-1; i++) {
197 tds[i].link = (u32)&tds[i+1] | UHCI_PTR_DEPTH;
198 tds[i].status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
200 int len = (i == count-2 ? (datasize - (i-1)*maxpacket) : maxpacket);
201 tds[i].token = (uhci_explen(len) | toggle
202 | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
203 | (dir ? USB_PID_IN : USB_PID_OUT));
204 tds[i].buffer = data + (i-1) * maxpacket;
205 toggle ^= TD_TOKEN_TOGGLE;
207 tds[i].link = UHCI_PTR_TERM;
208 tds[i].status = (uhci_maxerr(0) | (lowspeed ? TD_CTRL_LS : 0)
210 tds[i].token = (uhci_explen(0) | TD_TOKEN_TOGGLE
211 | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
212 | (dir ? USB_PID_OUT : USB_PID_IN));
216 struct uhci_qh *data_qh = cntl->qh;
217 data_qh->element = (u32)&tds[0];
218 int ret = wait_qh(data_qh);
227 uhci_alloc_intr_pipe(u32 endp, int period)
229 if (! CONFIG_USB_UHCI)
232 dprintf(7, "uhci_alloc_intr_pipe %x %d\n", endp, period);
233 struct usb_s *cntl = endp2cntl(endp);
234 int maxpacket = endp2maxsize(endp);
235 int lowspeed = endp2speed(endp);
236 int devaddr = endp2devaddr(endp) | (endp2ep(endp) << 7);
237 // XXX - just grab 20 for now.
239 struct uhci_qh *qh = malloc_low(sizeof(*qh));
240 struct uhci_td *tds = malloc_low(sizeof(*tds) * count);
243 if (maxpacket > sizeof(tds[0].data))
247 qh->element = (u32)tds;
250 for (i=0; i<count; i++) {
251 tds[i].link = (i==count-1 ? (u32)&tds[0] : (u32)&tds[i+1]);
252 tds[i].status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
254 tds[i].token = (uhci_explen(maxpacket) | toggle
255 | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
257 tds[i].buffer = &tds[i].data;
258 toggle ^= TD_TOKEN_TOGGLE;
261 qh->next_td = &tds[0];
263 // XXX - need schedule - just add to primary list for now.
264 struct uhci_qh *data_qh = cntl->qh;
265 qh->link = data_qh->link;
266 data_qh->link = (u32)qh | UHCI_PTR_QH;
272 uhci_poll_intr(void *pipe, void *data)
275 if (! CONFIG_USB_UHCI)
278 struct uhci_qh *qh = pipe;
279 struct uhci_td *td = GET_FLATPTR(qh->next_td);
280 u32 status = GET_FLATPTR(td->status);
281 u32 token = GET_FLATPTR(td->token);
282 if (status & TD_CTRL_ACTIVE)
285 // XXX - check for errors.
288 memcpy_far(GET_SEG(SS), data
289 , FLATPTR_TO_SEG(td->data), (void*)FLATPTR_TO_OFFSET(td->data)
290 , uhci_expected_length(token));
293 u32 next = GET_FLATPTR(td->link);
294 SET_FLATPTR(td->status, (uhci_maxerr(0) | (status & TD_CTRL_LS)
296 SET_FLATPTR(qh->next_td, (void*)(next & ~UHCI_PTR_BITS));