1 // Code for handling UHCI USB controllers.
3 // Copyright (C) 2009 Kevin O'Connor <kevin@koconnor.net>
5 // This file may be distributed under the terms of the GNU LGPLv3 license.
7 #include "util.h" // dprintf
8 #include "pci.h" // pci_bdf_to_bus
9 #include "config.h" // CONFIG_*
10 #include "ioport.h" // outw
11 #include "usb-uhci.h" // USBLEGSUP
12 #include "pci_regs.h" // PCI_BASE_ADDRESS_4
13 #include "usb.h" // struct usb_s
14 #include "farptr.h" // GET_FLATPTR
19 struct uhci_qh *control_qh, *bulk_qh;
20 struct uhci_framelist *framelist;
24 /****************************************************************
26 ****************************************************************/
28 // Check if device attached to a given port
30 uhci_hub_detect(struct usbhub_s *hub, u32 port)
32 struct usb_uhci_s *cntl = container_of(hub->cntl, struct usb_uhci_s, usb);
33 u16 ioport = cntl->iobase + USBPORTSC1 + port * 2;
35 u16 status = inw(ioport);
36 if (!(status & USBPORTSC_CCS))
40 // XXX - if just powered up, need to wait for USB_TIME_ATTDB?
42 // Begin reset on port
43 outw(USBPORTSC_PR, ioport);
44 msleep(USB_TIME_DRSTR);
48 // Reset device on port
50 uhci_hub_reset(struct usbhub_s *hub, u32 port)
52 struct usb_uhci_s *cntl = container_of(hub->cntl, struct usb_uhci_s, usb);
53 u16 ioport = cntl->iobase + USBPORTSC1 + port * 2;
55 // Finish reset on port
57 udelay(6); // 64 high-speed bit times
58 u16 status = inw(ioport);
59 if (!(status & USBPORTSC_CCS))
60 // No longer connected
62 outw(USBPORTSC_PE, ioport);
63 return !!(status & USBPORTSC_LSDA);
68 uhci_hub_disconnect(struct usbhub_s *hub, u32 port)
70 struct usb_uhci_s *cntl = container_of(hub->cntl, struct usb_uhci_s, usb);
71 u16 ioport = cntl->iobase + USBPORTSC1 + port * 2;
75 static struct usbhub_op_s uhci_HubOp = {
76 .detect = uhci_hub_detect,
77 .reset = uhci_hub_reset,
78 .disconnect = uhci_hub_disconnect,
81 // Find any devices connected to the root hub.
83 check_uhci_ports(struct usb_uhci_s *cntl)
87 memset(&hub, 0, sizeof(hub));
88 hub.cntl = &cntl->usb;
96 /****************************************************************
98 ****************************************************************/
101 reset_uhci(struct usb_uhci_s *cntl, u16 bdf)
103 // XXX - don't reset if not needed.
105 // Reset PIRQ and SMI
106 pci_config_writew(bdf, USBLEGSUP, USBLEGSUP_RWC);
109 outw(USBCMD_HCRESET, cntl->iobase + USBCMD);
112 // Disable interrupts and commands (just to be safe).
113 outw(0, cntl->iobase + USBINTR);
114 outw(0, cntl->iobase + USBCMD);
118 configure_uhci(void *data)
120 struct usb_uhci_s *cntl = data;
122 // Allocate ram for schedule storage
123 struct uhci_td *term_td = malloc_high(sizeof(*term_td));
124 struct uhci_framelist *fl = memalign_high(sizeof(*fl), sizeof(*fl));
125 struct uhci_qh *intr_qh = malloc_high(sizeof(*intr_qh));
126 struct uhci_qh *term_qh = malloc_high(sizeof(*term_qh));
127 if (!term_td || !fl || !intr_qh || !term_qh) {
132 // Work around for PIIX errata
133 memset(term_td, 0, sizeof(*term_td));
134 term_td->link = UHCI_PTR_TERM;
135 term_td->token = (uhci_explen(0) | (0x7f << TD_TOKEN_DEVADDR_SHIFT)
137 memset(term_qh, 0, sizeof(*term_qh));
138 term_qh->element = (u32)term_td;
139 term_qh->link = UHCI_PTR_TERM;
141 // Set schedule to point to primary intr queue head
142 memset(intr_qh, 0, sizeof(*intr_qh));
143 intr_qh->element = UHCI_PTR_TERM;
144 intr_qh->link = (u32)term_qh | UHCI_PTR_QH;
146 for (i=0; i<ARRAY_SIZE(fl->links); i++)
147 fl->links[i] = (u32)intr_qh | UHCI_PTR_QH;
148 cntl->framelist = fl;
149 cntl->control_qh = cntl->bulk_qh = intr_qh;
152 // Set the frame length to the default: 1 ms exactly
153 outb(USBSOF_DEFAULT, cntl->iobase + USBSOF);
155 // Store the frame list base address
156 outl((u32)fl->links, cntl->iobase + USBFLBASEADD);
158 // Set the current frame number
159 outw(0, cntl->iobase + USBFRNUM);
161 // Mark as configured and running with a 64-byte max packet.
162 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, cntl->iobase + USBCMD);
165 int count = check_uhci_ports(cntl);
166 free_pipe(cntl->usb.defaultpipe);
171 // No devices found - shutdown and free controller.
172 outw(0, cntl->iobase + USBCMD);
182 uhci_init(u16 bdf, int busid)
184 if (! CONFIG_USB_UHCI)
186 struct usb_uhci_s *cntl = malloc_tmphigh(sizeof(*cntl));
187 memset(cntl, 0, sizeof(*cntl));
188 cntl->usb.busid = busid;
189 cntl->usb.type = USB_TYPE_UHCI;
190 cntl->iobase = (pci_config_readl(bdf, PCI_BASE_ADDRESS_4)
191 & PCI_BASE_ADDRESS_IO_MASK);
193 dprintf(1, "UHCI init on dev %02x:%02x.%x (io=%x)\n"
194 , pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf)
195 , pci_bdf_to_fn(bdf), cntl->iobase);
197 pci_config_maskw(bdf, PCI_COMMAND, 0, PCI_COMMAND_MASTER);
199 reset_uhci(cntl, bdf);
201 run_thread(configure_uhci, cntl);
205 /****************************************************************
206 * End point communication
207 ****************************************************************/
210 wait_qh(struct usb_uhci_s *cntl, struct uhci_qh *qh)
212 // XXX - 500ms just a guess
213 u64 end = calc_future_tsc(500);
215 if (qh->element & UHCI_PTR_TERM)
217 if (check_tsc(end)) {
219 struct uhci_td *td = (void*)(qh->element & ~UHCI_PTR_BITS);
220 dprintf(1, "Timeout on wait_qh %p (td=%p s=%x c=%x/%x)\n"
222 , inw(cntl->iobase + USBCMD)
223 , inw(cntl->iobase + USBSTS));
230 // Wait for next USB frame to start - for ensuring safe memory release.
232 uhci_waittick(u16 iobase)
235 u16 startframe = inw(iobase + USBFRNUM);
236 u64 end = calc_future_tsc(1000 * 5);
238 if (inw(iobase + USBFRNUM) != startframe)
240 if (check_tsc(end)) {
250 struct uhci_td *next_td;
251 struct usb_pipe pipe;
257 uhci_free_pipe(struct usb_pipe *p)
259 if (! CONFIG_USB_UHCI)
261 dprintf(7, "uhci_free_pipe %p\n", p);
262 struct uhci_pipe *pipe = container_of(p, struct uhci_pipe, pipe);
263 struct usb_uhci_s *cntl = container_of(
264 pipe->pipe.cntl, struct usb_uhci_s, usb);
266 struct uhci_qh *pos = (void*)(cntl->framelist->links[0] & ~UHCI_PTR_BITS);
268 u32 link = pos->link;
269 if (link == UHCI_PTR_TERM) {
270 // Not found?! Exit without freeing.
271 warn_internalerror();
274 struct uhci_qh *next = (void*)(link & ~UHCI_PTR_BITS);
275 if (next == &pipe->qh) {
276 pos->link = next->link;
277 if (cntl->control_qh == next)
278 cntl->control_qh = pos;
279 if (cntl->bulk_qh == next)
281 uhci_waittick(cntl->iobase);
290 uhci_alloc_control_pipe(struct usb_pipe *dummy)
292 if (! CONFIG_USB_UHCI)
294 struct usb_uhci_s *cntl = container_of(
295 dummy->cntl, struct usb_uhci_s, usb);
296 dprintf(7, "uhci_alloc_control_pipe %p\n", &cntl->usb);
298 // Allocate a queue head.
299 struct uhci_pipe *pipe = malloc_tmphigh(sizeof(*pipe));
304 memset(pipe, 0, sizeof(*pipe));
305 memcpy(&pipe->pipe, dummy, sizeof(pipe->pipe));
306 pipe->qh.element = UHCI_PTR_TERM;
307 pipe->iobase = cntl->iobase;
309 // Add queue head to controller list.
310 struct uhci_qh *control_qh = cntl->control_qh;
311 pipe->qh.link = control_qh->link;
313 control_qh->link = (u32)&pipe->qh | UHCI_PTR_QH;
314 if (cntl->bulk_qh == control_qh)
315 cntl->bulk_qh = &pipe->qh;
320 uhci_control(struct usb_pipe *p, int dir, const void *cmd, int cmdsize
321 , void *data, int datasize)
324 if (! CONFIG_USB_UHCI)
326 dprintf(5, "uhci_control %p\n", p);
327 struct uhci_pipe *pipe = container_of(p, struct uhci_pipe, pipe);
328 struct usb_uhci_s *cntl = container_of(
329 pipe->pipe.cntl, struct usb_uhci_s, usb);
331 int maxpacket = pipe->pipe.maxpacket;
332 int lowspeed = pipe->pipe.speed;
333 int devaddr = pipe->pipe.devaddr | (pipe->pipe.ep << 7);
335 // Setup transfer descriptors
336 int count = 2 + DIV_ROUND_UP(datasize, maxpacket);
337 struct uhci_td *tds = malloc_tmphigh(sizeof(*tds) * count);
343 tds[0].link = (u32)&tds[1] | UHCI_PTR_DEPTH;
344 tds[0].status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
346 tds[0].token = (uhci_explen(cmdsize) | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
348 tds[0].buffer = (void*)cmd;
349 int toggle = TD_TOKEN_TOGGLE;
351 for (i=1; i<count-1; i++) {
352 tds[i].link = (u32)&tds[i+1] | UHCI_PTR_DEPTH;
353 tds[i].status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
355 int len = (i == count-2 ? (datasize - (i-1)*maxpacket) : maxpacket);
356 tds[i].token = (uhci_explen(len) | toggle
357 | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
358 | (dir ? USB_PID_IN : USB_PID_OUT));
359 tds[i].buffer = data + (i-1) * maxpacket;
360 toggle ^= TD_TOKEN_TOGGLE;
362 tds[i].link = UHCI_PTR_TERM;
363 tds[i].status = (uhci_maxerr(0) | (lowspeed ? TD_CTRL_LS : 0)
365 tds[i].token = (uhci_explen(0) | TD_TOKEN_TOGGLE
366 | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
367 | (dir ? USB_PID_OUT : USB_PID_IN));
372 pipe->qh.element = (u32)&tds[0];
373 int ret = wait_qh(cntl, &pipe->qh);
375 pipe->qh.element = UHCI_PTR_TERM;
376 uhci_waittick(pipe->iobase);
383 uhci_alloc_bulk_pipe(struct usb_pipe *dummy)
385 if (! CONFIG_USB_UHCI)
387 struct usb_uhci_s *cntl = container_of(
388 dummy->cntl, struct usb_uhci_s, usb);
389 dprintf(7, "uhci_alloc_bulk_pipe %p\n", &cntl->usb);
391 // Allocate a queue head.
392 struct uhci_pipe *pipe = malloc_low(sizeof(*pipe));
397 memset(pipe, 0, sizeof(*pipe));
398 memcpy(&pipe->pipe, dummy, sizeof(pipe->pipe));
399 pipe->qh.element = UHCI_PTR_TERM;
400 pipe->iobase = cntl->iobase;
402 // Add queue head to controller list.
403 struct uhci_qh *bulk_qh = cntl->bulk_qh;
404 pipe->qh.link = bulk_qh->link;
406 bulk_qh->link = (u32)&pipe->qh | UHCI_PTR_QH;
412 wait_td(struct uhci_td *td)
414 u64 end = calc_future_tsc(5000); // XXX - lookup real time.
418 if (!(status & TD_CTRL_ACTIVE))
420 if (check_tsc(end)) {
426 if (status & TD_CTRL_ANY_ERROR) {
427 dprintf(1, "wait_td error - status=%x\n", status);
437 uhci_send_bulk(struct usb_pipe *p, int dir, void *data, int datasize)
439 if (! CONFIG_USB_UHCI)
441 struct uhci_pipe *pipe = container_of(p, struct uhci_pipe, pipe);
442 dprintf(7, "uhci_send_bulk qh=%p dir=%d data=%p size=%d\n"
443 , &pipe->qh, dir, data, datasize);
444 int maxpacket = GET_FLATPTR(pipe->pipe.maxpacket);
445 int lowspeed = GET_FLATPTR(pipe->pipe.speed);
446 int devaddr = (GET_FLATPTR(pipe->pipe.devaddr)
447 | (GET_FLATPTR(pipe->pipe.ep) << 7));
448 int toggle = GET_FLATPTR(pipe->toggle) ? TD_TOKEN_TOGGLE : 0;
450 // Allocate 4 tds on stack (16byte aligned)
451 u8 tdsbuf[sizeof(struct uhci_td) * STACKTDS + TDALIGN - 1];
452 struct uhci_td *tds = (void*)ALIGN((u32)tdsbuf, TDALIGN);
453 memset(tds, 0, sizeof(*tds) * STACKTDS);
457 SET_FLATPTR(pipe->qh.element, (u32)MAKE_FLATPTR(GET_SEG(SS), tds));
461 struct uhci_td *td = &tds[tdpos++ % STACKTDS];
462 int ret = wait_td(td);
466 int transfer = datasize;
467 if (transfer > maxpacket)
468 transfer = maxpacket;
469 struct uhci_td *nexttd_fl = MAKE_FLATPTR(GET_SEG(SS)
470 , &tds[tdpos % STACKTDS]);
471 td->link = (transfer==datasize ? UHCI_PTR_TERM : (u32)nexttd_fl);
472 td->token = (uhci_explen(transfer) | toggle
473 | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
474 | (dir ? USB_PID_IN : USB_PID_OUT));
477 td->status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
479 toggle ^= TD_TOKEN_TOGGLE;
482 datasize -= transfer;
485 for (i=0; i<STACKTDS; i++) {
486 struct uhci_td *td = &tds[tdpos++ % STACKTDS];
487 int ret = wait_td(td);
492 SET_FLATPTR(pipe->toggle, !!toggle);
495 dprintf(1, "uhci_send_bulk failed\n");
496 SET_FLATPTR(pipe->qh.element, UHCI_PTR_TERM);
497 uhci_waittick(GET_FLATPTR(pipe->iobase));
502 uhci_alloc_intr_pipe(struct usb_pipe *dummy, int frameexp)
504 if (! CONFIG_USB_UHCI)
506 struct usb_uhci_s *cntl = container_of(
507 dummy->cntl, struct usb_uhci_s, usb);
508 dprintf(7, "uhci_alloc_intr_pipe %p %d\n", &cntl->usb, frameexp);
512 int maxpacket = dummy->maxpacket;
513 int lowspeed = dummy->speed;
514 int devaddr = dummy->devaddr | (dummy->ep << 7);
515 // Determine number of entries needed for 2 timer ticks.
516 int ms = 1<<frameexp;
517 int count = DIV_ROUND_UP(PIT_TICK_INTERVAL * 1000 * 2, PIT_TICK_RATE * ms);
518 count = ALIGN(count, 2);
519 struct uhci_pipe *pipe = malloc_low(sizeof(*pipe));
520 struct uhci_td *tds = malloc_low(sizeof(*tds) * count);
521 void *data = malloc_low(maxpacket * count);
522 if (!pipe || !tds || !data) {
526 memset(pipe, 0, sizeof(*pipe));
527 memcpy(&pipe->pipe, dummy, sizeof(pipe->pipe));
528 pipe->qh.element = (u32)tds;
529 pipe->next_td = &tds[0];
530 pipe->iobase = cntl->iobase;
534 for (i=0; i<count; i++) {
535 tds[i].link = (i==count-1 ? (u32)&tds[0] : (u32)&tds[i+1]);
536 tds[i].status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
538 tds[i].token = (uhci_explen(maxpacket) | toggle
539 | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
541 tds[i].buffer = data + maxpacket * i;
542 toggle ^= TD_TOKEN_TOGGLE;
545 // Add to interrupt schedule.
546 struct uhci_framelist *fl = cntl->framelist;
548 // Add to existing interrupt entry.
549 struct uhci_qh *intr_qh = (void*)(fl->links[0] & ~UHCI_PTR_BITS);
550 pipe->qh.link = intr_qh->link;
552 intr_qh->link = (u32)&pipe->qh | UHCI_PTR_QH;
553 if (cntl->control_qh == intr_qh)
554 cntl->control_qh = &pipe->qh;
555 if (cntl->bulk_qh == intr_qh)
556 cntl->bulk_qh = &pipe->qh;
558 int startpos = 1<<(frameexp-1);
559 pipe->qh.link = fl->links[startpos];
561 for (i=startpos; i<ARRAY_SIZE(fl->links); i+=ms)
562 fl->links[i] = (u32)&pipe->qh | UHCI_PTR_QH;
574 uhci_poll_intr(struct usb_pipe *p, void *data)
577 if (! CONFIG_USB_UHCI)
580 struct uhci_pipe *pipe = container_of(p, struct uhci_pipe, pipe);
581 struct uhci_td *td = GET_FLATPTR(pipe->next_td);
582 u32 status = GET_FLATPTR(td->status);
583 u32 token = GET_FLATPTR(td->token);
584 if (status & TD_CTRL_ACTIVE)
587 // XXX - check for errors.
590 void *tddata = GET_FLATPTR(td->buffer);
591 memcpy_far(GET_SEG(SS), data
592 , FLATPTR_TO_SEG(tddata), (void*)FLATPTR_TO_OFFSET(tddata)
593 , uhci_expected_length(token));
596 struct uhci_td *next = (void*)(GET_FLATPTR(td->link) & ~UHCI_PTR_BITS);
597 SET_FLATPTR(pipe->next_td, next);
599 SET_FLATPTR(td->status, (uhci_maxerr(0) | (status & TD_CTRL_LS)