1 // 16bit system callbacks
3 // Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2002 MandrakeSoft S.A.
6 // This file may be distributed under the terms of the GNU GPLv3 license.
8 #include "util.h" // irq_restore
9 #include "biosvar.h" // CONFIG_BIOS_TABLE
10 #include "ioport.h" // inb
11 #include "cmos.h" // inb_cmos
14 #define E820_RESERVED 2
17 #define E820_UNUSABLE 5
19 // Use PS2 System Control port A to set A20 enable
23 // get current setting first
24 u8 newval, oldval = inb(PORT_A20);
26 newval = oldval | 0x02;
28 newval = oldval & ~0x02;
29 outb(newval, PORT_A20);
31 return (newval & 0x02) != 0;
35 handle_152400(struct bregs *regs)
38 set_code_success(regs);
42 handle_152401(struct bregs *regs)
45 set_code_success(regs);
49 handle_152402(struct bregs *regs)
51 regs->al = !!(inb(PORT_A20) & 0x20);
52 set_code_success(regs);
56 handle_152403(struct bregs *regs)
59 set_code_success(regs);
63 handle_1524XX(struct bregs *regs)
65 set_code_fail(regs, RET_EUNSUPPORTED);
69 handle_1524(struct bregs *regs)
72 case 0x00: handle_152400(regs); break;
73 case 0x01: handle_152401(regs); break;
74 case 0x02: handle_152402(regs); break;
75 case 0x03: handle_152403(regs); break;
76 default: handle_1524XX(regs); break;
80 // removable media eject
82 handle_1552(struct bregs *regs)
84 set_code_success(regs);
87 // Wait for CX:DX microseconds. currently using the
88 // refresh request port 0x61 bit4, toggling every 15usec
90 handle_1586(struct bregs *regs)
93 usleep((regs->cx << 16) | regs->dx);
98 handle_1587(struct bregs *regs)
100 // +++ should probably have descriptor checks
101 // +++ should have exception handlers
103 u8 prev_a20_enable = set_a20(1); // enable A20 line
105 // 128K max of transfer on 386+ ???
106 // source == destination ???
108 // ES:SI points to descriptor table
109 // offset use initially comments
110 // ==============================================
111 // 00..07 Unused zeros Null descriptor
112 // 08..0f GDT zeros filled in by BIOS
113 // 10..17 source ssssssss source of data
114 // 18..1f dest dddddddd destination of data
115 // 20..27 CS zeros filled in by BIOS
116 // 28..2f SS zeros filled in by BIOS
123 // check for access rights of source & dest here
125 // Initialize GDT descriptor
126 SET_SEG(ES, regs->es);
128 u16 base15_00 = (regs->es << 4) + si;
129 u16 base23_16 = regs->es >> 12;
130 if (base15_00 < (u16)(regs->es<<4))
132 SET_VAR(ES, *(u16*)(si+0x08+0), 47); // limit 15:00 = 6 * 8bytes/descriptor
133 SET_VAR(ES, *(u16*)(si+0x08+2), base15_00);// base 15:00
134 SET_VAR(ES, *(u8 *)(si+0x08+4), base23_16);// base 23:16
135 SET_VAR(ES, *(u8 *)(si+0x08+5), 0x93); // access
136 SET_VAR(ES, *(u16*)(si+0x08+6), 0x0000); // base 31:24/reserved/limit 19:16
138 // Initialize CS descriptor
139 SET_VAR(ES, *(u16*)(si+0x20+0), 0xffff);// limit 15:00 = normal 64K limit
140 SET_VAR(ES, *(u16*)(si+0x20+2), 0x0000);// base 15:00
141 SET_VAR(ES, *(u8 *)(si+0x20+4), 0x000f);// base 23:16
142 SET_VAR(ES, *(u8 *)(si+0x20+5), 0x9b); // access
143 SET_VAR(ES, *(u16*)(si+0x20+6), 0x0000);// base 31:24/reserved/limit 19:16
145 // Initialize SS descriptor
146 u16 ss = GET_SEG(SS);
148 base23_16 = ss >> 12;
149 SET_VAR(ES, *(u16*)(si+0x28+0), 0xffff); // limit 15:00 = normal 64K limit
150 SET_VAR(ES, *(u16*)(si+0x28+2), base15_00);// base 15:00
151 SET_VAR(ES, *(u8 *)(si+0x28+4), base23_16);// base 23:16
152 SET_VAR(ES, *(u8 *)(si+0x28+5), 0x93); // access
153 SET_VAR(ES, *(u16*)(si+0x28+6), 0x0000); // base 31:24/reserved/limit 19:16
155 u16 count = regs->cx;
157 // Load new descriptor tables
158 "lgdtw %%es:0x8(%%si)\n"
159 "lidtw %%cs:pmode_IDT_info\n"
162 "movl %%cr0, %%eax\n"
164 "movl %%eax, %%cr0\n"
166 // far jump to flush CPU queue after transition to protected mode
167 "ljmpw $0x0020, $1f\n"
170 // GDT points to valid descriptor table, now load DS, ES
171 "movw $0x10, %%ax\n" // 010 000 = 2nd descriptor in table, TI=GDT, RPL=00
173 "movw $0x18, %%ax\n" // 011 000 = 3rd descriptor in table, TI=GDT, RPL=00
176 // move CX words from DS:SI to ES:DI
181 // reset PG bit in CR0 ???
182 "movl %%cr0, %%eax\n"
184 "movl %%eax, %%cr0\n"
186 // far jump to flush CPU queue after transition to real mode
187 "ljmpw $0xf000, $2f\n"
190 // restore IDT to normal real-mode defaults
191 "lidt %%cs:rmode_IDT_info\n"
193 // Restore %ds (from %ss)
196 : "+c"(count), "+S"(si)
197 : : "eax", "di", "cc"); // XXX - also clobbers %es
199 set_a20(prev_a20_enable);
201 set_code_success(regs);
204 // Get the amount of extended memory (above 1M)
206 handle_1588(struct bregs *regs)
208 regs->al = inb_cmos(CMOS_MEM_EXTMEM_LOW);
209 regs->ah = inb_cmos(CMOS_MEM_EXTMEM_HIGH);
210 // According to Ralf Brown's interrupt the limit should be 15M,
211 // but real machines mostly return max. 63M.
212 if (regs->ax > 0xffc0)
217 // Device busy interrupt. Called by Int 16h when no key available
219 handle_1590(struct bregs *regs)
223 // Interrupt complete. Called by Int 16h when key becomes available
225 handle_1591(struct bregs *regs)
229 // keyboard intercept
231 handle_154f(struct bregs *regs)
233 // set_fail(regs); -- don't report this failure.
238 handle_15c0(struct bregs *regs)
241 regs->bx = (u16)&BIOS_CONFIG_TABLE;
242 set_code_success(regs);
246 handle_15c1(struct bregs *regs)
248 regs->es = GET_BDA(ebda_seg);
253 handle_15e801(struct bregs *regs)
255 // my real system sets ax and bx to 0
256 // this is confirmed by Ralph Brown list
257 // but syslinux v1.48 is known to behave
258 // strangely if ax is set to 0
259 // regs.u.r16.ax = 0;
260 // regs.u.r16.bx = 0;
262 // Get the amount of extended memory (above 1M)
263 regs->cl = inb_cmos(CMOS_MEM_EXTMEM_LOW);
264 regs->ch = inb_cmos(CMOS_MEM_EXTMEM_HIGH);
267 if (regs->cx > 0x3c00)
270 // Get the amount of extended memory above 16M in 64k blocs
271 regs->dl = inb_cmos(CMOS_MEM_EXTMEM2_LOW);
272 regs->dh = inb_cmos(CMOS_MEM_EXTMEM2_HIGH);
274 // Set configured memory equal to extended memory
282 set_e820_range(struct bregs *regs, u32 start, u32 end, u16 type, int last)
284 SET_FARVAR(regs->es, *(u16*)(regs->di+0), start);
285 SET_FARVAR(regs->es, *(u16*)(regs->di+2), start >> 16);
286 SET_FARVAR(regs->es, *(u16*)(regs->di+4), 0x00);
287 SET_FARVAR(regs->es, *(u16*)(regs->di+6), 0x00);
290 SET_FARVAR(regs->es, *(u16*)(regs->di+8), end);
291 SET_FARVAR(regs->es, *(u16*)(regs->di+10), end >> 16);
292 SET_FARVAR(regs->es, *(u16*)(regs->di+12), 0x0000);
293 SET_FARVAR(regs->es, *(u16*)(regs->di+14), 0x0000);
295 SET_FARVAR(regs->es, *(u16*)(regs->di+16), type);
296 SET_FARVAR(regs->es, *(u16*)(regs->di+18), 0x0);
302 regs->eax = 0x534D4150;
307 // XXX - should create e820 memory map in post and just copy it here.
309 handle_15e820(struct bregs *regs)
311 if (regs->edx != 0x534D4150) {
312 set_code_fail(regs, RET_EUNSUPPORTED);
316 u32 extended_memory_size = inb_cmos(CMOS_MEM_EXTMEM2_HIGH);
317 extended_memory_size <<= 8;
318 extended_memory_size |= inb_cmos(CMOS_MEM_EXTMEM2_LOW);
319 extended_memory_size *= 64;
320 // greater than EFF00000???
321 if (extended_memory_size > 0x3bc000)
322 // everything after this is reserved memory until we get to 0x100000000
323 extended_memory_size = 0x3bc000;
324 extended_memory_size *= 1024;
325 extended_memory_size += (16L * 1024 * 1024);
327 if (extended_memory_size <= (16L * 1024 * 1024)) {
328 extended_memory_size = inb_cmos(CMOS_MEM_EXTMEM_HIGH);
329 extended_memory_size <<= 8;
330 extended_memory_size |= inb_cmos(CMOS_MEM_EXTMEM_LOW);
331 extended_memory_size *= 1024;
332 extended_memory_size += 1 * 1024 * 1024;
337 set_e820_range(regs, 0x0000000L, 0x0009fc00L, E820_RAM, 0);
340 set_e820_range(regs, 0x0009fc00L, 0x000a0000L, E820_RESERVED, 0);
343 set_e820_range(regs, 0x000e8000L, 0x00100000L, E820_RESERVED, 0);
346 set_e820_range(regs, 0x00100000L
347 , extended_memory_size - CONFIG_ACPI_DATA_SIZE
352 extended_memory_size - CONFIG_ACPI_DATA_SIZE,
353 extended_memory_size, E820_ACPI, 0);
356 /* 256KB BIOS area at the end of 4 GB */
357 set_e820_range(regs, 0xfffc0000L, 0x00000000L, E820_RESERVED, 1);
359 default: /* AX=E820, DX=534D4150, BX unrecognized */
360 set_code_fail(regs, RET_EUNSUPPORTED);
365 handle_15e8XX(struct bregs *regs)
367 set_code_fail(regs, RET_EUNSUPPORTED);
371 handle_15e8(struct bregs *regs)
374 case 0x01: handle_15e801(regs); break;
375 case 0x20: handle_15e820(regs); break;
376 default: handle_15e8XX(regs); break;
381 handle_15XX(struct bregs *regs)
383 set_code_fail(regs, RET_EUNSUPPORTED);
386 // INT 15h System Services Entry Point
388 handle_15(struct bregs *regs)
392 case 0x24: handle_1524(regs); break;
393 case 0x4f: handle_154f(regs); break;
394 case 0x52: handle_1552(regs); break;
395 case 0x53: handle_1553(regs); break;
396 case 0x83: handle_1583(regs); break;
397 case 0x86: handle_1586(regs); break;
398 case 0x87: handle_1587(regs); break;
399 case 0x88: handle_1588(regs); break;
400 case 0x90: handle_1590(regs); break;
401 case 0x91: handle_1591(regs); break;
402 case 0xc0: handle_15c0(regs); break;
403 case 0xc1: handle_15c1(regs); break;
404 case 0xc2: handle_15c2(regs); break;
405 case 0xe8: handle_15e8(regs); break;
406 default: handle_15XX(regs); break;
410 // INT 12h Memory Size Service Entry Point
412 handle_12(struct bregs *regs)
415 regs->ax = GET_BDA(mem_size_kb);
418 // INT 11h Equipment List Service Entry Point
420 handle_11(struct bregs *regs)
423 regs->ax = GET_BDA(equipment_list_flags);
426 // INT 05h Print Screen Service Entry Point
428 handle_05(struct bregs *regs)
433 // INT 10h Video Support Service Entry Point
435 handle_10(struct bregs *regs)
438 // dont do anything, since the VGA BIOS handles int10h requests
445 BX_PANIC("NMI Handler called\n");
448 // INT 75 - IRQ13 - MATH COPROCESSOR EXCEPTION
455 outb(0, PORT_MATH_CLEAR);
460 memset(&br, 0, sizeof(br));
461 call16_int(0x02, &br);