1 // 16bit system callbacks
3 // Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2002 MandrakeSoft S.A.
6 // This file may be distributed under the terms of the GNU GPLv3 license.
9 #include "util.h" // irq_restore
10 #include "biosvar.h" // CONFIG_BIOS_TABLE
11 #include "ioport.h" // inb
12 #include "cmos.h" // inb_cmos
14 // Use PS2 System Control port A to set A20 enable
18 // get current setting first
19 u8 newval, oldval = inb(PORT_A20);
21 newval = oldval | 0x02;
23 newval = oldval & ~0x02;
24 outb(newval, PORT_A20);
26 return (newval & 0x02) != 0;
30 handle_152400(struct bregs *regs)
37 handle_152401(struct bregs *regs)
44 handle_152402(struct bregs *regs)
46 regs->al = !!(inb(PORT_A20) & 0x20);
51 handle_152403(struct bregs *regs)
58 handle_1524XX(struct bregs *regs)
60 handle_ret(regs, RET_EUNSUPPORTED);
64 handle_1524(struct bregs *regs)
67 case 0x00: handle_152400(regs); break;
68 case 0x01: handle_152401(regs); break;
69 case 0x02: handle_152402(regs); break;
70 case 0x03: handle_152403(regs); break;
71 default: handle_1524XX(regs); break;
75 // removable media eject
77 handle_1552(struct bregs *regs)
82 // Sleep for n microseconds. currently using the
83 // refresh request port 0x61 bit4, toggling every 15usec
88 u8 kbd = inb(PORT_PS2_CTRLB);
90 if ((inb(PORT_PS2_CTRLB) ^ kbd) & KBD_REFRESH)
94 // Wait for CX:DX microseconds. currently using the
95 // refresh request port 0x61 bit4, toggling every 15usec
97 handle_1586(struct bregs *regs)
100 usleep((regs->cx << 16) | regs->dx);
105 handle_1587(struct bregs *regs)
107 // +++ should probably have descriptor checks
108 // +++ should have exception handlers
110 u8 prev_a20_enable = set_a20(1); // enable A20 line
112 // 128K max of transfer on 386+ ???
113 // source == destination ???
115 // ES:SI points to descriptor table
116 // offset use initially comments
117 // ==============================================
118 // 00..07 Unused zeros Null descriptor
119 // 08..0f GDT zeros filled in by BIOS
120 // 10..17 source ssssssss source of data
121 // 18..1f dest dddddddd destination of data
122 // 20..27 CS zeros filled in by BIOS
123 // 28..2f SS zeros filled in by BIOS
130 // check for access rights of source & dest here
132 // Initialize GDT descriptor
134 u16 base15_00 = (regs->es << 4) + si;
135 u16 base23_16 = regs->es >> 12;
136 if (base15_00 < (regs->es<<4))
138 SET_VAR(ES, *(u16*)(si+0x08+0), 47); // limit 15:00 = 6 * 8bytes/descriptor
139 SET_VAR(ES, *(u16*)(si+0x08+2), base15_00);// base 15:00
140 SET_VAR(ES, *(u8 *)(si+0x08+4), base23_16);// base 23:16
141 SET_VAR(ES, *(u8 *)(si+0x08+5), 0x93); // access
142 SET_VAR(ES, *(u16*)(si+0x08+6), 0x0000); // base 31:24/reserved/limit 19:16
144 // Initialize CS descriptor
145 SET_VAR(ES, *(u16*)(si+0x20+0), 0xffff);// limit 15:00 = normal 64K limit
146 SET_VAR(ES, *(u16*)(si+0x20+2), 0x0000);// base 15:00
147 SET_VAR(ES, *(u8 *)(si+0x20+4), 0x000f);// base 23:16
148 SET_VAR(ES, *(u8 *)(si+0x20+5), 0x9b); // access
149 SET_VAR(ES, *(u16*)(si+0x20+6), 0x0000);// base 31:24/reserved/limit 19:16
151 // Initialize SS descriptor
152 u16 ss = GET_SEG(SS);
154 base23_16 = ss >> 12;
155 SET_VAR(ES, *(u16*)(si+0x28+0), 0xffff); // limit 15:00 = normal 64K limit
156 SET_VAR(ES, *(u16*)(si+0x28+2), base15_00);// base 15:00
157 SET_VAR(ES, *(u8 *)(si+0x28+4), base23_16);// base 23:16
158 SET_VAR(ES, *(u8 *)(si+0x28+5), 0x93); // access
159 SET_VAR(ES, *(u16*)(si+0x28+6), 0x0000); // base 31:24/reserved/limit 19:16
162 // Load new descriptor tables
164 "lidt %%cs:pmode_IDT_info\n"
167 "movl %%cr0, %%eax\n"
169 "movl %%eax, %%cr0\n"
171 // far jump to flush CPU queue after transition to protected mode
172 "ljmpw $0x0020, $1f\n"
175 // GDT points to valid descriptor table, now load DS, ES
176 "movw $0x10, %%ax\n" // 010 000 = 2nd descriptor in table, TI=GDT, RPL=00
178 "movw $0x18, %%ax\n" // 011 000 = 3rd descriptor in table, TI=GDT, RPL=00
181 // move CX words from DS:SI to ES:DI
187 // reset PG bit in CR0 ???
188 "movl %%cr0, %%eax\n"
190 "movl %%eax, %%cr0\n"
192 // far jump to flush CPU queue after transition to real mode
193 "ljmpw $0xf000, $2f\n"
196 // restore IDT to normal real-mode defaults
197 "lidt %%cs:rmode_IDT_info\n"
199 // Restore %ds (from %ss)
202 : : "c" (regs->cx), "r" (si + 8)
203 : "eax", "di", "si"); // XXX - also clobbers %es
205 set_a20(prev_a20_enable);
210 // Get the amount of extended memory (above 1M)
212 handle_1588(struct bregs *regs)
214 regs->al = inb_cmos(CMOS_MEM_EXTMEM_LOW);
215 regs->ah = inb_cmos(CMOS_MEM_EXTMEM_HIGH);
216 // According to Ralf Brown's interrupt the limit should be 15M,
217 // but real machines mostly return max. 63M.
218 if (regs->ax > 0xffc0)
223 // Device busy interrupt. Called by Int 16h when no key available
225 handle_1590(struct bregs *regs)
229 // Interrupt complete. Called by Int 16h when key becomes available
231 handle_1591(struct bregs *regs)
235 // keyboard intercept
237 handle_154f(struct bregs *regs)
243 handle_15c0(struct bregs *regs)
246 regs->bx = (u16)&BIOS_CONFIG_TABLE;
251 handle_15c1(struct bregs *regs)
253 regs->es = GET_BDA(ebda_seg);
258 handle_15e801(struct bregs *regs)
260 // my real system sets ax and bx to 0
261 // this is confirmed by Ralph Brown list
262 // but syslinux v1.48 is known to behave
263 // strangely if ax is set to 0
264 // regs.u.r16.ax = 0;
265 // regs.u.r16.bx = 0;
267 // Get the amount of extended memory (above 1M)
268 regs->cl = inb_cmos(CMOS_MEM_EXTMEM_LOW);
269 regs->ch = inb_cmos(CMOS_MEM_EXTMEM_HIGH);
272 if (regs->cx > 0x3c00)
275 // Get the amount of extended memory above 16M in 64k blocs
276 regs->dl = inb_cmos(CMOS_MEM_EXTMEM2_LOW);
277 regs->dh = inb_cmos(CMOS_MEM_EXTMEM2_HIGH);
279 // Set configured memory equal to extended memory
287 set_e820_range(u16 DI, u32 start, u32 end, u16 type)
289 SET_VAR(ES, *(u16*)(DI+0), start);
290 SET_VAR(ES, *(u16*)(DI+2), start >> 16);
291 SET_VAR(ES, *(u16*)(DI+4), 0x00);
292 SET_VAR(ES, *(u16*)(DI+6), 0x00);
295 SET_VAR(ES, *(u16*)(DI+8), end);
296 SET_VAR(ES, *(u16*)(DI+10), end >> 16);
297 SET_VAR(ES, *(u16*)(DI+12), 0x0000);
298 SET_VAR(ES, *(u16*)(DI+14), 0x0000);
300 SET_VAR(ES, *(u16*)(DI+16), type);
301 SET_VAR(ES, *(u16*)(DI+18), 0x0);
304 // XXX - should create e820 memory map in post and just copy it here.
306 handle_15e820(struct bregs *regs)
308 if (regs->edx != 0x534D4150) {
309 handle_ret(regs, RET_EUNSUPPORTED);
313 u32 extended_memory_size = inb_cmos(CMOS_MEM_EXTMEM2_HIGH);
314 extended_memory_size <<= 8;
315 extended_memory_size |= inb_cmos(CMOS_MEM_EXTMEM2_LOW);
316 extended_memory_size *= 64;
317 // greater than EFF00000???
318 if (extended_memory_size > 0x3bc000)
319 // everything after this is reserved memory until we get to 0x100000000
320 extended_memory_size = 0x3bc000;
321 extended_memory_size *= 1024;
322 extended_memory_size += (16L * 1024 * 1024);
324 if (extended_memory_size <= (16L * 1024 * 1024)) {
325 extended_memory_size = inb_cmos(CMOS_MEM_EXTMEM_HIGH);
326 extended_memory_size <<= 8;
327 extended_memory_size |= inb_cmos(CMOS_MEM_EXTMEM_LOW);
328 extended_memory_size *= 1024;
333 set_e820_range(regs->di, 0x0000000L, 0x0009fc00L, 1);
335 regs->eax = 0x534D4150;
340 set_e820_range(regs->di, 0x0009fc00L, 0x000a0000L, 2);
342 regs->eax = 0x534D4150;
347 set_e820_range(regs->di, 0x000e8000L, 0x00100000L, 2);
349 regs->eax = 0x534D4150;
354 set_e820_range(regs->di, 0x00100000L,
355 extended_memory_size - ACPI_DATA_SIZE, 1);
357 regs->eax = 0x534D4150;
362 set_e820_range(regs->di,
363 extended_memory_size - ACPI_DATA_SIZE,
364 extended_memory_size, 3); // ACPI RAM
366 regs->eax = 0x534D4150;
371 /* 256KB BIOS area at the end of 4 GB */
372 set_e820_range(regs->di, 0xfffc0000L, 0x00000000L, 2);
374 regs->eax = 0x534D4150;
378 default: /* AX=E820, DX=534D4150, BX unrecognized */
379 handle_ret(regs, RET_EUNSUPPORTED);
384 handle_15e8XX(struct bregs *regs)
386 handle_ret(regs, RET_EUNSUPPORTED);
390 handle_15e8(struct bregs *regs)
393 case 0x01: handle_15e801(regs); break;
394 case 0x20: handle_15e820(regs); break;
395 default: handle_15e8XX(regs); break;
400 handle_15XX(struct bregs *regs)
402 handle_ret(regs, RET_EUNSUPPORTED);
405 // INT 15h System Services Entry Point
407 handle_15(struct bregs *regs)
411 case 0x24: handle_1524(regs); break;
412 case 0x4f: handle_154f(regs); break;
413 case 0x52: handle_1552(regs); break;
414 case 0x53: handle_1553(regs); break;
415 case 0x83: handle_1583(regs); break;
416 case 0x86: handle_1586(regs); break;
417 case 0x87: handle_1587(regs); break;
418 case 0x88: handle_1588(regs); break;
419 case 0x90: handle_1590(regs); break;
420 case 0x91: handle_1591(regs); break;
421 case 0xc0: handle_15c0(regs); break;
422 case 0xc1: handle_15c1(regs); break;
423 case 0xc2: handle_15c2(regs); break;
424 case 0xe8: handle_15e8(regs); break;
425 default: handle_15XX(regs); break;
430 // INT 12h Memory Size Service Entry Point
432 handle_12(struct bregs *regs)
435 regs->ax = GET_BDA(mem_size_kb);
439 // INT 11h Equipment List Service Entry Point
441 handle_11(struct bregs *regs)
444 regs->ax = GET_BDA(equipment_list_flags);
448 // INT 05h Print Screen Service Entry Point
450 handle_05(struct bregs *regs)
455 // INT 10h Video Support Service Entry Point
457 handle_10(struct bregs *regs)
460 // dont do anything, since the VGA BIOS handles int10h requests
464 handle_nmi(struct bregs *regs)
470 // INT 75 - IRQ13 - MATH COPROCESSOR EXCEPTION
472 handle_75(struct bregs *regs)
477 outb(0, PORT_MATH_CLEAR);
482 memset(&br, 0, sizeof(br));
483 call16_int(0x02, &br);