6b08f8746c5fd9002e7a3e43d942e62ea2423e6a
[coreboot.git] / src / superio / winbond / w83627thf / superio.c
1 /* Copyright 2000  AG Electronics Ltd. */
2 /* Copyright 2003-2004 Linux Networx */
3 /* Copyright 2004 Tyan 
4    By LYH change from PC87360 */
5 /* This code is distributed without warranty under the GPL v2 (see COPYING) */
6
7 #include <arch/io.h>
8 #include <device/device.h>
9 #include <device/pnp.h>
10 #include <console/console.h>
11 #include <string.h>
12 #include <bitops.h>
13 #include <uart8250.h>
14 #include <pc80/keyboard.h>
15 #include "chip.h"
16 #include "w83627thf.h"
17
18 static void w83627thf_enter_ext_func_mode(device_t dev) 
19 {
20         outb(0x87, dev->path.u.pnp.port);
21         outb(0x87, dev->path.u.pnp.port);
22 }
23 static void w83627thf_exit_ext_func_mode(device_t dev) 
24 {
25         outb(0xaa, dev->path.u.pnp.port);
26 }
27
28 static void w83627thf_init(device_t dev)
29 {
30         struct superio_winbond_w83627thf_config *conf;
31         struct resource *res0, *res1;
32         /* Wishlist handle well known programming interfaces more
33          * generically.
34          */
35         if (!dev->enabled) {
36                 return;
37         }
38         conf = dev->chip_info;
39         switch(dev->path.u.pnp.device) {
40         case W83627THF_SP1: 
41                 res0 = find_resource(dev, PNP_IDX_IO0);
42                 init_uart8250(res0->base, &conf->com1);
43                 break;
44         case W83627THF_SP2:
45                 res0 = find_resource(dev, PNP_IDX_IO0);
46                 init_uart8250(res0->base, &conf->com2);
47                 break;
48         case W83627THF_KBC:
49                 res0 = find_resource(dev, PNP_IDX_IO0);
50                 res1 = find_resource(dev, PNP_IDX_IO1);
51                 init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
52                 break;
53         }
54 }
55
56 static void w83627thf_set_resources(device_t dev)
57 {
58         w83627thf_enter_ext_func_mode(dev);
59         pnp_set_resources(dev);
60         w83627thf_exit_ext_func_mode(dev);
61 }
62
63 static void w83627thf_enable_resources(device_t dev)
64 {
65         w83627thf_enter_ext_func_mode(dev);
66         pnp_enable_resources(dev);
67         w83627thf_exit_ext_func_mode(dev);
68 }
69
70 static void w83627thf_enable(device_t dev)
71 {
72         w83627thf_enter_ext_func_mode(dev);   
73         pnp_enable(dev);
74         w83627thf_exit_ext_func_mode(dev);  
75 }
76
77
78 static struct device_operations ops = {
79         .read_resources   = pnp_read_resources,
80         .set_resources    = w83627thf_set_resources,
81         .enable_resources = w83627thf_enable_resources,
82         .enable           = w83627thf_enable,
83         .init             = w83627thf_init,
84 };
85
86 static struct pnp_info pnp_dev_info[] = {
87         { &ops, W83627THF_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
88         { &ops, W83627THF_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
89         { &ops, W83627THF_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
90         { &ops, W83627THF_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
91         // No 4 { 0,},
92         { &ops, W83627THF_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
93         { &ops, W83627THF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
94         { &ops, W83627THF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} },
95         // { W83627THF_GPIO2,},
96         // { W83627THF_GPIO3,},
97         { &ops, W83627THF_ACPI, PNP_IRQ0,  },
98         { &ops, W83627THF_HWM,  PNP_IO0 | PNP_IRQ0, { 0xff8, 0 } },
99 };
100
101 static void enable_dev(device_t dev)
102 {
103         pnp_enable_devices(dev, &ops,
104                 sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
105 }
106
107 struct chip_operations superio_winbond_w83627thf_ops = {
108         CHIP_NAME("Winbond W83627THF Super I/O")
109         .enable_dev = enable_dev,
110 };