src/superio/winbond/w83627hf/superio.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2000 AG Electronics Ltd.
   5  * Copyright (C) 2003-2004 Linux Networx
   6  * Copyright (C) 2004 Tyan By LYH change from PC87360
   7  * Copyright (C) 2010 Win Enterprises (anishp@win-ent.com)
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  22  */
  23
  24 #include <arch/io.h>
  25 #include <device/device.h>
  26 #include <device/pnp.h>
  27 #include <console/console.h>
  28 #include <string.h>
  29 #include <bitops.h>
  30 #include <uart8250.h>
  31 #include <pc80/keyboard.h>
  32 #include <pc80/mc146818rtc.h>
  33 #include <stdlib.h>
  34 #include "chip.h"
  35 #include "w83627hf.h"
  36
  37 static void pnp_enter_ext_func_mode(device_t dev)
  38 {
  39         outb(0x87, dev->path.pnp.port);
  40         outb(0x87, dev->path.pnp.port);
  41 }
  42
  43 static void pnp_exit_ext_func_mode(device_t dev)
  44 {
  45         outb(0xaa, dev->path.pnp.port);
  46 }
  47
  48 static void pnp_write_index(unsigned long port_base, uint8_t reg, uint8_t value)
  49 {
  50         outb(reg, port_base);
  51         outb(value, port_base + 1);
  52 }
  53
  54 static uint8_t pnp_read_index(unsigned long port_base, uint8_t reg)
  55 {
  56         outb(reg, port_base);
  57         return inb(port_base + 1);
  58 }
  59
  60 static void w83627hf_16_bit_addr_qual(device_t dev)
  61 {
  62       int port = dev->path.pnp.port >> 8;
  63       pnp_enter_ext_func_mode(dev);
  64       outb(0x24, port);
  65       /* enable 16 bit address qualification */
  66       outb(inb(port + 1) | 0x80, port + 1);
  67       pnp_exit_ext_func_mode(dev);
  68 }
  69
  70 static void enable_hwm_smbus(device_t dev)
  71 {
  72         /* set the pin 91,92 as I2C bus */
  73         uint8_t reg, value;
  74         reg = 0x2b;
  75         value = pnp_read_config(dev, reg);
  76         value &= 0x3f;
  77         pnp_write_config(dev, reg, value);
  78 }
  79
  80 static void init_acpi(device_t dev)
  81 {
  82         uint8_t  value = 0x20;
  83         int power_on = 1;
  84
  85         get_option(&power_on, "power_on_after_fail");
  86         pnp_enter_ext_func_mode(dev);
  87         pnp_write_index(dev->path.pnp.port,7,0x0a);
  88         value = pnp_read_config(dev, 0xE4);
  89         value &= ~(3<<5);
  90         if(power_on) {
  91                 value |= (1<<5);
  92         }
  93         pnp_write_config(dev, 0xE4, value);
  94         pnp_exit_ext_func_mode(dev);
  95 }
  96
  97 static void init_hwm(unsigned long base)
  98 {
  99         uint8_t  reg, value;
 100         int i;
 101
 102         unsigned  hwm_reg_values[] = {
 103         /*      reg  mask  data */
 104                 0x40, 0xff, 0x81,  /* start HWM */
 105                 0x48, 0xaa, 0x2a,  /* set SMBus base to 0x54>>1 */
 106                 0x4a, 0x21, 0x21,  /* set T2 SMBus base to 0x92>>1 and T3 SMBus base to 0x94>>1 */
 107                 0x4e, 0x80, 0x00,
 108                 0x43, 0x00, 0xff,
 109                 0x44, 0x00, 0x3f,
 110                 0x4c, 0xbf, 0x18,
 111                 0x4d, 0xff, 0x80   /* turn off beep */
 112
 113         };
 114
 115         for(i = 0; i<  ARRAY_SIZE(hwm_reg_values); i+=3 ) {
 116                 reg = hwm_reg_values[i];
 117                 value = pnp_read_index(base, reg);
 118                 value &= 0xff & hwm_reg_values[i+1];
 119                 value |= 0xff & hwm_reg_values[i+2];
 120 #if 0
 121                 printk_debug("base = 0x%04x, reg = 0x%02x, value = 0x%02x\r\n", base, reg,value);
 122 #endif
 123                 pnp_write_index(base, reg, value);
 124         }
 125 }
 126
 127 static void w83627hf_init(device_t dev)
 128 {
 129         struct superio_winbond_w83627hf_config *conf;
 130         struct resource *res0, *res1;
 131         if (!dev->enabled) {
 132                 return;
 133         }
 134         conf = dev->chip_info;
 135         switch(dev->path.pnp.device) {
 136         case W83627HF_SP1:
 137                 res0 = find_resource(dev, PNP_IDX_IO0);
 138                 init_uart8250(res0->base, &conf->com1);
 139                 break;
 140         case W83627HF_SP2:
 141                 res0 = find_resource(dev, PNP_IDX_IO0);
 142                 init_uart8250(res0->base, &conf->com2);
 143                 break;
 144         case W83627HF_KBC:
 145                 res0 = find_resource(dev, PNP_IDX_IO0);
 146                 res1 = find_resource(dev, PNP_IDX_IO1);
 147                 pc_keyboard_init(&conf->keyboard);
 148                 break;
 149         case W83627HF_HWM:
 150                 res0 = find_resource(dev, PNP_IDX_IO0);
 151 #define HWM_INDEX_PORT 5
 152                 init_hwm(res0->base + HWM_INDEX_PORT);
 153                 break;
 154         case W83627HF_ACPI:
 155                 init_acpi(dev);
 156                 break;
 157         }
 158 }
 159
 160 static void w83627hf_pnp_set_resources(device_t dev)
 161 {
 162         pnp_enter_ext_func_mode(dev);
 163         pnp_set_resources(dev);
 164         pnp_exit_ext_func_mode(dev);
 165 }
 166
 167 static void w83627hf_pnp_enable_resources(device_t dev)
 168 {
 169         pnp_enter_ext_func_mode(dev);
 170         pnp_enable_resources(dev);
 171         switch(dev->path.pnp.device) {
 172         case W83627HF_HWM:
 173                 printk_debug("w83627hf hwm smbus enabled\n");
 174                 enable_hwm_smbus(dev);
 175                 break;
 176         }
 177         pnp_exit_ext_func_mode(dev);
 178 }
 179
 180 static void w83627hf_pnp_enable(device_t dev)
 181 {
 182         if (!dev->enabled) {
 183                 pnp_enter_ext_func_mode(dev);
 184
 185                 pnp_set_logical_device(dev);
 186                 pnp_set_enable(dev, 0);
 187
 188                 pnp_exit_ext_func_mode(dev);
 189         }
 190 }
 191
 192 static struct device_operations ops = {
 193         .read_resources   = pnp_read_resources,
 194         .set_resources    = w83627hf_pnp_set_resources,
 195         .enable_resources = w83627hf_pnp_enable_resources,
 196         .enable           = w83627hf_pnp_enable,
 197         .init             = w83627hf_init,
 198 };
 199
 200 static struct pnp_info pnp_dev_info[] = {
 201         { &ops, W83627HF_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
 202         { &ops, W83627HF_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
 203         { &ops, W83627HF_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
 204         { &ops, W83627HF_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
 205         /* No 4 { 0,}, */
 206         { &ops, W83627HF_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
 207         { &ops, W83627HF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
 208         { &ops, W83627HF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 0x4}, },
 209         { &ops, W83627HF_GPIO2, },
 210         { &ops, W83627HF_GPIO3, },
 211         { &ops, W83627HF_ACPI, },
 212         { &ops, W83627HF_HWM,  PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, },
 213 };
 214
 215 static void enable_dev(struct device *dev)
 216 {
 217         pnp_enable_devices(dev, &ops,
 218                 ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
 219 }
 220
 221 struct chip_operations superio_winbond_w83627hf_ops = {
 222         CHIP_NAME("Winbond W83627HF Super I/O")
 223         .enable_dev = enable_dev,
 224 };