2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 AMD
5 * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 #ifndef SUPERIO_WINBOND_W83627EHG_W83627EHG_H
23 #define SUPERIO_WINBOND_W83627EHG_W83627EHG_H
25 #define W83627EHG_FDC 0 /* Floppy */
26 #define W83627EHG_PP 1 /* Parallel Port */
27 #define W83627EHG_SP1 2 /* Com1 */
28 #define W83627EHG_SP2 3 /* Com2 */
29 #define W83627EHG_KBC 5 /* Keyboard & Mouse */
30 #define W83627EHG_GPIO_GAME_MIDI 7 /* GPIO1, GPIO6, Game Port and MIDI Port */
31 #define W83627EHG_WDTO_PLED 8 /* TODO */
32 #define W83627EHG_GPIO_SUSLED 9 /* GPIO2, GPIO3, GPIO4, GPIO5 and SUSLED */
33 #define W83627EHG_ACPI 10 /* ACPI */
34 #define W83627EHG_HWM 11 /* Hardware Monitor */
36 /* virtual devices sharing the enables are encoded as follows:
37 * VLDN = baseLDN[7:0] | [10:8] bitpos of enable in 0x30 of baseLDN
40 #define W83627EHG_SFI ((1 << 8) | 6) /* Flash has bit1 as enable */
41 #define W83627EHG_GPIO1 W83627EHG_GPIO_GAME_MIDI /* GPIO1 is at LDN 7, bit 0 */
42 #define W83627EHG_GAME ((1 << 8) | 7)
43 #define W83627EHG_MIDI ((2 << 8) | 7)
44 #define W83627EHG_GPIO6 ((3 << 8) | 7)
46 #define W83627EHG_GPIO2 W83627EHG_GPIO_SUSLED /* GPIO2 is at LDN 9, bit 0 */
47 #define W83627EHG_GPIO3 ((1 << 8) | 9)
48 #define W83627EHG_GPIO4 ((2 << 8) | 9)
49 #define W83627EHG_GPIO5 ((3 << 8) | 9)
51 #if defined(__PRE_RAM__) && !defined(__ROMCC__)
52 void w83627ehg_enable_dev(device_t dev, unsigned iobase);
53 void w83627ehg_disable_dev(device_t dev);
54 void w83627ehg_enable_serial(device_t dev, unsigned iobase);