src/superio/smsc/lpc47n217/superio.c

   1 /*
   2  * This file is part of the LinuxBIOS project.
   3  *
   4  * Copyright (C) 2000 AG Electronics Ltd.
   5  * Copyright (C) 2003-2004 Linux Networx
   6  * Copyright (C) 2004 Tyan
   7  * Copyright (C) 2005 Digital Design Corporation
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  22  */
  23
  24 /* RAM-based driver for SMSC LPC47N217 Super I/O chip. */
  25 /* Based on LinuxBIOS code for SMSC 47B397. */
  26
  27 #include <arch/io.h>
  28 #include <device/device.h>
  29 #include <device/pnp.h>
  30 #include <console/console.h>
  31 #include <device/smbus.h>
  32 #include <string.h>
  33 #include <bitops.h>
  34 #include <uart8250.h>
  35 #include <assert.h>
  36 #include "chip.h"
  37 #include "lpc47n217.h"
  38
  39 // Forward declarations
  40 static void enable_dev(device_t dev);
  41 void lpc47n217_pnp_set_resources(device_t dev);
  42 void lpc47n217_pnp_enable_resources(device_t dev);
  43 void lpc47n217_pnp_enable(device_t dev);
  44 static void lpc47n217_init(device_t dev);
  45
  46 static void lpc47n217_pnp_set_resource(device_t dev, struct resource *resource);
  47 void lpc47n217_pnp_set_iobase(device_t dev, unsigned iobase);
  48 void lpc47n217_pnp_set_drq(device_t dev, unsigned drq);
  49 void lpc47n217_pnp_set_irq(device_t dev, unsigned irq);
  50 void lpc47n217_pnp_set_enable(device_t dev, int enable);
  51
  52 static void pnp_enter_conf_state(device_t dev);
  53 static void pnp_exit_conf_state(device_t dev);
  54
  55
  56 struct chip_operations superio_smsc_lpc47n217_ops = {
  57         CHIP_NAME("SMSC LPC47N217 Super I/O")
  58         .enable_dev = enable_dev,
  59 };
  60
  61 static struct device_operations ops = {
  62         .read_resources   = pnp_read_resources,
  63         .set_resources    = lpc47n217_pnp_set_resources,
  64         .enable_resources = lpc47n217_pnp_enable_resources,
  65         .enable           = lpc47n217_pnp_enable,
  66         .init             = lpc47n217_init,
  67 };
  68
  69 static struct pnp_info pnp_dev_info[] = {
  70         { &ops, LPC47N217_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
  71         { &ops, LPC47N217_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
  72         { &ops, LPC47N217_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }
  73 };
  74
  75 /**********************************************************************************/
  76 /*                                                              PUBLIC INTERFACE                                                                  */
  77 /**********************************************************************************/
  78
  79 //----------------------------------------------------------------------------------
  80 // Function:            enable_dev
  81 // Parameters:          dev - pointer to structure describing a Super I/O device
  82 // Return Value:        None
  83 // Description:         Create device structures and allocate resources to devices
  84 //                                      specified in the pnp_dev_info array (above).
  85 //
  86 static void enable_dev(device_t dev)
  87 {
  88         pnp_enable_devices(dev, &pnp_ops,
  89                                            sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]),
  90                                            pnp_dev_info);
  91 }
  92
  93 //----------------------------------------------------------------------------------
  94 // Function:            lpc47n217_pnp_set_resources
  95 // Parameters:          dev - pointer to structure describing a Super I/O device
  96 // Return Value:        None
  97 // Description:         Configure the specified Super I/O device with the resources
  98 //                                      (I/O space, etc.) that have been allocate for it.
  99 //
 100 void lpc47n217_pnp_set_resources(device_t dev)
 101 {
 102         int i;
 103
 104         pnp_enter_conf_state(dev);
 105
 106         // NOTE: Cannot use pnp_set_resources() here because it assumes chip
 107         //               support for logical devices, which the LPC47N217 doesn't have
 108         for(i = 0; i < dev->resources; i++)
 109                 lpc47n217_pnp_set_resource(dev, &dev->resource[i]);
 110
 111 //      dump_pnp_device(dev);
 112
 113         pnp_exit_conf_state(dev);
 114 }
 115
 116 void lpc47n217_pnp_enable_resources(device_t dev)
 117 {
 118     pnp_enter_conf_state(dev);
 119
 120         // NOTE: Cannot use pnp_enable_resources() here because it assumes chip
 121         //               support for logical devices, which the LPC47N217 doesn't have
 122     lpc47n217_pnp_set_enable(dev, 1);
 123
 124     pnp_exit_conf_state(dev);
 125 }
 126
 127 void lpc47n217_pnp_enable(device_t dev)
 128 {
 129         pnp_enter_conf_state(dev);
 130
 131         // NOTE: Cannot use pnp_set_enable() here because it assumes chip
 132         //               support for logical devices, which the LPC47N217 doesn't have
 133
 134         if(dev->enabled) {
 135                 lpc47n217_pnp_set_enable(dev, 1);
 136         }
 137         else {
 138                 lpc47n217_pnp_set_enable(dev, 0);
 139         }
 140
 141         pnp_exit_conf_state(dev);
 142 }
 143
 144 //----------------------------------------------------------------------------------
 145 // Function:            lpc47n217_init
 146 // Parameters:          dev - pointer to structure describing a Super I/O device
 147 // Return Value:        None
 148 // Description:         Initialize the specified Super I/O device.
 149 //                                      Devices other than COM ports are ignored.
 150 //                                      For COM ports, we configure the baud rate.
 151 //
 152 static void lpc47n217_init(device_t dev)
 153 {
 154         struct superio_smsc_lpc47n217_config* conf = dev->chip_info;
 155         struct resource *res0;
 156
 157         if (!dev->enabled)
 158                 return;
 159
 160         switch(dev->path.u.pnp.device) {
 161         case LPC47N217_SP1:
 162                 res0 = find_resource(dev, PNP_IDX_IO0);
 163                 init_uart8250(res0->base, &conf->com1);
 164                 break;
 165
 166         case LPC47N217_SP2:
 167                 res0 = find_resource(dev, PNP_IDX_IO0);
 168                 init_uart8250(res0->base, &conf->com2);
 169                 break;
 170         }
 171 }
 172
 173
 174 /**********************************************************************************/
 175 /*                                                              PRIVATE FUNCTIONS                                                             */
 176 /**********************************************************************************/
 177
 178 static void lpc47n217_pnp_set_resource(device_t dev, struct resource *resource)
 179 {
 180         if (!(resource->flags & IORESOURCE_ASSIGNED)) {
 181                 printk_err("ERROR: %s %02x not allocated\n",
 182                         dev_path(dev), resource->index);
 183                 return;
 184         }
 185
 186         /* Now store the resource */
 187         // NOTE: Cannot use pnp_set_XXX() here because they assume chip
 188         //               support for logical devices, which the LPC47N217 doesn't have
 189
 190         if (resource->flags & IORESOURCE_IO) {
 191                 lpc47n217_pnp_set_iobase(dev, resource->base);
 192         }
 193         else if (resource->flags & IORESOURCE_DRQ) {
 194                 lpc47n217_pnp_set_drq(dev, resource->base);
 195         }
 196         else if (resource->flags  & IORESOURCE_IRQ) {
 197                 lpc47n217_pnp_set_irq(dev, resource->base);
 198         }
 199         else {
 200                 printk_err("ERROR: %s %02x unknown resource type\n",
 201                         dev_path(dev), resource->index);
 202                 return;
 203         }
 204         resource->flags |= IORESOURCE_STORED;
 205
 206         report_resource_stored(dev, resource, "");
 207 }
 208
 209 void lpc47n217_pnp_set_iobase(device_t dev, unsigned iobase)
 210 {
 211         ASSERT(!(iobase & 0x3));
 212
 213         switch(dev->path.u.pnp.device) {
 214         case LPC47N217_PP:
 215                 pnp_write_config(dev, 0x23, (iobase >> 2) & 0xff);
 216                 break;
 217
 218         case LPC47N217_SP1:
 219                 pnp_write_config(dev, 0x24, (iobase >> 2) & 0xff);
 220                 break;
 221
 222         case LPC47N217_SP2:
 223                 pnp_write_config(dev, 0x25, (iobase >> 2) & 0xff);
 224                 break;
 225
 226         default:
 227                 BUG();
 228                 break;
 229         }
 230 }
 231
 232 void lpc47n217_pnp_set_drq(device_t dev, unsigned drq)
 233 {
 234         if (dev->path.u.pnp.device == LPC47N217_PP) {
 235                 const uint8_t PP_DMA_MASK = 0x0F;
 236                 const uint8_t PP_DMA_SELECTION_REGISTER = 0x26;
 237                 uint8_t current_config = pnp_read_config(dev, PP_DMA_SELECTION_REGISTER);
 238                 uint8_t new_config;
 239
 240                 ASSERT(!(drq & ~PP_DMA_MASK));          // DRQ out of range??
 241                 new_config = (current_config & ~PP_DMA_MASK) | drq;
 242                 pnp_write_config(dev, PP_DMA_SELECTION_REGISTER, new_config);
 243         } else {
 244                 BUG();
 245         }
 246 }
 247
 248 void lpc47n217_pnp_set_irq(device_t dev, unsigned irq)
 249 {
 250         uint8_t irq_config_register = 0;
 251         uint8_t irq_config_mask = 0;
 252         uint8_t current_config;
 253         uint8_t new_config;
 254
 255         switch(dev->path.u.pnp.device) {
 256         case LPC47N217_PP:
 257                 irq_config_register = 0x27;
 258                 irq_config_mask = 0x0F;
 259                 break;
 260
 261         case LPC47N217_SP1:
 262                 irq_config_register = 0x28;
 263                 irq_config_mask = 0xF0;
 264                 irq <<= 4;
 265                 break;
 266
 267         case LPC47N217_SP2:
 268                 irq_config_register = 0x28;
 269                 irq_config_mask = 0x0F;
 270                 break;
 271
 272         default:
 273                 BUG();
 274                 return;
 275         }
 276
 277         ASSERT(!(irq & ~irq_config_mask));              // IRQ out of range??
 278
 279         current_config = pnp_read_config(dev, irq_config_register);
 280         new_config = (current_config & ~irq_config_mask) | irq;
 281         pnp_write_config(dev, irq_config_register, new_config);
 282 }
 283
 284 void lpc47n217_pnp_set_enable(device_t dev, int enable)
 285 {
 286         uint8_t power_register = 0;
 287         uint8_t power_mask = 0;
 288         uint8_t current_power;
 289         uint8_t new_power;
 290
 291         switch(dev->path.u.pnp.device) {
 292         case LPC47N217_PP:
 293                 power_register = 0x01;
 294                 power_mask = 0x04;
 295                 break;
 296
 297         case LPC47N217_SP1:
 298                 power_register = 0x02;
 299                 power_mask = 0x08;
 300                 break;
 301
 302         case LPC47N217_SP2:
 303                 power_register = 0x02;
 304                 power_mask = 0x80;
 305                 break;
 306
 307         default:
 308                 BUG();
 309                 return;
 310         }
 311
 312         current_power = pnp_read_config(dev, power_register);
 313         new_power = current_power & ~power_mask;                // disable by default
 314
 315         if (enable) {
 316                 struct resource* ioport_resource = find_resource(dev, PNP_IDX_IO0);
 317                 lpc47n217_pnp_set_iobase(dev, ioport_resource->base);
 318
 319                 new_power |= power_mask;                // Enable
 320
 321     } else {
 322                 lpc47n217_pnp_set_iobase(dev, 0);
 323         }
 324         pnp_write_config(dev, power_register, new_power);
 325 }
 326
 327
 328 //----------------------------------------------------------------------------------
 329 // Function:            pnp_enter_conf_state
 330 // Parameters:          dev - pointer to structure describing a Super I/O device
 331 // Return Value:        None
 332 // Description:         Enable access to the LPC47N217's configuration registers.
 333 //
 334 static void pnp_enter_conf_state(device_t dev)
 335 {
 336         outb(0x55, dev->path.u.pnp.port);
 337 }
 338
 339 //----------------------------------------------------------------------------------
 340 // Function:            pnp_exit_conf_state
 341 // Parameters:          dev - pointer to structure describing a Super I/O device
 342 // Return Value:        None
 343 // Description:         Disable access to the LPC47N217's configuration registers.
 344 //
 345 static void pnp_exit_conf_state(device_t dev)
 346 {
 347     outb(0xaa, dev->path.u.pnp.port);
 348 }
 349
 350 #if 0
 351 //----------------------------------------------------------------------------------
 352 // Function:            dump_pnp_device
 353 // Parameters:          dev - pointer to structure describing a Super I/O device
 354 // Return Value:        None
 355 // Description:         Print the values of all of the LPC47N217's configuration registers.
 356 //                                      NOTE: The LPC47N217 must be in configuration mode when this
 357 //                                                function is called.
 358 //
 359 static void dump_pnp_device(device_t dev)
 360 {
 361     int register_index;
 362     print_debug("\r\n");
 363
 364     for(register_index = 0; register_index <= LPC47N217_MAX_CONFIG_REGISTER; register_index++) {
 365         uint8_t register_value;
 366
 367         if ((register_index & 0x0f) == 0) {
 368                 print_debug_hex8(register_index);
 369                 print_debug_char(':');
 370         }
 371
 372                 // Skip over 'register' that would cause exit from configuration mode
 373             if (register_index == 0xaa)
 374                         register_value = 0xaa;
 375                 else
 376                 register_value = pnp_read_config(dev, register_index);
 377
 378         print_debug_char(' ');
 379         print_debug_hex8(register_value);
 380         if ((register_index & 0x0f) == 0x0f) {
 381                 print_debug("\r\n");
 382         }
 383     }
 384
 385         print_debug("\r\n");
 386 }
 387 #endif