src/superio/smsc/lpc47n217/superio.c

   1 /*
   2  * superio.c: RAM-based driver for SMSC LPC47N217 Super I/O chip
   3  *
   4  * Based on LinuxBIOS code for SMSC 47B397:
   5  * Copyright 2000  AG Electronics Ltd.
   6  * Copyright 2003-2004 Linux Networx
   7  * Copyright 2004 Tyan
   8  *
   9  * Copyright (C) 2005 Digital Design Corporation
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  24  */
  25
  26 #include <arch/io.h>
  27 #include <device/device.h>
  28 #include <device/pnp.h>
  29 #include <console/console.h>
  30 #include <device/smbus.h>
  31 #include <string.h>
  32 #include <bitops.h>
  33 #include <uart8250.h>
  34 #include <assert.h>
  35 #include "chip.h"
  36 #include "lpc47n217.h"
  37
  38 // Forward declarations
  39 static void enable_dev(device_t dev);
  40 void lpc47n217_pnp_set_resources(device_t dev);
  41 void lpc47n217_pnp_enable_resources(device_t dev);
  42 void lpc47n217_pnp_enable(device_t dev);
  43 static void lpc47n217_init(device_t dev);
  44
  45 static void lpc47n217_pnp_set_resource(device_t dev, struct resource *resource);
  46 void lpc47n217_pnp_set_iobase(device_t dev, unsigned iobase);
  47 void lpc47n217_pnp_set_drq(device_t dev, unsigned drq);
  48 void lpc47n217_pnp_set_irq(device_t dev, unsigned irq);
  49 void lpc47n217_pnp_set_enable(device_t dev, int enable);
  50
  51 static void pnp_enter_conf_state(device_t dev);
  52 static void pnp_exit_conf_state(device_t dev);
  53
  54
  55 struct chip_operations superio_smsc_lpc47n217_ops = {
  56         CHIP_NAME("SMSC LPC47N217 Super I/O")
  57         .enable_dev = enable_dev,
  58 };
  59
  60 static struct device_operations ops = {
  61         .read_resources   = pnp_read_resources,
  62         .set_resources    = lpc47n217_pnp_set_resources,
  63         .enable_resources = lpc47n217_pnp_enable_resources,
  64         .enable           = lpc47n217_pnp_enable,
  65         .init             = lpc47n217_init,
  66 };
  67
  68 static struct pnp_info pnp_dev_info[] = {
  69         { &ops, LPC47N217_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
  70         { &ops, LPC47N217_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
  71         { &ops, LPC47N217_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }
  72 };
  73
  74 /**********************************************************************************/
  75 /*                                                              PUBLIC INTERFACE                                                                  */
  76 /**********************************************************************************/
  77
  78 //----------------------------------------------------------------------------------
  79 // Function:            enable_dev
  80 // Parameters:          dev - pointer to structure describing a Super I/O device
  81 // Return Value:        None
  82 // Description:         Create device structures and allocate resources to devices
  83 //                                      specified in the pnp_dev_info array (above).
  84 //
  85 static void enable_dev(device_t dev)
  86 {
  87         pnp_enable_devices(dev, &pnp_ops,
  88                                            sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]),
  89                                            pnp_dev_info);
  90 }
  91
  92 //----------------------------------------------------------------------------------
  93 // Function:            lpc47n217_pnp_set_resources
  94 // Parameters:          dev - pointer to structure describing a Super I/O device
  95 // Return Value:        None
  96 // Description:         Configure the specified Super I/O device with the resources
  97 //                                      (I/O space, etc.) that have been allocate for it.
  98 //
  99 void lpc47n217_pnp_set_resources(device_t dev)
 100 {
 101         int i;
 102
 103         pnp_enter_conf_state(dev);
 104
 105         // NOTE: Cannot use pnp_set_resources() here because it assumes chip
 106         //               support for logical devices, which the LPC47N217 doesn't have
 107         for(i = 0; i < dev->resources; i++)
 108                 lpc47n217_pnp_set_resource(dev, &dev->resource[i]);
 109
 110 //      dump_pnp_device(dev);
 111
 112         pnp_exit_conf_state(dev);
 113 }
 114
 115 void lpc47n217_pnp_enable_resources(device_t dev)
 116 {
 117     pnp_enter_conf_state(dev);
 118
 119         // NOTE: Cannot use pnp_enable_resources() here because it assumes chip
 120         //               support for logical devices, which the LPC47N217 doesn't have
 121     lpc47n217_pnp_set_enable(dev, 1);
 122
 123     pnp_exit_conf_state(dev);
 124 }
 125
 126 void lpc47n217_pnp_enable(device_t dev)
 127 {
 128         pnp_enter_conf_state(dev);
 129
 130         // NOTE: Cannot use pnp_set_enable() here because it assumes chip
 131         //               support for logical devices, which the LPC47N217 doesn't have
 132
 133         if(dev->enabled) {
 134                 lpc47n217_pnp_set_enable(dev, 1);
 135         }
 136         else {
 137                 lpc47n217_pnp_set_enable(dev, 0);
 138         }
 139
 140         pnp_exit_conf_state(dev);
 141 }
 142
 143 //----------------------------------------------------------------------------------
 144 // Function:            lpc47n217_init
 145 // Parameters:          dev - pointer to structure describing a Super I/O device
 146 // Return Value:        None
 147 // Description:         Initialize the specified Super I/O device.
 148 //                                      Devices other than COM ports are ignored.
 149 //                                      For COM ports, we configure the baud rate.
 150 //
 151 static void lpc47n217_init(device_t dev)
 152 {
 153         struct superio_smsc_lpc47n217_config* conf = dev->chip_info;
 154         struct resource *res0;
 155
 156         if (!dev->enabled)
 157                 return;
 158
 159         switch(dev->path.u.pnp.device) {
 160         case LPC47N217_SP1:
 161                 res0 = find_resource(dev, PNP_IDX_IO0);
 162                 init_uart8250(res0->base, &conf->com1);
 163                 break;
 164
 165         case LPC47N217_SP2:
 166                 res0 = find_resource(dev, PNP_IDX_IO0);
 167                 init_uart8250(res0->base, &conf->com2);
 168                 break;
 169         }
 170 }
 171
 172
 173 /**********************************************************************************/
 174 /*                                                              PRIVATE FUNCTIONS                                                             */
 175 /**********************************************************************************/
 176
 177 static void lpc47n217_pnp_set_resource(device_t dev, struct resource *resource)
 178 {
 179         if (!(resource->flags & IORESOURCE_ASSIGNED)) {
 180                 printk_err("ERROR: %s %02x not allocated\n",
 181                         dev_path(dev), resource->index);
 182                 return;
 183         }
 184
 185         /* Now store the resource */
 186         // NOTE: Cannot use pnp_set_XXX() here because they assume chip
 187         //               support for logical devices, which the LPC47N217 doesn't have
 188
 189         if (resource->flags & IORESOURCE_IO) {
 190                 lpc47n217_pnp_set_iobase(dev, resource->base);
 191         }
 192         else if (resource->flags & IORESOURCE_DRQ) {
 193                 lpc47n217_pnp_set_drq(dev, resource->base);
 194         }
 195         else if (resource->flags  & IORESOURCE_IRQ) {
 196                 lpc47n217_pnp_set_irq(dev, resource->base);
 197         }
 198         else {
 199                 printk_err("ERROR: %s %02x unknown resource type\n",
 200                         dev_path(dev), resource->index);
 201                 return;
 202         }
 203         resource->flags |= IORESOURCE_STORED;
 204
 205         report_resource_stored(dev, resource, "");
 206 }
 207
 208 void lpc47n217_pnp_set_iobase(device_t dev, unsigned iobase)
 209 {
 210         ASSERT(!(iobase & 0x3));
 211
 212         switch(dev->path.u.pnp.device) {
 213         case LPC47N217_PP:
 214                 pnp_write_config(dev, 0x23, (iobase >> 2) & 0xff);
 215                 break;
 216
 217         case LPC47N217_SP1:
 218                 pnp_write_config(dev, 0x24, (iobase >> 2) & 0xff);
 219                 break;
 220
 221         case LPC47N217_SP2:
 222                 pnp_write_config(dev, 0x25, (iobase >> 2) & 0xff);
 223                 break;
 224
 225         default:
 226                 BUG();
 227                 break;
 228         }
 229 }
 230
 231 void lpc47n217_pnp_set_drq(device_t dev, unsigned drq)
 232 {
 233         if (dev->path.u.pnp.device == LPC47N217_PP) {
 234                 const uint8_t PP_DMA_MASK = 0x0F;
 235                 const uint8_t PP_DMA_SELECTION_REGISTER = 0x26;
 236                 uint8_t current_config = pnp_read_config(dev, PP_DMA_SELECTION_REGISTER);
 237                 uint8_t new_config;
 238
 239                 ASSERT(!(drq & ~PP_DMA_MASK));          // DRQ out of range??
 240                 new_config = (current_config & ~PP_DMA_MASK) | drq;
 241                 pnp_write_config(dev, PP_DMA_SELECTION_REGISTER, new_config);
 242         } else {
 243                 BUG();
 244         }
 245 }
 246
 247 void lpc47n217_pnp_set_irq(device_t dev, unsigned irq)
 248 {
 249         uint8_t irq_config_register = 0;
 250         uint8_t irq_config_mask = 0;
 251         uint8_t current_config;
 252         uint8_t new_config;
 253
 254         switch(dev->path.u.pnp.device) {
 255         case LPC47N217_PP:
 256                 irq_config_register = 0x27;
 257                 irq_config_mask = 0x0F;
 258                 break;
 259
 260         case LPC47N217_SP1:
 261                 irq_config_register = 0x28;
 262                 irq_config_mask = 0xF0;
 263                 irq <<= 4;
 264                 break;
 265
 266         case LPC47N217_SP2:
 267                 irq_config_register = 0x28;
 268                 irq_config_mask = 0x0F;
 269                 break;
 270
 271         default:
 272                 BUG();
 273                 return;
 274         }
 275
 276         ASSERT(!(irq & ~irq_config_mask));              // IRQ out of range??
 277
 278         current_config = pnp_read_config(dev, irq_config_register);
 279         new_config = (current_config & ~irq_config_mask) | irq;
 280         pnp_write_config(dev, irq_config_register, new_config);
 281 }
 282
 283 void lpc47n217_pnp_set_enable(device_t dev, int enable)
 284 {
 285         uint8_t power_register = 0;
 286         uint8_t power_mask = 0;
 287         uint8_t current_power;
 288         uint8_t new_power;
 289
 290         switch(dev->path.u.pnp.device) {
 291         case LPC47N217_PP:
 292                 power_register = 0x01;
 293                 power_mask = 0x04;
 294                 break;
 295
 296         case LPC47N217_SP1:
 297                 power_register = 0x02;
 298                 power_mask = 0x08;
 299                 break;
 300
 301         case LPC47N217_SP2:
 302                 power_register = 0x02;
 303                 power_mask = 0x80;
 304                 break;
 305
 306         default:
 307                 BUG();
 308                 return;
 309         }
 310
 311         current_power = pnp_read_config(dev, power_register);
 312         new_power = current_power & ~power_mask;                // disable by default
 313
 314         if (enable) {
 315                 struct resource* ioport_resource = find_resource(dev, PNP_IDX_IO0);
 316                 lpc47n217_pnp_set_iobase(dev, ioport_resource->base);
 317
 318                 new_power |= power_mask;                // Enable
 319
 320     } else {
 321                 lpc47n217_pnp_set_iobase(dev, 0);
 322         }
 323         pnp_write_config(dev, power_register, new_power);
 324 }
 325
 326
 327 //----------------------------------------------------------------------------------
 328 // Function:            pnp_enter_conf_state
 329 // Parameters:          dev - pointer to structure describing a Super I/O device
 330 // Return Value:        None
 331 // Description:         Enable access to the LPC47N217's configuration registers.
 332 //
 333 static void pnp_enter_conf_state(device_t dev)
 334 {
 335         outb(0x55, dev->path.u.pnp.port);
 336 }
 337
 338 //----------------------------------------------------------------------------------
 339 // Function:            pnp_exit_conf_state
 340 // Parameters:          dev - pointer to structure describing a Super I/O device
 341 // Return Value:        None
 342 // Description:         Disable access to the LPC47N217's configuration registers.
 343 //
 344 static void pnp_exit_conf_state(device_t dev)
 345 {
 346     outb(0xaa, dev->path.u.pnp.port);
 347 }
 348
 349 #if 0
 350 //----------------------------------------------------------------------------------
 351 // Function:            dump_pnp_device
 352 // Parameters:          dev - pointer to structure describing a Super I/O device
 353 // Return Value:        None
 354 // Description:         Print the values of all of the LPC47N217's configuration registers.
 355 //                                      NOTE: The LPC47N217 must be in configuration mode when this
 356 //                                                function is called.
 357 //
 358 static void dump_pnp_device(device_t dev)
 359 {
 360     int register_index;
 361     print_debug("\r\n");
 362
 363     for(register_index = 0; register_index <= LPC47N217_MAX_CONFIG_REGISTER; register_index++) {
 364         uint8_t register_value;
 365
 366         if ((register_index & 0x0f) == 0) {
 367                 print_debug_hex8(register_index);
 368                 print_debug_char(':');
 369         }
 370
 371                 // Skip over 'register' that would cause exit from configuration mode
 372             if (register_index == 0xaa)
 373                         register_value = 0xaa;
 374                 else
 375                 register_value = pnp_read_config(dev, register_index);
 376
 377         print_debug_char(' ');
 378         print_debug_hex8(register_value);
 379         if ((register_index & 0x0f) == 0x0f) {
 380                 print_debug("\r\n");
 381         }
 382     }
 383
 384         print_debug("\r\n");
 385 }
 386 #endif