2 * This file is part of the coreboot project.
4 * Copyright (C) 2009 coresystems GmbH
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 /* RAM driver for the SMSC LPC47M15X Super I/O chip */
23 #include <device/device.h>
24 #include <device/pnp.h>
25 #include <console/console.h>
26 #include <device/smbus.h>
30 #include <pc80/keyboard.h>
33 #include "lpc47m15x.h"
35 /* Forward declarations */
36 static void enable_dev(device_t dev);
37 static void lpc47m15x_pnp_set_resources(device_t dev);
38 static void lpc47m15x_pnp_enable_resources(device_t dev);
39 static void lpc47m15x_pnp_enable(device_t dev);
40 static void lpc47m15x_init(device_t dev);
42 static void pnp_enter_conf_state(device_t dev);
43 static void pnp_exit_conf_state(device_t dev);
44 static void dump_pnp_device(device_t dev);
46 struct chip_operations superio_smsc_lpc47m15x_ops = {
47 CHIP_NAME("SMSC LPC47M15x/192/997 Super I/O")
48 .enable_dev = enable_dev
51 static struct device_operations ops = {
52 .read_resources = pnp_read_resources,
53 .set_resources = lpc47m15x_pnp_set_resources,
54 .enable_resources = lpc47m15x_pnp_enable_resources,
55 .enable = lpc47m15x_pnp_enable,
56 .init = lpc47m15x_init,
59 static struct pnp_info pnp_dev_info[] = {
60 { &ops, LPC47M15X_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
61 { &ops, LPC47M15X_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
62 { &ops, LPC47M15X_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
63 { &ops, LPC47M15X_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
64 { &ops, LPC47M15X_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
67 static void enable_dev(device_t dev)
69 pnp_enable_devices(dev, &pnp_ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
72 static void lpc47m15x_pnp_set_resources(device_t dev)
74 pnp_enter_conf_state(dev);
75 pnp_set_resources(dev);
76 pnp_exit_conf_state(dev);
79 static void lpc47m15x_pnp_enable_resources(device_t dev)
81 pnp_enter_conf_state(dev);
82 pnp_enable_resources(dev);
83 pnp_exit_conf_state(dev);
86 static void lpc47m15x_pnp_enable(device_t dev)
88 pnp_enter_conf_state(dev);
89 pnp_set_logical_device(dev);
92 pnp_set_enable(dev, 1);
95 pnp_set_enable(dev, 0);
97 pnp_exit_conf_state(dev);
100 static void lpc47m15x_init(device_t dev)
102 struct superio_smsc_lpc47m15x_config *conf = dev->chip_info;
103 struct resource *res0, *res1;
108 switch(dev->path.pnp.device) {
110 res0 = find_resource(dev, PNP_IDX_IO0);
111 init_uart8250(res0->base, &conf->com1);
115 res0 = find_resource(dev, PNP_IDX_IO0);
116 init_uart8250(res0->base, &conf->com2);
120 res0 = find_resource(dev, PNP_IDX_IO0);
121 res1 = find_resource(dev, PNP_IDX_IO1);
122 init_pc_keyboard(0x60, 0x64, &conf->keyboard);
127 static void pnp_enter_conf_state(device_t dev)
129 outb(0x55, dev->path.pnp.port);
132 static void pnp_exit_conf_state(device_t dev)
134 outb(0xaa, dev->path.pnp.port);