add smsc part. Mod sun board to use smsc part for now
[coreboot.git] / src / superio / smsc / lpc47m10x / lpc47m10x_early_serial.c
1 /*\r
2  * $Header$\r
3  *\r
4  * lpc47m10x_early_serial.c: Pre-RAM driver for SMSC LPC47M10X2 Super I/O chip\r
5  * derived from lpc47n217
6  *\r
7  * Copyright (C) 2005 Digital Design Corporation\r
8  *\r
9  * This program is free software; you can redistribute it and/or modify\r
10  * it under the terms of the GNU General Public License as published by\r
11  * the Free Software Foundation; either version 2 of the License, or\r
12  * (at your option) any later version.\r
13  *\r
14  * This program is distributed in the hope that it will be useful,\r
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of\r
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
17  * GNU General Public License for more details.\r
18  *\r
19  * You should have received a copy of the GNU General Public License\r
20  * along with this program; if not, write to the Free Software\r
21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA\r
22  *\r
23  * $Log$\r
24  *\r
25  */\r
26
27 #include <arch/romcc_io.h>
28 #include "lpc47m10x.h"
29
30 //----------------------------------------------------------------------------------\r
31 // Function:            pnp_enter_conf_state\r
32 // Parameters:          dev - high 8 bits = Super I/O port\r
33 // Return Value:        None\r
34 // Description:         Enable access to the LPC47M10X2's configuration registers.\r
35 //\r
36 static inline void pnp_enter_conf_state(device_t dev) {
37         unsigned port = dev>>8;
38     outb(0x55, port);
39 }\r
40
41 //----------------------------------------------------------------------------------\r
42 // Function:            pnp_exit_conf_state\r
43 // Parameters:          dev - high 8 bits = Super I/O port\r
44 // Return Value:        None\r
45 // Description:         Disable access to the LPC47M10X2's configuration registers.\r
46 //\r
47 static void pnp_exit_conf_state(device_t dev) {
48         unsigned port = dev>>8;
49     outb(0xaa, port);
50 }
51
52 //----------------------------------------------------------------------------------\r
53 // Function:            lpc47b272_enable_serial\r
54 // Parameters:          dev - high 8 bits = Super I/O port, \r
55 //                                                low 8 bits = logical device number (per lpc47b272.h)\r
56 //                                      iobase - processor I/O port address to assign to this serial device\r
57 // Return Value:        bool\r
58 // Description:         Configure the base I/O port of the specified serial device\r
59 //                                      and enable the serial device.\r
60 //\r
61 static void lpc47b272_enable_serial(device_t dev, unsigned iobase)
62 {
63         pnp_enter_conf_state(dev);
64         pnp_set_logical_device(dev);
65         pnp_set_enable(dev, 0);
66         pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
67         pnp_set_enable(dev, 1);
68         pnp_exit_conf_state(dev);
69 }