2 * Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 #include <arch/romcc_io.h>
22 /* The base address is 0x2e or 0x4e, depending on config bytes. */
24 #define SIO_INDEX SIO_BASE
25 #define SIO_DATA SIO_BASE+1
27 /* Global Configuration Registers. */
28 #define IT8712F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */
29 #define IT8712F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */
30 #define IT8712F_CONFIG_REG_CONFIGSEL 0x22 /* Configuration Select. */
31 #define IT8712F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */
32 #define IT8712F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend, Flash I/F. */
34 #define IT8712F_CONFIGURATION_PORT 0x2E /* Write-only. */
36 /* The content of IT8712F_CONFIG_REG_LDN (index 0x07) must be set to the
37 * LDN the register belongs to, before you can access the register. */
38 static void it8712f_sio_write(uint8_t ldn, uint8_t index, uint8_t value)
40 outb(IT8712F_CONFIG_REG_LDN, SIO_BASE);
42 outb(index, SIO_BASE);
43 outb(value, SIO_DATA);
46 /* Enable the peripheral devices on the IT8712F Super IO chip. */
47 static void it8712f_enable_serial(device_t dev, unsigned iobase)
49 /* (1) Enter the configuration state (MB PnP mode). */
51 /* Perform MB PnP setup to put the SIO chip at 0x2e. */
52 /* Base address 0x2e: 0x87 0x01 0x55 0x55. */
53 /* Base address 0x4e: 0x87 0x01 0x55 0xaa. */
54 outb(0x87, IT8712F_CONFIGURATION_PORT);
55 outb(0x01, IT8712F_CONFIGURATION_PORT);
56 outb(0x55, IT8712F_CONFIGURATION_PORT);
57 outb(0x55, IT8712F_CONFIGURATION_PORT);
59 /* (2) Modify the data of configuration registers. */
61 /* Select the chip to configure (if there's more than one).
62 * Set bit 7 to select JP3=1, clear bit 7 to select JP3=0.
63 * If this register is not written, both chips are configured. */
64 /* it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CONFIGSEL, 0x00); */
66 /* Enable all devices. */
67 it8712f_sio_write(IT8712F_FDC, 0x30, 0x1); /* Floppy */
68 it8712f_sio_write(IT8712F_SP1, 0x30, 0x1); /* Serial port 1 */
69 it8712f_sio_write(IT8712F_SP2, 0x30, 0x1); /* Serial port 2 */
70 it8712f_sio_write(IT8712F_PP, 0x30, 0x1); /* Parallel port */
71 it8712f_sio_write(IT8712F_EC, 0x30, 0x1); /* Environment controller */
72 it8712f_sio_write(IT8712F_KBCK, 0x30, 0x1); /* Keyboard */
73 it8712f_sio_write(IT8712F_KBCM, 0x30, 0x1); /* Mouse */
74 it8712f_sio_write(IT8712F_MIDI, 0x30, 0x1); /* MIDI port */
75 it8712f_sio_write(IT8712F_GAME, 0x30, 0x1); /* GAME port */
76 it8712f_sio_write(IT8712F_IR, 0x30, 0x1); /* Consumer IR */
78 /* Select 24MHz/48MHz CLKIN (set/clear bit 0). TODO: Needed? */
79 /* it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CLOCKSEL, 0x00); */
81 /* Clear software suspend mode (clear bit 0). TODO: Needed? */
82 /* it8712f_sio_write(0x00, IT8712F_CONFIG_REG_SWSUSP, 0x00); */
84 /* (3) Exit the configuration state (MB PnP mode). */
85 it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CC, 0x02);