2 * Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 #include <arch/romcc_io.h>
22 /* The base address is 0x3f0, 0x3bd, or 0x370, depending on config bytes. */
23 #define SIO_BASE 0x3f0
24 #define SIO_INDEX SIO_BASE
25 #define SIO_DATA SIO_BASE+1
27 /* TODO: These values are actually from the IT8673F datasheet; check if
28 they're also valid for the IT8671F. */
29 #define IT8671F_CONFIG_REG_CC 0x02 /* Configure Control. */
30 #define IT8671F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */
31 #define IT8671F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */
32 #define IT8671F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend. */
34 #define IT8671F_ADDRESS_PORT 0x279
36 /* Special values used for entering MB PnP mode. The first four bytes of
37 * each line determine the address port, the last four are data. */
38 static const uint8_t init_values[] = {
39 0x6a, 0xb5, 0xda, 0xed, /**/ 0xf6, 0xfb, 0x7d, 0xbe,
40 0xdf, 0x6f, 0x37, 0x1b, /**/ 0x0d, 0x86, 0xc3, 0x61,
41 0xb0, 0x58, 0x2c, 0x16, /**/ 0x8b, 0x45, 0xa2, 0xd1,
42 0xe8, 0x74, 0x3a, 0x9d, /**/ 0xce, 0xe7, 0x73, 0x39,
45 /* The content of IT8671F_CONFIG_REG_LDN (index 07h) must be set to the
46 * LDN the register belongs to, before you can access the register. */
47 static void it8671f_sio_write(uint8_t ldn, uint8_t index, uint8_t value)
49 outb(IT8671F_CONFIG_REG_LDN, SIO_BASE);
51 outb(index, SIO_BASE);
52 outb(value, SIO_DATA);
55 /* Enable the peripheral devices on the IT8671F Super IO chip. */
56 static void it8671f_enable_serial(device_t dev, unsigned iobase)
60 /* (1) Enter the configuration state (MB PnP mode). */
62 /* Perform MB PnP setup to put the SIO chip at 0x3f0. */
63 /* Base address 0x3f0: 0x86 0x80 0x55 0x55. */
64 /* Base address 0x3bd: 0x86 0x80 0x55 0xaa. */
65 /* Base address 0x370: 0x86 0x80 0xaa 0x55. */
66 outb(0x86, IT8671F_ADDRESS_PORT);
67 outb(0x80, IT8671F_ADDRESS_PORT);
68 outb(0x55, IT8671F_ADDRESS_PORT);
69 outb(0x55, IT8671F_ADDRESS_PORT);
71 /* Sequentially write the 32 special values. */
72 for (i = 0; i < 32; i++) {
73 outb(init_values[i], SIO_BASE);
76 /* (2) Modify the data of configuration registers. */
78 /* Enable parallel port, serial port 1, serial port 2, floppy. */
79 it8671f_sio_write(0x00, 0x23, 0x0f);
81 /* Activate serial port 1 and 2. */
82 it8671f_sio_write(0x01, 0x30, 0x1);
83 it8671f_sio_write(0x02, 0x30, 0x1);
85 /* Select 24MHz CLKIN and clear software suspend mode. */
86 it8671f_sio_write(0x00, IT8671F_CONFIG_REG_SWSUSP, 0x00);
88 /* (3) Exit the configuration state (MB PnP mode). */
89 it8671f_sio_write(0x00, IT8671F_CONFIG_REG_CC, 0x02);