1 /* Copyright 2000 AG Electronics Ltd. */
2 /* This code is distributed without warranty under the GPL v2 (see COPYING) */
10 #define PNP_INDEX_REG 0x15C
13 #define PNP_DATA_REG 0x15D
16 #define SIO_COM1_BASE 0x3F8
19 #define SIO_COM2_BASE 0x2F8
22 void pnp_output(char address, char data)
24 outb(address, PNP_INDEX_REG);
25 outb(data, PNP_DATA_REG);
30 /* Enable Super IO Chip */
31 pnp_output(0x07, 6); /* LD 6 = UART1 */
32 pnp_output(0x30, 0); /* Dectivate */
33 pnp_output(0x60, SIO_COM1_BASE >> 8); /* IO Base */
34 pnp_output(0x61, SIO_COM1_BASE & 0xFF); /* IO Base */
35 pnp_output(0x30, 1); /* Activate */
39 struct superio_control superio_NSC_pc97307_control = {
40 pre_pci_init: (void *)0,
43 defaultport: SIO_COM1_BASE,