1 /* Copyright 2000 AG Electronics Ltd. */
2 /* This code is distributed without warranty under the GPL v2 (see COPYING) */
7 #define PNP_INDEX_REG 0x15C
10 #define PNP_DATA_REG 0x15D
13 #define SIO_COM1_BASE 0x3F8
16 #define SIO_COM2_BASE 0x2F8
19 void pnp_output(char address, char data)
21 outb(address, PNP_INDEX_REG);
22 outb(data, PNP_DATA_REG);
27 /* Enable Super IO Chip */
28 pnp_output(0x07, 6); /* LD 6 = UART1 */
29 pnp_output(0x30, 0); /* Dectivate */
30 pnp_output(0x60, SIO_COM1_BASE >> 8); /* IO Base */
31 pnp_output(0x61, SIO_COM1_BASE & 0xFF); /* IO Base */
32 pnp_output(0x30, 1); /* Activate */
36 struct superio_control superio_NSC_pc97307_control = {
37 pre_pci_init: (void *)0,
40 defaultport: SIO_COM1_BASE,