2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License v2 as published by
8 * the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #ifndef SOUTHBRIDGE_VIA_VT8237R_CHIP_H
21 #define SOUTHBRIDGE_VIA_VT8237R_CHIP_H
25 extern struct chip_operations southbridge_via_vt8237r_ops;
27 struct southbridge_via_vt8237r_config {
29 * Function disable. 1 = disabled.
32 * 5 Dev 16 fn 1 USB 1.1 UHCI Ports 2-3
33 * 4 Dev 16 fn 0 USB 1.1 UHCI Ports 0-1
34 * 3 Dev 15 fn 0 Serial ATA
35 * 2 Dev 16 fn 2 USB 1.1 UHCI Ports 4-5
36 * 1 Dev 16 fn 4 USB 2.0 EHCI
37 * 0 Dev 16 fn 3 USB 1.1 UHCI Ports 6-7
42 * 7 USB Device Mode 1=dis
44 * 5 Internal LAN Controller Clock Gating 1=gated
45 * 4 Internal LAN Controller 1=di
47 * 2 Internal PS2 Mouse 1=en
48 * 1 Internal KBC Configuration 0=dis ports 0x2e/0x2f off 0xe0-0xef
49 * 0 Internal Keyboard Controller 1=en
56 /* 1 = 80-pin cable, 0 = 40-pin cable */
57 int ide0_80pin_cable:1;
58 int ide1_80pin_cable:1;
61 #endif /* SOUTHBRIDGE_VIA_VT8237R_CHIP_H */