2 * This file is part of the LinuxBIOS project.
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License v2 as published by
8 * the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <device/device.h>
21 #include <device/pci.h>
22 #include <device/pci_ops.h>
23 #include <device/pci_ids.h>
24 #include <console/console.h>
26 /* This fine tunes the HT link settings, which were loaded by ROM strap. */
27 static void host_ctrl_enable(struct device *dev)
32 * Bit 4 is reserved but set by AW. Set PCI to HT outstanding
35 pci_write_config8(dev, 0xa0, 0x13);
37 /* Disable NVRAM and enable non-posted PCI writes. */
38 pci_write_config8(dev, 0xa1, 0x8e);
41 * NVRAM I/O base 0xe00-0xeff, but it is disabled.
42 * Some bits are set and reserved.
44 pci_write_config8(dev, 0xa2, 0x0e);
45 /* Arbitration control, some bits are reserved. */
46 pci_write_config8(dev, 0xa5, 0x3c);
48 /* Arbitration control 2 */
49 pci_write_config8(dev, 0xa6, 0x80);
51 writeback(dev, 0xa0, 0x13); /* Bit4 is reserved! */
52 writeback(dev, 0xa1, 0x8e); /* Some bits are reserved. */
53 writeback(dev, 0xa2, 0x0e); /* I/O NVRAM base 0xe00-0xeff disabled. */
54 writeback(dev, 0xa3, 0x31);
55 writeback(dev, 0xa4, 0x30);
57 writeback(dev, 0xa5, 0x3c); /* Some bits reserved. */
58 writeback(dev, 0xa6, 0x80); /* Some bits reserved. */
59 writeback(dev, 0xa7, 0x86); /* Some bits reserved. */
60 writeback(dev, 0xa8, 0x7f); /* Some bits reserved. */
61 writeback(dev, 0xa9, 0xcf); /* Some bits reserved. */
62 writeback(dev, 0xaa, 0x44);
63 writeback(dev, 0xab, 0x22);
64 writeback(dev, 0xac, 0x35); /* Maybe bit0 is read-only? */
66 writeback(dev, 0xae, 0x22);
67 writeback(dev, 0xaf, 0x40);
69 writeback(dev, 0xb1, 0x13);
70 writeback(dev, 0xb4, 0x02); /* Some bits are reserved. */
71 writeback(dev, 0xc0, 0x20);
72 writeback(dev, 0xc1, 0xaa);
73 writeback(dev, 0xc2, 0xaa);
74 writeback(dev, 0xc3, 0x02);
75 writeback(dev, 0xc4, 0x50);
76 writeback(dev, 0xc5, 0x50);
81 static struct device_operations host_ctrl_ops = {
82 .read_resources = pci_dev_read_resources,
83 .set_resources = pci_dev_set_resources,
84 .enable_resources = pci_dev_enable_resources,
85 .enable = host_ctrl_enable,
89 static struct pci_driver northbridge_driver __pci_driver = {
90 .ops = &host_ctrl_ops,
91 .vendor = PCI_VENDOR_ID_VIA,
92 .device = PCI_DEVICE_ID_VIA_K8T890CE_2,