2 * This file is part of the LinuxBIOS project.
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License v2 as published by
8 * the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <device/device.h>
21 #include <device/pci.h>
22 #include <device/pci_ops.h>
23 #include <device/pci_ids.h>
24 #include <console/console.h>
26 static void ctrl_enable(struct device *dev)
28 u8 regm, regm2, regm3;
29 device_t devfun3 = dev_find_device(PCI_VENDOR_ID_VIA,
30 PCI_DEVICE_ID_VIA_K8T890CE_3, 0);
32 /* TODO: Fix some ordering issue fo V-link set Rx77[6] and PCI1_Rx4F[0]
35 /* C2P Read ACK Return Priority */
36 /* PCI CFG Address bits[27:24] are used as extended register address
38 pci_write_config8(dev, 0x47, 0x30);
40 /* FIXME: Program V-link 8X 16bit full duplex, this needs to be fixed
41 for other than VT8237R SB */
42 pci_write_config8(dev, 0x48, 0x23);
44 /* Magic init. This is not well documented :/ */
45 pci_write_config8(dev, 0x70, 0xc2);
48 pci_write_config8(dev, 0x72, 0xee);
49 pci_write_config8(dev, 0x73, 0x01);
50 pci_write_config8(dev, 0x74, 0x24);
51 pci_write_config8(dev, 0x75, 0x0f);
52 pci_write_config8(dev, 0x76, 0x50);
53 pci_write_config8(dev, 0x77, 0x08);
54 pci_write_config8(dev, 0x78, 0x01);
56 pci_write_config8(dev, 0x7c, 0x7f);
57 pci_write_config8(dev, 0x7f, 0x02);
59 /* WARNING: Need to copy some registers from NB (D0F3) to SB (D0F7). */
61 regm = pci_read_config8(devfun3, 0x88); /* Shadow mem CTRL */
62 pci_write_config8(dev, 0x57, regm);
64 regm = pci_read_config8(devfun3, 0x80); /* Shadow page C */
65 pci_write_config8(dev, 0x61, regm);
67 regm = pci_read_config8(devfun3, 0x81); /* Shadow page D */
68 pci_write_config8(dev, 0x62, regm);
70 regm = pci_read_config8(devfun3, 0x86); /* SMM and APIC decoding */
71 pci_write_config8(dev, 0xe6, regm);
73 regm3 = pci_read_config8(devfun3, 0x82);/* Shadow page E */
76 * All access bits for 0xE0000-0xEFFFF encode as just 2 bits!
77 * So the NB reg is quite inconsistent, we expect there only 0xff or 0x00,
78 * and write them to 0x63 7-6 but! VIA 8237A has the mirror at 0x64!
85 /* Shadow page F + memhole copy */
86 regm = pci_read_config8(devfun3, 0x83);
87 pci_write_config8(dev, 0x63, regm3 | (regm & 0x3F));
90 static struct device_operations ctrl_ops = {
91 .read_resources = pci_dev_read_resources,
92 .set_resources = pci_dev_set_resources,
93 .enable_resources = pci_dev_enable_resources,
94 .enable = ctrl_enable,
98 static const struct pci_driver northbridge_driver __pci_driver = {
100 .vendor = PCI_VENDOR_ID_VIA,
101 .device = PCI_DEVICE_ID_VIA_K8T890CE_7,