2 * This file is part of the coreboot project.
4 * Copyright (C) 2008-2009 coresystems GmbH
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 #include <device/device.h>
23 #include <device/pci.h>
24 #include <device/pci_ops.h>
25 #include <device/pci_ids.h>
26 #include <console/console.h>
27 #include <device/cardbus.h>
32 static int cardbus_count = 0;
35 static void pci7420_cardbus_init(device_t dev)
41 struct southbridge_ti_pci7420_config *config = dev->chip_info;
42 int smartcard_enabled = 0;
44 printk(BIOS_DEBUG, "TI PCI7420/7620 init\n");
47 printk(BIOS_DEBUG, "PCI7420: No configuration found.\n");
49 smartcard_enabled = config->smartcard_enabled;
52 reg32 = pci_read_config32(dev, SYSCTL);
54 pci_write_config32(dev, SYSCTL, reg32);
57 reg8 = pci_read_config8(dev, CARDCTL);
59 pci_write_config8(dev, CARDCTL, reg8);
61 /* Power switch select and FM disable */
62 reg16 = pci_read_config16(dev, GENCTL);
63 reg16 |= P12V_SW_SEL; // 12V capable power switch
64 if (smartcard_enabled == 0)
66 pci_write_config16(dev, GENCTL, reg16);
68 /* Multifunction routing status */
69 pci_write_config32(dev, MFUNC, 0x018a1b22);
72 /* This is a workaround for buggy kernels. This should
73 * probably be read from the device tree, but as long
74 * as only one mainboard is using this bridge it does
77 * Basically what we do here is assign INTA to the first
78 * cardbus controller, and INTB to the second one. We know
79 * there are only two of them.
81 pci_write_config8(dev, PCI_INTERRUPT_PIN, cardbus_count);
86 void pci7420_cardbus_read_resources(device_t dev)
88 cardbus_read_resources(dev);
91 void pci7420_cardbus_set_resources(device_t dev)
93 printk(BIOS_DEBUG, "%s In set resources \n",dev_path(dev));
95 pci_dev_set_resources(dev);
97 printk(BIOS_DEBUG, "%s done set resources \n",dev_path(dev));
100 static struct device_operations ti_pci7420_ops = {
101 .read_resources = pci7420_cardbus_read_resources,
102 .set_resources = pci7420_cardbus_set_resources,
103 .enable_resources = cardbus_enable_resources,
104 .init = pci7420_cardbus_init,
105 .scan_bus = cardbus_scan_bridge,
108 static const struct pci_driver ti_pci7420_driver __pci_driver = {
109 .ops = &ti_pci7420_ops,
114 static const struct pci_driver ti_pci7620_driver __pci_driver = {
115 .ops = &ti_pci7420_ops,
120 static void ti_pci7420_enable_dev(device_t dev)
122 /* Nothing here yet */
125 struct chip_operations southbridge_ti_pci7420_ops = {
126 CHIP_NAME("Texas Instruments PCI7420/7620 Cardbus Controller")
127 .enable_dev = ti_pci7420_enable_dev,