trivial fix for the .data problem
[coreboot.git] / src / southbridge / sis / sis966 / sis966_usb2.c
1 /*
2  * This file is part of the LinuxBIOS project.
3  *
4  * Copyright (C) 2004 Tyan Computer
5  * Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer.
6  * Copyright (C) 2006,2007 AMD
7  * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
8  * Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS)
9  * Written by Morgan Tsai <my_tsai@sis.com> for SiS.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or
14  * (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
24  */
25
26 #include <console/console.h>
27 #include <device/device.h>
28 #include <device/pci.h>
29 #include <device/pci_ids.h>
30 #include <device/pci_ops.h>
31 #include <arch/io.h>
32 #include "sis966.h"
33 #if CONFIG_USBDEBUG_DIRECT
34 #include <usbdebug_direct.h>
35 #endif
36
37 extern struct ehci_debug_info dbg_info;
38
39 // From Y.S.
40 // PCI R43h-R40h=00000020h
41 // PCI R4Bh-R48h=00078010h
42 uint8_t SiS_SiS7002_init[19][3]={
43 {0x04, 0x00, 0x06},
44
45 {0x2C, 0xFF, 0x39},
46 {0x2D, 0xFF, 0x10},
47 {0x2E, 0xFF, 0x02},
48 {0x2F, 0xFF, 0x70},
49
50 {0x74, 0x00, 0x00},
51 {0x75, 0x00, 0x00},
52 {0x76, 0x00, 0x00},
53 {0x77, 0x00, 0x00},
54
55 {0x40, 0x00, 0x20},
56 {0x41, 0x00, 0x00},
57 {0x42, 0x00, 0x00},
58 {0x43, 0x00, 0x08},
59
60 {0x44, 0x00, 0x64},
61
62 {0x48, 0x00, 0x10},
63 {0x49, 0x00, 0x80},
64 {0x4A, 0x00, 0x07},
65 {0x4B, 0x00, 0x00},
66
67 {0x00, 0x00, 0x00}                                      //End of table
68 };
69
70
71
72 static void usb2_init(struct device *dev)
73 {
74        uint8_t *base;
75         struct resource *res;
76         uint32_t temp32;
77
78
79 //-------------- enable USB2.0 (SiS7002) -------------------------
80 {
81         uint8_t  temp8;
82         int i=0;
83
84         printk_debug("USB2.0_Init\n");
85
86         while(SiS_SiS7002_init[i][0] != 0)
87         {                               temp8 = pci_read_config8(dev, SiS_SiS7002_init[i][0]);
88                                         temp8 &= SiS_SiS7002_init[i][1];
89                                         temp8 |= SiS_SiS7002_init[i][2];
90                                         pci_write_config8(dev, SiS_SiS7002_init[i][0], temp8);
91                                         i++;
92         };
93 }
94
95        res = find_resource(dev, 0x10);
96         if(!res)
97                 return;
98
99         base =(uint8_t *) res->base;
100         printk_debug("base = %08x\n", base);
101        writel(0x2,base+0x20);
102 //-----------------------------------------------------------
103
104 #if 0
105 {
106     int i;
107     printk_debug("\nUSB 2.0 PCI config");
108     for(i=0;i<0xFF;i+=4)
109     {
110         if((i%16)==0)
111         {
112             print_debug("\r\n");print_debug_hex8(i);print_debug(": ");}
113             print_debug_hex32(pci_read_config32(dev,i));
114             print_debug("  ");
115         }
116         print_debug("\r\n");
117     }
118 #endif
119
120 }
121
122 static void usb2_set_resources(struct device *dev)
123 {
124 #if CONFIG_USBDEBUG_DIRECT
125         struct resource *res;
126         unsigned base;
127         unsigned old_debug;
128
129         old_debug = get_ehci_debug();
130         set_ehci_debug(0);
131 #endif
132         pci_dev_set_resources(dev);
133
134 #if CONFIG_USBDEBUG_DIRECT
135         res = find_resource(dev, 0x10);
136         set_ehci_debug(old_debug);
137         if (!res) return;
138         base = res->base;
139         set_ehci_base(base);
140         report_resource_stored(dev, res, "");
141 #endif
142
143 }
144
145 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
146 {
147         pci_write_config32(dev, 0x40,
148                 ((device & 0xffff) << 16) | (vendor & 0xffff));
149 }
150 static struct pci_operations lops_pci = {
151         .set_subsystem  = lpci_set_subsystem,
152 };
153
154 static struct device_operations usb2_ops  = {
155         .read_resources = pci_dev_read_resources,
156         .set_resources  = usb2_set_resources,
157         .enable_resources       = pci_dev_enable_resources,
158         .init           = usb2_init,
159 //      .enable         = sis966_enable,
160         .scan_bus       = 0,
161         .ops_pci        = &lops_pci,
162 };
163
164 static const struct pci_driver usb2_driver __pci_driver = {
165         .ops    = &usb2_ops,
166         .vendor = PCI_VENDOR_ID_SIS,
167         .device = PCI_DEVICE_ID_SIS_SIS966_EHCI,
168 };